91 lines
3.2 KiB
C++
91 lines
3.2 KiB
C++
//===-- BPFISelLowering.h - BPF DAG Lowering Interface ----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the interfaces that BPF uses to lower LLVM code into a
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// selection DAG.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_BPF_BPFISELLOWERING_H
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#define LLVM_LIB_TARGET_BPF_BPFISELLOWERING_H
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#include "BPF.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/Target/TargetLowering.h"
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namespace llvm {
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class BPFSubtarget;
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namespace BPFISD {
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enum NodeType : unsigned {
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FIRST_NUMBER = ISD::BUILTIN_OP_END,
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RET_FLAG,
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CALL,
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SELECT_CC,
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BR_CC,
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Wrapper
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};
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}
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class BPFTargetLowering : public TargetLowering {
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public:
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explicit BPFTargetLowering(const TargetMachine &TM, const BPFSubtarget &STI);
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// Provide custom lowering hooks for some operations.
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SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
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// This method returns the name of a target specific DAG node.
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const char *getTargetNodeName(unsigned Opcode) const override;
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MachineBasicBlock *
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EmitInstrWithCustomInserter(MachineInstr *MI,
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MachineBasicBlock *BB) const override;
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private:
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SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
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// Lower the result values of a call, copying them out of physregs into vregs
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SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
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CallingConv::ID CallConv, bool IsVarArg,
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const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL,
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SelectionDAG &DAG,
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SmallVectorImpl<SDValue> &InVals) const;
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// Lower a call into CALLSEQ_START - BPFISD:CALL - CALLSEQ_END chain
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SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI,
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SmallVectorImpl<SDValue> &InVals) const override;
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// Lower incoming arguments, copy physregs into vregs
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SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
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bool IsVarArg,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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SDLoc DL, SelectionDAG &DAG,
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SmallVectorImpl<SDValue> &InVals) const override;
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SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<SDValue> &OutVals, SDLoc DL,
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SelectionDAG &DAG) const override;
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EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
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bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc,
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MachineFunction &MF) const override {
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return Size >= 8 ? MVT::i64 : MVT::i32;
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}
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bool shouldConvertConstantLoadToIntImm(const APInt &Imm,
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Type *Ty) const override {
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return true;
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}
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};
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}
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#endif
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