66 lines
3.1 KiB
LLVM
66 lines
3.1 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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declare float @llvm.fabs.f32(float %Val)
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declare float @llvm.AMDGPU.fract.f32(float) nounwind readnone
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; Legacy name
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declare float @llvm.AMDIL.fraction.f32(float) nounwind readnone
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; FUNC-LABEL: {{^}}fract_f32:
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; CI: v_fract_f32_e32 [[RESULT:v[0-9]+]], [[INPUT:v[0-9]+]]
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; SI: v_floor_f32_e32 [[FLR:v[0-9]+]], [[INPUT:v[0-9]+]]
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; SI: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[FLR]], [[INPUT]]
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; GCN: buffer_store_dword [[RESULT]]
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; EG: FRACT
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define void @fract_f32(float addrspace(1)* %out, float addrspace(1)* %src) nounwind {
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%val = load float, float addrspace(1)* %src, align 4
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%fract = call float @llvm.AMDGPU.fract.f32(float %val) nounwind readnone
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store float %fract, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}fract_f32_legacy_amdil:
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; CI: v_fract_f32_e32 [[RESULT:v[0-9]+]], [[INPUT:v[0-9]+]]
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; SI: v_floor_f32_e32 [[FLR:v[0-9]+]], [[INPUT:v[0-9]+]]
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; SI: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[FLR]], [[INPUT]]
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; GCN: buffer_store_dword [[RESULT]]
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; EG: FRACT
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define void @fract_f32_legacy_amdil(float addrspace(1)* %out, float addrspace(1)* %src) nounwind {
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%val = load float, float addrspace(1)* %src, align 4
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%fract = call float @llvm.AMDIL.fraction.f32(float %val) nounwind readnone
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store float %fract, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}fract_f32_neg:
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; CI: v_fract_f32_e64 [[RESULT:v[0-9]+]], -[[INPUT:v[0-9]+]]
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; SI: v_floor_f32_e64 [[FLR:v[0-9]+]], -[[INPUT:v[0-9]+]]
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; SI: v_sub_f32_e64 [[RESULT:v[0-9]+]], -[[INPUT]], [[FLR]]
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; GCN: buffer_store_dword [[RESULT]]
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; EG: FRACT
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define void @fract_f32_neg(float addrspace(1)* %out, float addrspace(1)* %src) nounwind {
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%val = load float, float addrspace(1)* %src, align 4
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%neg = fsub float 0.0, %val
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%fract = call float @llvm.AMDGPU.fract.f32(float %neg) nounwind readnone
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store float %fract, float addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}fract_f32_neg_abs:
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; CI: v_fract_f32_e64 [[RESULT:v[0-9]+]], -|[[INPUT:v[0-9]+]]|
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; SI: v_floor_f32_e64 [[FLR:v[0-9]+]], -|[[INPUT:v[0-9]+]]|
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; SI: v_sub_f32_e64 [[RESULT:v[0-9]+]], -|[[INPUT]]|, [[FLR]]
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; GCN: buffer_store_dword [[RESULT]]
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; EG: FRACT
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define void @fract_f32_neg_abs(float addrspace(1)* %out, float addrspace(1)* %src) nounwind {
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%val = load float, float addrspace(1)* %src, align 4
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%abs = call float @llvm.fabs.f32(float %val)
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%neg = fsub float 0.0, %abs
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%fract = call float @llvm.AMDGPU.fract.f32(float %neg) nounwind readnone
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store float %fract, float addrspace(1)* %out, align 4
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ret void
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}
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