49 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			49 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s
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| ; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefix=SI %s
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| 
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| ; SI-LABEL: {{^}}vector_umax:
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| ; SI: v_max_u32_e32
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| define void @vector_umax(i32 %p0, i32 %p1, i32 addrspace(1)* %in) #0 {
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| main_body:
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|   %load = load i32, i32 addrspace(1)* %in, align 4
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|   %max = call i32 @llvm.AMDGPU.umax(i32 %p0, i32 %load)
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|   %bc = bitcast i32 %max to float
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|   call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
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|   ret void
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| }
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| 
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| ; SI-LABEL: {{^}}scalar_umax:
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| ; SI: s_max_u32
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| define void @scalar_umax(i32 %p0, i32 %p1) #0 {
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| entry:
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|   %max = call i32 @llvm.AMDGPU.umax(i32 %p0, i32 %p1)
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|   %bc = bitcast i32 %max to float
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|   call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
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|   ret void
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| }
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| 
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| ; SI-LABEL: {{^}}trunc_zext_umax:
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| ; SI: buffer_load_ubyte [[VREG:v[0-9]+]],
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| ; SI: v_max_u32_e32 [[RESULT:v[0-9]+]], 0, [[VREG]]
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| ; SI-NOT: and
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| ; SI: buffer_store_short [[RESULT]],
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| define void @trunc_zext_umax(i16 addrspace(1)* nocapture %out, i8 addrspace(1)* nocapture %src) nounwind {
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|   %tmp5 = load i8, i8 addrspace(1)* %src, align 1
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|   %tmp2 = zext i8 %tmp5 to i32
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|   %tmp3 = tail call i32 @llvm.AMDGPU.umax(i32 %tmp2, i32 0) nounwind readnone
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|   %tmp4 = trunc i32 %tmp3 to i8
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|   %tmp6 = zext i8 %tmp4 to i16
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|   store i16 %tmp6, i16 addrspace(1)* %out, align 2
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|   ret void
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| }
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| 
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| ; Function Attrs: readnone
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| declare i32 @llvm.AMDGPU.umax(i32, i32) #1
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| 
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| declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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| 
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| attributes #0 = { nounwind }
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| attributes #1 = { nounwind readnone }
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| 
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| !0 = !{!"const", null, i32 1}
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