227 lines
		
	
	
		
			6.4 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			227 lines
		
	
	
		
			6.4 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-ARM
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| ; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a9 | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-ARM
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| ; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-THUMB
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| ; rdar://8576755
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| 
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| 
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| define i32 @test1(i32 %X, i32 %Y, i8 %sh) {
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| ; CHECK-LABEL: test1:
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| ; CHECK-ARM: add r0, r0, r1, lsl r2
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| ; CHECK-THUMB: lsls r1, r2
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| ; CHECK-THUMB: add r0, r1
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|         %shift.upgrd.1 = zext i8 %sh to i32
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|         %A = shl i32 %Y, %shift.upgrd.1
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|         %B = add i32 %X, %A
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|         ret i32 %B
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| }
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| 
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| define i32 @test2(i32 %X, i32 %Y, i8 %sh) {
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| ; CHECK-LABEL: test2:
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| ; CHECK-ARM: bic r0, r0, r1, asr r2
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| ; CHECK-THUMB: asrs r1, r2
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| ; CHECK-THUMB: bics r0, r1
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|         %shift.upgrd.2 = zext i8 %sh to i32
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|         %A = ashr i32 %Y, %shift.upgrd.2
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|         %B = xor i32 %A, -1
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|         %C = and i32 %X, %B
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|         ret i32 %C
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| }
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| 
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| define i32 @test3(i32 %base, i32 %base2, i32 %offset) {
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| entry:
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| ; CHECK-LABEL: test3:
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| ; CHECK: ldr{{(.w)?}} r0, [r0, r2, lsl #2]
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| ; CHECK: ldr{{(.w)?}} r1, [r1, r2, lsl #2]
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|         %tmp1 = shl i32 %offset, 2
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|         %tmp2 = add i32 %base, %tmp1
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|         %tmp3 = inttoptr i32 %tmp2 to i32*
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|         %tmp4 = add i32 %base2, %tmp1
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|         %tmp5 = inttoptr i32 %tmp4 to i32*
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|         %tmp6 = load i32, i32* %tmp3
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|         %tmp7 = load i32, i32* %tmp5
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|         %tmp8 = add i32 %tmp7, %tmp6
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|         ret i32 %tmp8
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| }
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| 
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| declare i8* @malloc(...)
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| 
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| define fastcc void @test4(i16 %addr) nounwind {
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| entry:
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| ; CHECK-LABEL: test4:
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| ; CHECK: ldr{{(.w)?}} [[REG:r[0-9]+]], [r0, r1, lsl #2]
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| ; CHECK-NOT: ldr{{(.w)?}} [[REG:r[0-9]+]], [r0, r1, lsl #2]!
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| ; CHECK: str{{(.w)?}} [[REG]], [r0, r1, lsl #2]
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| ; CHECK-NOT: str{{(.w)?}} [[REG]], [r0]
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|   %0 = tail call i8* (...) @malloc(i32 undef) nounwind
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|   %1 = bitcast i8* %0 to i32*
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|   %2 = sext i16 %addr to i32
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|   %3 = getelementptr inbounds i32, i32* %1, i32 %2
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|   %4 = load i32, i32* %3, align 4
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|   %5 = add nsw i32 %4, 1
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|   store i32 %5, i32* %3, align 4
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|   ret void
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| }
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| 
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| define i32 @test_orr_extract_from_mul_1(i32 %x, i32 %y) {
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| entry:
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| ; CHECK-LABEL: test_orr_extract_from_mul_1
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| ; CHECK: movw r2, #63767
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| ; CHECK-ARM: mul r1, r1, r2
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| ; CHECK-ARM: orr r0, r1, r0
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| ; CHECK-THUMB: muls r1, r2, r1
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| ; CHECk-THUMB: orrs r0, r1
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|   %mul = mul i32 %y, 63767
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|   %or = or i32 %mul, %x
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|   ret i32 %or
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| }
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| 
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| define i32 @test_orr_extract_from_mul_2(i32 %x, i32 %y) {
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| ; CHECK-LABEL: test_orr_extract_from_mul_2
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| ; CHECK: movw r2, #63767
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| ; CHECK-ARM: mul r1, r1, r2
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| ; CHECK-THUMB: muls r1, r2, r1
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| ; CHECK: orr{{(.w)?}} r0, r0, r1, lsl #1
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| entry:
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|   %mul1 = mul i32 %y, 127534
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|   %or = or i32 %mul1, %x
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|   ret i32 %or
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| }
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| 
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| define i32 @test_orr_extract_from_mul_3(i32 %x, i32 %y) {
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| ; CHECK-LABEL: test_orr_extract_from_mul_3
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| ; CHECK: movw r2, #63767
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| ; CHECK-ARM: mul r1, r1, r2
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| ; CHECK-THUMB: muls r1, r2, r1
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| ; CHECK: orr{{(.w)?}} r0, r0, r1, lsl #2
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| entry:
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|   %mul1 = mul i32 %y, 255068
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|   %or = or i32 %mul1, %x
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|   ret i32 %or
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| }
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| 
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| define i32 @test_orr_extract_from_mul_4(i32 %x, i32 %y) {
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| ; CHECK-LABEL: test_orr_extract_from_mul_4
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| ; CHECK: movw r2, #63767
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| ; CHECK-ARM: mul r1, r1, r2
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| ; CHECK-THUMB: muls r1, r2, r1
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| ; CHECK: orr{{(.w)?}} r0, r0, r1, lsl #3
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| entry:
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|   %mul1 = mul i32 %y, 510136
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|   %or = or i32 %mul1, %x
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|   ret i32 %or
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| }
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| 
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| define i32 @test_orr_extract_from_mul_5(i32 %x, i32 %y) {
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| ; CHECK-LABEL: test_orr_extract_from_mul_5
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| ; CHECK: movw r2, #63767
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| ; CHECK-ARM: mul r1, r1, r2
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| ; CHECK-THUMB: muls r1, r2, r1
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| ; CHECK: orr{{(.w)?}} r0, r0, r1, lsl #4
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| entry:
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|   %mul1 = mul i32 %y, 1020272
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|   %or = or i32 %mul1, %x
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|   ret i32 %or
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| }
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| 
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| define i32 @test_orr_extract_from_mul_6(i32 %x, i32 %y) {
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| ; CHECK-LABEL: test_orr_extract_from_mul_6
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| ; CHECK: movw r2, #63767
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| ; CHECK-ARM: mul r1, r1, r2
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| ; CHECK-THUMB: muls r1, r2, r1
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| ; CHECK: orr{{(.w)?}} r0, r0, r1, lsl #16
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| entry:
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|   %mul = mul i32 %y, -115933184
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|   %or = or i32 %mul, %x
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|   ret i32 %or
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| }
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| 
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| define i32 @test_load_extract_from_mul_1(i8* %x, i32 %y) {
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| ; CHECK-LABEL: test_load_extract_from_mul_1
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| ; CHECK: movw r2, #63767
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| ; CHECK-ARM: mul r1, r1, r2
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| ; CHECK-THUMB: muls r1, r2, r1
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| ; CHECK: ldrb r0, [r0, r1]
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| entry:
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|   %mul = mul i32 %y, 63767
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|   %arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul
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|   %0 = load i8, i8* %arrayidx, align 1
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|   %conv = zext i8 %0 to i32
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|   ret i32 %conv
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| }
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| 
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| define i32 @test_load_extract_from_mul_2(i8* %x, i32 %y) {
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| ; CHECK-LABEL: test_load_extract_from_mul_2
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| ; CHECK: movw r2, #63767
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| ; CHECK-ARM: mul r1, r1, r2
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| ; CHECK-THUMB: muls r1, r2, r1
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| ; CHECK: ldrb{{(.w)?}} r0, [r0, r1, lsl #1]
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| entry:
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|   %mul1 = mul i32 %y, 127534
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|   %arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul1
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|   %0 = load i8, i8* %arrayidx, align 1
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|   %conv = zext i8 %0 to i32
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|   ret i32 %conv
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| }
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| 
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| define i32 @test_load_extract_from_mul_3(i8* %x, i32 %y) {
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| ; CHECK-LABEL: test_load_extract_from_mul_3
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| ; CHECK: movw r2, #63767
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| ; CHECK-ARM: mul r1, r1, r2
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| ; CHECK-THUMB: muls r1, r2, r1
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| ; CHECK: ldrb{{(.w)?}} r0, [r0, r1, lsl #2]
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| entry:
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|   %mul1 = mul i32 %y, 255068
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|   %arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul1
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|   %0 = load i8, i8* %arrayidx, align 1
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|   %conv = zext i8 %0 to i32
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|   ret i32 %conv
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| }
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| 
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| define i32 @test_load_extract_from_mul_4(i8* %x, i32 %y) {
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| ; CHECK-LABEL: test_load_extract_from_mul_4
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| ; CHECK: movw r2, #63767
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| ; CHECK-ARM: mul r1, r1, r2
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| ; CHECK-THUMB: muls r1, r2, r1
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| ; CHECK: ldrb{{(.w)?}} r0, [r0, r1, lsl #3]
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| entry:
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|   %mul1 = mul i32 %y, 510136
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|   %arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul1
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|   %0 = load i8, i8* %arrayidx, align 1
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|   %conv = zext i8 %0 to i32
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|   ret i32 %conv
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| }
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| 
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| define i32 @test_load_extract_from_mul_5(i8* %x, i32 %y) {
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| ; CHECK-LABEL: test_load_extract_from_mul_5
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| ; CHECK-ARM: movw r2, #63767
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| ; CHECK-ARM: mul r1, r1, r2
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| ; CHECK-ARM: ldrb r0, [r0, r1, lsl #4]
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| ; CHECK-THUMB: movw r2, #37232
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| ; CHECK-THUMB: movt r2, #15
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| ; CHECK-THUMB: muls r1, r2, r1
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| ; CHECK-THUMB: ldrb r0, [r0, r1]
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| entry:
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|   %mul1 = mul i32 %y, 1020272
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|   %arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul1
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|   %0 = load i8, i8* %arrayidx, align 1
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|   %conv = zext i8 %0 to i32
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|   ret i32 %conv
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| }
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| 
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| define i32 @test_load_extract_from_mul_6(i8* %x, i32 %y) {
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| ; CHECK-LABEL: test_load_extract_from_mul_6
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| ; CHECK-ARM: movw r2, #63767
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| ; CHECK-ARM: mul r1, r1, r2
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| ; CHECK-ARM: ldrb r0, [r0, r1, lsl #16]
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| ; CHECK-THUMB: movs r2, #0
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| ; CHECK-THUMB: movt r2, #63767
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| ; CHECK-THUMB: muls r1, r2, r1
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| ; CHECK-THUMB: ldrb r0, [r0, r1]
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| entry:
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|   %mul = mul i32 %y, -115933184
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|   %arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul
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|   %0 = load i8, i8* %arrayidx, align 1
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|   %conv = zext i8 %0 to i32
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|   ret i32 %conv
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| }
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