383 lines
13 KiB
C++
383 lines
13 KiB
C++
//===-- SystemZTDC.cpp - Utilize Test Data Class instruction --------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass looks for instructions that can be replaced by a Test Data Class
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// instruction, and replaces them when profitable.
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//
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// Roughly, the following rules are recognized:
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//
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// 1: fcmp pred X, 0 -> tdc X, mask
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// 2: fcmp pred X, +-inf -> tdc X, mask
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// 3: fcmp pred X, +-minnorm -> tdc X, mask
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// 4: tdc (fabs X), mask -> tdc X, newmask
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// 5: icmp slt (bitcast float X to int), 0 -> tdc X, mask [ie. signbit]
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// 6: icmp sgt (bitcast float X to int), -1 -> tdc X, mask
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// 7: icmp ne/eq (call @llvm.s390.tdc.*(X, mask)) -> tdc X, mask/~mask
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// 8: and i1 (tdc X, M1), (tdc X, M2) -> tdc X, (M1 & M2)
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// 9: or i1 (tdc X, M1), (tdc X, M2) -> tdc X, (M1 | M2)
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// 10: xor i1 (tdc X, M1), (tdc X, M2) -> tdc X, (M1 ^ M2)
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//
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// The pass works in 4 steps:
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//
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// 1. All fcmp and icmp instructions in a function are checked for a match
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// with rules 1-3 and 5-7. Their TDC equivalents are stored in
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// the ConvertedInsts mapping. If the operand of a fcmp instruction is
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// a fabs, it's also folded according to rule 4.
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// 2. All and/or/xor i1 instructions whose both operands have been already
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// mapped are mapped according to rules 8-10. LogicOpsWorklist is used
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// as a queue of instructions to check.
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// 3. All mapped instructions that are considered worthy of conversion (ie.
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// replacing them will actually simplify the final code) are replaced
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// with a call to the s390.tdc intrinsic.
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// 4. All intermediate results of replaced instructions are removed if unused.
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//
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// Instructions that match rules 1-3 are considered unworthy of conversion
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// on their own (since a comparison instruction is superior), but are mapped
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// in the hopes of folding the result using rules 4 and 8-10 (likely removing
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// the original comparison in the process).
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//
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//===----------------------------------------------------------------------===//
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#include "SystemZ.h"
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#include "llvm/ADT/MapVector.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/InstIterator.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/LegacyPassManager.h"
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#include "llvm/IR/Module.h"
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#include <deque>
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#include <set>
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using namespace llvm;
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namespace llvm {
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void initializeSystemZTDCPassPass(PassRegistry&);
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}
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namespace {
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class SystemZTDCPass : public FunctionPass {
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public:
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static char ID;
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SystemZTDCPass() : FunctionPass(ID) {
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initializeSystemZTDCPassPass(*PassRegistry::getPassRegistry());
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}
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bool runOnFunction(Function &F) override;
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private:
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// Maps seen instructions that can be mapped to a TDC, values are
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// (TDC operand, TDC mask, worthy flag) triples.
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MapVector<Instruction *, std::tuple<Value *, int, bool>> ConvertedInsts;
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// The queue of and/or/xor i1 instructions to be potentially folded.
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std::vector<BinaryOperator *> LogicOpsWorklist;
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// Instructions matched while folding, to be removed at the end if unused.
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std::set<Instruction *> PossibleJunk;
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// Tries to convert a fcmp instruction.
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void convertFCmp(CmpInst &I);
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// Tries to convert an icmp instruction.
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void convertICmp(CmpInst &I);
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// Tries to convert an i1 and/or/xor instruction, whose both operands
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// have been already converted.
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void convertLogicOp(BinaryOperator &I);
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// Marks an instruction as converted - adds it to ConvertedInsts and adds
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// any and/or/xor i1 users to the queue.
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void converted(Instruction *I, Value *V, int Mask, bool Worthy) {
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ConvertedInsts[I] = std::make_tuple(V, Mask, Worthy);
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auto &M = *I->getFunction()->getParent();
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auto &Ctx = M.getContext();
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for (auto *U : I->users()) {
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auto *LI = dyn_cast<BinaryOperator>(U);
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if (LI && LI->getType() == Type::getInt1Ty(Ctx) &&
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(LI->getOpcode() == Instruction::And ||
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LI->getOpcode() == Instruction::Or ||
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LI->getOpcode() == Instruction::Xor)) {
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LogicOpsWorklist.push_back(LI);
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}
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}
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}
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};
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} // end anonymous namespace
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char SystemZTDCPass::ID = 0;
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INITIALIZE_PASS(SystemZTDCPass, "systemz-tdc",
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"SystemZ Test Data Class optimization", false, false)
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FunctionPass *llvm::createSystemZTDCPass() {
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return new SystemZTDCPass();
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}
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void SystemZTDCPass::convertFCmp(CmpInst &I) {
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Value *Op0 = I.getOperand(0);
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auto *Const = dyn_cast<ConstantFP>(I.getOperand(1));
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auto Pred = I.getPredicate();
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// Only comparisons with consts are interesting.
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if (!Const)
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return;
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// Compute the smallest normal number (and its negation).
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auto &Sem = Op0->getType()->getFltSemantics();
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APFloat Smallest = APFloat::getSmallestNormalized(Sem);
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APFloat NegSmallest = Smallest;
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NegSmallest.changeSign();
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// Check if Const is one of our recognized consts.
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int WhichConst;
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if (Const->isZero()) {
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// All comparisons with 0 can be converted.
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WhichConst = 0;
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} else if (Const->isInfinity()) {
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// Likewise for infinities.
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WhichConst = Const->isNegative() ? 2 : 1;
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} else if (Const->isExactlyValue(Smallest)) {
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// For Smallest, we cannot do EQ separately from GT.
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if ((Pred & CmpInst::FCMP_OGE) != CmpInst::FCMP_OGE &&
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(Pred & CmpInst::FCMP_OGE) != 0)
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return;
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WhichConst = 3;
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} else if (Const->isExactlyValue(NegSmallest)) {
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// Likewise for NegSmallest, we cannot do EQ separately from LT.
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if ((Pred & CmpInst::FCMP_OLE) != CmpInst::FCMP_OLE &&
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(Pred & CmpInst::FCMP_OLE) != 0)
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return;
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WhichConst = 4;
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} else {
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// Not one of our special constants.
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return;
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}
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// Partial masks to use for EQ, GT, LT, UN comparisons, respectively.
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static const int Masks[][4] = {
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{ // 0
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SystemZ::TDCMASK_ZERO, // eq
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SystemZ::TDCMASK_POSITIVE, // gt
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SystemZ::TDCMASK_NEGATIVE, // lt
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SystemZ::TDCMASK_NAN, // un
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},
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{ // inf
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SystemZ::TDCMASK_INFINITY_PLUS, // eq
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0, // gt
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(SystemZ::TDCMASK_ZERO |
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SystemZ::TDCMASK_NEGATIVE |
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SystemZ::TDCMASK_NORMAL_PLUS |
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SystemZ::TDCMASK_SUBNORMAL_PLUS), // lt
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SystemZ::TDCMASK_NAN, // un
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},
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{ // -inf
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SystemZ::TDCMASK_INFINITY_MINUS, // eq
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(SystemZ::TDCMASK_ZERO |
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SystemZ::TDCMASK_POSITIVE |
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SystemZ::TDCMASK_NORMAL_MINUS |
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SystemZ::TDCMASK_SUBNORMAL_MINUS), // gt
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0, // lt
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SystemZ::TDCMASK_NAN, // un
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},
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{ // minnorm
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0, // eq (unsupported)
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(SystemZ::TDCMASK_NORMAL_PLUS |
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SystemZ::TDCMASK_INFINITY_PLUS), // gt (actually ge)
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(SystemZ::TDCMASK_ZERO |
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SystemZ::TDCMASK_NEGATIVE |
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SystemZ::TDCMASK_SUBNORMAL_PLUS), // lt
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SystemZ::TDCMASK_NAN, // un
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},
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{ // -minnorm
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0, // eq (unsupported)
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(SystemZ::TDCMASK_ZERO |
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SystemZ::TDCMASK_POSITIVE |
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SystemZ::TDCMASK_SUBNORMAL_MINUS), // gt
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(SystemZ::TDCMASK_NORMAL_MINUS |
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SystemZ::TDCMASK_INFINITY_MINUS), // lt (actually le)
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SystemZ::TDCMASK_NAN, // un
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}
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};
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// Construct the mask as a combination of the partial masks.
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int Mask = 0;
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if (Pred & CmpInst::FCMP_OEQ)
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Mask |= Masks[WhichConst][0];
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if (Pred & CmpInst::FCMP_OGT)
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Mask |= Masks[WhichConst][1];
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if (Pred & CmpInst::FCMP_OLT)
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Mask |= Masks[WhichConst][2];
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if (Pred & CmpInst::FCMP_UNO)
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Mask |= Masks[WhichConst][3];
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// A lone fcmp is unworthy of tdc conversion on its own, but may become
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// worthy if combined with fabs.
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bool Worthy = false;
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if (CallInst *CI = dyn_cast<CallInst>(Op0)) {
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Function *F = CI->getCalledFunction();
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if (F && F->getIntrinsicID() == Intrinsic::fabs) {
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// Fold with fabs - adjust the mask appropriately.
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Mask &= SystemZ::TDCMASK_PLUS;
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Mask |= Mask >> 1;
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Op0 = CI->getArgOperand(0);
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// A combination of fcmp with fabs is a win, unless the constant
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// involved is 0 (which is handled by later passes).
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Worthy = WhichConst != 0;
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PossibleJunk.insert(CI);
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}
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}
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converted(&I, Op0, Mask, Worthy);
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}
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void SystemZTDCPass::convertICmp(CmpInst &I) {
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Value *Op0 = I.getOperand(0);
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auto *Const = dyn_cast<ConstantInt>(I.getOperand(1));
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auto Pred = I.getPredicate();
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// All our icmp rules involve comparisons with consts.
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if (!Const)
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return;
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if (auto *Cast = dyn_cast<BitCastInst>(Op0)) {
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// Check for icmp+bitcast used for signbit.
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if (!Cast->getSrcTy()->isFloatTy() &&
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!Cast->getSrcTy()->isDoubleTy() &&
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!Cast->getSrcTy()->isFP128Ty())
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return;
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Value *V = Cast->getOperand(0);
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int Mask;
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if (Pred == CmpInst::ICMP_SLT && Const->isZero()) {
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// icmp slt (bitcast X), 0 - set if sign bit true
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Mask = SystemZ::TDCMASK_MINUS;
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} else if (Pred == CmpInst::ICMP_SGT && Const->isMinusOne()) {
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// icmp sgt (bitcast X), -1 - set if sign bit false
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Mask = SystemZ::TDCMASK_PLUS;
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} else {
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// Not a sign bit check.
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return;
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}
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PossibleJunk.insert(Cast);
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converted(&I, V, Mask, true);
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} else if (auto *CI = dyn_cast<CallInst>(Op0)) {
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// Check if this is a pre-existing call of our tdc intrinsic.
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Function *F = CI->getCalledFunction();
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if (!F || F->getIntrinsicID() != Intrinsic::s390_tdc)
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return;
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if (!Const->isZero())
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return;
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Value *V = CI->getArgOperand(0);
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auto *MaskC = dyn_cast<ConstantInt>(CI->getArgOperand(1));
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// Bail if the mask is not a constant.
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if (!MaskC)
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return;
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int Mask = MaskC->getZExtValue();
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Mask &= SystemZ::TDCMASK_ALL;
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if (Pred == CmpInst::ICMP_NE) {
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// icmp ne (call llvm.s390.tdc(...)), 0 -> simple TDC
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} else if (Pred == CmpInst::ICMP_EQ) {
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// icmp eq (call llvm.s390.tdc(...)), 0 -> TDC with inverted mask
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Mask ^= SystemZ::TDCMASK_ALL;
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} else {
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// An unknown comparison - ignore.
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return;
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}
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PossibleJunk.insert(CI);
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converted(&I, V, Mask, false);
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}
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}
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void SystemZTDCPass::convertLogicOp(BinaryOperator &I) {
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Value *Op0, *Op1;
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int Mask0, Mask1;
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bool Worthy0, Worthy1;
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std::tie(Op0, Mask0, Worthy0) = ConvertedInsts[cast<Instruction>(I.getOperand(0))];
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std::tie(Op1, Mask1, Worthy1) = ConvertedInsts[cast<Instruction>(I.getOperand(1))];
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if (Op0 != Op1)
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return;
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int Mask;
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switch (I.getOpcode()) {
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case Instruction::And:
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Mask = Mask0 & Mask1;
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break;
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case Instruction::Or:
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Mask = Mask0 | Mask1;
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break;
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case Instruction::Xor:
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Mask = Mask0 ^ Mask1;
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break;
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default:
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llvm_unreachable("Unknown op in convertLogicOp");
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}
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converted(&I, Op0, Mask, true);
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}
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bool SystemZTDCPass::runOnFunction(Function &F) {
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ConvertedInsts.clear();
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LogicOpsWorklist.clear();
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PossibleJunk.clear();
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// Look for icmp+fcmp instructions.
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for (auto &I : instructions(F)) {
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if (I.getOpcode() == Instruction::FCmp)
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convertFCmp(cast<CmpInst>(I));
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else if (I.getOpcode() == Instruction::ICmp)
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convertICmp(cast<CmpInst>(I));
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}
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// If none found, bail already.
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if (ConvertedInsts.empty())
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return false;
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// Process the queue of logic instructions.
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while (!LogicOpsWorklist.empty()) {
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BinaryOperator *Op = LogicOpsWorklist.back();
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LogicOpsWorklist.pop_back();
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// If both operands mapped, and the instruction itself not yet mapped,
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// convert it.
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if (ConvertedInsts.count(dyn_cast<Instruction>(Op->getOperand(0))) &&
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ConvertedInsts.count(dyn_cast<Instruction>(Op->getOperand(1))) &&
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!ConvertedInsts.count(Op))
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convertLogicOp(*Op);
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}
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// Time to actually replace the instructions. Do it in the reverse order
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// of finding them, since there's a good chance the earlier ones will be
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// unused (due to being folded into later ones).
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Module &M = *F.getParent();
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auto &Ctx = M.getContext();
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Value *Zero32 = ConstantInt::get(Type::getInt32Ty(Ctx), 0);
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bool MadeChange = false;
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for (auto &It : reverse(ConvertedInsts)) {
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Instruction *I = It.first;
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Value *V;
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int Mask;
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bool Worthy;
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std::tie(V, Mask, Worthy) = It.second;
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if (!I->user_empty()) {
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// If used and unworthy of conversion, skip it.
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if (!Worthy)
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continue;
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// Call the intrinsic, compare result with 0.
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Value *TDCFunc = Intrinsic::getDeclaration(&M, Intrinsic::s390_tdc,
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V->getType());
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IRBuilder<> IRB(I);
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Value *MaskVal = ConstantInt::get(Type::getInt64Ty(Ctx), Mask);
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Instruction *TDC = IRB.CreateCall(TDCFunc, {V, MaskVal});
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Value *ICmp = IRB.CreateICmp(CmpInst::ICMP_NE, TDC, Zero32);
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I->replaceAllUsesWith(ICmp);
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}
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// If unused, or used and converted, remove it.
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I->eraseFromParent();
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MadeChange = true;
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}
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if (!MadeChange)
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return false;
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// We've actually done something - now clear misc accumulated junk (fabs,
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// bitcast).
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for (auto *I : PossibleJunk)
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if (I->user_empty())
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I->eraseFromParent();
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return true;
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}
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