40 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			40 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-none-apple-ios7.0 -mcpu=cyclone | FileCheck %s
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| 
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| ; Check  trunc i64 operation is translated as a subregister access
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| ; eliminating an i32 induction varible.
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| 
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| ; CHECK-NOT: add {{x[0-9]+}}, {{x[0-9]+}}, #1
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| ; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, #1
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| ; CHECK-NEXT: cmp {{w[0-9]+}}, {{w[0-9]+}}
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| define void @test1_signed([8 x i8]* nocapture %a, i8* nocapture readonly %box, i8 %limit, i64 %inv) minsize {
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| entry:
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|   %conv = zext i8 %limit to i32
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|   %cmp223 = icmp eq i8 %limit, 0
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|   br i1 %cmp223, label %for.end15, label %for.body4.lr.ph.us
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| 
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| for.body4.us:
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|   %indvars.iv = phi i64 [ 0, %for.body4.lr.ph.us ], [ %indvars.iv.next, %for.body4.us ]
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|   %arrayidx6.us = getelementptr inbounds [8 x i8], [8 x i8]* %a, i64 %indvars.iv, i64 %inv
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|   %0 = load i8, i8* %arrayidx6.us, align 1
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|   %idxprom7.us = zext i8 %0 to i64
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|   %arrayidx8.us = getelementptr inbounds i8, i8* %box, i64 %idxprom7.us
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|   %1 = load i8, i8* %arrayidx8.us, align 1
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|   store i8 %1, i8* %arrayidx6.us, align 1
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|   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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|   %2 = trunc i64 %indvars.iv.next to i32
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|   %cmp2.us = icmp slt i32 %2, %conv
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|   br i1 %cmp2.us, label %for.body4.us, label %for.cond1.for.inc13_crit_edge.us
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| 
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| for.body4.lr.ph.us:
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|   %indvars.iv26 = phi i64 [ %indvars.iv.next27, %for.cond1.for.inc13_crit_edge.us ], [ 0, %entry ]
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|   br label %for.body4.us
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| 
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| for.cond1.for.inc13_crit_edge.us:
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|   %indvars.iv.next27 = add nuw nsw i64 %indvars.iv26, 1
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|   %exitcond28 = icmp eq i64 %indvars.iv26, 3
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|   br i1 %exitcond28, label %for.end15, label %for.body4.lr.ph.us
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| 
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| for.end15:
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|   ret void
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| }
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