203 lines
12 KiB
LLVM
203 lines
12 KiB
LLVM
; RUN: llc -march=hexagon -O2 -mcpu=hexagonv60 < %s | FileCheck %s
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; This was aborting while processing SUnits.
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; CHECK: vmem
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source_filename = "bugpoint-output-bdb0052.bc"
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target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
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target triple = "hexagon-unknown--elf"
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; Function Attrs: nounwind readnone
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declare <16 x i32> @llvm.hexagon.V6.lo(<32 x i32>) #0
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; Function Attrs: nounwind readnone
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declare <16 x i32> @llvm.hexagon.V6.hi(<32 x i32>) #0
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; Function Attrs: nounwind readnone
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declare <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32>, <16 x i32>, i32) #0
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; Function Attrs: nounwind readnone
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declare <32 x i32> @llvm.hexagon.V6.vdealvdd(<16 x i32>, <16 x i32>, i32) #0
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; Function Attrs: nounwind readnone
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declare <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32>, <16 x i32>) #0
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; Function Attrs: nounwind readnone
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declare <16 x i32> @llvm.hexagon.V6.vshufeh(<16 x i32>, <16 x i32>) #0
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; Function Attrs: nounwind readnone
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declare <16 x i32> @llvm.hexagon.V6.vshufoh(<16 x i32>, <16 x i32>) #0
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; Function Attrs: nounwind readnone
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declare <32 x i32> @llvm.hexagon.V6.vmpyuhv(<16 x i32>, <16 x i32>) #0
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; Function Attrs: nounwind readnone
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declare <16 x i32> @llvm.hexagon.V6.vaslw.acc(<16 x i32>, <16 x i32>, i32) #0
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define void @__error_op_vmpy_v__uh_v__uh__1() #1 {
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entry:
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%in_u16.host181 = load i16*, i16** undef, align 4
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%in_u32.host182 = load i32*, i32** undef, align 4
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br label %"for op_vmpy_v__uh_v__uh__1.s0.y"
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"for op_vmpy_v__uh_v__uh__1.s0.y": ; preds = %"end for op_vmpy_v__uh_v__uh__1.s0.x.x", %entry
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%op_vmpy_v__uh_v__uh__1.s0.y = phi i32 [ 0, %entry ], [ %63, %"end for op_vmpy_v__uh_v__uh__1.s0.x.x" ]
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%0 = mul nuw nsw i32 %op_vmpy_v__uh_v__uh__1.s0.y, 768
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%1 = add nuw nsw i32 %0, 32
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%2 = add nuw nsw i32 %0, 64
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%3 = add nuw nsw i32 %0, 96
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br label %"for op_vmpy_v__uh_v__uh__1.s0.x.x"
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"for op_vmpy_v__uh_v__uh__1.s0.x.x": ; preds = %"for op_vmpy_v__uh_v__uh__1.s0.x.x", %"for op_vmpy_v__uh_v__uh__1.s0.y"
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%.phi210 = phi i32* [ %in_u32.host182, %"for op_vmpy_v__uh_v__uh__1.s0.y" ], [ %.inc211.3, %"for op_vmpy_v__uh_v__uh__1.s0.x.x" ]
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%.phi213 = phi i16* [ %in_u16.host181, %"for op_vmpy_v__uh_v__uh__1.s0.y" ], [ %.inc214.3, %"for op_vmpy_v__uh_v__uh__1.s0.x.x" ]
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%op_vmpy_v__uh_v__uh__1.s0.x.x = phi i32 [ 0, %"for op_vmpy_v__uh_v__uh__1.s0.y" ], [ %61, %"for op_vmpy_v__uh_v__uh__1.s0.x.x" ]
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%4 = mul nuw nsw i32 %op_vmpy_v__uh_v__uh__1.s0.x.x, 32
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%5 = bitcast i32* %.phi210 to <16 x i32>*
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%6 = load <16 x i32>, <16 x i32>* %5, align 64, !tbaa !1
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%7 = add nuw nsw i32 %4, 16
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%8 = getelementptr inbounds i32, i32* %in_u32.host182, i32 %7
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%9 = bitcast i32* %8 to <16 x i32>*
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%10 = load <16 x i32>, <16 x i32>* %9, align 64, !tbaa !1
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%11 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %10, <16 x i32> %6)
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%e.i = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %11) #2
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%o.i = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %11) #2
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%r.i = tail call <32 x i32> @llvm.hexagon.V6.vdealvdd(<16 x i32> %o.i, <16 x i32> %e.i, i32 -4) #2
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%12 = bitcast i16* %.phi213 to <16 x i32>*
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%13 = load <16 x i32>, <16 x i32>* %12, align 64, !tbaa !4
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%a_lo.i = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %r.i) #2
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%a_hi.i = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %r.i) #2
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%a_e.i = tail call <16 x i32> @llvm.hexagon.V6.vshufeh(<16 x i32> %a_hi.i, <16 x i32> %a_lo.i) #2
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%a_o.i = tail call <16 x i32> @llvm.hexagon.V6.vshufoh(<16 x i32> %a_hi.i, <16 x i32> %a_lo.i) #2
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%ab_e.i = tail call <32 x i32> @llvm.hexagon.V6.vmpyuhv(<16 x i32> %a_e.i, <16 x i32> %13) #2
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%ab_o.i = tail call <32 x i32> @llvm.hexagon.V6.vmpyuhv(<16 x i32> %a_o.i, <16 x i32> %13) #2
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%a_lo.i.i = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %ab_e.i) #2
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%l_lo.i.i = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %ab_o.i) #2
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%s_lo.i.i = tail call <16 x i32> @llvm.hexagon.V6.vaslw.acc(<16 x i32> %a_lo.i.i, <16 x i32> %l_lo.i.i, i32 16) #2
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%l_hi.i.i = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %ab_o.i) #2
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%s_hi.i.i = tail call <16 x i32> @llvm.hexagon.V6.vaslw.acc(<16 x i32> undef, <16 x i32> %l_hi.i.i, i32 16) #2
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%s.i.i = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %s_hi.i.i, <16 x i32> %s_lo.i.i) #2
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%e.i189 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %s.i.i) #2
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%o.i190 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %s.i.i) #2
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%r.i191 = tail call <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32> %o.i190, <16 x i32> %e.i189, i32 -4) #2
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%14 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %r.i191)
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%15 = add nuw nsw i32 %4, %0
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%16 = getelementptr inbounds i32, i32* undef, i32 %15
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%17 = bitcast i32* %16 to <16 x i32>*
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store <16 x i32> %14, <16 x i32>* %17, align 64, !tbaa !6
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%18 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %r.i191)
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store <16 x i32> %18, <16 x i32>* undef, align 64, !tbaa !6
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%.inc211 = getelementptr i32, i32* %.phi210, i32 32
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%.inc214 = getelementptr i16, i16* %.phi213, i32 32
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%19 = bitcast i32* %.inc211 to <16 x i32>*
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%20 = load <16 x i32>, <16 x i32>* %19, align 64, !tbaa !1
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%21 = add nuw nsw i32 %4, 48
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%22 = getelementptr inbounds i32, i32* %in_u32.host182, i32 %21
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%23 = bitcast i32* %22 to <16 x i32>*
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%24 = load <16 x i32>, <16 x i32>* %23, align 64, !tbaa !1
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%25 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %24, <16 x i32> %20)
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%e.i.1 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %25) #2
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%r.i.1 = tail call <32 x i32> @llvm.hexagon.V6.vdealvdd(<16 x i32> undef, <16 x i32> %e.i.1, i32 -4) #2
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%26 = bitcast i16* %.inc214 to <16 x i32>*
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%27 = load <16 x i32>, <16 x i32>* %26, align 64, !tbaa !4
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%a_lo.i.1 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %r.i.1) #2
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%a_e.i.1 = tail call <16 x i32> @llvm.hexagon.V6.vshufeh(<16 x i32> undef, <16 x i32> %a_lo.i.1) #2
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%a_o.i.1 = tail call <16 x i32> @llvm.hexagon.V6.vshufoh(<16 x i32> undef, <16 x i32> %a_lo.i.1) #2
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%ab_e.i.1 = tail call <32 x i32> @llvm.hexagon.V6.vmpyuhv(<16 x i32> %a_e.i.1, <16 x i32> %27) #2
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%ab_o.i.1 = tail call <32 x i32> @llvm.hexagon.V6.vmpyuhv(<16 x i32> %a_o.i.1, <16 x i32> %27) #2
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%a_lo.i.i.1 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %ab_e.i.1) #2
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%s_lo.i.i.1 = tail call <16 x i32> @llvm.hexagon.V6.vaslw.acc(<16 x i32> %a_lo.i.i.1, <16 x i32> undef, i32 16) #2
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%a_hi.i.i.1 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %ab_e.i.1) #2
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%l_hi.i.i.1 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %ab_o.i.1) #2
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%s_hi.i.i.1 = tail call <16 x i32> @llvm.hexagon.V6.vaslw.acc(<16 x i32> %a_hi.i.i.1, <16 x i32> %l_hi.i.i.1, i32 16) #2
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%s.i.i.1 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %s_hi.i.i.1, <16 x i32> %s_lo.i.i.1) #2
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%e.i189.1 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %s.i.i.1) #2
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%o.i190.1 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %s.i.i.1) #2
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%r.i191.1 = tail call <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32> %o.i190.1, <16 x i32> %e.i189.1, i32 -4) #2
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%28 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %r.i191.1)
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%29 = add nuw nsw i32 %1, %4
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%30 = getelementptr inbounds i32, i32* undef, i32 %29
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%31 = bitcast i32* %30 to <16 x i32>*
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store <16 x i32> %28, <16 x i32>* %31, align 64, !tbaa !6
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%32 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %r.i191.1)
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%33 = add nuw nsw i32 %29, 16
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%34 = getelementptr inbounds i32, i32* undef, i32 %33
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%35 = bitcast i32* %34 to <16 x i32>*
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store <16 x i32> %32, <16 x i32>* %35, align 64, !tbaa !6
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%.inc211.1 = getelementptr i32, i32* %.phi210, i32 64
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%.inc214.1 = getelementptr i16, i16* %.phi213, i32 64
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%36 = bitcast i32* %.inc211.1 to <16 x i32>*
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%37 = load <16 x i32>, <16 x i32>* %36, align 64, !tbaa !1
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%38 = add nuw nsw i32 %4, 80
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%39 = getelementptr inbounds i32, i32* %in_u32.host182, i32 %38
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%40 = bitcast i32* %39 to <16 x i32>*
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%41 = load <16 x i32>, <16 x i32>* %40, align 64, !tbaa !1
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%42 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %41, <16 x i32> %37)
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%e.i.2 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %42) #2
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%o.i.2 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %42) #2
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%r.i.2 = tail call <32 x i32> @llvm.hexagon.V6.vdealvdd(<16 x i32> %o.i.2, <16 x i32> %e.i.2, i32 -4) #2
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%43 = bitcast i16* %.inc214.1 to <16 x i32>*
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%44 = load <16 x i32>, <16 x i32>* %43, align 64, !tbaa !4
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%a_lo.i.2 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %r.i.2) #2
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%a_hi.i.2 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %r.i.2) #2
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%a_e.i.2 = tail call <16 x i32> @llvm.hexagon.V6.vshufeh(<16 x i32> %a_hi.i.2, <16 x i32> %a_lo.i.2) #2
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%a_o.i.2 = tail call <16 x i32> @llvm.hexagon.V6.vshufoh(<16 x i32> %a_hi.i.2, <16 x i32> %a_lo.i.2) #2
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%ab_e.i.2 = tail call <32 x i32> @llvm.hexagon.V6.vmpyuhv(<16 x i32> %a_e.i.2, <16 x i32> %44) #2
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%ab_o.i.2 = tail call <32 x i32> @llvm.hexagon.V6.vmpyuhv(<16 x i32> %a_o.i.2, <16 x i32> %44) #2
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%l_lo.i.i.2 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %ab_o.i.2) #2
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%s_lo.i.i.2 = tail call <16 x i32> @llvm.hexagon.V6.vaslw.acc(<16 x i32> undef, <16 x i32> %l_lo.i.i.2, i32 16) #2
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%a_hi.i.i.2 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %ab_e.i.2) #2
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%l_hi.i.i.2 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %ab_o.i.2) #2
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%s_hi.i.i.2 = tail call <16 x i32> @llvm.hexagon.V6.vaslw.acc(<16 x i32> %a_hi.i.i.2, <16 x i32> %l_hi.i.i.2, i32 16) #2
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%s.i.i.2 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %s_hi.i.i.2, <16 x i32> %s_lo.i.i.2) #2
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%e.i189.2 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %s.i.i.2) #2
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%o.i190.2 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %s.i.i.2) #2
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%r.i191.2 = tail call <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32> %o.i190.2, <16 x i32> %e.i189.2, i32 -4) #2
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%45 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %r.i191.2)
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%46 = add nuw nsw i32 %2, %4
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%47 = getelementptr inbounds i32, i32* undef, i32 %46
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%48 = bitcast i32* %47 to <16 x i32>*
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store <16 x i32> %45, <16 x i32>* %48, align 64, !tbaa !6
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%49 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %r.i191.2)
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%50 = add nuw nsw i32 %46, 16
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%51 = getelementptr inbounds i32, i32* undef, i32 %50
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%52 = bitcast i32* %51 to <16 x i32>*
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store <16 x i32> %49, <16 x i32>* %52, align 64, !tbaa !6
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%e.i189.3 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> undef) #2
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%r.i191.3 = tail call <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32> undef, <16 x i32> %e.i189.3, i32 -4) #2
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%53 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %r.i191.3)
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%54 = add nuw nsw i32 %3, %4
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%55 = getelementptr inbounds i32, i32* undef, i32 %54
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%56 = bitcast i32* %55 to <16 x i32>*
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store <16 x i32> %53, <16 x i32>* %56, align 64, !tbaa !6
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%57 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %r.i191.3)
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%58 = add nuw nsw i32 %54, 16
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%59 = getelementptr inbounds i32, i32* undef, i32 %58
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%60 = bitcast i32* %59 to <16 x i32>*
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store <16 x i32> %57, <16 x i32>* %60, align 64, !tbaa !6
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%61 = add nuw nsw i32 %op_vmpy_v__uh_v__uh__1.s0.x.x, 4
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%62 = icmp eq i32 %61, 24
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%.inc211.3 = getelementptr i32, i32* %.phi210, i32 128
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%.inc214.3 = getelementptr i16, i16* %.phi213, i32 128
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br i1 %62, label %"end for op_vmpy_v__uh_v__uh__1.s0.x.x", label %"for op_vmpy_v__uh_v__uh__1.s0.x.x"
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"end for op_vmpy_v__uh_v__uh__1.s0.x.x": ; preds = %"for op_vmpy_v__uh_v__uh__1.s0.x.x"
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%63 = add nuw nsw i32 %op_vmpy_v__uh_v__uh__1.s0.y, 1
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br label %"for op_vmpy_v__uh_v__uh__1.s0.y"
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}
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attributes #0 = { nounwind readnone }
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attributes #1 = { "target-cpu"="hexagonv60" "target-features"="+hvx" }
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attributes #2 = { nounwind }
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!llvm.module.flags = !{!0}
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!0 = !{i32 2, !"halide_mattrs", !"+hvx"}
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!1 = !{!2, !2, i64 0}
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!2 = !{!"in_u32", !3}
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!3 = !{!"Halide buffer"}
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!4 = !{!5, !5, i64 0}
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!5 = !{!"in_u16", !3}
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!6 = !{!7, !7, i64 0}
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!7 = !{!"op_vmpy_v__uh_v__uh__1", !3}
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