183 lines
7.2 KiB
LLVM
183 lines
7.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw -mattr=+avx512dq -mattr=+avx512vl| FileCheck %s
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define <8 x i1> @test(<2 x i1> %a) {
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; CHECK-LABEL: test:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpsllq $63, %xmm0, %xmm0
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; CHECK-NEXT: vptestmq %xmm0, %xmm0, %k0
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; CHECK-NEXT: kshiftlb $2, %k0, %k0
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; CHECK-NEXT: vpmovm2w %k0, %xmm0
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; CHECK-NEXT: retq
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%res = shufflevector <2 x i1> %a, <2 x i1> undef, <8 x i32> <i32 undef, i32 undef, i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef>
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ret <8 x i1> %res
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}
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define <8 x i1> @test1(<2 x i1> %a) {
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; CHECK-LABEL: test1:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpsllq $63, %xmm0, %xmm0
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; CHECK-NEXT: vptestmq %xmm0, %xmm0, %k0
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; CHECK-NEXT: kshiftlb $4, %k0, %k0
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; CHECK-NEXT: vpmovm2w %k0, %xmm0
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; CHECK-NEXT: retq
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%res = shufflevector <2 x i1> %a, <2 x i1> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 undef, i32 undef>
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ret <8 x i1> %res
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}
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define <8 x i1> @test2(<2 x i1> %a) {
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; CHECK-LABEL: test2:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpsllq $63, %xmm0, %xmm0
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; CHECK-NEXT: vptestmq %xmm0, %xmm0, %k0
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; CHECK-NEXT: vpmovm2q %k0, %zmm0
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; CHECK-NEXT: vpxord %zmm1, %zmm1, %zmm1
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; CHECK-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0
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; CHECK-NEXT: vpmovq2m %zmm0, %k0
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; CHECK-NEXT: vpmovm2w %k0, %xmm0
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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%res = shufflevector <2 x i1> %a, <2 x i1> zeroinitializer, <8 x i32> <i32 3, i32 3, i32 undef, i32 undef, i32 0, i32 1, i32 undef, i32 undef>
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ret <8 x i1> %res
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}
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define <8 x i1> @test3(<4 x i1> %a) {
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; CHECK-LABEL: test3:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpslld $31, %xmm0, %xmm0
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; CHECK-NEXT: vptestmd %xmm0, %xmm0, %k0
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; CHECK-NEXT: kshiftlb $4, %k0, %k0
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; CHECK-NEXT: kshiftrb $4, %k0, %k0
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; CHECK-NEXT: vpmovm2w %k0, %xmm0
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; CHECK-NEXT: retq
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%res = shufflevector <4 x i1> %a, <4 x i1> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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ret <8 x i1> %res
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}
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define <8 x i1> @test4(<4 x i1> %a, <4 x i1>%b) {
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; CHECK-LABEL: test4:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpslld $31, %xmm0, %xmm0
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; CHECK-NEXT: vptestmd %xmm0, %xmm0, %k0
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; CHECK-NEXT: vpslld $31, %xmm1, %xmm0
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; CHECK-NEXT: vptestmd %xmm0, %xmm0, %k1
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; CHECK-NEXT: kshiftlb $4, %k1, %k1
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; CHECK-NEXT: kshiftlb $4, %k0, %k0
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; CHECK-NEXT: kshiftrb $4, %k0, %k0
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; CHECK-NEXT: korb %k1, %k0, %k0
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; CHECK-NEXT: vpmovm2w %k0, %xmm0
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; CHECK-NEXT: retq
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%res = shufflevector <4 x i1> %a, <4 x i1> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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ret <8 x i1> %res
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}
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define <4 x i1> @test5(<2 x i1> %a, <2 x i1>%b) {
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; CHECK-LABEL: test5:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpsllq $63, %xmm0, %xmm0
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; CHECK-NEXT: vptestmq %xmm0, %xmm0, %k0
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; CHECK-NEXT: vpsllq $63, %xmm1, %xmm0
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; CHECK-NEXT: vptestmq %xmm0, %xmm0, %k1
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; CHECK-NEXT: kshiftlb $2, %k1, %k1
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; CHECK-NEXT: kshiftlb $2, %k0, %k0
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; CHECK-NEXT: kshiftrb $2, %k0, %k0
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; CHECK-NEXT: korb %k1, %k0, %k0
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; CHECK-NEXT: vpmovm2d %k0, %xmm0
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; CHECK-NEXT: retq
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%res = shufflevector <2 x i1> %a, <2 x i1> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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ret <4 x i1> %res
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}
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define <16 x i1> @test6(<2 x i1> %a, <2 x i1>%b) {
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; CHECK-LABEL: test6:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpsllq $63, %xmm0, %xmm0
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; CHECK-NEXT: vptestmq %xmm0, %xmm0, %k0
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; CHECK-NEXT: vpsllq $63, %xmm1, %xmm0
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; CHECK-NEXT: vptestmq %xmm0, %xmm0, %k1
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; CHECK-NEXT: kshiftlb $2, %k1, %k1
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; CHECK-NEXT: kshiftlb $2, %k0, %k0
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; CHECK-NEXT: kshiftrb $2, %k0, %k0
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; CHECK-NEXT: korb %k1, %k0, %k0
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; CHECK-NEXT: kunpckbw %k0, %k0, %k0
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; CHECK-NEXT: vpmovm2b %k0, %xmm0
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; CHECK-NEXT: retq
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%res = shufflevector <2 x i1> %a, <2 x i1> %b, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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ret <16 x i1> %res
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}
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define <32 x i1> @test7(<4 x i1> %a, <4 x i1>%b) {
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; CHECK-LABEL: test7:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpslld $31, %xmm0, %xmm0
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; CHECK-NEXT: vptestmd %xmm0, %xmm0, %k0
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; CHECK-NEXT: vpslld $31, %xmm1, %xmm0
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; CHECK-NEXT: vptestmd %xmm0, %xmm0, %k1
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; CHECK-NEXT: kshiftlb $4, %k1, %k1
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; CHECK-NEXT: kshiftlb $4, %k0, %k0
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; CHECK-NEXT: kshiftrb $4, %k0, %k0
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; CHECK-NEXT: korb %k1, %k0, %k0
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; CHECK-NEXT: kunpckbw %k0, %k0, %k0
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; CHECK-NEXT: kunpckwd %k0, %k0, %k0
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; CHECK-NEXT: vpmovm2b %k0, %ymm0
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; CHECK-NEXT: retq
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%res = shufflevector <4 x i1> %a, <4 x i1> %b, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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ret <32 x i1> %res
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}
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define <64 x i1> @test8(<8 x i1> %a, <8 x i1>%b) {
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; CHECK-LABEL: test8:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpsllw $15, %xmm1, %xmm1
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; CHECK-NEXT: vpmovw2m %xmm1, %k0
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; CHECK-NEXT: vpsllw $15, %xmm0, %xmm0
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; CHECK-NEXT: vpmovw2m %xmm0, %k1
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; CHECK-NEXT: kunpckdq %k1, %k0, %k0
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; CHECK-NEXT: vpmovm2b %k0, %zmm0
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; CHECK-NEXT: retq
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%res = shufflevector <8 x i1> %a, <8 x i1> %b, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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ret <64 x i1> %res
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}
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define <4 x i1> @test9(<8 x i1> %a, <8 x i1> %b) {
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; CHECK-LABEL: test9:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpsllw $15, %xmm0, %xmm0
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; CHECK-NEXT: vpmovw2m %xmm0, %k0
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; CHECK-NEXT: kshiftrw $4, %k0, %k0
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; CHECK-NEXT: vpmovm2d %k0, %xmm0
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; CHECK-NEXT: retq
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%res = shufflevector <8 x i1> %a, <8 x i1> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
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ret <4 x i1> %res
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}
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define <2 x i1> @test10(<4 x i1> %a, <4 x i1> %b) {
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; CHECK-LABEL: test10:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpslld $31, %xmm0, %xmm0
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; CHECK-NEXT: vptestmd %xmm0, %xmm0, %k0
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; CHECK-NEXT: kshiftrw $2, %k0, %k0
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; CHECK-NEXT: vpmovm2q %k0, %xmm0
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; CHECK-NEXT: retq
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%res = shufflevector <4 x i1> %a, <4 x i1> %b, <2 x i32> <i32 2, i32 3>
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ret <2 x i1> %res
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}
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define <8 x i1> @test11(<4 x i1> %a, <4 x i1>%b) {
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; CHECK-LABEL: test11:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpslld $31, %xmm0, %xmm0
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; CHECK-NEXT: vptestmd %xmm0, %xmm0, %k0
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; CHECK-NEXT: kshiftlb $4, %k0, %k0
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; CHECK-NEXT: vpmovm2w %k0, %xmm0
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; CHECK-NEXT: retq
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%res = shufflevector <4 x i1> %a, <4 x i1> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3>
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ret <8 x i1> %res
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}
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