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llvm-project/llvm/lib/CodeGen/GlobalISel
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Jack Andersen f108c7f59d [GlobalISel] Allow DBG_VALUE to use undefined vregs before LiveDebugValues. 
Expanding on D109750.

Since `DBG_VALUE` instructions have final register validity determined in
`LDVImpl::handleDebugValue`, there is no apparent reason to immediately prune
unused register operands as their defs are erased. Consequently, this renders
`MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval` moot; gaining a
substantial performance improvement.

The only necessary changes involve making relevant passes consider invalid
DBG_VALUE vregs uses as valid.

Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D112852
 		2021-12-05 15:55:59 -05:00
..
CMakeLists.txt [GlobalISel] Add a store-merging optimization pass and enable for AArch64. 2021-11-15 21:10:39 -08:00
CSEInfo.cpp [GISel] Print better error messages for missing Combiner Observer calls 2021-07-01 15:18:18 -07:00
CSEMIRBuilder.cpp [GlobalISel] Add support for constant vector folding of binops in CSEMIRBuilder. 2021-10-12 11:31:22 -07:00
CallLowering.cpp Delay outgoing register assignments to last. 2021-10-04 12:33:20 -07:00
Combiner.cpp [GlobalISel] Allow DBG_VALUE to use undefined vregs before LiveDebugValues. 2021-12-05 15:55:59 -05:00
CombinerHelper.cpp [GlobalISel] Allow DBG_VALUE to use undefined vregs before LiveDebugValues. 2021-12-05 15:55:59 -05:00
GISelChangeObserver.cpp GlobalISel: Use Register 2020-08-19 13:45:31 -04:00
GISelKnownBits.cpp GlobalISel/Utils: Refactor integer/float constant match functions 2021-09-17 11:22:13 +02:00
GlobalISel.cpp [GlobalISel] Add a store-merging optimization pass and enable for AArch64. 2021-11-15 21:10:39 -08:00
IRTranslator.cpp [GlobalISel] Ensure that translateInvoke adds all successors for inlineasm 2021-11-09 16:20:34 -08:00
InlineAsmLowering.cpp [AArch64] Legalize MVT::i64x8 in DAG isel lowering 2021-07-31 09:51:28 +01:00
InstructionSelect.cpp [GlobalISel] Allow DBG_VALUE to use undefined vregs before LiveDebugValues. 2021-12-05 15:55:59 -05:00
InstructionSelector.cpp GlobalISel/Utils: Refactor integer/float constant match functions 2021-09-17 11:22:13 +02:00
LegacyLegalizerInfo.cpp [GlobalISel] NFC: Change LLT::vector to take ElementCount. 2021-06-24 11:26:12 +01:00
LegalityPredicates.cpp [AMDGPU][GlobalISel] Legalize G_MUL for non-standard types 2021-09-07 16:33:24 +02:00
LegalizeMutations.cpp [AMDGPU][GlobalISel] Legalize G_MUL for non-standard types 2021-09-07 16:33:24 +02:00
Legalizer.cpp [GlobalISel] Improve elimination of dead instructions in legalizer 2021-09-20 13:00:58 +02:00
LegalizerHelper.cpp [llvm] Use range-based for loops (NFC) 2021-11-25 22:17:10 -08:00
LegalizerInfo.cpp [GlobalISel] Add convenience constructors to MemDesc 2021-09-03 12:52:18 +02:00
LoadStoreOpt.cpp [CodeGen] Use range-based for loops (NFC) 2021-12-03 20:45:59 -08:00
Localizer.cpp [CodeGen] Use make_early_inc_range (NFC) 2021-09-18 09:29:24 -07:00
LostDebugLocObserver.cpp
…
MachineIRBuilder.cpp Fix MSVC "signed/unsigned mismatch" comparison warning. NFCI. 2021-08-30 12:11:09 +01:00
RegBankSelect.cpp [GlobalISel] Simplify RegBankSelect 2021-10-28 10:30:55 +02:00
RegisterBank.cpp [GlobalISel] Use ListSeparator (NFC) 2021-02-04 21:18:04 -08:00
RegisterBankInfo.cpp [LLVM][NFC]Inclusive language: remove occurances of sanity check/test from llvm 2021-11-24 17:29:55 -05:00
Utils.cpp [GlobalISel] Allow DBG_VALUE to use undefined vregs before LiveDebugValues. 2021-12-05 15:55:59 -05:00