Nemanja Ivanovic d6c0ef7887 [PowerPC] Handle base load with reservation mnemonic ... The Power ISA defined l[bhwdq]arx as both base and extended mnemonics. The base mnemonic takes the EH bit as an operand and the extended mnemonic omits it, making it implicitly zero. The existing implementation only handles the base mnemonic when EH is 1 and internally produces a different instruction. There are historical reasons for this. This patch simply removes the limitation introduced by this implementation that disallows the base mnemonic with EH = 0 in the ASM parser. This resolves an issue that prevented some files in the Linux kernel from being built with -fintegrated-as. Also fix a crash if the value is not an integer immediate.		2021-12-03 09:13:02 -06:00
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CMakeLists.txt	llvmbuildectomy - replace llvm-build by plain cmake	2020-11-13 10:35:24 +01:00
PPCAsmParser.cpp	[PowerPC] Handle base load with reservation mnemonic	2021-12-03 09:13:02 -06:00