2203 lines
74 KiB
LLVM
2203 lines
74 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
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;
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; udiv by 7
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;
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define <4 x i64> @test_div7_4i64(<4 x i64> %a) nounwind {
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; AVX1-LABEL: test_div7_4i64:
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; AVX1: # BB#0:
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX1-NEXT: vpextrq $1, %xmm1, %rcx
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; AVX1-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493
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; AVX1-NEXT: movq %rcx, %rax
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; AVX1-NEXT: mulq %rsi
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; AVX1-NEXT: subq %rdx, %rcx
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; AVX1-NEXT: shrq %rcx
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; AVX1-NEXT: addq %rdx, %rcx
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; AVX1-NEXT: shrq $2, %rcx
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; AVX1-NEXT: vmovq %rcx, %xmm2
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; AVX1-NEXT: vmovq %xmm1, %rcx
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; AVX1-NEXT: movq %rcx, %rax
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; AVX1-NEXT: mulq %rsi
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; AVX1-NEXT: subq %rdx, %rcx
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; AVX1-NEXT: shrq %rcx
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; AVX1-NEXT: addq %rdx, %rcx
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; AVX1-NEXT: shrq $2, %rcx
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; AVX1-NEXT: vmovq %rcx, %xmm1
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; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
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; AVX1-NEXT: vpextrq $1, %xmm0, %rcx
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; AVX1-NEXT: movq %rcx, %rax
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; AVX1-NEXT: mulq %rsi
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; AVX1-NEXT: subq %rdx, %rcx
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; AVX1-NEXT: shrq %rcx
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; AVX1-NEXT: addq %rdx, %rcx
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; AVX1-NEXT: shrq $2, %rcx
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; AVX1-NEXT: vmovq %rcx, %xmm2
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; AVX1-NEXT: vmovq %xmm0, %rcx
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; AVX1-NEXT: movq %rcx, %rax
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; AVX1-NEXT: mulq %rsi
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; AVX1-NEXT: subq %rdx, %rcx
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; AVX1-NEXT: shrq %rcx
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; AVX1-NEXT: addq %rdx, %rcx
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; AVX1-NEXT: shrq $2, %rcx
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; AVX1-NEXT: vmovq %rcx, %xmm0
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; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
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; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: test_div7_4i64:
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; AVX2: # BB#0:
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX2-NEXT: vpextrq $1, %xmm1, %rcx
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; AVX2-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493
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; AVX2-NEXT: movq %rcx, %rax
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; AVX2-NEXT: mulq %rsi
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; AVX2-NEXT: subq %rdx, %rcx
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; AVX2-NEXT: shrq %rcx
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; AVX2-NEXT: addq %rdx, %rcx
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; AVX2-NEXT: shrq $2, %rcx
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; AVX2-NEXT: vmovq %rcx, %xmm2
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; AVX2-NEXT: vmovq %xmm1, %rcx
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; AVX2-NEXT: movq %rcx, %rax
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; AVX2-NEXT: mulq %rsi
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; AVX2-NEXT: subq %rdx, %rcx
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; AVX2-NEXT: shrq %rcx
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; AVX2-NEXT: addq %rdx, %rcx
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; AVX2-NEXT: shrq $2, %rcx
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; AVX2-NEXT: vmovq %rcx, %xmm1
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; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
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; AVX2-NEXT: vpextrq $1, %xmm0, %rcx
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; AVX2-NEXT: movq %rcx, %rax
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; AVX2-NEXT: mulq %rsi
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; AVX2-NEXT: subq %rdx, %rcx
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; AVX2-NEXT: shrq %rcx
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; AVX2-NEXT: addq %rdx, %rcx
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; AVX2-NEXT: shrq $2, %rcx
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; AVX2-NEXT: vmovq %rcx, %xmm2
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; AVX2-NEXT: vmovq %xmm0, %rcx
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; AVX2-NEXT: movq %rcx, %rax
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; AVX2-NEXT: mulq %rsi
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; AVX2-NEXT: subq %rdx, %rcx
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; AVX2-NEXT: shrq %rcx
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; AVX2-NEXT: addq %rdx, %rcx
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; AVX2-NEXT: shrq $2, %rcx
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; AVX2-NEXT: vmovq %rcx, %xmm0
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; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
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; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
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; AVX2-NEXT: retq
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%res = udiv <4 x i64> %a, <i64 7, i64 7, i64 7, i64 7>
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ret <4 x i64> %res
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}
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define <8 x i32> @test_div7_8i32(<8 x i32> %a) nounwind {
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; AVX1-LABEL: test_div7_8i32:
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; AVX1: # BB#0:
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX1-NEXT: vpextrd $1, %xmm1, %eax
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; AVX1-NEXT: imulq $613566757, %rax, %rcx # imm = 0x24924925
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; AVX1-NEXT: shrq $32, %rcx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vmovd %xmm1, %ecx
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; AVX1-NEXT: imulq $613566757, %rcx, %rdx # imm = 0x24924925
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; AVX1-NEXT: shrq $32, %rdx
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; AVX1-NEXT: subl %edx, %ecx
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; AVX1-NEXT: shrl %ecx
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; AVX1-NEXT: addl %edx, %ecx
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; AVX1-NEXT: shrl $2, %ecx
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; AVX1-NEXT: vmovd %ecx, %xmm2
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; AVX1-NEXT: vpinsrd $1, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrd $2, %xmm1, %eax
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; AVX1-NEXT: imulq $613566757, %rax, %rcx # imm = 0x24924925
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; AVX1-NEXT: shrq $32, %rcx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrd $3, %xmm1, %eax
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; AVX1-NEXT: imulq $613566757, %rax, %rcx # imm = 0x24924925
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; AVX1-NEXT: shrq $32, %rcx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vpinsrd $3, %eax, %xmm2, %xmm1
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; AVX1-NEXT: vpextrd $1, %xmm0, %eax
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; AVX1-NEXT: imulq $613566757, %rax, %rcx # imm = 0x24924925
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; AVX1-NEXT: shrq $32, %rcx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vmovd %xmm0, %ecx
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; AVX1-NEXT: imulq $613566757, %rcx, %rdx # imm = 0x24924925
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; AVX1-NEXT: shrq $32, %rdx
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; AVX1-NEXT: subl %edx, %ecx
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; AVX1-NEXT: shrl %ecx
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; AVX1-NEXT: addl %edx, %ecx
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; AVX1-NEXT: shrl $2, %ecx
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; AVX1-NEXT: vmovd %ecx, %xmm2
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; AVX1-NEXT: vpinsrd $1, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrd $2, %xmm0, %eax
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; AVX1-NEXT: imulq $613566757, %rax, %rcx # imm = 0x24924925
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; AVX1-NEXT: shrq $32, %rcx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrd $3, %xmm0, %eax
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; AVX1-NEXT: imulq $613566757, %rax, %rcx # imm = 0x24924925
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; AVX1-NEXT: shrq $32, %rcx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vpinsrd $3, %eax, %xmm2, %xmm0
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; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: test_div7_8i32:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm1
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; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm1[1,1,3,3,5,5,7,7]
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; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm0[1,1,3,3,5,5,7,7]
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; AVX2-NEXT: vpmuludq %ymm2, %ymm3, %ymm2
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; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm1
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; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[1,1,3,3,5,5,7,7]
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; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2],ymm2[3],ymm1[4],ymm2[5],ymm1[6],ymm2[7]
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; AVX2-NEXT: vpsubd %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: vpsrld $1, %ymm0, %ymm0
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; AVX2-NEXT: vpaddd %ymm1, %ymm0, %ymm0
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; AVX2-NEXT: vpsrld $2, %ymm0, %ymm0
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; AVX2-NEXT: retq
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%res = udiv <8 x i32> %a, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
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ret <8 x i32> %res
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}
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define <16 x i16> @test_div7_16i16(<16 x i16> %a) nounwind {
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; AVX1-LABEL: test_div7_16i16:
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; AVX1: # BB#0:
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX1-NEXT: vpextrw $1, %xmm1, %eax
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; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
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; AVX1-NEXT: shrl $16, %ecx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: andl $65534, %eax # imm = 0xFFFE
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vmovd %xmm1, %ecx
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; AVX1-NEXT: movzwl %cx, %edx
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; AVX1-NEXT: imull $9363, %edx, %edx # imm = 0x2493
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; AVX1-NEXT: shrl $16, %edx
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; AVX1-NEXT: subl %edx, %ecx
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; AVX1-NEXT: andl $65534, %ecx # imm = 0xFFFE
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; AVX1-NEXT: shrl %ecx
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; AVX1-NEXT: addl %edx, %ecx
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; AVX1-NEXT: shrl $2, %ecx
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; AVX1-NEXT: vmovd %ecx, %xmm2
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; AVX1-NEXT: vpinsrw $1, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrw $2, %xmm1, %eax
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; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
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; AVX1-NEXT: shrl $16, %ecx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: andl $65534, %eax # imm = 0xFFFE
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vpinsrw $2, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrw $3, %xmm1, %eax
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; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
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; AVX1-NEXT: shrl $16, %ecx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: andl $65534, %eax # imm = 0xFFFE
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vpinsrw $3, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrw $4, %xmm1, %eax
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; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
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; AVX1-NEXT: shrl $16, %ecx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: andl $65534, %eax # imm = 0xFFFE
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vpinsrw $4, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrw $5, %xmm1, %eax
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; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
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; AVX1-NEXT: shrl $16, %ecx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: andl $65534, %eax # imm = 0xFFFE
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vpinsrw $5, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrw $6, %xmm1, %eax
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; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
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; AVX1-NEXT: shrl $16, %ecx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: andl $65534, %eax # imm = 0xFFFE
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vpinsrw $6, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrw $7, %xmm1, %eax
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; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
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; AVX1-NEXT: shrl $16, %ecx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: andl $65534, %eax # imm = 0xFFFE
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vpinsrw $7, %eax, %xmm2, %xmm1
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; AVX1-NEXT: vpextrw $1, %xmm0, %eax
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; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
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; AVX1-NEXT: shrl $16, %ecx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: andl $65534, %eax # imm = 0xFFFE
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vmovd %xmm0, %ecx
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; AVX1-NEXT: movzwl %cx, %edx
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; AVX1-NEXT: imull $9363, %edx, %edx # imm = 0x2493
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; AVX1-NEXT: shrl $16, %edx
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; AVX1-NEXT: subl %edx, %ecx
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; AVX1-NEXT: andl $65534, %ecx # imm = 0xFFFE
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; AVX1-NEXT: shrl %ecx
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; AVX1-NEXT: addl %edx, %ecx
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; AVX1-NEXT: shrl $2, %ecx
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; AVX1-NEXT: vmovd %ecx, %xmm2
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; AVX1-NEXT: vpinsrw $1, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrw $2, %xmm0, %eax
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; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
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; AVX1-NEXT: shrl $16, %ecx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: andl $65534, %eax # imm = 0xFFFE
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vpinsrw $2, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrw $3, %xmm0, %eax
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; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
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; AVX1-NEXT: shrl $16, %ecx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: andl $65534, %eax # imm = 0xFFFE
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vpinsrw $3, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrw $4, %xmm0, %eax
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; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
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; AVX1-NEXT: shrl $16, %ecx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: andl $65534, %eax # imm = 0xFFFE
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vpinsrw $4, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrw $5, %xmm0, %eax
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; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
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; AVX1-NEXT: shrl $16, %ecx
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; AVX1-NEXT: subl %ecx, %eax
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; AVX1-NEXT: andl $65534, %eax # imm = 0xFFFE
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; AVX1-NEXT: shrl %eax
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; AVX1-NEXT: addl %ecx, %eax
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; AVX1-NEXT: shrl $2, %eax
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; AVX1-NEXT: vpinsrw $5, %eax, %xmm2, %xmm2
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; AVX1-NEXT: vpextrw $6, %xmm0, %eax
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; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: andl $65534, %eax # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %eax
|
|
; AVX1-NEXT: addl %ecx, %eax
|
|
; AVX1-NEXT: shrl $2, %eax
|
|
; AVX1-NEXT: vpinsrw $6, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrw $7, %xmm0, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: andl $65534, %eax # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %eax
|
|
; AVX1-NEXT: addl %ecx, %eax
|
|
; AVX1-NEXT: shrl $2, %eax
|
|
; AVX1-NEXT: vpinsrw $7, %eax, %xmm2, %xmm0
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: test_div7_16i16:
|
|
; AVX2: # BB#0:
|
|
; AVX2-NEXT: vpmulhuw {{.*}}(%rip), %ymm0, %ymm1
|
|
; AVX2-NEXT: vpsubw %ymm1, %ymm0, %ymm0
|
|
; AVX2-NEXT: vpsrlw $1, %ymm0, %ymm0
|
|
; AVX2-NEXT: vpaddw %ymm1, %ymm0, %ymm0
|
|
; AVX2-NEXT: vpsrlw $2, %ymm0, %ymm0
|
|
; AVX2-NEXT: retq
|
|
%res = udiv <16 x i16> %a, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
|
|
ret <16 x i16> %res
|
|
}
|
|
|
|
define <32 x i8> @test_div7_32i8(<32 x i8> %a) nounwind {
|
|
; AVX1-LABEL: test_div7_32i8:
|
|
; AVX1: # BB#0:
|
|
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX1-NEXT: vpextrb $1, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpextrb $0, %xmm1, %ecx
|
|
; AVX1-NEXT: imull $37, %ecx, %edx
|
|
; AVX1-NEXT: shrl $8, %edx
|
|
; AVX1-NEXT: subb %dl, %cl
|
|
; AVX1-NEXT: shrb %cl
|
|
; AVX1-NEXT: addb %dl, %cl
|
|
; AVX1-NEXT: shrb $2, %cl
|
|
; AVX1-NEXT: movzbl %cl, %ecx
|
|
; AVX1-NEXT: vmovd %ecx, %xmm2
|
|
; AVX1-NEXT: vpinsrb $1, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $2, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $3, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $4, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $5, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $6, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $7, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $8, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $9, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $10, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $11, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $12, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $13, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $14, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $15, %xmm1, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1
|
|
; AVX1-NEXT: vpextrb $1, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpextrb $0, %xmm0, %ecx
|
|
; AVX1-NEXT: imull $37, %ecx, %edx
|
|
; AVX1-NEXT: shrl $8, %edx
|
|
; AVX1-NEXT: subb %dl, %cl
|
|
; AVX1-NEXT: shrb %cl
|
|
; AVX1-NEXT: addb %dl, %cl
|
|
; AVX1-NEXT: shrb $2, %cl
|
|
; AVX1-NEXT: movzbl %cl, %ecx
|
|
; AVX1-NEXT: vmovd %ecx, %xmm2
|
|
; AVX1-NEXT: vpinsrb $1, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $2, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $3, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $4, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $5, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $6, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $7, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $8, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $9, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $10, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $11, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $12, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $13, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $14, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $15, %xmm0, %eax
|
|
; AVX1-NEXT: imull $37, %eax, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movzbl %al, %eax
|
|
; AVX1-NEXT: vpinsrb $15, %eax, %xmm2, %xmm0
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: test_div7_32i8:
|
|
; AVX2: # BB#0:
|
|
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
|
|
; AVX2-NEXT: vpextrb $1, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpextrb $0, %xmm1, %ecx
|
|
; AVX2-NEXT: imull $37, %ecx, %edx
|
|
; AVX2-NEXT: shrl $8, %edx
|
|
; AVX2-NEXT: subb %dl, %cl
|
|
; AVX2-NEXT: shrb %cl
|
|
; AVX2-NEXT: addb %dl, %cl
|
|
; AVX2-NEXT: shrb $2, %cl
|
|
; AVX2-NEXT: movzbl %cl, %ecx
|
|
; AVX2-NEXT: vmovd %ecx, %xmm2
|
|
; AVX2-NEXT: vpinsrb $1, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $2, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $3, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $4, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $5, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $6, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $7, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $8, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $9, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $10, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $11, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $12, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $13, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $14, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $15, %xmm1, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1
|
|
; AVX2-NEXT: vpextrb $1, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpextrb $0, %xmm0, %ecx
|
|
; AVX2-NEXT: imull $37, %ecx, %edx
|
|
; AVX2-NEXT: shrl $8, %edx
|
|
; AVX2-NEXT: subb %dl, %cl
|
|
; AVX2-NEXT: shrb %cl
|
|
; AVX2-NEXT: addb %dl, %cl
|
|
; AVX2-NEXT: shrb $2, %cl
|
|
; AVX2-NEXT: movzbl %cl, %ecx
|
|
; AVX2-NEXT: vmovd %ecx, %xmm2
|
|
; AVX2-NEXT: vpinsrb $1, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $2, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $3, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $4, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $5, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $6, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $7, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $8, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $9, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $10, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $11, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $12, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $13, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $14, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $15, %xmm0, %eax
|
|
; AVX2-NEXT: imull $37, %eax, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movzbl %al, %eax
|
|
; AVX2-NEXT: vpinsrb $15, %eax, %xmm2, %xmm0
|
|
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
|
|
; AVX2-NEXT: retq
|
|
%res = udiv <32 x i8> %a, <i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7>
|
|
ret <32 x i8> %res
|
|
}
|
|
|
|
;
|
|
; urem by 7
|
|
;
|
|
|
|
define <4 x i64> @test_rem7_4i64(<4 x i64> %a) nounwind {
|
|
; AVX1-LABEL: test_rem7_4i64:
|
|
; AVX1: # BB#0:
|
|
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX1-NEXT: vpextrq $1, %xmm1, %rcx
|
|
; AVX1-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493
|
|
; AVX1-NEXT: movq %rcx, %rax
|
|
; AVX1-NEXT: mulq %rsi
|
|
; AVX1-NEXT: movq %rcx, %rax
|
|
; AVX1-NEXT: subq %rdx, %rax
|
|
; AVX1-NEXT: shrq %rax
|
|
; AVX1-NEXT: addq %rdx, %rax
|
|
; AVX1-NEXT: shrq $2, %rax
|
|
; AVX1-NEXT: leaq (,%rax,8), %rdx
|
|
; AVX1-NEXT: subq %rax, %rdx
|
|
; AVX1-NEXT: subq %rdx, %rcx
|
|
; AVX1-NEXT: vmovq %rcx, %xmm2
|
|
; AVX1-NEXT: vmovq %xmm1, %rcx
|
|
; AVX1-NEXT: movq %rcx, %rax
|
|
; AVX1-NEXT: mulq %rsi
|
|
; AVX1-NEXT: movq %rcx, %rax
|
|
; AVX1-NEXT: subq %rdx, %rax
|
|
; AVX1-NEXT: shrq %rax
|
|
; AVX1-NEXT: addq %rdx, %rax
|
|
; AVX1-NEXT: shrq $2, %rax
|
|
; AVX1-NEXT: leaq (,%rax,8), %rdx
|
|
; AVX1-NEXT: subq %rax, %rdx
|
|
; AVX1-NEXT: subq %rdx, %rcx
|
|
; AVX1-NEXT: vmovq %rcx, %xmm1
|
|
; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
|
|
; AVX1-NEXT: vpextrq $1, %xmm0, %rcx
|
|
; AVX1-NEXT: movq %rcx, %rax
|
|
; AVX1-NEXT: mulq %rsi
|
|
; AVX1-NEXT: movq %rcx, %rax
|
|
; AVX1-NEXT: subq %rdx, %rax
|
|
; AVX1-NEXT: shrq %rax
|
|
; AVX1-NEXT: addq %rdx, %rax
|
|
; AVX1-NEXT: shrq $2, %rax
|
|
; AVX1-NEXT: leaq (,%rax,8), %rdx
|
|
; AVX1-NEXT: subq %rax, %rdx
|
|
; AVX1-NEXT: subq %rdx, %rcx
|
|
; AVX1-NEXT: vmovq %rcx, %xmm2
|
|
; AVX1-NEXT: vmovq %xmm0, %rcx
|
|
; AVX1-NEXT: movq %rcx, %rax
|
|
; AVX1-NEXT: mulq %rsi
|
|
; AVX1-NEXT: movq %rcx, %rax
|
|
; AVX1-NEXT: subq %rdx, %rax
|
|
; AVX1-NEXT: shrq %rax
|
|
; AVX1-NEXT: addq %rdx, %rax
|
|
; AVX1-NEXT: shrq $2, %rax
|
|
; AVX1-NEXT: leaq (,%rax,8), %rdx
|
|
; AVX1-NEXT: subq %rax, %rdx
|
|
; AVX1-NEXT: subq %rdx, %rcx
|
|
; AVX1-NEXT: vmovq %rcx, %xmm0
|
|
; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: test_rem7_4i64:
|
|
; AVX2: # BB#0:
|
|
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
|
|
; AVX2-NEXT: vpextrq $1, %xmm1, %rcx
|
|
; AVX2-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493
|
|
; AVX2-NEXT: movq %rcx, %rax
|
|
; AVX2-NEXT: mulq %rsi
|
|
; AVX2-NEXT: movq %rcx, %rax
|
|
; AVX2-NEXT: subq %rdx, %rax
|
|
; AVX2-NEXT: shrq %rax
|
|
; AVX2-NEXT: addq %rdx, %rax
|
|
; AVX2-NEXT: shrq $2, %rax
|
|
; AVX2-NEXT: leaq (,%rax,8), %rdx
|
|
; AVX2-NEXT: subq %rax, %rdx
|
|
; AVX2-NEXT: subq %rdx, %rcx
|
|
; AVX2-NEXT: vmovq %rcx, %xmm2
|
|
; AVX2-NEXT: vmovq %xmm1, %rcx
|
|
; AVX2-NEXT: movq %rcx, %rax
|
|
; AVX2-NEXT: mulq %rsi
|
|
; AVX2-NEXT: movq %rcx, %rax
|
|
; AVX2-NEXT: subq %rdx, %rax
|
|
; AVX2-NEXT: shrq %rax
|
|
; AVX2-NEXT: addq %rdx, %rax
|
|
; AVX2-NEXT: shrq $2, %rax
|
|
; AVX2-NEXT: leaq (,%rax,8), %rdx
|
|
; AVX2-NEXT: subq %rax, %rdx
|
|
; AVX2-NEXT: subq %rdx, %rcx
|
|
; AVX2-NEXT: vmovq %rcx, %xmm1
|
|
; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
|
|
; AVX2-NEXT: vpextrq $1, %xmm0, %rcx
|
|
; AVX2-NEXT: movq %rcx, %rax
|
|
; AVX2-NEXT: mulq %rsi
|
|
; AVX2-NEXT: movq %rcx, %rax
|
|
; AVX2-NEXT: subq %rdx, %rax
|
|
; AVX2-NEXT: shrq %rax
|
|
; AVX2-NEXT: addq %rdx, %rax
|
|
; AVX2-NEXT: shrq $2, %rax
|
|
; AVX2-NEXT: leaq (,%rax,8), %rdx
|
|
; AVX2-NEXT: subq %rax, %rdx
|
|
; AVX2-NEXT: subq %rdx, %rcx
|
|
; AVX2-NEXT: vmovq %rcx, %xmm2
|
|
; AVX2-NEXT: vmovq %xmm0, %rcx
|
|
; AVX2-NEXT: movq %rcx, %rax
|
|
; AVX2-NEXT: mulq %rsi
|
|
; AVX2-NEXT: movq %rcx, %rax
|
|
; AVX2-NEXT: subq %rdx, %rax
|
|
; AVX2-NEXT: shrq %rax
|
|
; AVX2-NEXT: addq %rdx, %rax
|
|
; AVX2-NEXT: shrq $2, %rax
|
|
; AVX2-NEXT: leaq (,%rax,8), %rdx
|
|
; AVX2-NEXT: subq %rax, %rdx
|
|
; AVX2-NEXT: subq %rdx, %rcx
|
|
; AVX2-NEXT: vmovq %rcx, %xmm0
|
|
; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
|
|
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
|
|
; AVX2-NEXT: retq
|
|
%res = urem <4 x i64> %a, <i64 7, i64 7, i64 7, i64 7>
|
|
ret <4 x i64> %res
|
|
}
|
|
|
|
define <8 x i32> @test_rem7_8i32(<8 x i32> %a) nounwind {
|
|
; AVX1-LABEL: test_rem7_8i32:
|
|
; AVX1: # BB#0:
|
|
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX1-NEXT: vpextrd $1, %xmm1, %eax
|
|
; AVX1-NEXT: imulq $613566757, %rax, %rcx # imm = 0x24924925
|
|
; AVX1-NEXT: shrq $32, %rcx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vmovd %xmm1, %ecx
|
|
; AVX1-NEXT: imulq $613566757, %rcx, %rdx # imm = 0x24924925
|
|
; AVX1-NEXT: shrq $32, %rdx
|
|
; AVX1-NEXT: movl %ecx, %esi
|
|
; AVX1-NEXT: subl %edx, %esi
|
|
; AVX1-NEXT: shrl %esi
|
|
; AVX1-NEXT: addl %edx, %esi
|
|
; AVX1-NEXT: shrl $2, %esi
|
|
; AVX1-NEXT: leal (,%rsi,8), %edx
|
|
; AVX1-NEXT: subl %esi, %edx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: vmovd %ecx, %xmm2
|
|
; AVX1-NEXT: vpinsrd $1, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrd $2, %xmm1, %eax
|
|
; AVX1-NEXT: imulq $613566757, %rax, %rcx # imm = 0x24924925
|
|
; AVX1-NEXT: shrq $32, %rcx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrd $3, %xmm1, %eax
|
|
; AVX1-NEXT: imulq $613566757, %rax, %rcx # imm = 0x24924925
|
|
; AVX1-NEXT: shrq $32, %rcx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrd $3, %eax, %xmm2, %xmm1
|
|
; AVX1-NEXT: vpextrd $1, %xmm0, %eax
|
|
; AVX1-NEXT: imulq $613566757, %rax, %rcx # imm = 0x24924925
|
|
; AVX1-NEXT: shrq $32, %rcx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vmovd %xmm0, %ecx
|
|
; AVX1-NEXT: imulq $613566757, %rcx, %rdx # imm = 0x24924925
|
|
; AVX1-NEXT: shrq $32, %rdx
|
|
; AVX1-NEXT: movl %ecx, %esi
|
|
; AVX1-NEXT: subl %edx, %esi
|
|
; AVX1-NEXT: shrl %esi
|
|
; AVX1-NEXT: addl %edx, %esi
|
|
; AVX1-NEXT: shrl $2, %esi
|
|
; AVX1-NEXT: leal (,%rsi,8), %edx
|
|
; AVX1-NEXT: subl %esi, %edx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: vmovd %ecx, %xmm2
|
|
; AVX1-NEXT: vpinsrd $1, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrd $2, %xmm0, %eax
|
|
; AVX1-NEXT: imulq $613566757, %rax, %rcx # imm = 0x24924925
|
|
; AVX1-NEXT: shrq $32, %rcx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrd $3, %xmm0, %eax
|
|
; AVX1-NEXT: imulq $613566757, %rax, %rcx # imm = 0x24924925
|
|
; AVX1-NEXT: shrq $32, %rcx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrd $3, %eax, %xmm2, %xmm0
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: test_rem7_8i32:
|
|
; AVX2: # BB#0:
|
|
; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm1
|
|
; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm1[1,1,3,3,5,5,7,7]
|
|
; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm0[1,1,3,3,5,5,7,7]
|
|
; AVX2-NEXT: vpmuludq %ymm2, %ymm3, %ymm2
|
|
; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm1
|
|
; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[1,1,3,3,5,5,7,7]
|
|
; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2],ymm2[3],ymm1[4],ymm2[5],ymm1[6],ymm2[7]
|
|
; AVX2-NEXT: vpsubd %ymm1, %ymm0, %ymm2
|
|
; AVX2-NEXT: vpsrld $1, %ymm2, %ymm2
|
|
; AVX2-NEXT: vpaddd %ymm1, %ymm2, %ymm1
|
|
; AVX2-NEXT: vpsrld $2, %ymm1, %ymm1
|
|
; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm2
|
|
; AVX2-NEXT: vpmulld %ymm2, %ymm1, %ymm1
|
|
; AVX2-NEXT: vpsubd %ymm1, %ymm0, %ymm0
|
|
; AVX2-NEXT: retq
|
|
%res = urem <8 x i32> %a, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
|
|
ret <8 x i32> %res
|
|
}
|
|
|
|
define <16 x i16> @test_rem7_16i16(<16 x i16> %a) nounwind {
|
|
; AVX1-LABEL: test_rem7_16i16:
|
|
; AVX1: # BB#0:
|
|
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX1-NEXT: vpextrw $1, %xmm1, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: andl $65534, %edx # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vmovd %xmm1, %ecx
|
|
; AVX1-NEXT: movzwl %cx, %edx
|
|
; AVX1-NEXT: imull $9363, %edx, %edx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %edx
|
|
; AVX1-NEXT: movl %ecx, %esi
|
|
; AVX1-NEXT: subl %edx, %esi
|
|
; AVX1-NEXT: andl $65534, %esi # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %esi
|
|
; AVX1-NEXT: addl %edx, %esi
|
|
; AVX1-NEXT: shrl $2, %esi
|
|
; AVX1-NEXT: leal (,%rsi,8), %edx
|
|
; AVX1-NEXT: subl %esi, %edx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: vmovd %ecx, %xmm2
|
|
; AVX1-NEXT: vpinsrw $1, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrw $2, %xmm1, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: andl $65534, %edx # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrw $2, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrw $3, %xmm1, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: andl $65534, %edx # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrw $3, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrw $4, %xmm1, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: andl $65534, %edx # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrw $4, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrw $5, %xmm1, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: andl $65534, %edx # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrw $5, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrw $6, %xmm1, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: andl $65534, %edx # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrw $6, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrw $7, %xmm1, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: andl $65534, %edx # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrw $7, %eax, %xmm2, %xmm1
|
|
; AVX1-NEXT: vpextrw $1, %xmm0, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: andl $65534, %edx # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vmovd %xmm0, %ecx
|
|
; AVX1-NEXT: movzwl %cx, %edx
|
|
; AVX1-NEXT: imull $9363, %edx, %edx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %edx
|
|
; AVX1-NEXT: movl %ecx, %esi
|
|
; AVX1-NEXT: subl %edx, %esi
|
|
; AVX1-NEXT: andl $65534, %esi # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %esi
|
|
; AVX1-NEXT: addl %edx, %esi
|
|
; AVX1-NEXT: shrl $2, %esi
|
|
; AVX1-NEXT: leal (,%rsi,8), %edx
|
|
; AVX1-NEXT: subl %esi, %edx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: vmovd %ecx, %xmm2
|
|
; AVX1-NEXT: vpinsrw $1, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrw $2, %xmm0, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: andl $65534, %edx # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrw $2, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrw $3, %xmm0, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: andl $65534, %edx # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrw $3, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrw $4, %xmm0, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: andl $65534, %edx # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrw $4, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrw $5, %xmm0, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: andl $65534, %edx # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrw $5, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrw $6, %xmm0, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: andl $65534, %edx # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrw $6, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrw $7, %xmm0, %eax
|
|
; AVX1-NEXT: imull $9363, %eax, %ecx # imm = 0x2493
|
|
; AVX1-NEXT: shrl $16, %ecx
|
|
; AVX1-NEXT: movl %eax, %edx
|
|
; AVX1-NEXT: subl %ecx, %edx
|
|
; AVX1-NEXT: andl $65534, %edx # imm = 0xFFFE
|
|
; AVX1-NEXT: shrl %edx
|
|
; AVX1-NEXT: addl %ecx, %edx
|
|
; AVX1-NEXT: shrl $2, %edx
|
|
; AVX1-NEXT: leal (,%rdx,8), %ecx
|
|
; AVX1-NEXT: subl %edx, %ecx
|
|
; AVX1-NEXT: subl %ecx, %eax
|
|
; AVX1-NEXT: vpinsrw $7, %eax, %xmm2, %xmm0
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: test_rem7_16i16:
|
|
; AVX2: # BB#0:
|
|
; AVX2-NEXT: vpmulhuw {{.*}}(%rip), %ymm0, %ymm1
|
|
; AVX2-NEXT: vpsubw %ymm1, %ymm0, %ymm2
|
|
; AVX2-NEXT: vpsrlw $1, %ymm2, %ymm2
|
|
; AVX2-NEXT: vpaddw %ymm1, %ymm2, %ymm1
|
|
; AVX2-NEXT: vpsrlw $2, %ymm1, %ymm1
|
|
; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm1, %ymm1
|
|
; AVX2-NEXT: vpsubw %ymm1, %ymm0, %ymm0
|
|
; AVX2-NEXT: retq
|
|
%res = urem <16 x i16> %a, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
|
|
ret <16 x i16> %res
|
|
}
|
|
|
|
define <32 x i8> @test_rem7_32i8(<32 x i8> %a) nounwind {
|
|
; AVX1-LABEL: test_rem7_32i8:
|
|
; AVX1: # BB#0:
|
|
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
|
|
; AVX1-NEXT: vpextrb $1, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %ecx
|
|
; AVX1-NEXT: shrl $8, %ecx
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %cl, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %cl, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: movb $7, %cl
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %edx
|
|
; AVX1-NEXT: vpextrb $0, %xmm1, %esi
|
|
; AVX1-NEXT: imull $37, %esi, %edi
|
|
; AVX1-NEXT: shrl $8, %edi
|
|
; AVX1-NEXT: movb %sil, %al
|
|
; AVX1-NEXT: subb %dil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %dil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %sil
|
|
; AVX1-NEXT: movzbl %sil, %eax
|
|
; AVX1-NEXT: vmovd %eax, %xmm2
|
|
; AVX1-NEXT: vpinsrb $1, %edx, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $2, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $3, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $4, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $5, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $6, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $7, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $8, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $9, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $10, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $11, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $12, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $13, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $14, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $15, %xmm1, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1
|
|
; AVX1-NEXT: vpextrb $1, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %edx
|
|
; AVX1-NEXT: vpextrb $0, %xmm0, %esi
|
|
; AVX1-NEXT: imull $37, %esi, %edi
|
|
; AVX1-NEXT: shrl $8, %edi
|
|
; AVX1-NEXT: movb %sil, %al
|
|
; AVX1-NEXT: subb %dil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %dil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %sil
|
|
; AVX1-NEXT: movzbl %sil, %eax
|
|
; AVX1-NEXT: vmovd %eax, %xmm2
|
|
; AVX1-NEXT: vpinsrb $1, %edx, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $2, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $3, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $4, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $5, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $6, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $7, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $8, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $9, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $10, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $11, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $12, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $13, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $14, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
|
|
; AVX1-NEXT: vpextrb $15, %xmm0, %edx
|
|
; AVX1-NEXT: imull $37, %edx, %esi
|
|
; AVX1-NEXT: shrl $8, %esi
|
|
; AVX1-NEXT: movb %dl, %al
|
|
; AVX1-NEXT: subb %sil, %al
|
|
; AVX1-NEXT: shrb %al
|
|
; AVX1-NEXT: addb %sil, %al
|
|
; AVX1-NEXT: shrb $2, %al
|
|
; AVX1-NEXT: mulb %cl
|
|
; AVX1-NEXT: subb %al, %dl
|
|
; AVX1-NEXT: movzbl %dl, %eax
|
|
; AVX1-NEXT: vpinsrb $15, %eax, %xmm2, %xmm0
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: test_rem7_32i8:
|
|
; AVX2: # BB#0:
|
|
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
|
|
; AVX2-NEXT: vpextrb $1, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %ecx
|
|
; AVX2-NEXT: shrl $8, %ecx
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %cl, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %cl, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: movb $7, %cl
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %edx
|
|
; AVX2-NEXT: vpextrb $0, %xmm1, %esi
|
|
; AVX2-NEXT: imull $37, %esi, %edi
|
|
; AVX2-NEXT: shrl $8, %edi
|
|
; AVX2-NEXT: movb %sil, %al
|
|
; AVX2-NEXT: subb %dil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %dil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %sil
|
|
; AVX2-NEXT: movzbl %sil, %eax
|
|
; AVX2-NEXT: vmovd %eax, %xmm2
|
|
; AVX2-NEXT: vpinsrb $1, %edx, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $2, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $3, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $4, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $5, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $6, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $7, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $8, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $9, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $10, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $11, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $12, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $13, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $14, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $15, %xmm1, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1
|
|
; AVX2-NEXT: vpextrb $1, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %edx
|
|
; AVX2-NEXT: vpextrb $0, %xmm0, %esi
|
|
; AVX2-NEXT: imull $37, %esi, %edi
|
|
; AVX2-NEXT: shrl $8, %edi
|
|
; AVX2-NEXT: movb %sil, %al
|
|
; AVX2-NEXT: subb %dil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %dil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %sil
|
|
; AVX2-NEXT: movzbl %sil, %eax
|
|
; AVX2-NEXT: vmovd %eax, %xmm2
|
|
; AVX2-NEXT: vpinsrb $1, %edx, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $2, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $3, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $4, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $5, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $6, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $7, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $8, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $9, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $10, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $11, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $12, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $13, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $14, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
|
|
; AVX2-NEXT: vpextrb $15, %xmm0, %edx
|
|
; AVX2-NEXT: imull $37, %edx, %esi
|
|
; AVX2-NEXT: shrl $8, %esi
|
|
; AVX2-NEXT: movb %dl, %al
|
|
; AVX2-NEXT: subb %sil, %al
|
|
; AVX2-NEXT: shrb %al
|
|
; AVX2-NEXT: addb %sil, %al
|
|
; AVX2-NEXT: shrb $2, %al
|
|
; AVX2-NEXT: mulb %cl
|
|
; AVX2-NEXT: subb %al, %dl
|
|
; AVX2-NEXT: movzbl %dl, %eax
|
|
; AVX2-NEXT: vpinsrb $15, %eax, %xmm2, %xmm0
|
|
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
|
|
; AVX2-NEXT: retq
|
|
%res = urem <32 x i8> %a, <i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7>
|
|
ret <32 x i8> %res
|
|
}
|