llvm-project/llvm/test/CodeGen/Mips/llvm-ir
Zlatko Buljan 58d6a959be [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions
Differential Revision: http://reviews.llvm.org/D17137

This patch was reverted after the revertion of dependant patch http://reviews.llvm.org/D17068.
There was the problem with test-suite failure.
The problem is hopefully solved with dependant patch so this patch is commited again.

llvm-svn: 266179
2016-04-13 08:02:26 +00:00
..
add.ll [mips][microMIPS] Add CodeGen support for ADD, ADDIU*, ADDU* and DADD* instructions 2016-04-08 07:27:26 +00:00
addrspacecast.ll [mips] Reserve address spaces 1-255 for software use. 2015-09-08 09:07:03 +00:00
and.ll Revert r229675 - [mips] Avoid redundant sign extension of the result of binary bitwise instructions. 2015-08-04 14:26:35 +00:00
ashr.ll [mips] Make Static a default relocation model for MIPS codegen 2016-04-11 15:24:23 +00:00
atomicrmx.ll [mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes. 2015-11-06 12:07:20 +00:00
call.ll Revert "[mips] MIPSR6 Compact branch aliases" 2016-04-12 12:22:45 +00:00
extractelement.ll Fix vector splitting for extract_vector_elt and vector elements of <8-bits. 2015-09-09 09:53:20 +00:00
indirectbr.ll Revert "[mips] MIPSR6 Compact branch aliases" 2016-04-12 12:22:45 +00:00
load-atomic.ll [mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes. 2015-11-06 12:07:20 +00:00
lshr.ll [mips] Make Static a default relocation model for MIPS codegen 2016-04-11 15:24:23 +00:00
mul.ll [mips] Make Static a default relocation model for MIPS codegen 2016-04-11 15:24:23 +00:00
or.ll Revert r229675 - [mips] Avoid redundant sign extension of the result of binary bitwise instructions. 2015-08-04 14:26:35 +00:00
ret.ll Revert "[mips] MIPSR6 Compact branch aliases" 2016-04-12 12:22:45 +00:00
sdiv.ll [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions 2016-04-13 08:02:26 +00:00
select-dbl.ll Revert "[mips] Promote the result of SETCC nodes to GPR width." 2016-03-01 20:25:43 +00:00
select-flt.ll Revert "[mips] Promote the result of SETCC nodes to GPR width." 2016-03-01 20:25:43 +00:00
select-int.ll Revert "[mips] Promote the result of SETCC nodes to GPR width." 2016-03-01 20:25:43 +00:00
shl.ll [mips] Make Static a default relocation model for MIPS codegen 2016-04-11 15:24:23 +00:00
sqrt.ll [mips][microMIPS] Fix an issue with selecting sqrt instruction in LLVM backend 2015-10-06 15:17:25 +00:00
srem.ll [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions 2016-04-13 08:02:26 +00:00
store-atomic.ll [mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes. 2015-11-06 12:07:20 +00:00
sub.ll [mips] Add backend support for Mips32r[35] and Mips64r[35]. 2015-02-18 16:24:50 +00:00
udiv.ll [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions 2016-04-13 08:02:26 +00:00
urem.ll [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions 2016-04-13 08:02:26 +00:00
xor.ll Revert r229675 - [mips] Avoid redundant sign extension of the result of binary bitwise instructions. 2015-08-04 14:26:35 +00:00