143 lines
3.8 KiB
C++
143 lines
3.8 KiB
C++
//===-- RegisterInfoPOSIX_arm64.h -------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_ARM64_H
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#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_ARM64_H
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#include "RegisterInfoAndSetInterface.h"
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#include "lldb/Target/RegisterContext.h"
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#include "lldb/Utility/Flags.h"
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#include "lldb/lldb-private.h"
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#include <map>
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enum class SVEState { Unknown, Disabled, FPSIMD, Full };
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class RegisterInfoPOSIX_arm64
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: public lldb_private::RegisterInfoAndSetInterface {
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public:
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enum { GPRegSet = 0, FPRegSet };
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// AArch64 register set mask value
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enum {
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eRegsetMaskDefault = 0,
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eRegsetMaskSVE = 1,
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eRegsetMaskDynamic = ~1,
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};
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// AArch64 Register set FP/SIMD feature configuration
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enum {
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eVectorQuadwordAArch64,
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eVectorQuadwordAArch64SVE,
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eVectorQuadwordAArch64SVEMax = 256
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};
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// based on RegisterContextDarwin_arm64.h
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LLVM_PACKED_START
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struct GPR {
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uint64_t x[29]; // x0-x28
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uint64_t fp; // x29
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uint64_t lr; // x30
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uint64_t sp; // x31
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uint64_t pc; // pc
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uint32_t cpsr; // cpsr
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};
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LLVM_PACKED_END
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// based on RegisterContextDarwin_arm64.h
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struct VReg {
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uint8_t bytes[16];
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};
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// based on RegisterContextDarwin_arm64.h
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struct FPU {
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VReg v[32];
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uint32_t fpsr;
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uint32_t fpcr;
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};
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// based on RegisterContextDarwin_arm64.h
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struct EXC {
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uint64_t far; // Virtual Fault Address
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uint32_t esr; // Exception syndrome
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uint32_t exception; // number of arm exception token
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};
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// based on RegisterContextDarwin_arm64.h
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struct DBG {
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uint64_t bvr[16];
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uint64_t bcr[16];
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uint64_t wvr[16];
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uint64_t wcr[16];
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uint64_t mdscr_el1;
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};
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RegisterInfoPOSIX_arm64(const lldb_private::ArchSpec &target_arch,
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lldb_private::Flags opt_regsets);
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size_t GetGPRSize() const override;
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size_t GetFPRSize() const override;
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const lldb_private::RegisterInfo *GetRegisterInfo() const override;
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uint32_t GetRegisterCount() const override;
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const lldb_private::RegisterSet *
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GetRegisterSet(size_t reg_set) const override;
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size_t GetRegisterSetCount() const override;
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size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override;
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uint32_t ConfigureVectorLength(uint32_t sve_vq);
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bool VectorSizeIsValid(uint32_t vq) {
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if (vq >= eVectorQuadwordAArch64 && vq <= eVectorQuadwordAArch64SVEMax)
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return true;
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return false;
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}
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bool IsSVEEnabled() const { return m_opt_regsets.AnySet(eRegsetMaskSVE); }
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bool IsSVEReg(unsigned reg) const;
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bool IsSVEZReg(unsigned reg) const;
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bool IsSVEPReg(unsigned reg) const;
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bool IsSVERegVG(unsigned reg) const;
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uint32_t GetRegNumSVEZ0() const;
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uint32_t GetRegNumSVEFFR() const;
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uint32_t GetRegNumFPCR() const;
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uint32_t GetRegNumFPSR() const;
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uint32_t GetRegNumSVEVG() const;
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private:
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typedef std::map<uint32_t, std::vector<lldb_private::RegisterInfo>>
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per_vq_register_infos;
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per_vq_register_infos m_per_vq_reg_infos;
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uint32_t m_vector_reg_vq = eVectorQuadwordAArch64;
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const lldb_private::RegisterInfo *m_register_info_p;
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uint32_t m_register_info_count;
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const lldb_private::RegisterSet *m_register_set_p;
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uint32_t m_register_set_count;
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// Contains pair of [start, end] register numbers of a register set with start
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// and end included.
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std::map<uint32_t, std::pair<uint32_t, uint32_t>> m_per_regset_regnum_range;
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lldb_private::Flags m_opt_regsets;
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std::vector<lldb_private::RegisterInfo> m_dynamic_reg_infos;
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std::vector<lldb_private::RegisterSet> m_dynamic_reg_sets;
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};
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#endif
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