Heejin Ahn 144ec1c38e [WebAssembly] Encode numbers in ULEB128 in event section ... The number of events and the type index should be encoded in ULEB128, but they were incorrctly encoded in LEB128. The smallest number with which its LEB128 and ULEB128 encodings are different is 64. There's no way we can generate 64 events in the C++ toolchain implementation so we can't test that, but the attached test tests when the type index is 64. Reviewed By: dschuff Differential Revision: https://reviews.llvm.org/D99627		2021-03-30 16:21:58 -07:00
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Analysis	[InstructionCost] Don't conflate Invalid costs with Unknown costs.	2021-03-30 09:29:42 +01:00
Assembler	Reapply "OpaquePtr: Turn inalloca into a type attribute"	2021-03-29 08:55:30 -04:00
Bindings	[OCaml][Test] Fix and enable debuginfo.ml test	2021-03-28 06:25:39 +05:30
Bitcode	Reapply "OpaquePtr: Turn inalloca into a type attribute"	2021-03-29 08:55:30 -04:00
BugPoint	…
CodeGen	[GlobalISel] Implement fewerElements legalization for vector reductions.	2021-03-30 11:19:21 -07:00
DebugInfo	[DebugInfo] Support for signed constants inside DIExpression	2021-03-30 23:20:38 +05:30
Demangle	…
Examples	[Orc][examples] Add LLJITWithRemoteDebugging example	2021-03-28 17:25:09 +02:00
ExecutionEngine	[lli] Leaving two EH frame tests with MCJIT only after PowerPC failure	2021-03-30 12:28:22 +02:00
Feature	…
FileCheck	[FileCheck] Fix -dump-input per-pattern diagnostic indexing	2021-03-27 10:36:21 -04:00
Instrumentation	Reapply "OpaquePtr: Turn inalloca into a type attribute"	2021-03-29 08:55:30 -04:00
Integer	Re-apply "[lli] Make -jit-kind=orc the default JIT engine"	2021-03-30 12:08:26 +02:00
JitListener	…
LTO	Remove dead CHECK-ERR line.	2021-03-30 09:31:00 -07:00
Linker	Reapply "OpaquePtr: Turn inalloca into a type attribute"	2021-03-29 08:55:30 -04:00
MC	[WebAssembly] Encode numbers in ULEB128 in event section	2021-03-30 16:21:58 -07:00
MachineVerifier	[GlobalISel] Add G_ROTR and G_ROTL opcodes for rotates.	2021-03-25 17:23:30 -07:00
Object	AMDGPU: Add target id and code object v4 support	2021-03-24 11:54:05 -04:00
ObjectYAML	[WebAssembly] Rename WasmLimits::Initial to ::Minimum. NFC.	2021-03-24 09:10:11 +01:00
Other	Revert "[Passes] Add relative lookup table converter pass"	2021-03-30 14:13:37 +02:00
Reduce	[llvm-reduce] Remove dso_local when possible	2021-03-29 12:00:10 -07:00
SafepointIRVerifier	…
Support	…
SymbolRewriter	…
TableGen	[TableGen] Add support for the 'assert' statement in class definitions.	2021-03-29 09:20:29 -04:00
ThinLTO/X86	Don't use $ as suffix for symbol names in ThinLTOBitcodeWriter and other places	2021-03-29 13:03:52 +02:00
Transforms	[InstCombine] add fold for demand of low bit of abs()	2021-03-30 15:14:37 -04:00
Unit	[lit] Sort test start times based on prior test timing data	2021-03-16 05:23:04 -04:00
Verifier	[DebugInfo] Upgrade DISubragne::count to accept DIExpression also	2021-03-30 09:16:55 +05:30
YAMLParser	…
tools	Fix path in test added in e0577b3130 to work with both Linux/Windows paths.	2021-03-30 04:17:29 -07:00
.clang-format	…
CMakeLists.txt	Conditionalize the JIT test dependency	2021-03-30 13:04:02 -07:00
TestRunner.sh	…
lit.cfg.py	Revert "[IRSim] Adding basic implementation of llvm-sim."	2021-03-20 18:03:09 -05:00
lit.site.cfg.py.in	[test] Add ability to get error messages from CMake for errc substitution	2021-03-15 20:56:08 +01:00