.. |
AsmParser
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[llvm] Cleanup header dependencies in ADT and Support
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2022-01-21 13:54:49 +01:00 |
Disassembler
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Ensure newlines at the end of files (NFC)
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2022-01-06 23:44:02 -08:00 |
GISel
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[AArch64][GlobalISel] CodeGen for Armv8.8/9.3 MOPS
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2022-01-31 20:54:41 +00:00 |
MCTargetDesc
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Revert "Rename llvm::array_lengthof into llvm::size to match std::size from C++17"
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2022-01-26 16:55:53 +01:00 |
TargetInfo
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Fix shlib builds for all lib/Target/*/TargetInfo libs
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2021-10-08 15:21:13 -07:00 |
Utils
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[SVE][CodeGen] Use splice instruction when lowering VECTOR_SPLICE
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2022-01-11 11:58:17 +00:00 |
AArch64.h
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[Target] Remove unused forward declarations (NFC)
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2022-01-02 10:20:15 -08:00 |
AArch64.td
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[ARM] Add Cortex-X1C Support for Clang and LLVM
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2022-01-31 14:23:35 +00:00 |
AArch64A53Fix835769.cpp
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[AArch64] Use Feature for A53 Erratum 835769 Fix
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2021-12-10 15:09:59 +00:00 |
AArch64A57FPLoadBalancing.cpp
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…
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AArch64AdvSIMDScalarPass.cpp
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[llvm] Use range-based for loops (NFC)
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2021-12-11 11:29:12 -08:00 |
AArch64AsmPrinter.cpp
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[AArch64][GlobalISel] CodeGen for Armv8.8/9.3 MOPS
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2022-01-31 20:54:41 +00:00 |
AArch64BranchTargets.cpp
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…
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AArch64CallingConvention.cpp
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…
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AArch64CallingConvention.h
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…
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AArch64CallingConvention.td
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AArch64: don't claim to preserve registers used by prologue code
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2022-01-10 12:27:04 +00:00 |
AArch64CleanupLocalDynamicTLSPass.cpp
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…
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AArch64CollectLOH.cpp
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…
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AArch64Combine.td
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[AArch64][GlobalISel] Split vector stores of zero.
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2021-12-09 19:04:48 -08:00 |
AArch64CompressJumpTables.cpp
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…
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AArch64CondBrTuning.cpp
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[llvm] Use range-based for loops (NFC)
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2021-11-28 10:04:54 -08:00 |
AArch64ConditionOptimizer.cpp
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…
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AArch64ConditionalCompares.cpp
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…
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AArch64DeadRegisterDefinitionsPass.cpp
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…
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AArch64ExpandImm.cpp
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[llvm] Use range-based for loops (NFC)
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2021-12-11 11:29:12 -08:00 |
AArch64ExpandImm.h
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…
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AArch64ExpandPseudoInsts.cpp
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[ObjCARC] Require the function argument in the clang.arc.attachedcall bundle.
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2022-01-28 12:41:45 -08:00 |
AArch64FalkorHWPFFix.cpp
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[llvm] Use depth_first (NFC)
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2021-12-21 22:28:48 -08:00 |
AArch64FastISel.cpp
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[NFC] Use Register instead of unsigned
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2022-01-19 20:17:04 +08:00 |
AArch64FrameLowering.cpp
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[NFC] Use Register instead of unsigned
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2022-01-19 20:17:04 +08:00 |
AArch64FrameLowering.h
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[CodeGen] Rename emitCalleeSavedFrameMoves
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2022-01-10 01:33:04 +00:00 |
AArch64GenRegisterBankInfo.def
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…
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AArch64ISelDAGToDAG.cpp
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[AArch64][SVE] Folds VSELECT if the predicate is all active.
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2022-01-27 15:58:56 +00:00 |
AArch64ISelLowering.cpp
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[AArch64] Genereate CCMP from And CSel
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2022-02-02 13:48:16 +00:00 |
AArch64ISelLowering.h
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[AArch64][CodeGen] Always use SVE (when enabled) to lower integer divides
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2022-02-02 09:46:02 +00:00 |
AArch64InstrAtomics.td
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[AArch64] Add patterns for relaxed atomic ld/st into fp registers
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2022-01-25 15:33:37 +03:00 |
AArch64InstrFormats.td
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[ARM][AArch64] Introduce qrdmlah and qrdmlsh intrinsics
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2022-01-27 19:19:46 +00:00 |
AArch64InstrGISel.td
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…
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AArch64InstrInfo.cpp
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[AArch64] Make getInstSizeInBytes() use instruction size from InstrInfo.td
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2022-02-01 10:39:14 +00:00 |
AArch64InstrInfo.h
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[Target] Remove unused forward declarations (NFC)
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2022-01-02 10:20:15 -08:00 |
AArch64InstrInfo.td
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[AArch64] Make getInstSizeInBytes() use instruction size from InstrInfo.td
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2022-02-01 10:39:14 +00:00 |
AArch64LoadStoreOptimizer.cpp
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[NFC] Use Register instead of unsigned
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2022-01-19 20:17:04 +08:00 |
AArch64LowerHomogeneousPrologEpilog.cpp
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[llvm] Use llvm::is_contained (NFC)
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2021-10-14 22:44:09 -07:00 |
AArch64MCInstLower.cpp
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…
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AArch64MCInstLower.h
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[Target] Remove unused forward declarations (NFC)
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2022-01-02 10:20:15 -08:00 |
AArch64MIPeepholeOpt.cpp
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[AArch64] Fixes ADD/SUB opt bug and abstracts shared behavior in MIPeepholeOpt for ADD, SUB, and AND.
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2022-01-26 04:22:27 +00:00 |
AArch64MachineFunctionInfo.cpp
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[llvm] Rename StringRef _lower() method calls to _insensitive()
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2021-06-25 00:22:01 +03:00 |
AArch64MachineFunctionInfo.h
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…
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AArch64MacroFusion.cpp
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…
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AArch64MacroFusion.h
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…
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AArch64PBQPRegAlloc.cpp
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[NFCI] Move DEBUG_TYPE definition below #includes
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2021-05-30 17:31:01 +08:00 |
AArch64PBQPRegAlloc.h
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…
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AArch64PerfectShuffle.h
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…
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AArch64PfmCounters.td
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…
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AArch64PromoteConstant.cpp
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…
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AArch64RedundantCopyElimination.cpp
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…
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AArch64RegisterBanks.td
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…
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AArch64RegisterInfo.cpp
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[AArch64][SME] Add load and store instructions
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2021-07-16 10:11:10 +00:00 |
AArch64RegisterInfo.h
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…
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AArch64RegisterInfo.td
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[AArch64][SVE] NFC: Remove unused p0-p7 with element size predicates
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2021-08-10 07:56:22 +00:00 |
AArch64SIMDInstrOpt.cpp
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[llvm] Use nullptr instead of 0 (NFC)
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2021-12-28 08:52:25 -08:00 |
AArch64SLSHardening.cpp
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…
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AArch64SMEInstrInfo.td
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[AArch64][SME] Update DUP (predicate) instruction
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2021-10-07 08:55:11 +00:00 |
AArch64SVEInstrInfo.td
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[SVE] By using SEL when orring predicates we forgo the need for a PTRUE.
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2022-01-31 19:39:23 +00:00 |
AArch64SchedA53.td
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[AArch64] Model Cortex-A55 Q register NEON instructions
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2021-09-29 16:55:31 +01:00 |
AArch64SchedA55.td
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[SchedModels][CortexA55] Fix scheduling of FP loads
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2022-01-10 10:14:45 +03:00 |
AArch64SchedA57.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
AArch64SchedA57WriteRes.td
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…
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AArch64SchedA64FX.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
AArch64SchedCyclone.td
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[AArch64] Model Cortex-A55 Q register NEON instructions
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2021-09-29 16:55:31 +01:00 |
AArch64SchedExynosM3.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
AArch64SchedExynosM4.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
AArch64SchedExynosM5.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
AArch64SchedFalkor.td
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[AArch64] Model Cortex-A55 Q register NEON instructions
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2021-09-29 16:55:31 +01:00 |
AArch64SchedFalkorDetails.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
AArch64SchedKryo.td
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[AArch64] Model Cortex-A55 Q register NEON instructions
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2021-09-29 16:55:31 +01:00 |
AArch64SchedKryoDetails.td
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…
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AArch64SchedPredExynos.td
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…
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AArch64SchedPredicates.td
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…
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AArch64SchedTSV110.td
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[AArch64] Model Cortex-A55 Q register NEON instructions
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2021-09-29 16:55:31 +01:00 |
AArch64SchedThunderX.td
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[AArch64] Model Cortex-A55 Q register NEON instructions
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2021-09-29 16:55:31 +01:00 |
AArch64SchedThunderX2T99.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
AArch64SchedThunderX3T110.td
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[AArch64] Rename CPY to DUP. NFC
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2022-01-05 20:02:39 +00:00 |
AArch64Schedule.td
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[AArch64] Model Cortex-A55 Q register NEON instructions
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2021-09-29 16:55:31 +01:00 |
AArch64SelectionDAGInfo.cpp
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[AArch64][SelectionDAG] CodeGen for Armv8.8/9.3 MOPS
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2022-01-31 20:56:27 +00:00 |
AArch64SelectionDAGInfo.h
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[AArch64][SelectionDAG] CodeGen for Armv8.8/9.3 MOPS
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2022-01-31 20:56:27 +00:00 |
AArch64SpeculationHardening.cpp
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[NFC] Use Register instead of unsigned
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2022-01-19 20:17:04 +08:00 |
AArch64StackTagging.cpp
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[mte] support more complicated lifetimes (e.g. for exceptions).
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2022-02-02 14:39:22 -08:00 |
AArch64StackTaggingPreRA.cpp
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[NFC] Use Register instead of unsigned
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2022-01-19 20:17:04 +08:00 |
AArch64StorePairSuppress.cpp
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[AArch64] Disable AArch64StorePairSuppress under optsize
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2021-10-04 18:28:15 +01:00 |
AArch64Subtarget.cpp
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[ARM] Add Cortex-X1C Support for Clang and LLVM
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2022-01-31 14:23:35 +00:00 |
AArch64Subtarget.h
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[AArch64] Removing redundant PAuth flag
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2022-01-31 21:00:30 +00:00 |
AArch64SystemOperands.td
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[AArch64] Remove PRBAR0_ELn and PRLAR0_ELn sysregs.
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2022-01-20 13:37:58 +00:00 |
AArch64TargetMachine.cpp
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[AArch64] Use Feature for A53 Erratum 835769 Fix
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2021-12-10 15:09:59 +00:00 |
AArch64TargetMachine.h
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[Target] Remove unused forward declarations (NFC)
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2022-01-02 10:20:15 -08:00 |
AArch64TargetObjectFile.cpp
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[Target] Remove redundant member initialization (NFC)
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2022-01-06 22:01:44 -08:00 |
AArch64TargetObjectFile.h
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[Target] Remove unused forward declarations (NFC)
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2022-01-02 10:20:15 -08:00 |
AArch64TargetTransformInfo.cpp
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[AArch64] Fix costs of float vector compare/selects pairs.
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2022-01-31 10:18:29 +00:00 |
AArch64TargetTransformInfo.h
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[LoopVectorize][AArch64] Use get.active.lane.mask intrinsic when SVE is enabled
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2022-01-18 11:59:30 +00:00 |
CMakeLists.txt
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Third Recommit "[AArch64] Split bitmask immediate of bitwise AND operation"
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2021-10-08 11:28:49 +01:00 |
SMEInstrFormats.td
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[AArch64][SME] Update DUP (predicate) instruction
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2021-10-07 08:55:11 +00:00 |
SVEInstrFormats.td
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[SVE] By using SEL when orring predicates we forgo the need for a PTRUE.
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2022-01-31 19:39:23 +00:00 |
SVEIntrinsicOpts.cpp
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[Aarch64] Remove redundant declaration initializeSVEIntrinsicOptsPass (NFC)
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2022-01-01 09:14:25 -08:00 |