..
AArch64
Revert "[DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE"
2021-01-20 20:06:55 +01:00
AMDGPU
[IndirectFunctions] Skip propagating attributes to address taken functions
2021-01-21 07:04:28 +00:00
ARC
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ARM
Revert "[DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE"
2021-01-20 20:06:55 +01:00
AVR
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BPF
[BPF] support atomic instructions
2020-12-03 07:38:00 -08:00
Generic
Use unary CreateShuffleVector if possible
2020-12-30 22:36:08 +09:00
Hexagon
[Hexagon] Fix segment start to adjust for gaps between segments
2021-01-19 12:49:39 -06:00
Inputs
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Lanai
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MIR
[CodeGen] Try to make the print of memory operand alignment a little more user friendly.
2021-01-11 19:58:47 -08:00
MSP430
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Mips
[CodeGen] Try to make the print of memory operand alignment a little more user friendly.
2021-01-11 19:58:47 -08:00
NVPTX
[NFC] Disallow unused prefixes under llvm/test/CodeGen
2021-01-11 12:32:18 -08:00
PowerPC
[PowerPC][Power10] Exploit splat instruction xxsplti32dx in Power10
2021-01-20 12:55:52 -05:00
RISCV
[RISCV] Implement vssseg intrinsics.
2021-01-21 11:51:35 +08:00
SPARC
[SPARC] Fix fp128 load/stores
2021-01-13 14:59:50 -08:00
SystemZ
[SystemZ] misched-cutoff tests can only be tested on non-NDEBUG (assertion) builds
2021-01-14 15:46:27 +00:00
Thumb
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Thumb2
Revert "[DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE"
2021-01-20 20:06:55 +01:00
VE
[VE] Update VELIntrinsic tests
2021-01-13 00:12:50 +09:00
WebAssembly
[WebAssembly] Prototype new f64x2 conversions
2021-01-20 11:28:06 -08:00
WinCFGuard
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WinEH
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X86
[X86] Add experimental option to separately tune alignment of innermost loops
2021-01-21 11:15:16 +07:00
XCore
[test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:47:16 -08:00
lit.local.cfg
[NFC] Disallow unused prefixes under llvm/test/CodeGen
2021-01-11 12:32:18 -08:00