272 lines
9.9 KiB
C++
272 lines
9.9 KiB
C++
//===-- DNBArchImpl.h -------------------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Created by Greg Clayton on 6/25/07.
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//
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//===----------------------------------------------------------------------===//
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#ifndef __DebugNubArchMachARM_h__
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#define __DebugNubArchMachARM_h__
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#if defined (__arm__)
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#include "DNBArch.h"
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class MachThread;
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class DNBArchMachARM : public DNBArchProtocol
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{
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public:
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enum { kMaxNumThumbITBreakpoints = 4 };
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DNBArchMachARM(MachThread *thread) :
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m_thread(thread),
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m_state(),
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m_hw_single_chained_step_addr(INVALID_NUB_ADDRESS),
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m_sw_single_step_next_pc(INVALID_NUB_ADDRESS),
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m_sw_single_step_break_id(INVALID_NUB_BREAK_ID),
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m_sw_single_step_itblock_break_count(0),
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m_last_decode_pc(INVALID_NUB_ADDRESS),
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m_watchpoint_hw_index(-1),
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m_watchpoint_did_occur(false),
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m_watchpoint_resume_single_step_enabled(false)
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{
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memset(&m_dbg_save, 0, sizeof(m_dbg_save));
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#if defined (USE_ARM_DISASSEMBLER_FRAMEWORK)
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ThumbStaticsInit(&m_last_decode_thumb);
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#endif
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for (int i = 0; i < kMaxNumThumbITBreakpoints; i++)
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m_sw_single_step_itblock_break_id[i] = INVALID_NUB_BREAK_ID;
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}
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virtual ~DNBArchMachARM()
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{
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}
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static void Initialize();
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static const DNBRegisterSetInfo *
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GetRegisterSetInfo(nub_size_t *num_reg_sets);
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virtual bool GetRegisterValue(int set, int reg, DNBRegisterValue *value);
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virtual bool SetRegisterValue(int set, int reg, const DNBRegisterValue *value);
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virtual nub_size_t GetRegisterContext (void *buf, nub_size_t buf_len);
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virtual nub_size_t SetRegisterContext (const void *buf, nub_size_t buf_len);
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virtual kern_return_t GetRegisterState (int set, bool force);
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virtual kern_return_t SetRegisterState (int set);
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virtual bool RegisterSetStateIsValid (int set) const;
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virtual uint64_t GetPC(uint64_t failValue); // Get program counter
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virtual kern_return_t SetPC(uint64_t value);
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virtual uint64_t GetSP(uint64_t failValue); // Get stack pointer
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virtual void ThreadWillResume();
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virtual bool ThreadDidStop();
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virtual bool NotifyException(MachException::Data& exc);
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static DNBArchProtocol *Create (MachThread *thread);
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static const uint8_t * const SoftwareBreakpointOpcode (nub_size_t byte_size);
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static uint32_t GetCPUType();
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virtual uint32_t NumSupportedHardwareBreakpoints();
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virtual uint32_t NumSupportedHardwareWatchpoints();
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virtual uint32_t EnableHardwareBreakpoint (nub_addr_t addr, nub_size_t size);
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virtual uint32_t EnableHardwareWatchpoint (nub_addr_t addr, nub_size_t size, bool read, bool write);
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virtual bool DisableHardwareBreakpoint (uint32_t hw_break_index);
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virtual bool DisableHardwareWatchpoint (uint32_t hw_break_index);
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virtual bool EnableHardwareWatchpoint0 (uint32_t hw_break_index, bool Delegate);
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virtual bool DisableHardwareWatchpoint0 (uint32_t hw_break_index, bool Delegate);
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virtual bool StepNotComplete ();
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virtual void HardwareWatchpointStateChanged ();
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virtual uint32_t GetHardwareWatchpointHit(nub_addr_t &addr);
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typedef arm_debug_state_t DBG;
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protected:
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kern_return_t EnableHardwareSingleStep (bool enable);
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kern_return_t SetSingleStepSoftwareBreakpoints ();
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bool ConditionPassed(uint8_t condition, uint32_t cpsr);
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#if defined (USE_ARM_DISASSEMBLER_FRAMEWORK)
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bool ComputeNextPC(nub_addr_t currentPC, arm_decoded_instruction_t decodedInstruction, bool currentPCIsThumb, nub_addr_t *targetPC);
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arm_error_t DecodeInstructionUsingDisassembler(nub_addr_t curr_pc, uint32_t curr_cpsr, arm_decoded_instruction_t *decodedInstruction, thumb_static_data_t *thumbStaticData, nub_addr_t *next_pc);
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void DecodeITBlockInstructions(nub_addr_t curr_pc);
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#endif
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void EvaluateNextInstructionForSoftwareBreakpointSetup(nub_addr_t currentPC, uint32_t cpsr, bool currentPCIsThumb, nub_addr_t *nextPC, bool *nextPCIsThumb);
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static nub_bool_t BreakpointHit (nub_process_t pid, nub_thread_t tid, nub_break_t breakID, void *baton);
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typedef enum RegisterSetTag
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{
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e_regSetALL = REGISTER_SET_ALL,
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e_regSetGPR = ARM_THREAD_STATE,
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e_regSetVFP = ARM_VFP_STATE,
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e_regSetEXC = ARM_EXCEPTION_STATE,
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e_regSetDBG = ARM_DEBUG_STATE,
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kNumRegisterSets
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} RegisterSet;
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enum
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{
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Read = 0,
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Write = 1,
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kNumErrors = 2
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};
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typedef arm_thread_state_t GPR;
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typedef arm_vfp_state_t FPU;
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typedef arm_exception_state_t EXC;
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static const DNBRegisterInfo g_gpr_registers[];
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static const DNBRegisterInfo g_vfp_registers[];
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static const DNBRegisterInfo g_exc_registers[];
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static const DNBRegisterSetInfo g_reg_sets[];
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static const size_t k_num_gpr_registers;
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static const size_t k_num_vfp_registers;
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static const size_t k_num_exc_registers;
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static const size_t k_num_all_registers;
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static const size_t k_num_register_sets;
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struct Context
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{
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GPR gpr;
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FPU vfp;
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EXC exc;
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};
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// See also HardwareWatchpointStateChanged() which updates this class-wide variable.
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static DBG Global_Debug_State;
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static bool Valid_Global_Debug_State;
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struct State
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{
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Context context;
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DBG dbg;
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kern_return_t gpr_errs[2]; // Read/Write errors
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kern_return_t vfp_errs[2]; // Read/Write errors
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kern_return_t exc_errs[2]; // Read/Write errors
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kern_return_t dbg_errs[2]; // Read/Write errors
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State()
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{
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uint32_t i;
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for (i=0; i<kNumErrors; i++)
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{
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gpr_errs[i] = -1;
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vfp_errs[i] = -1;
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exc_errs[i] = -1;
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dbg_errs[i] = -1;
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}
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}
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void InvalidateRegisterSetState(int set)
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{
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SetError (set, Read, -1);
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}
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kern_return_t GetError (int set, uint32_t err_idx) const
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{
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if (err_idx < kNumErrors)
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{
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switch (set)
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{
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// When getting all errors, just OR all values together to see if
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// we got any kind of error.
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case e_regSetALL: return gpr_errs[err_idx] |
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vfp_errs[err_idx] |
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exc_errs[err_idx] |
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dbg_errs[err_idx] ;
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case e_regSetGPR: return gpr_errs[err_idx];
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case e_regSetVFP: return vfp_errs[err_idx];
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case e_regSetEXC: return exc_errs[err_idx];
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case e_regSetDBG: return dbg_errs[err_idx];
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default: break;
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}
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}
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return -1;
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}
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bool SetError (int set, uint32_t err_idx, kern_return_t err)
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{
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if (err_idx < kNumErrors)
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{
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switch (set)
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{
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case e_regSetALL:
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gpr_errs[err_idx] = err;
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vfp_errs[err_idx] = err;
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dbg_errs[err_idx] = err;
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exc_errs[err_idx] = err;
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return true;
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case e_regSetGPR:
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gpr_errs[err_idx] = err;
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return true;
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case e_regSetVFP:
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vfp_errs[err_idx] = err;
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return true;
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case e_regSetEXC:
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exc_errs[err_idx] = err;
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return true;
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case e_regSetDBG:
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dbg_errs[err_idx] = err;
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return true;
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default: break;
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}
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}
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return false;
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}
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bool RegsAreValid (int set) const
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{
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return GetError(set, Read) == KERN_SUCCESS;
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}
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};
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kern_return_t GetGPRState (bool force);
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kern_return_t GetVFPState (bool force);
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kern_return_t GetEXCState (bool force);
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kern_return_t GetDBGState (bool force);
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kern_return_t SetGPRState ();
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kern_return_t SetVFPState ();
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kern_return_t SetEXCState ();
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kern_return_t SetDBGState ();
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// Helper functions for watchpoint implementaions.
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static void ClearWatchpointOccurred();
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static bool HasWatchpointOccurred();
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static bool IsWatchpointEnabled(const DBG &debug_state, uint32_t hw_index);
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static nub_addr_t GetWatchAddress(const DBG &debug_state, uint32_t hw_index);
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protected:
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MachThread * m_thread;
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State m_state;
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DBG m_dbg_save;
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nub_addr_t m_hw_single_chained_step_addr;
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// Software single stepping support
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nub_addr_t m_sw_single_step_next_pc;
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nub_break_t m_sw_single_step_break_id;
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nub_break_t m_sw_single_step_itblock_break_id[kMaxNumThumbITBreakpoints];
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nub_addr_t m_sw_single_step_itblock_break_count;
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// Disassembler state
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#if defined (USE_ARM_DISASSEMBLER_FRAMEWORK)
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thumb_static_data_t m_last_decode_thumb;
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arm_decoded_instruction_t m_last_decode_arm;
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#endif
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nub_addr_t m_last_decode_pc;
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// The following member variables should be updated atomically.
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int32_t m_watchpoint_hw_index;
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bool m_watchpoint_did_occur;
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bool m_watchpoint_resume_single_step_enabled;
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};
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#endif // #if defined (__arm__)
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#endif // #ifndef __DebugNubArchMachARM_h__
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