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llvm-project/llvm/test/Analysis/CostModel/X86
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Simon Pilgrim 168a44a70e [CostModel][X86] Improve extract/insert element costs (PR43605) 
This tries to improve the accuracy of extract/insert element costs by accounting for subvector extraction/insertion for >128-bit vectors and the shuffling of elements to/from the 0'th index.

It also adds INSERTPS for f32 types and PINSR/PEXTR costs for integer types (at the moment we assume the same cost as MOVD/MOVQ - which isn't always true).

Differential Revision: https://reviews.llvm.org/D74976
 		2020-02-27 15:54:13 +00:00
..
aggregates.ll [CostModel] Model all `extractvalue`s as free. 2019-08-29 11:50:30 +00:00
alternate-shuffle-cost.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
arith-fix.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
arith-fma.ll
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arith-fp.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
arith-overflow.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
arith-ssat.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
arith-usat.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
arith.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
bitreverse.ll
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bswap.ll
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cast.ll [X86] Fix the cost model for v16i16->v16i32 zero_extend/sign_extend with AVX2 2020-01-29 15:52:10 -08:00
costmodel.ll
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ctlz.ll [CostModel][X86] Add CTLZ scalar costs 2019-10-14 16:30:17 +00:00
ctpop.ll [CostModel][X86] Add CTPOP scalar costs (PR43656) 2019-10-14 14:07:43 +00:00
cttz.ll
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div.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
extend.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
fcmp.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
fptosi.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
fptoui.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
fround.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
fshl.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
fshr.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
gep.ll
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i32.ll
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icmp.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
insert-extract-at-zero.ll
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interleave-load-i32.ll
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interleave-store-i32.ll
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interleaved-load-float.ll
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interleaved-load-i8.ll
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interleaved-load-store-double.ll
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interleaved-load-store-i64.ll
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interleaved-store-i8.ll
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intrinsic-cost.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
lit.local.cfg [lit] Delete empty lines at the end of lit.local.cfg NFC 2019-06-17 09:51:07 +00:00
load_store.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
loop_v2.ll
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masked-intrinsic-cost.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
min-legal-vector-width.ll [X86] Fix the cost model for v16i16->v16i32 zero_extend/sign_extend with AVX2 2020-01-29 15:52:10 -08:00
reduce-add.ll [CostModel][X86] Improve add vXi64 + fadd vXf64 reduction tests for SLM 2019-11-06 17:55:38 +00:00
reduce-and.ll [X86] Lower the cost of avx512 horizontal bool and/or reductions to 2*log2(bitwidth)+1 for legal types. 2019-11-04 22:58:04 -08:00
reduce-mul.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
reduce-or.ll [X86] Lower the cost of avx512 horizontal bool and/or reductions to 2*log2(bitwidth)+1 for legal types. 2019-11-04 22:58:04 -08:00
reduce-smax.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
reduce-smin.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
reduce-umax.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
reduce-umin.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
reduce-xor.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
reduction.ll [CostModel][X86] Improve add vXi64 + fadd vXf64 reduction tests for SLM 2019-11-06 17:55:38 +00:00
rem.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
scalarize.ll
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shuffle-broadcast.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
shuffle-extract_subvector.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
shuffle-insert_subvector.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
shuffle-reverse.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
shuffle-single-src.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
shuffle-transpose.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
shuffle-two-src.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
sitofp.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
slm-arith-costs.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
sse-itoi.ll
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strided-load-i8.ll
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strided-load-i16.ll
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strided-load-i32.ll
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strided-load-i64.ll
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testshiftashr.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
testshiftlshr.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
testshiftshl.ll Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default." 2019-08-07 16:24:26 +00:00
tiny.ll
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trunc.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
uitofp.ll [CostModel][X86] Try to check against common prefixes before using target-specific cpu checks 2020-02-24 11:59:07 +00:00
uniformshift.ll
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vdiv-cost.ll
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vector-extract.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
vector-insert.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
vector_gep.ll
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vectorized-loop.ll
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vselect-cost.ll
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vshift-ashr-cost.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
vshift-lshr-cost.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00
vshift-shl-cost.ll [CostModel][X86] Improve extract/insert element costs (PR43605) 2020-02-27 15:54:13 +00:00