51 lines
1.8 KiB
C++
51 lines
1.8 KiB
C++
//===----------------------- R600FrameLowering.cpp ------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//==-----------------------------------------------------------------------===//
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#include "R600FrameLowering.h"
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#include "AMDGPUSubtarget.h"
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#include "R600RegisterInfo.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/Support/MathExtras.h"
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using namespace llvm;
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R600FrameLowering::~R600FrameLowering() = default;
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/// \returns The number of registers allocated for \p FI.
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int R600FrameLowering::getFrameIndexReference(const MachineFunction &MF,
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int FI,
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unsigned &FrameReg) const {
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const MachineFrameInfo &MFI = MF.getFrameInfo();
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const R600RegisterInfo *RI
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= MF.getSubtarget<R600Subtarget>().getRegisterInfo();
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// Fill in FrameReg output argument.
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FrameReg = RI->getFrameRegister(MF);
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// Start the offset at 2 so we don't overwrite work group information.
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// FIXME: We should only do this when the shader actually uses this
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// information.
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unsigned OffsetBytes = 2 * (getStackWidth(MF) * 4);
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int UpperBound = FI == -1 ? MFI.getNumObjects() : FI;
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for (int i = MFI.getObjectIndexBegin(); i < UpperBound; ++i) {
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OffsetBytes = alignTo(OffsetBytes, MFI.getObjectAlignment(i));
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OffsetBytes += MFI.getObjectSize(i);
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// Each register holds 4 bytes, so we must always align the offset to at
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// least 4 bytes, so that 2 frame objects won't share the same register.
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OffsetBytes = alignTo(OffsetBytes, 4);
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}
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if (FI != -1)
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OffsetBytes = alignTo(OffsetBytes, MFI.getObjectAlignment(FI));
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return OffsetBytes / (getStackWidth(MF) * 4);
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}
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