136 lines
4.3 KiB
LLVM
136 lines
4.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
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define void @add(i256* %p, i256* %q) nounwind {
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; X32-LABEL: add:
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; X32: # BB#0:
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; X32-NEXT: pushl %ebp
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; X32-NEXT: pushl %ebx
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; X32-NEXT: pushl %edi
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; X32-NEXT: pushl %esi
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; X32-NEXT: subl $12, %esp
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl 8(%ecx), %edi
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; X32-NEXT: movl (%ecx), %edx
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; X32-NEXT: movl 4(%ecx), %ebx
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; X32-NEXT: movl 28(%eax), %esi
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; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl 24(%eax), %ebp
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; X32-NEXT: addl (%eax), %edx
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; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: adcl 4(%eax), %ebx
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; X32-NEXT: adcl 8(%eax), %edi
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; X32-NEXT: movl %edi, (%esp) # 4-byte Spill
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; X32-NEXT: movl 20(%eax), %edi
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; X32-NEXT: movl 12(%eax), %edx
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; X32-NEXT: movl 16(%eax), %esi
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; X32-NEXT: adcl 12(%ecx), %edx
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; X32-NEXT: adcl 16(%ecx), %esi
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; X32-NEXT: adcl 20(%ecx), %edi
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; X32-NEXT: movl %ebp, %eax
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; X32-NEXT: adcl 24(%ecx), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp # 4-byte Reload
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; X32-NEXT: adcl %ebp, 28(%ecx)
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; X32-NEXT: movl (%esp), %ebp # 4-byte Reload
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; X32-NEXT: movl %ebp, 8(%ecx)
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; X32-NEXT: movl %ebx, 4(%ecx)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx # 4-byte Reload
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; X32-NEXT: movl %ebx, (%ecx)
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; X32-NEXT: movl %edx, 12(%ecx)
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; X32-NEXT: movl %esi, 16(%ecx)
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; X32-NEXT: movl %edi, 20(%ecx)
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; X32-NEXT: movl %eax, 24(%ecx)
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: popl %esi
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; X32-NEXT: popl %edi
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; X32-NEXT: popl %ebx
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; X32-NEXT: popl %ebp
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; X32-NEXT: retl
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;
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; X64-LABEL: add:
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; X64: # BB#0:
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; X64-NEXT: movq 16(%rdi), %rax
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; X64-NEXT: movq (%rdi), %rcx
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; X64-NEXT: movq 8(%rdi), %rdx
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; X64-NEXT: movq 24(%rsi), %r8
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; X64-NEXT: addq (%rsi), %rcx
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; X64-NEXT: adcq 8(%rsi), %rdx
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; X64-NEXT: adcq 16(%rsi), %rax
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; X64-NEXT: adcq %r8, 24(%rdi)
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; X64-NEXT: movq %rax, 16(%rdi)
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; X64-NEXT: movq %rdx, 8(%rdi)
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; X64-NEXT: movq %rcx, (%rdi)
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; X64-NEXT: retq
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%a = load i256, i256* %p
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%b = load i256, i256* %q
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%c = add i256 %a, %b
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store i256 %c, i256* %p
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ret void
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}
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define void @sub(i256* %p, i256* %q) nounwind {
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; X32-LABEL: sub:
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; X32: # BB#0:
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; X32-NEXT: pushl %ebp
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; X32-NEXT: pushl %ebx
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; X32-NEXT: pushl %edi
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; X32-NEXT: pushl %esi
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; X32-NEXT: subl $8, %esp
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; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl 16(%ecx), %eax
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; X32-NEXT: movl 12(%ecx), %edx
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; X32-NEXT: movl 8(%ecx), %edi
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; X32-NEXT: movl (%ecx), %ebx
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; X32-NEXT: movl 4(%ecx), %ebp
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; X32-NEXT: subl (%esi), %ebx
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; X32-NEXT: sbbl 4(%esi), %ebp
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; X32-NEXT: sbbl 8(%esi), %edi
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; X32-NEXT: sbbl 12(%esi), %edx
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; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: sbbl 16(%esi), %eax
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; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
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; X32-NEXT: movl 20(%ecx), %edx
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; X32-NEXT: sbbl 20(%esi), %edx
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; X32-NEXT: movl 24(%ecx), %eax
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; X32-NEXT: sbbl 24(%esi), %eax
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; X32-NEXT: movl 28(%esi), %esi
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; X32-NEXT: sbbl %esi, 28(%ecx)
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; X32-NEXT: movl %edi, 8(%ecx)
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; X32-NEXT: movl %ebp, 4(%ecx)
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; X32-NEXT: movl %ebx, (%ecx)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
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; X32-NEXT: movl %esi, 12(%ecx)
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; X32-NEXT: movl (%esp), %esi # 4-byte Reload
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; X32-NEXT: movl %esi, 16(%ecx)
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; X32-NEXT: movl %edx, 20(%ecx)
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; X32-NEXT: movl %eax, 24(%ecx)
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; X32-NEXT: addl $8, %esp
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; X32-NEXT: popl %esi
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; X32-NEXT: popl %edi
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; X32-NEXT: popl %ebx
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; X32-NEXT: popl %ebp
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; X32-NEXT: retl
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;
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; X64-LABEL: sub:
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; X64: # BB#0:
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; X64-NEXT: movq 16(%rdi), %rax
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; X64-NEXT: movq (%rdi), %rcx
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; X64-NEXT: movq 8(%rdi), %rdx
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; X64-NEXT: movq 24(%rsi), %r8
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; X64-NEXT: subq (%rsi), %rcx
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; X64-NEXT: sbbq 8(%rsi), %rdx
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; X64-NEXT: sbbq 16(%rsi), %rax
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; X64-NEXT: sbbq %r8, 24(%rdi)
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; X64-NEXT: movq %rax, 16(%rdi)
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; X64-NEXT: movq %rdx, 8(%rdi)
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; X64-NEXT: movq %rcx, (%rdi)
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; X64-NEXT: retq
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%a = load i256, i256* %p
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%b = load i256, i256* %q
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%c = sub i256 %a, %b
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store i256 %c, i256* %p
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ret void
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}
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