llvm-project/llvm/lib/Target/RISCV/MCTargetDesc
Hsiangkai Wang 0a9b82960c [RISCV] Use vmv.v.[v|i] if we know COPY is under the same vl and vtype.
If we know the source operand of COPY is defined by a vector instruction
with tail agnostic and the same LMUL and there is no vsetvli between
COPY and the define instruction to change the vl and vtype, we could use
vmv.v.v or vmv.v.i to copy vector registers to get better performance than
the whole vector register move instructions.

If the source of COPY is from vmv.v.i, we could use vmv.v.i for the
COPY.

This patch only considers all these instructions within one basic block.

Case 1:
```
bb.0:
  ...
  VSETVLI          # The first VSETVLI before COPY and VOP.
  ...              # Use this VSETVLI to check LMUL and tail agnostic.
  ...
  vy = VOP va, vb  # Define vy.
  ...              # There is no vsetvli between VOP and COPY.
  vx = COPY vy
```

Case 2:
```
bb.0:
  ...
  VSETVLI          # The first VSETVLI before VOP.
  ...              # Use this VSETVLI to check LMUL and tail agnostic.
  ...
  vy = VOP va, vb  # Define vy.
  ...              # There is no vsetvli to change vl between VOP and COPY.
  ...
  VSETVLI          # The first VSETVLI before COPY.
  ...              # This VSETVLI does not change vl and vtype.
  ...
  vx = COPY vy
```

Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>
Co-Authored-by: Kito Cheng <kito.cheng@sifive.com>

Differential Revision: https://reviews.llvm.org/D103510
2021-10-28 11:39:04 +08:00
..
CMakeLists.txt [MC][RISCV] Add RISCV MCObjectFileInfo 2021-08-27 18:23:29 +01:00
RISCVAsmBackend.cpp [MC] Use local MCSubtargetInfo in writeNops 2021-09-07 15:46:19 +01:00
RISCVAsmBackend.h [MC] Use local MCSubtargetInfo in writeNops 2021-09-07 15:46:19 +01:00
RISCVBaseInfo.cpp [RISCV] Unify the arch string parsing logic to to RISCVISAInfo. 2021-10-17 16:25:23 +08:00
RISCVBaseInfo.h [RISCV] Use vmv.v.[v|i] if we know COPY is under the same vl and vtype. 2021-10-28 11:39:04 +08:00
RISCVELFObjectWriter.cpp RISCV: adjust handling of relocation emission for RISCV 2021-06-17 08:20:02 -07:00
RISCVELFStreamer.cpp RISCV: adjust handling of relocation emission for RISCV 2021-06-17 08:20:02 -07:00
RISCVELFStreamer.h RISCV: adjust handling of relocation emission for RISCV 2021-06-17 08:20:02 -07:00
RISCVFixupKinds.h RISCV: adjust handling of relocation emission for RISCV 2021-06-17 08:20:02 -07:00
RISCVInstPrinter.cpp Revert "[RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases" 2021-05-29 15:11:37 +01:00
RISCVInstPrinter.h
RISCVMCAsmInfo.cpp
RISCVMCAsmInfo.h
RISCVMCCodeEmitter.cpp [RISCV] Initial support .insn directive for the assembler. 2021-09-12 15:56:12 -07:00
RISCVMCExpr.cpp RISCV: clean up target expression handling 2021-06-17 13:35:32 -07:00
RISCVMCExpr.h
RISCVMCObjectFileInfo.cpp [MC][RISCV] Add RISCV MCObjectFileInfo 2021-08-27 18:23:29 +01:00
RISCVMCObjectFileInfo.h [MC][RISCV] Add RISCV MCObjectFileInfo 2021-08-27 18:23:29 +01:00
RISCVMCTargetDesc.cpp Move TargetRegistry.(h|cpp) from Support to MC 2021-10-08 14:51:48 -07:00
RISCVMCTargetDesc.h
RISCVMatInt.cpp [RISCV] Optimize immediate materialisation with SLLI.UW in the Zba extension 2021-10-27 02:48:38 +00:00
RISCVMatInt.h [RISCV] Teach RISCVMatInt about cases where it can use LUI+SLLI to replace LUI+ADDI+SLLI for large constants. 2021-07-20 09:22:06 -07:00
RISCVTargetStreamer.cpp [RISCV] Unify the arch string parsing logic to to RISCVISAInfo. 2021-10-17 16:25:23 +08:00
RISCVTargetStreamer.h