llvm-project/llvm/test/MC/Disassembler
Alexandros Lamprineas 8689f5e6e7 [AArch64] Add support for the 'R' architecture profile.
This change introduces subtarget features to predicate certain
instructions and system registers that are available only on
'A' profile targets. Those features are not present when
targeting a generic CPU, which is the default processor.

In other words the generic CPU now means the intersection of
'A' and 'R' profiles. To maintain backwards compatibility we
enable the features that correspond to -march=armv8-a when the
architecture is not explicitly specified on the command line.

References: https://developer.arm.com/documentation/ddi0600/latest

Differential Revision: https://reviews.llvm.org/D110065
2021-10-27 12:32:30 +01:00
..
AArch64 [AArch64] Add support for the 'R' architecture profile. 2021-10-27 12:32:30 +01:00
AMDGPU [AMDGPU] Support shared literals in FMAMK/FMAAK 2021-10-11 13:09:54 -04:00
ARC [ARC] Add ADC (addition with carry) and SBC (subtraction with carry) instructions 2021-08-25 07:46:15 -07:00
ARM [ARMInstPrinter] Print the target address of a branch instruction 2021-06-30 16:35:28 +07:00
Hexagon
Lanai
M68k [M68k] Update disassembler test case following up ADD / ADDA changes 2021-08-08 14:20:46 -07:00
MSP430
Mips [mips] Add tests to check disassembling of add.ps/mul.ps/sub.ps instructions 2020-11-13 14:31:12 +03:00
PowerPC [PowerPC]Add addex instruction definition and MC tests 2021-07-26 14:55:38 -05:00
RISCV [RISCV] Add support for printing pcrel immediates as absolute addresses in llvm-objdump 2020-12-04 10:34:12 -08:00
Sparc
SystemZ [SystemZ] Add support for new cpu architecture - arch14 2021-07-26 16:57:28 +02:00
WebAssembly [WebAssembly] Update v128.any_true 2021-04-11 11:13:16 -07:00
X86 [X86] AVX512FP16 instructions enabling 6/6 2021-08-30 13:08:45 +08:00
XCore