llvm-project/llvm/test/Transforms/LoopVectorize
Florian Hahn e7f1232cb7
[LV] Move optimized IV recipes to phi section of header after sinking.
Unfortunately sinking recipes for first-order recurrences relies on
the original position of recipes. So if a recipes needs to be sunk after
an optimized induction, it needs to stay in the original position, until
sinking is done. This is causing PR52460.

To fix the crash, keep the recipes in the original position until
sink-after is done.

Post-commit follow-up to c45045bfd0 to address PR52460.
2021-11-10 11:41:08 +00:00
..
AArch64 Revert "[LoopVectorize] Extract the last lane from a uniform store" 2021-11-10 11:21:19 +00:00
AMDGPU [LV] Update more target-specific tests after 23c2f2e6b2. 2021-06-07 12:13:21 +01:00
ARM Revert rest of `IRBuilderBase`'s short-circuiting folds 2021-10-28 02:15:14 +03:00
Hexagon [LV] Fix crash when computing max VF too early 2021-02-01 12:14:59 +00:00
PowerPC Revert rest of `IRBuilderBase`'s short-circuiting folds 2021-10-28 02:15:14 +03:00
RISCV [LV] Update test that was missed in e844f05397. 2021-10-18 18:23:00 +01:00
SystemZ Revert "[LoopVectorize] Extract the last lane from a uniform store" 2021-11-10 11:21:19 +00:00
VE [VE][TTI] don't advertise vregs/vops 2020-11-06 11:12:10 +01:00
X86 Revert "[LoopVectorize] Extract the last lane from a uniform store" 2021-11-10 11:21:19 +00:00
XCore
12-12-11-if-conv.ll
2012-10-20-infloop.ll
2012-10-22-isconsec.ll
2016-07-27-loop-vec.ll
alias-set-with-uncomputable-bounds.ll [LAA] Do not set CanDoRT to false for AS that do not need RT checks. 2020-06-14 20:55:59 +01:00
align.ll
assume.ll [LoopVectorize] Improve vectorisation of some intrinsics by treating them as uniform 2021-08-06 10:13:15 +01:00
bsd_regex.ll
bzip_reverse_loops.ll
calloc.ll [BasicAA] Rename deprecated -basicaa to -basic-aa 2020-06-26 20:41:37 -07:00
cast-induction.ll
check-prof-info.ll Revert "Use uint64_t for branch weights instead of uint32_t" 2020-10-31 00:25:32 -07:00
conditional-assignment.ll
consec_no_gep.ll
consecutive-ptr-uniforms.ll Revert rG1c9bec727ab5c53fa060560dc8d346a911142170 : [InstCombine] Fold (gep (oneuse(gep Ptr, Idx0)), Idx1) -> (gep Ptr, (add Idx0, Idx1)) (PR51069) 2021-08-23 21:09:26 +01:00
control-flow.ll Reapply "[LV] Vectorize (some) early and multiple exit loops"" w/fix for builder 2020-12-28 10:13:28 -08:00
cpp-new-array.ll
dbg.value.ll
dead_instructions.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
debugloc.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
demanded-bits-of-pointer-instruction.ll
diag-missing-instr-debug-loc.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
diag-with-hotness-info-2.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
diag-with-hotness-info.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
disable_nonforced.ll
disable_nonforced_enable.ll
discriminator.ll
dont-fold-tail-for-const-TC.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
dont-fold-tail-for-divisible-TC.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
ee-crash.ll
exact.ll
explicit_outer_detection.ll [LV] Consider Loop Unroll Hints When Making Interleave Decisions 2021-04-28 17:27:52 -04:00
explicit_outer_nonuniform_inner.ll Require "target datalayout" to be at the beginning of an IR file. 2020-04-20 11:55:49 -07:00
explicit_outer_uniform_diverg_branch.ll Require "target datalayout" to be at the beginning of an IR file. 2020-04-20 11:55:49 -07:00
extract-last-veclane.ll [SVE][LoopVectorize] Add support for extracting the last lane of a scalable vector 2021-03-05 09:57:56 +00:00
fcmp-vectorize.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
first-order-recurrence-complex.ll Revert rest of `IRBuilderBase`'s short-circuiting folds 2021-10-28 02:15:14 +03:00
first-order-recurrence-multiply-recurrences.ll
first-order-recurrence-sink-replicate-region.ll [VPlan] Print live-in backedge taken count as part of plan. 2021-10-11 20:13:01 +01:00
first-order-recurrence.ll Revert "[IR] `IRBuilderBase::CreateAdd()`: short-circuit `x + 0` --> `x`" 2021-10-27 22:21:37 +03:00
fix-reduction-dbg.ll [Vectorizers][TTI] remove option to bypass creation of vector reduction intrinsics 2021-02-12 08:13:50 -05:00
flags.ll [Vectorizers][TTI] remove option to bypass creation of vector reduction intrinsics 2021-02-12 08:13:50 -05:00
float-induction.ll [VPlan] Support sinking recipes with uniform users outside sink target. 2021-09-15 09:21:39 +01:00
float-minmax-instruction-flag.ll Revert "[NFC] `IRBuilderBase::CreateAdd()`: place constant onto RHS" 2021-10-27 22:21:37 +03:00
float-reduction.ll Enable support for floating-point division reductions 2020-11-23 20:00:58 -05:00
fneg.ll
followup.ll [LV] Collect dead induction truncates 2020-10-08 08:28:58 +01:00
funcall.ll
gcc-examples.ll [BasicAA] Rename deprecated -basicaa to -basic-aa 2020-06-26 20:41:37 -07:00
gep_with_bitcast.ll
global_alias.ll [opt] Directly translate -O# to -passes='default<O#>' 2021-10-18 16:48:10 -07:00
hints-trans.ll [SimplifyCFG] TryToSimplifyUncondBranchFromEmptyBlock() already knows how to preserve DomTree 2020-12-17 01:03:49 +03:00
hoist-loads.ll
i8-induction.ll
icmp-uniforms.ll [VPlan] Include name when printing after 93a9d2de8f. 2021-03-23 09:50:14 +00:00
if-conv-crash.ll
if-conversion-edgemasks.ll
if-conversion-nest.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
if-conversion-reduction.ll
if-conversion.ll
if-pred-non-void.ll [VPlan] Merge predicated-triangle regions, after sinking. 2021-06-28 11:10:38 +01:00
if-pred-not-when-safe.ll [SimplifyCFG] TryToSimplifyUncondBranchFromEmptyBlock() already knows how to preserve DomTree 2020-12-17 01:03:49 +03:00
if-pred-stores.ll Revert "[NFC] `IRBuilderBase::CreateAdd()`: place constant onto RHS" 2021-10-27 22:21:37 +03:00
if-reduction.ll [LoopVectorize] Fix VPRecipeBuilder::createEdgeMask to correctly generate the mask 2021-02-14 21:12:34 +09:00
incorrect-dom-info.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
increment.ll
induction-step.ll Revert "[NFC] `IRBuilderBase::CreateAdd()`: place constant onto RHS" 2021-10-27 22:21:37 +03:00
induction.ll [LV] Move optimized IV recipes to phi section of header after sinking. 2021-11-10 11:41:08 +00:00
induction_plus.ll
infiniteloop.ll
int_sideeffect.ll
interleaved-accesses-1.ll [IR] Let IRBuilder's CreateVectorSplat/CreateShuffleVector use poison as placeholder 2020-12-30 04:21:04 +09:00
interleaved-accesses-2.ll
interleaved-accesses-3.ll
interleaved-accesses-alias.ll
interleaved-accesses-masked-group.ll [LV] Support Interleaved Store Group With Gaps 2021-08-08 10:32:02 +03:00
interleaved-accesses-pred-stores.ll [IR] Let IRBuilder's CreateVectorSplat/CreateShuffleVector use poison as placeholder 2020-12-30 04:21:04 +09:00
interleaved-accesses-uniform-load.ll
interleaved-accesses.ll Revert rG1c9bec727ab5c53fa060560dc8d346a911142170 : [InstCombine] Fold (gep (oneuse(gep Ptr, Idx0)), Idx1) -> (gep Ptr, (add Idx0, Idx1)) (PR51069) 2021-08-23 21:09:26 +01:00
interleaved-acess-with-remarks.ll
intrinsic.ll Update @llvm.powi to handle different int sizes for the exponent 2021-06-17 09:38:28 +02:00
invariant-store-vectorization-2.ll [LoopUtils] Fix incorrect RT check bounds of loop-invariant mem accesses 2021-07-19 19:38:24 +08:00
invariant-store-vectorization.ll [LV] Re-generate check lines of some fragile tests (NFC) 2021-07-19 19:38:24 +08:00
irregular_type.ll [LoopVectorize] Refine hasIrregularType predicate 2021-03-17 17:03:47 +01:00
iv_outside_user.ll
lcssa-crash.ll
libcall-remark.ll
lifetime.ll [NFC] Remove redundant test in Transforms/LoopVectorize/lifetime.ll 2021-08-05 14:39:08 +01:00
loop-form.ll [test] refresh a couple of autogen tests 2021-10-05 18:41:24 -07:00
loop-legality-checks.ll [LV] Enable vectorization of multiple exit loops w/computable exit counts 2021-07-15 08:53:51 -07:00
loop-scalars.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
loop-vect-memdep.ll
loop-vect-option.ll
memdep-fold-tail.ll [LV] Fallback strategies if tail-folding fails 2020-08-26 16:55:25 +01:00
memdep.ll
metadata-unroll.ll
metadata-width.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
metadata.ll
middle-block-dbg.ll
miniters.ll
minmax_reduction.ll [LV] Recognize intrinsic min/max reductions 2021-09-15 10:45:50 +01:00
mixed-precision-remarks.ll [LV] Add analysis remark for mixed precision conversions 2021-02-17 21:37:08 -05:00
multi-use-reduction-bug.ll
multiple-address-spaces.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
multiple-exits-versioning.ll [LV] Add test cases with multiple exits which require versioning. 2021-01-20 11:48:48 +00:00
multiple-strides-vectorization.ll [LoopUtils] Simplify addRuntimeCheck to return a single value. 2021-10-18 18:03:09 +01:00
no-interleave-up-front.ll
no_array_bounds.ll
no_array_bounds_scalable.ll [SVE] Add support for scalable vectors with vectorize.scalable.enable loop attribute 2020-12-02 13:23:43 +00:00
no_idiv_reduction.ll
no_int_induction.ll
no_outside_user.ll [LoopUtils] Simplify addRuntimeCheck to return a single value. 2021-10-18 18:03:09 +01:00
no_switch.ll
no_switch_disable_vectorization.ll
noalias-md-licm.ll Rename scoped-noalias -> scoped-noalias-aa 2020-07-24 12:14:27 -07:00
noalias-md.ll Rename scoped-noalias -> scoped-noalias-aa 2020-07-24 12:14:27 -07:00
noalias-scope-decl.ll [noalias.decl] Look through llvm.experimental.noalias.scope.decl 2021-01-19 20:09:42 +01:00
nofloat-report.ll
nofloat.ll
non-const-n.ll
nontemporal.ll
nounroll.ll Follow up of rGddb3b26a1269: added 'requires asserts' to test case. 2021-04-29 08:34:24 +01:00
novect-lcssa-cfg-invalidation.ll [MemorySSA] Remove unnecessary MSSA dependencies 2021-08-16 20:40:55 +02:00
nsw-crash.ll
nuw.ll
opaque-ptr.ll [OpaquePtr] Forbid mixing typed and opaque pointers 2021-09-10 15:18:23 +02:00
opt.ll
optimal-epilog-vectorization-limitations.ll [LV] Legalize scalable VF hints 2021-01-08 10:49:44 +00:00
optimal-epilog-vectorization-liveout.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
optimal-epilog-vectorization-scalable.ll [LoopVectorize] Permit fixed-width epilogue loops for scalable vector bodies 2021-11-08 09:41:13 +00:00
optimal-epilog-vectorization.ll Revert rest of `IRBuilderBase`'s short-circuiting folds 2021-10-28 02:15:14 +03:00
optsize.ll [IR] Let IRBuilder's CreateVectorSplat/CreateShuffleVector use poison as placeholder 2020-12-30 04:21:04 +09:00
outer-loop-vec-phi-predecessor-order.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
outer_loop_test1.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
outer_loop_test2.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
partial-lcssa.ll
phi-cost.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
phi-hang.ll
pointer-induction.ll Revert "[IR] `IRBuilderBase::CreateAdd()`: short-circuit `x + 0` --> `x`" 2021-10-27 22:21:37 +03:00
pr25281.ll [Tests] Fix incorrect noalias metadata 2021-09-18 20:51:00 +02:00
pr28541.ll
pr30654-phiscev-sext-trunc.ll Revert rest of `IRBuilderBase`'s short-circuiting folds 2021-10-28 02:15:14 +03:00
pr30806-phi-scev.ll
pr30806.ll
pr31098.ll
pr31190.ll
pr32859.ll
pr33706.ll
pr34681.ll [test, LoopVectorize] Fix use of var defined in CHECK-NOT 2021-04-09 10:01:57 +01:00
pr35743.ll
pr35773.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
pr36311.ll
pr36983.ll
pr37248.ll
pr37515.ll
pr38697.ll [SCEV] Properly guard reasoning about infinite loops being UB on mustprogress 2021-06-07 14:47:36 -07:00
pr38800.ll
pr39099.ll
pr39417-optsize-scevchecks.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
pr43166-fold-tail-by-masking.ll
pr44488-predication.ll Revert "[LoopVectorize] Extract the last lane from a uniform store" 2021-11-10 11:21:19 +00:00
pr45259.ll Revert rest of `IRBuilderBase`'s short-circuiting folds 2021-10-28 02:15:14 +03:00
pr45525.ll [LV] Fix PR45525: Incorrect assert in blend recipe 2020-04-15 10:39:07 +03:00
pr45679-fold-tail-by-masking.ll Revert "[IR] `IRBuilderBase::CreateAdd()`: short-circuit `x + 0` --> `x`" 2021-10-27 22:21:37 +03:00
pr46525-expander-insertpoint.ll [VPlan] Keep induction recipes in header. 2021-10-28 18:22:05 +01:00
pr47343-expander-lcssa-after-cfg-update.ll Revert "[LoopVectorize] Extract the last lane from a uniform store" 2021-11-10 11:21:19 +00:00
pr48832.ll [LoopVectorize] Fix VPRecipeBuilder::createEdgeMask to correctly generate the mask 2021-02-14 21:12:34 +09:00
pr50686.ll [LoopUtils] Simplify addRuntimeCheck to return a single value. 2021-10-18 18:03:09 +01:00
pr51614-fold-tail-by-masking.ll [LV] Fix crash for reverse interleaved loads with gap under fold-tail. 2021-09-21 20:13:32 +03:00
preserve-dbg-loc-and-loop-metadata.ll
ptr-induction.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
ptr_loops.ll [BasicAA] Rename deprecated -basicaa to -basic-aa 2020-06-26 20:41:37 -07:00
read-only.ll
reduction-inloop-pred.ll [LoopVectorize] Propagate fast-math flags for inloop reductions 2021-11-02 08:59:53 +00:00
reduction-inloop-uf4.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
reduction-inloop.ll [LoopVectorize] Propagate fast-math flags for inloop reductions 2021-11-02 08:59:53 +00:00
reduction-order.ll Update reduction test. Remove standalone test file 2021-07-27 12:35:04 -04:00
reduction-predselect.ll [VPlan] Merge predicated-triangle regions, after sinking. 2021-06-28 11:10:38 +01:00
reduction-ptr.ll [Analysis][LoopVectorize] do not form reductions of pointers 2021-02-19 14:01:57 -05:00
reduction-small-size.ll [LV] Add test case from PR51794 for over-eager truncation. 2021-11-02 22:15:09 +01:00
reduction.ll [VPlan] Register recipe for instr if the simplified value is recipe. 2021-05-11 14:32:34 +01:00
remarks-multi-exit-loops.ll [LV] Enable vectorization of multiple exit loops w/computable exit counts 2021-07-15 08:53:51 -07:00
remove_metadata.ll
reverse_induction.ll
reverse_iter.ll
runtime-check-address-space.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
runtime-check-needed-but-empty.ll [VPlan] Keep induction recipes in header. 2021-10-28 18:22:05 +01:00
runtime-check-pointer-element-type.ll [LAA] Use DL to get element size for bound computation. 2020-10-07 18:57:07 +01:00
runtime-check-readonly-address-space.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
runtime-check-readonly.ll
runtime-check-small-clamped-bounds.ll Revert rest of `IRBuilderBase`'s short-circuiting folds 2021-10-28 02:15:14 +03:00
runtime-check.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
runtime-drop-crash.ll [LV] Generate RT checks up-front and remove them if required. 2021-03-01 10:48:04 +00:00
safegep.ll
same-base-access.ll
scalable-assume.ll [LoopVectorize] Improve vectorisation of some intrinsics by treating them as uniform 2021-08-06 10:13:15 +01:00
scalable-first-order-recurrence.ll [IR] Let ConstantVector::getSplat use poison instead of undef 2021-08-10 08:27:43 +01:00
scalable-inductions.ll [IR] In ConstantFoldShuffleVectorInstruction use zeroinitializer for splats of 0 2021-11-10 09:42:58 +00:00
scalable-lifetime.ll [LoopVectorize] Improve vectorisation of some intrinsics by treating them as uniform 2021-08-06 10:13:15 +01:00
scalable-loop-unpredicated-body-scalar-tail.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
scalable-noalias-scope-decl.ll [LoopVectorize] Improve vectorisation of some intrinsics by treating them as uniform 2021-08-06 10:13:15 +01:00
scalable-reduction-inloop.ll [IR] In ConstantFoldShuffleVectorInstruction use zeroinitializer for splats of 0 2021-11-10 09:42:58 +00:00
scalable-trunc-min-bitwidth.ll [SVE] Fix ShuffleVector cast<FixedVectorType> in truncateToMinimalBitwidths 2021-07-07 15:30:10 +01:00
scalable-vf-hint.ll [LoopVectorize] Don't emit remarks about lack of scalable vectors unless they're specifically requested. 2021-08-15 12:15:52 +01:00
scalar-select.ll
scalar_after_vectorization.ll Revert "[NFC] `IRBuilderBase::CreateAdd()`: place constant onto RHS" 2021-10-27 22:21:37 +03:00
scalarized-bitcast.ll [LoopVectorize] Simplify scalar cost calculation in getInstructionCost 2021-04-28 13:41:07 +01:00
scev-during-mutation.ll [LV] Workaround PR49900 (a crash due to analyzing partially mutated IR) 2021-05-05 09:56:28 -07:00
scev-exitlim-crash.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
select-cmp-predicated.ll Revert "[IR] `IRBuilderBase::CreateAdd()`: short-circuit `x + 0` --> `x`" 2021-10-27 22:21:37 +03:00
select-cmp.ll [LoopVectorize] Permit vectorisation of more select(cmp(), X, Y) reduction patterns 2021-10-11 09:41:38 +01:00
select-reduction.ll [Vectorizers][TTI] remove option to bypass creation of vector reduction intrinsics 2021-02-12 08:13:50 -05:00
simple-unroll.ll
single-value-blend-phis.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
skeleton-lcssa-crash.ll Revert "[LoopVectorize] Extract the last lane from a uniform store" 2021-11-10 11:21:19 +00:00
skip-iterations.ll
small-loop.ll
start-non-zero.ll
store-shuffle-bug.ll [BasicAA] Rename deprecated -basicaa to -basic-aa 2020-06-26 20:41:37 -07:00
struct_access.ll
tail-folding-counting-down.ll [LV] Fallback strategies if tail-folding fails 2020-08-26 16:55:25 +01:00
tail-folding-vectorization-factor-1.ll Revert "[IR] `IRBuilderBase::CreateAdd()`: short-circuit `x + 0` --> `x`" 2021-10-27 22:21:37 +03:00
tbaa-nodep.ll [SimplifyCFG] TryToSimplifyUncondBranchFromEmptyBlock() already knows how to preserve DomTree 2020-12-17 01:03:49 +03:00
tripcount.ll Revert "Use uint64_t for branch weights instead of uint32_t" 2020-10-31 00:25:32 -07:00
trunc-reductions.ll Reland "[LV] Use lookThroughAnd with logical reductions" 2021-07-30 18:04:09 +01:00
undef-inst-bug.ll
uniform-blend.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
unroll-novec-memcheck-metadata.ll
unroll.ll
unroll_nonlatch.ll Revert "[IR] `IRBuilderBase::CreateAdd()`: short-circuit `x + 0` --> `x`" 2021-10-27 22:21:37 +03:00
unroll_novec.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
unsafe-dep-remark.ll
unsafe-vf-hint-remark.ll [LV] Clamp VF hint when unsafe 2020-12-01 11:30:34 +00:00
unsized-pointee-crash.ll
use-scalar-epilogue-if-tp-fails.ll Revert "[IR] `IRBuilderBase::CreateAdd()`: short-circuit `x + 0` --> `x`" 2021-10-27 22:21:37 +03:00
value-ptr-bug.ll
vect-phiscev-sext-trunc.ll
vect.omp.persistence.ll
vect.stats.ll
vector-geps.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
vector-intrinsic-call-cost.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
vectorize-once.ll [SimplifyCFG] TryToSimplifyUncondBranchFromEmptyBlock() already knows how to preserve DomTree 2020-12-17 01:03:49 +03:00
vectorize-pointer-phis.ll Recommit "[LAA] Support pointer phis in loop by analyzing each incoming pointer." 2021-09-14 11:19:12 +01:00
vectorizeVFone.ll [VFDatabase] Testsuite for scalar functions are vector functions with VF =1 2020-04-30 15:47:21 -04:00
version-mem-access.ll [BasicAA] Rename deprecated -basicaa to -basic-aa 2020-06-26 20:41:37 -07:00
vplan-dot-printing.ll [VPlan] Add plain text (not DOT's digraph) dumps 2021-03-19 10:50:12 -07:00
vplan-outer-loop-uncomputable-trip-count.ll [VPlan] Reject loops without computable backedge taken counts 2020-06-12 10:31:18 +01:00
vplan-printing.ll [VPlan] Replace hard-coded VPValue ids with patterns in tests. 2021-10-07 09:52:01 +01:00
vplan-sink-scalars-and-merge-vf1.ll [VPlan] Do not sink uniform recipes in sinkScalarOperands. 2021-05-27 14:07:48 +01:00
vplan-sink-scalars-and-merge.ll [VPlan] Print live-in backedge taken count as part of plan. 2021-10-11 20:13:01 +01:00
vplan-stress-test-no-explict-vf.ll
vplan-vectorize-inner-loop-reduction.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
vplan-widen-call-instruction.ll [LV] Mark increment of main vector loop induction variable as NUW. 2021-06-07 10:47:52 +01:00
vplan-widen-select-instruction.ll [VPlan] Support to widen select intructions in VPlan native path 2021-03-10 20:59:53 +00:00
vplan_hcfg_stress_test.ll
write-only.ll
zero-sized-pointee-crash.ll