llvm-project/llvm/unittests/CodeGen
Simon Pilgrim d391e4fe84 [X86] Update RET/LRET instruction to use the same naming convention as IRET (PR36876). NFC
Be more consistent in the naming convention for the various RET instructions to specify in terms of bitwidth.

Helps prevent future scheduler model mismatches like those that were only addressed in D44687.

Differential Revision: https://reviews.llvm.org/D113302
2021-11-07 15:06:54 +00:00
..
GlobalISel Move TargetRegistry.(h|cpp) from Support to MC 2021-10-08 14:51:48 -07:00
AArch64SelectionDAGTest.cpp Move TargetRegistry.(h|cpp) from Support to MC 2021-10-08 14:51:48 -07:00
AllocationOrderTest.cpp [NFC][regalloc] Separate iteration from AllocationOrder 2020-10-05 16:13:18 -07:00
AsmPrinterDwarfTest.cpp [unittests][CodeGen] Mark tests that cannot be executed with GTEST_SKIP() 2021-05-21 13:39:52 +07:00
CMakeLists.txt [DebugInfo][NFC] Move LiveDebugValues class to header 2021-10-12 16:07:26 +01:00
DIEHashTest.cpp [unittests][CodeGen] Mark tests that cannot be executed with GTEST_SKIP() 2021-05-21 13:39:52 +07:00
DIETest.cpp [unittests][CodeGen] Mark tests that cannot be executed with GTEST_SKIP() 2021-05-21 13:39:52 +07:00
InstrRefLDVTest.cpp [X86] Update RET/LRET instruction to use the same naming convention as IRET (PR36876). NFC 2021-11-07 15:06:54 +00:00
LexicalScopesTest.cpp Move TargetRegistry.(h|cpp) from Support to MC 2021-10-08 14:51:48 -07:00
LowLevelTypeTest.cpp Add support for zero-sized Scalars as a LowLevelType 2021-07-22 13:47:19 +02:00
MFCommon.inc [X86][MC][Target] Initial backend support a tune CPU to support -mtune 2020-08-14 15:31:50 -07:00
MachineInstrBundleIteratorTest.cpp
MachineInstrTest.cpp Move TargetRegistry.(h|cpp) from Support to MC 2021-10-08 14:51:48 -07:00
MachineOperandTest.cpp [MC] Refactor MCObjectFileInfo initialization and allow targets to create MCObjectFileInfo 2021-05-23 14:15:23 -07:00
PassManagerTest.cpp Move TargetRegistry.(h|cpp) from Support to MC 2021-10-08 14:51:48 -07:00
ScalableVectorMVTsTest.cpp [llvm] Add enum iteration to Sequence 2021-07-21 12:48:53 +00:00
SelectionDAGAddressAnalysisTest.cpp Move TargetRegistry.(h|cpp) from Support to MC 2021-10-08 14:51:48 -07:00
TargetOptionsTest.cpp Move TargetRegistry.(h|cpp) from Support to MC 2021-10-08 14:51:48 -07:00
TestAsmPrinter.cpp Move TargetRegistry.(h|cpp) from Support to MC 2021-10-08 14:51:48 -07:00
TestAsmPrinter.h [debug-info] refactor emitDwarfUnitLength 2021-02-25 21:00:25 -05:00
TypeTraitsTest.cpp Switch from llvm::is_trivially_copyable to std::is_trivially_copyable 2020-12-02 22:02:48 -08:00