24 lines
1.1 KiB
LLVM
24 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -slp-vectorizer %s | FileCheck %s
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-ios5.0.0"
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define i64 @mismatched_intrinsics(<4 x i32> %in1, <2 x i32> %in2) nounwind {
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; CHECK-LABEL: @mismatched_intrinsics(
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; CHECK-NEXT: [[VADDLVQ_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> [[IN1:%.*]])
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; CHECK-NEXT: [[VADDLV_S32_I:%.*]] = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> [[IN2:%.*]])
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; CHECK-NEXT: [[TST:%.*]] = icmp sgt i64 [[VADDLVQ_S32_I]], [[VADDLV_S32_I]]
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; CHECK-NEXT: [[EQUAL:%.*]] = sext i1 [[TST]] to i64
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; CHECK-NEXT: ret i64 [[EQUAL]]
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;
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%vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
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%vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
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%tst = icmp sgt i64 %vaddlvq_s32.i, %vaddlv_s32.i
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%equal = sext i1 %tst to i64
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ret i64 %equal
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}
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declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
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declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
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