132 lines
4.7 KiB
C++
132 lines
4.7 KiB
C++
//===-- X86ISelPattern.cpp - A pattern matching inst selector for X86 -----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines a pattern matching instruction selector for X86.
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//
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// FIXME: we could allocate one big array of unsigneds to use as the backing
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// store for all of the nodes costs arrays.
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//
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//===----------------------------------------------------------------------===//
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/// NOTE: This whole selector is completely disabled. This is only retained
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/// for historical interest and future work. It will probably change
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/// substantially in the future.
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#if 0
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#include "X86.h"
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#include "llvm/Pass.h"
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#include "llvm/Function.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/SSARegMap.h"
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#include "X86RegisterInfo.h"
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#include <iostream>
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// Include the generated instruction selector...
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#include "X86GenInstrSelector.inc"
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using namespace llvm;
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namespace {
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struct ISel : public FunctionPass, SelectionDAGTargetBuilder {
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TargetMachine &TM;
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ISel(TargetMachine &tm) : TM(tm) {}
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int VarArgsFrameIndex; // FrameIndex for start of varargs area
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bool runOnFunction(Function &Fn) {
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MachineFunction &MF = MachineFunction::construct(&Fn, TM);
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SelectionDAG DAG(MF, TM, *this);
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std::cerr << "\n\n\n=== "
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<< DAG.getMachineFunction().getFunction()->getName() << "\n";
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DAG.dump();
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X86ISel(DAG).generateCode();
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std::cerr << "\n\n\n";
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return true;
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}
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public: // Implementation of the SelectionDAGTargetBuilder class...
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/// expandArguments - Add nodes to the DAG to indicate how to load arguments
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/// off of the X86 stack.
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void expandArguments(SelectionDAG &SD);
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void expandCall(SelectionDAG &SD, CallInst &CI);
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};
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}
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void ISel::expandArguments(SelectionDAG &SD) {
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// Add DAG nodes to load the arguments... On entry to a function on the X86,
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// the stack frame looks like this:
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//
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// [ESP] -- return address
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// [ESP + 4] -- first argument (leftmost lexically)
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// [ESP + 8] -- second argument, if first argument is four bytes in size
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// ...
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//
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MachineFunction &F = SD.getMachineFunction();
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MachineFrameInfo *MFI = F.getFrameInfo();
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const Function &Fn = *F.getFunction();
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unsigned ArgOffset = 0; // Frame mechanisms handle retaddr slot
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for (Function::const_aiterator I = Fn.abegin(), E = Fn.aend(); I != E; ++I) {
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MVT::ValueType ObjectVT = SD.getValueType(I->getType());
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unsigned ArgIncrement = 4;
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unsigned ObjSize;
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switch (ObjectVT) {
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default: assert(0 && "Unhandled argument type!");
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case MVT::i8: ObjSize = 1; break;
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case MVT::i16: ObjSize = 2; break;
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case MVT::i32: ObjSize = 4; break;
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case MVT::i64: ObjSize = ArgIncrement = 8; break;
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case MVT::f32: ObjSize = 4; break;
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case MVT::f64: ObjSize = ArgIncrement = 8; break;
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}
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// Create the frame index object for this incoming parameter...
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int FI = MFI->CreateFixedObject(ObjSize, ArgOffset);
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// Create the SelectionDAG nodes corresponding to a load from this parameter
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SelectionDAGNode *FIN = new SelectionDAGNode(ISD::FrameIndex, MVT::i32);
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FIN->addValue(new ReducedValue_FrameIndex_i32(FI));
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SelectionDAGNode *Arg
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= new SelectionDAGNode(ISD::Load, ObjectVT, F.begin(), FIN);
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// Add the SelectionDAGNodes to the SelectionDAG... note that there is no
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// reason to add chain nodes here. We know that no loads ore stores will
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// ever alias these loads, so we are free to perform the load at any time in
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// the function
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SD.addNode(FIN);
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SD.addNodeForValue(Arg, I);
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ArgOffset += ArgIncrement; // Move on to the next argument...
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}
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// If the function takes variable number of arguments, make a frame index for
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// the start of the first vararg value... for expansion of llvm.va_start.
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if (Fn.getFunctionType()->isVarArg())
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VarArgsFrameIndex = MFI->CreateFixedObject(1, ArgOffset);
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}
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void ISel::expandCall(SelectionDAG &SD, CallInst &CI) {
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assert(0 && "ISel::expandCall not implemented!");
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}
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/// createX86PatternInstructionSelector - This pass converts an LLVM function
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/// into a machine code representation using pattern matching and a machine
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/// description file.
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///
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FunctionPass *llvm::createX86PatternInstructionSelector(TargetMachine &TM) {
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return new ISel(TM);
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}
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#endif
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