35 lines
		
	
	
		
			1.1 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			35 lines
		
	
	
		
			1.1 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-arm-none-eabi -mattr=+neon -mattr=+bf16 | FileCheck %s
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| 
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| declare bfloat @llvm.aarch64.neon.bfcvt(float)
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| declare <8 x bfloat> @llvm.aarch64.neon.bfcvtn(<4 x float>)
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| declare <8 x bfloat> @llvm.aarch64.neon.bfcvtn2(<8 x bfloat>, <4 x float>)
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| 
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| ; CHECK-LABEL: test_vcvth_bf16_f32
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| ; CHECK:      bfcvt h0, s0
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| ; CHECK-NEXT: ret
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| define bfloat @test_vcvth_bf16_f32(float %a) {
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| entry:
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|   %vcvth_bf16_f32 = call bfloat @llvm.aarch64.neon.bfcvt(float %a)
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|   ret bfloat %vcvth_bf16_f32
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| }
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| 
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| ; CHECK-LABEL: test_vcvtq_low_bf16_f32
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| ; CHECK:      bfcvtn v0.4h, v0.4s
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| ; CHECK-NEXT: ret
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| define <8 x bfloat> @test_vcvtq_low_bf16_f32(<4 x float> %a) {
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| entry:
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|   %cvt = call <8 x bfloat> @llvm.aarch64.neon.bfcvtn(<4 x float> %a)
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|   ret <8 x bfloat> %cvt
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| }
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| 
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| ; CHECK-LABEL: test_vcvtq_high_bf16_f32
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| ; CHECK:      bfcvtn2 v1.8h, v0.4s
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| ; CHECK-NEXT: mov v0.16b, v1.16b
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| ; CHECK-NEXT: ret
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| define <8 x bfloat> @test_vcvtq_high_bf16_f32(<4 x float> %a, <8 x bfloat> %inactive) {
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| entry:
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|   %cvt = call <8 x bfloat> @llvm.aarch64.neon.bfcvtn2(<8 x bfloat> %inactive, <4 x float> %a)
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|   ret <8 x bfloat> %cvt
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| }
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| 
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