123 lines
4.2 KiB
LLVM
123 lines
4.2 KiB
LLVM
; RUN: llc < %s -mtriple=aarch64-eabi -mattr=+v8.2a,+fullfp16 | FileCheck %s
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declare <4 x half> @llvm.aarch64.neon.fmulx.v4f16(<4 x half>, <4 x half>)
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declare <8 x half> @llvm.aarch64.neon.fmulx.v8f16(<8 x half>, <8 x half>)
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declare <4 x half> @llvm.aarch64.neon.fminnmp.v4f16(<4 x half>, <4 x half>)
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declare <8 x half> @llvm.aarch64.neon.fminnmp.v8f16(<8 x half>, <8 x half>)
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declare <4 x half> @llvm.aarch64.neon.fmaxnmp.v4f16(<4 x half>, <4 x half>)
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declare <8 x half> @llvm.aarch64.neon.fmaxnmp.v8f16(<8 x half>, <8 x half>)
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declare <4 x half> @llvm.aarch64.neon.fabd.v4f16(<4 x half>, <4 x half>)
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declare <8 x half> @llvm.aarch64.neon.fabd.v8f16(<8 x half>, <8 x half>)
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declare <4 x half> @llvm.fabs.v4f16(<4 x half>)
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declare <8 x half> @llvm.fabs.v8f16(<8 x half>)
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define dso_local <4 x half> @t_vdiv_f16(<4 x half> %a, <4 x half> %b) {
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; CHECK-LABEL: t_vdiv_f16:
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; CHECK: fdiv v0.4h, v0.4h, v1.4h
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; CHECK-NEXT: ret
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entry:
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%div.i = fdiv <4 x half> %a, %b
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ret <4 x half> %div.i
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}
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define dso_local <8 x half> @t_vdivq_f16(<8 x half> %a, <8 x half> %b) {
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; CHECK-LABEL: t_vdivq_f16:
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; CHECK: fdiv v0.8h, v0.8h, v1.8h
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; CHECK-NEXT: ret
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entry:
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%div.i = fdiv <8 x half> %a, %b
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ret <8 x half> %div.i
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}
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define dso_local <4 x half> @t_vmulx_f16(<4 x half> %a, <4 x half> %b) {
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; CHECK-LABEL: t_vmulx_f16:
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; CHECK: fmulx v0.4h, v0.4h, v1.4h
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; CHECK-NEXT: ret
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entry:
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%vmulx2.i = tail call <4 x half> @llvm.aarch64.neon.fmulx.v4f16(<4 x half> %a, <4 x half> %b)
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ret <4 x half> %vmulx2.i
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}
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define dso_local <8 x half> @t_vmulxq_f16(<8 x half> %a, <8 x half> %b) {
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; CHECK-LABEL: t_vmulxq_f16:
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; CHECK: fmulx v0.8h, v0.8h, v1.8h
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; CHECK-NEXT: ret
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entry:
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%vmulx2.i = tail call <8 x half> @llvm.aarch64.neon.fmulx.v8f16(<8 x half> %a, <8 x half> %b)
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ret <8 x half> %vmulx2.i
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}
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define dso_local <4 x half> @t_vpminnm_f16(<4 x half> %a, <4 x half> %b) {
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; CHECK-LABEL: t_vpminnm_f16:
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; CHECK: fminnmp v0.4h, v0.4h, v1.4h
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; CHECK-NEXT: ret
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entry:
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%vpminnm2.i = tail call <4 x half> @llvm.aarch64.neon.fminnmp.v4f16(<4 x half> %a, <4 x half> %b)
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ret <4 x half> %vpminnm2.i
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}
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define dso_local <8 x half> @t_vpminnmq_f16(<8 x half> %a, <8 x half> %b) {
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; CHECK-LABEL: t_vpminnmq_f16:
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; CHECK: fminnmp v0.8h, v0.8h, v1.8h
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; CHECK-NEXT: ret
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entry:
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%vpminnm2.i = tail call <8 x half> @llvm.aarch64.neon.fminnmp.v8f16(<8 x half> %a, <8 x half> %b)
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ret <8 x half> %vpminnm2.i
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}
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define dso_local <4 x half> @t_vpmaxnm_f16(<4 x half> %a, <4 x half> %b) {
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; CHECK-LABEL: t_vpmaxnm_f16:
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; CHECK: fmaxnmp v0.4h, v0.4h, v1.4h
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; CHECK-NEXT: ret
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entry:
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%vpmaxnm2.i = tail call <4 x half> @llvm.aarch64.neon.fmaxnmp.v4f16(<4 x half> %a, <4 x half> %b)
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ret <4 x half> %vpmaxnm2.i
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}
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define dso_local <8 x half> @t_vpmaxnmq_f16(<8 x half> %a, <8 x half> %b) {
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; CHECK-LABEL: t_vpmaxnmq_f16:
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; CHECK: fmaxnmp v0.8h, v0.8h, v1.8h
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; CHECK-NEXT: ret
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entry:
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%vpmaxnm2.i = tail call <8 x half> @llvm.aarch64.neon.fmaxnmp.v8f16(<8 x half> %a, <8 x half> %b)
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ret <8 x half> %vpmaxnm2.i
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}
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define dso_local <4 x half> @t_vabd_f16(<4 x half> %a, <4 x half> %b) {
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; CHECK-LABEL: t_vabd_f16:
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; CHECK: fabd v0.4h, v0.4h, v1.4h
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; CHECK-NEXT: ret
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entry:
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%vabdh_f16 = tail call <4 x half> @llvm.aarch64.neon.fabd.v4f16(<4 x half> %a, <4 x half> %b)
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ret <4 x half> %vabdh_f16
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}
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define dso_local <8 x half> @t_vabdq_f16(<8 x half> %a, <8 x half> %b) {
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; CHECK-LABEL: t_vabdq_f16:
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; CHECK: fabd v0.8h, v0.8h, v1.8h
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; CHECK-NEXT: ret
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entry:
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%vabdh_f16 = tail call <8 x half> @llvm.aarch64.neon.fabd.v8f16(<8 x half> %a, <8 x half> %b)
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ret <8 x half> %vabdh_f16
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}
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define dso_local <4 x half> @t_vabd_f16_from_fsub_fabs(<4 x half> %a, <4 x half> %b) {
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; CHECK-LABEL: t_vabd_f16_from_fsub_fabs:
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; CHECK: fabd v0.4h, v0.4h, v1.4h
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; CHECK-NEXT: ret
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entry:
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%sub = fsub <4 x half> %a, %b
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%abs = tail call <4 x half> @llvm.fabs.v4f16(<4 x half> %sub)
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ret <4 x half> %abs
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}
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define dso_local <8 x half> @t_vabdq_f16_from_fsub_fabs(<8 x half> %a, <8 x half> %b) {
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; CHECK-LABEL: t_vabdq_f16_from_fsub_fabs:
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; CHECK: fabd v0.8h, v0.8h, v1.8h
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; CHECK-NEXT: ret
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entry:
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%sub = fsub <8 x half> %a, %b
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%abs = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> %sub)
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ret <8 x half> %abs
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}
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