Hrvoje Varga dbe4d96b4f [mips][microMIPS] Implement DBITSWAP, DLSA and LWUPC and add tests for AUI instructions ... Differential Revision: https://reviews.llvm.org/D16452 llvm-svn: 280909		2016-09-08 07:41:43 +00:00
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AArch64	AArch64: TableGenerate system instruction operands.	2016-07-05 21:23:04 +00:00
AMDGPU	[AMDGPU] fix failure on printing of non-existing instruction operands.	2016-08-15 10:56:48 +00:00
ARM	[ARM] Saturation instructions are DSP-only	2016-07-25 22:25:25 +00:00
Hexagon	[Hexagon] Treat all conditional branches as predicted (not-taken by default)	2016-05-09 18:22:07 +00:00
Lanai	[lanai] Add Lanai backend.	2016-03-28 13:09:54 +00:00
Mips	[mips][microMIPS] Implement DBITSWAP, DLSA and LWUPC and add tests for AUI instructions	2016-09-08 07:41:43 +00:00
PowerPC	[PowerPC] Add asm parser/disassembler support for hrfid,nap,slbmfev	2016-09-02 23:42:01 +00:00
Sparc	This change adds co-processor condition branching and conditional traps to the Sparc back-end.	2016-03-09 18:20:21 +00:00
SystemZ	[SystemZ] Add missing classes and instructions	2016-08-05 15:14:34 +00:00
X86	Add new flag and intrinsic support for MWAITX and MONITORX instructions	2016-05-18 11:59:12 +00:00
XCore	…