Hrvoje Varga f0ed16eae5 [mips][microMIPS] Implement BLTZC, BLEZC, BGEZC and BGTZC instructions, fix disassembly and add operand checking to existing B<cond>C implementations ... Differential Revision: https://reviews.llvm.org/D22667 llvm-svn: 279429		2016-08-22 12:17:59 +00:00
..
invalid-mips1-wrong-error.s	[mips] Range check simm9 and fix a bug this revealed.	2016-03-31 13:15:23 +00:00
invalid-mips1.s	…
invalid-mips2-wrong-error.s	…
invalid-mips2.s	…
invalid-mips4-wrong-error.s	[mips][microMIPS] Implement PREFX, LHUE, LBE, LBUE, LHE, LWE, SBE, SHE and SWE instructions	2015-09-16 09:14:35 +00:00
invalid-mips4.s	[mips][microMIPS] Implement PREFX, LHUE, LBE, LBUE, LHE, LWE, SBE, SHE and SWE instructions	2015-09-16 09:14:35 +00:00
invalid-mips5-wrong-error.s	[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support	2016-07-11 07:41:56 +00:00
invalid-mips5.s	…
invalid-mips32-wrong-error.s	…
invalid-mips32.s	…
invalid-mips32r2.s	…
invalid.s	[mips][microMIPS] Implement BLTZC, BLEZC, BGEZC and BGTZC instructions, fix disassembly and add operand checking to existing B<cond>C implementations	2016-08-22 12:17:59 +00:00
relocations.s	[mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations.	2016-05-03 13:35:44 +00:00
valid.s	[mips] Add l.[sd] and s.[sd] instruction aliases	2016-08-17 14:45:09 +00:00