Go to file

xianfeili 501b1c47d5 extract_spec.py support ci log (#39 ) extract_spec.py support ci log. Use re.search function replace the re.match function. It can ignore the timestampe at the beginning of every log line of the CI log file.		2025-04-18 10:39:00 +08:00
bus/tilelink	bus: add transaction parser scripts for tilelink database	2023-08-30 11:22:56 +08:00
fpga	extract_spec.py support ci log (#39 )	2025-04-18 10:39:00 +08:00
github	fix(github): filter actions by their name (#35 )	2025-01-15 00:37:10 +08:00
license	complete add_license func	2021-06-03 22:21:36 +08:00
logviewer	logparser: remove common prefix in module names	2021-05-09 15:02:50 +08:00
perf	chore(autorun): add verbose and fix free check (#38 )	2025-03-31 14:53:39 +08:00
regfile_replace	Add the script to generate the needed regfile automatically.	2021-01-27 14:08:09 +08:00
simulation	support nanhu palladium project	2022-11-30 17:35:36 +08:00
timing	timing: support dedup in analyze timing	2022-08-13 14:39:01 +08:00
verilog	verilog,parse: add comments to files	2022-01-09 19:57:48 +08:00
xs_kmh_fpga	fix the gitignore setting issue that cause the xs_kmh_fpga folder misssing files (#40 )	2025-04-18 10:38:19 +08:00
xs_nanhu_fpga	Update nanhu's xdma bd tcl to support 2 PCIe RC (#37 )	2025-02-25 10:12:39 +08:00
.gitignore	fix the gitignore setting issue that cause the xs_kmh_fpga folder misssing files (#40 )	2025-04-18 10:38:19 +08:00
README.md	Update to env scripts	2021-03-22 19:52:56 +08:00
requirements.txt	xsautorun: fix is_epyc() in server.py; read server info with sshconf and glances (#28 )	2024-07-02 14:27:49 +08:00

README.md

env-scripts

Scripts for XS