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[bsp][qemu-vexpress-a9] Adapter driver for serial port v2 (#10176)

This commit is contained in:
hydevcode 2025-04-10 09:24:12 +08:00 committed by GitHub
parent 6639dbe252
commit 0c4a2048f9
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GPG Key ID: B5690EEEBB952194
8 changed files with 541 additions and 198 deletions
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27
bsp/qemu-vexpress-a9/drivers/Kconfig
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@ -11,13 +11,28 @@ config SOC_VEXPRESS_A9
default y
menu "Onboard Peripheral Drivers"
config RT_USING_UART0
bool "Enable UART0"
default y
config RT_USING_UART1
bool "Enable UART1"
menuconfig BSP_USING_UART
bool "Enable UART"
default y
select RT_USING_SERIAL
if BSP_USING_UART
config BSP_USING_UART0
bool "Enable UART0"
select RT_USING_UART0
default y
config BSP_USING_UART1
bool "Enable UART1"
select RT_USING_UART1
default n
config BSP_USING_UART2
bool "Enable UART2"
select RT_USING_UART2
default n
config BSP_USING_UART3
bool "Enable UART3"
select RT_USING_UART3
default n
endif
config BSP_USING_LVGL
bool "Enable LVGL for LCD"

5
bsp/qemu-vexpress-a9/drivers/SConscript
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@ -12,6 +12,11 @@ if not GetDepend('BSP_DRV_EMAC'):
if not GetDepend('BSP_DRV_CLCD'):
SrcRemove(src, ['drv_clcd.c'])
if not GetDepend('RT_USING_SERIAL_V1'):
SrcRemove(src, ['drv_uart.c'])
if not GetDepend('RT_USING_SERIAL_V2'):
SrcRemove(src, ['drv_uart_v2.c'])
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
for d in list:

210
bsp/qemu-vexpress-a9/drivers/drv_uart.c Normal file
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@ -0,0 +1,210 @@
/*
* Copyright (c) 2006-2025 RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2013-03-30 Bernard the first version
* 2025-04-08 Hydevcode second version
*
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <rtdbg.h>
#include "drv_uart.h"
#include "board.h"
#include "mmu.h"
#ifdef RT_USING_SERIAL_V1
struct hw_uart_device
{
rt_uint32_t hw_base;
rt_uint32_t irqno;
struct rt_serial_device *serial;
char *device_name;
};
#define UART_DR(base) __REG32(base + 0x00)
#define UART_FR(base) __REG32(base + 0x18)
#define UART_CR(base) __REG32(base + 0x30)
#define UART_IMSC(base) __REG32(base + 0x38)
#define UART_ICR(base) __REG32(base + 0x44)
#define UARTFR_RXFE 0x10
#define UARTFR_TXFF 0x20
#define UARTIMSC_RXIM 0x10
#define UARTIMSC_TXIM 0x20
#define UARTICR_RXIC 0x10
#define UARTICR_TXIC 0x20
#if defined(BSP_USING_UART0)
struct rt_serial_device serial0;
#endif
#if defined(BSP_USING_UART1)
struct rt_serial_device serial1;
#endif
#if defined(BSP_USING_UART2)
struct rt_serial_device serial2;
#endif
#if defined(BSP_USING_UART3)
struct rt_serial_device serial3;
#endif
static struct hw_uart_device _uart_device[] = {
#if defined(BSP_USING_UART0)
{
REALVIEW_UART0_BASE,
IRQ_PBA8_UART0,
&serial0,
"uart0",
},
#endif
#if defined(BSP_USING_UART1)
{
REALVIEW_UART1_BASE,
IRQ_PBA8_UART1,
&serial1,
"uart1",
},
#endif
#if defined(BSP_USING_UART2)
{
REALVIEW_UART2_BASE,
IRQ_PBA8_UART2,
&serial2,
"uart2",
},
#endif
#if defined(BSP_USING_UART3)
{
REALVIEW_UART3_BASE,
IRQ_PBA8_UART3,
&serial3,
"uart3",
},
#endif
};
/**
* @brief UART common interrupt process. This
*
* @param serial Serial device
*/
static void rt_hw_uart_isr(int irqno, void *param)
{
struct rt_serial_device *serial = (struct rt_serial_device *)param;
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
}
static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
return RT_EOK;
}
static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
{
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
/* disable rx irq */
UART_IMSC(uart->hw_base) &= ~UARTIMSC_RXIM;
break;
case RT_DEVICE_CTRL_SET_INT:
/* enable rx irq */
UART_IMSC(uart->hw_base) |= UARTIMSC_RXIM;
rt_hw_interrupt_umask(uart->irqno);
break;
}
return RT_EOK;
}
static int uart_putc(struct rt_serial_device *serial, char ch)
{
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
while (UART_FR(uart->hw_base) & UARTFR_TXFF);
UART_DR(uart->hw_base) = ch;
return 1;
}
static int uart_getc(struct rt_serial_device *serial)
{
int ch;
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
ch = -1;
if (!(UART_FR(uart->hw_base) & UARTFR_RXFE))
{
ch = UART_DR(uart->hw_base) & 0xff;
}
return ch;
}
static const struct rt_uart_ops _uart_ops = {
uart_configure,
uart_control,
uart_putc,
uart_getc,
};
int rt_hw_uart_init(void)
{
rt_err_t err = RT_EOK;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
for (uint32_t i = 0; i < sizeof(_uart_device) / sizeof(_uart_device[0]); i++)
{
#ifdef RT_USING_SMART
_uart_device[i].hw_base = (uint32_t)rt_ioremap((void*)_uart_device[i].hw_base, 0x1000);
#endif
_uart_device[i].serial->ops = &_uart_ops;
_uart_device[i].serial->config = config;
/* register UART device */
err = rt_hw_serial_register(_uart_device[i].serial,
_uart_device[i].device_name,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
(void*)&_uart_device[i]);
rt_hw_interrupt_install(_uart_device[i].irqno, rt_hw_uart_isr, _uart_device[i].serial, _uart_device[i].device_name);
/* enable Rx and Tx of UART */
UART_CR(_uart_device[i].hw_base) = (1 << 0) | (1 << 8) | (1 << 9);
}
return err;
}
INIT_BOARD_EXPORT(rt_hw_uart_init);
#endif /* RT_USING_SERIAL */

17
bsp/qemu-vexpress-a9/drivers/drv_uart.h Normal file
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@ -0,0 +1,17 @@
/*
* Copyright (c) 2006-2025 RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2013-03-30 Bernard the first version
* 2025-04-08 Hydevcode second version
*
*/
#ifndef DRV_UART_H
#define DRV_UART_H
int rt_hw_uart_init(void);
#endif /* DRV_UART_H */

272
bsp/qemu-vexpress-a9/drivers/drv_uart_v2.c Normal file
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@ -0,0 +1,272 @@
/*
* Copyright (c) 2006-2025 RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2025-04-08 Hydevcode the first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <rtdbg.h>
#include "board.h"
#include "drv_uart_v2.h"
#include "mmu.h"
#ifdef RT_USING_SERIAL_V2
#include <rtdbg.h>
#if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3)
#error "Please define at least one BSP_USING_UARTx"
/* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
#endif
struct hw_uart_device
{
rt_uint32_t hw_base;
rt_uint32_t irqno;
struct rt_serial_device *serial;
char *device_name;
};
#define UART_DR(base) __REG32(base + 0x00)
#define UART_FR(base) __REG32(base + 0x18)
#define UART_CR(base) __REG32(base + 0x30)
#define UART_IMSC(base) __REG32(base + 0x38)
#define UART_ICR(base) __REG32(base + 0x44)
#define UARTFR_RXFE 0x10
#define UARTFR_TXFF 0x20
#define UARTIMSC_RXIM 0x10
#define UARTIMSC_TXIM 0x20
#define UARTICR_RXIC 0x10
#define UARTICR_TXIC 0x20
#if defined(BSP_USING_UART0)
struct rt_serial_device serial0;
#endif
#if defined(BSP_USING_UART1)
struct rt_serial_device serial1;
#endif
#if defined(BSP_USING_UART2)
struct rt_serial_device serial2;
#endif
#if defined(BSP_USING_UART3)
struct rt_serial_device serial3;
#endif
static struct hw_uart_device _uart_device[] = {
#if defined(BSP_USING_UART0)
{
REALVIEW_UART0_BASE,
IRQ_PBA8_UART0,
&serial0,
"uart0",
},
#endif
#if defined(BSP_USING_UART1)
{
REALVIEW_UART1_BASE,
IRQ_PBA8_UART1,
&serial1,
"uart1",
},
#endif
#if defined(BSP_USING_UART2)
{
REALVIEW_UART2_BASE,
IRQ_PBA8_UART2,
&serial2,
"uart2",
},
#endif
#if defined(BSP_USING_UART3)
{
REALVIEW_UART3_BASE,
IRQ_PBA8_UART3,
&serial3,
"uart3",
},
#endif
};
/**
* @brief UART common interrupt process. This
*
* @param serial Serial device
*/
static void rt_hw_uart_isr(int irqno, void *param)
{
struct rt_serial_device *serial = (struct rt_serial_device *)param;
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
struct rt_serial_rx_fifo *rx_fifo;
rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx;
RT_ASSERT(rx_fifo != RT_NULL);
rt_ringbuffer_putchar(&(rx_fifo->rb), UART_DR(uart->hw_base));
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
}
static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
return RT_EOK;
}
static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
{
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
rt_ubase_t ctrl_arg = (rt_ubase_t) arg;
if(ctrl_arg & (RT_DEVICE_FLAG_RX_BLOCKING | RT_DEVICE_FLAG_RX_NON_BLOCKING))
{
{
ctrl_arg = RT_DEVICE_FLAG_INT_RX;
}
}
else if(ctrl_arg & (RT_DEVICE_FLAG_TX_BLOCKING | RT_DEVICE_FLAG_TX_NON_BLOCKING))
{
{
ctrl_arg = RT_DEVICE_FLAG_INT_TX;
}
}
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
if (ctrl_arg == RT_DEVICE_FLAG_INT_RX)
{
/* disable rx irq */
UART_IMSC(uart->hw_base) &= ~UARTIMSC_RXIM;
}
else if (ctrl_arg == RT_DEVICE_FLAG_INT_TX)
{
/* disable tx irq */
UART_IMSC(uart->hw_base) &= ~UARTIMSC_TXIM;
}
break;
case RT_DEVICE_CTRL_SET_INT:
if (ctrl_arg == RT_DEVICE_FLAG_INT_RX)
{
/* enable rx irq */
UART_IMSC(uart->hw_base) |= UARTIMSC_RXIM;
rt_hw_interrupt_umask(uart->irqno);
} else if (ctrl_arg == RT_DEVICE_FLAG_INT_TX)
{
/* enable tx irq */
UART_IMSC(uart->hw_base) |= UARTIMSC_TXIM;
rt_hw_interrupt_umask(uart->irqno);
}
break;
case RT_DEVICE_CTRL_CONFIG:
uart_control(serial, RT_DEVICE_CTRL_SET_INT, (void *)ctrl_arg);
break;
}
return RT_EOK;
}
static int uart_putc(struct rt_serial_device *serial, char ch)
{
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
while (UART_FR(uart->hw_base) & UARTFR_TXFF);
UART_DR(uart->hw_base) = ch;
return 1;
}
static int uart_getc(struct rt_serial_device *serial)
{
int ch;
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
ch = -1;
if (!(UART_FR(uart->hw_base) & UARTFR_RXFE))
{
ch = UART_DR(uart->hw_base) & 0xff;
}
return ch;
}
static rt_ssize_t uart_transmit(struct rt_serial_device *serial,
rt_uint8_t *buf,
rt_size_t size,
rt_uint32_t tx_flag)
{
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(buf != RT_NULL);
RT_ASSERT(size);
uart_control(serial, RT_DEVICE_CTRL_SET_INT, (void *)tx_flag);
return size;
}
static const struct rt_uart_ops _uart_ops = {
.configure = uart_configure,
.control = uart_control,
.putc = uart_putc,
.getc = uart_getc,
.transmit = uart_transmit
};
int rt_hw_uart_init(void)
{
rt_err_t err = RT_EOK;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
for (uint32_t i = 0; i < sizeof(_uart_device) / sizeof(_uart_device[0]); i++)
{
#ifdef RT_USING_SMART
_uart_device[i].hw_base = (uint32_t)rt_ioremap((void*)_uart_device[i].hw_base, 0x1000);
#endif
_uart_device[i].serial->ops = &_uart_ops;
_uart_device[i].serial->config = config;
_uart_device[i].serial->config.rx_bufsz = 64;
_uart_device[i].serial->config.tx_bufsz = 0;
/* register UART device */
err = rt_hw_serial_register(_uart_device[i].serial,
_uart_device[i].device_name,
RT_DEVICE_FLAG_RDWR,
(void*)&_uart_device[i]);
rt_hw_interrupt_install(_uart_device[i].irqno, rt_hw_uart_isr, _uart_device[i].serial, _uart_device[i].device_name);
/* enable Rx and Tx of UART */
UART_CR(_uart_device[i].hw_base) = (1 << 0) | (1 << 8) | (1 << 9);
}
return err;
}
INIT_BOARD_EXPORT(rt_hw_uart_init);
#endif /* RT_USING_SERIAL_V2 */

16
bsp/qemu-vexpress-a9/drivers/drv_uart_v2.h Normal file
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@ -0,0 +1,16 @@
/*
* Copyright (c) 2006-2025 RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2025-04-08 Hydevcode the first version
*
*/
#ifndef DRV_UART_V2_H
#define DRV_UART_V2_H
int rt_hw_uart_init(void);
#endif /* DRV_UART_V2_H */

172
bsp/qemu-vexpress-a9/drivers/serial.c
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@ -1,172 +0,0 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2013-03-30 Bernard the first verion
*/
#include <rthw.h>
#include <rtdevice.h>
#include "serial.h"
#include "board.h"
#include "mmu.h"
struct hw_uart_device
{
rt_uint32_t hw_base;
rt_uint32_t irqno;
};
#define UART_DR(base) __REG32(base + 0x00)
#define UART_FR(base) __REG32(base + 0x18)
#define UART_CR(base) __REG32(base + 0x30)
#define UART_IMSC(base) __REG32(base + 0x38)
#define UART_ICR(base) __REG32(base + 0x44)
#define UARTFR_RXFE 0x10
#define UARTFR_TXFF 0x20
#define UARTIMSC_RXIM 0x10
#define UARTIMSC_TXIM 0x20
#define UARTICR_RXIC 0x10
#define UARTICR_TXIC 0x20
static void rt_hw_uart_isr(int irqno, void *param)
{
struct rt_serial_device *serial = (struct rt_serial_device *)param;
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
}
static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
return RT_EOK;
}
static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
{
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
/* disable rx irq */
UART_IMSC(uart->hw_base) &= ~UARTIMSC_RXIM;
break;
case RT_DEVICE_CTRL_SET_INT:
/* enable rx irq */
UART_IMSC(uart->hw_base) |= UARTIMSC_RXIM;
rt_hw_interrupt_umask(uart->irqno);
break;
}
return RT_EOK;
}
static int uart_putc(struct rt_serial_device *serial, char c)
{
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
while (UART_FR(uart->hw_base) & UARTFR_TXFF);
UART_DR(uart->hw_base) = c;
return 1;
}
static int uart_getc(struct rt_serial_device *serial)
{
int ch;
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
ch = -1;
if (!(UART_FR(uart->hw_base) & UARTFR_RXFE))
{
ch = UART_DR(uart->hw_base) & 0xff;
}
return ch;
}
static const struct rt_uart_ops _uart_ops =
{
uart_configure,
uart_control,
uart_putc,
uart_getc,
};
#ifdef RT_USING_UART0
/* UART device driver structure */
static struct hw_uart_device _uart0_device =
{
REALVIEW_UART0_BASE,
IRQ_PBA8_UART0,
};
static struct rt_serial_device _serial0;
#endif
#ifdef RT_USING_UART1
/* UART1 device driver structure */
static struct hw_uart_device _uart1_device =
{
REALVIEW_UART1_BASE,
IRQ_PBA8_UART1,
};
static struct rt_serial_device _serial1;
#endif
int rt_hw_uart_init(void)
{
struct hw_uart_device *uart;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
#ifdef RT_USING_UART0
#ifdef RT_USING_SMART
_uart0_device.hw_base = (uint32_t)rt_ioremap((void*)_uart0_device.hw_base, 0x1000);
#endif
uart = &_uart0_device;
_serial0.ops = &_uart_ops;
_serial0.config = config;
/* register UART1 device */
rt_hw_serial_register(&_serial0, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);
rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, &_serial0, "uart0");
/* enable Rx and Tx of UART */
UART_CR(uart->hw_base) = (1 << 0) | (1 << 8) | (1 << 9);
#endif
#ifdef RT_USING_UART1
#ifdef RT_USING_SMART
_uart1_device.hw_base = (uint32_t)rt_ioremap((void*)_uart1_device.hw_base, 0x1000);
#endif
uart = &_uart1_device;
_serial1.ops = &_uart_ops;
_serial1.config = config;
/* register UART1 device */
rt_hw_serial_register(&_serial1, "uart1",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
/* enable Rx and Tx of UART */
UART_CR(uart->hw_base) = (1 << 0) | (1 << 8) | (1 << 9);
rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, &_serial1, "uart1");
#endif
return 0;
}
INIT_BOARD_EXPORT(rt_hw_uart_init);

20
bsp/qemu-vexpress-a9/drivers/serial.h
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@ -1,20 +0,0 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2013-03-30 Bernard the first verion
*/
#ifndef __UART_H__
#define __UART_H__
#include <board.h>
int rt_hw_uart_init(void);
#endif