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bsp:<bsp/gd32/arm/libraries/gd32_drivers/drv_pwm.c>[Support for non-complementary PWM output with advanced timers] (#10426) 

bsp:<bsp/gd32/arm/libraries/gd32_drivers/drv_pwm.c>
[Support for non-complementary PWM output with advanced timers]

1.当前结构体 TIMER_PORT_CHANNEL_MAP_Srt_int16_t 的成员channel为u16
为增加对非互补输出的支持 将uint16_t 改为int16_t
/* timer channel: -2 is ch_1n, -1 is ch_0n, 0 is ch0, 1 is ch1 */
2.对函数 channel_output_config 以及 drv_pwm_enable 进行修改，增加对非互补输出的支持

Signed-off-by: Yucai Liu <1486344514@qq.com>
This commit is contained in:
ricky 2025-06-28 10:55:51 +08:00 committed by GitHub
parent d62f1e46b8
commit 3e4f0ec015
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GPG Key ID: B5690EEEBB952194
1 changed files with 57 additions and 35 deletions
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40
bsp/gd32/arm/libraries/gd32_drivers/drv_pwm.c
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@ -6,6 +6,7 @@
* Change Logs:
* Date Author Notes
* 2023-06-05 zengjianwei first version
* 2025-06-23 Yucai Liu Support for non-complementary PWM output with advanced timers
*/
#include <board.h>
@ -15,7 +16,7 @@
#ifdef RT_USING_PWM
//#define DRV_DEBUG
/* #define DRV_DEBUG */
#define LOG_TAG "drv.pwm"
#include <rtdbg.h>
@ -25,10 +26,11 @@
typedef struct
{
rt_int8_t TimerIndex; // timer index:0~13
rt_uint32_t Port; // gpio port:GPIOA/GPIOB/GPIOC/...
rt_uint32_t pin; // gpio pin:GPIO_PIN_0~GPIO_PIN_15
rt_uint16_t channel; // timer channel
rt_int8_t TimerIndex; /* timer index:0~13 */
rt_uint32_t Port; /* gpio port:GPIOA/GPIOB/GPIOC/... */
rt_uint32_t pin; /* gpio pin:GPIO_PIN_0~GPIO_PIN_15 */
/* timer channel: -2 is ch_1n, -1 is ch_0n, 0 is ch0, 1 is ch1 */
rt_int16_t channel;
char *name;
} TIMER_PORT_CHANNEL_MAP_S;
@ -371,6 +373,12 @@ static void channel_output_config(timer_oc_parameter_struct *ocpara)
/* config the channel config */
for (i = 0; i < sizeof(gd32_pwm_obj) / sizeof(gd32_pwm_obj[0]); ++i)
{
if (gd32_pwm_obj[i].tim_handle.channel < 0)
{
ocpara->outputstate = TIMER_CCX_DISABLE;
ocpara->outputnstate = TIMER_CCXN_ENABLE;
gd32_pwm_obj[i].tim_handle.channel = -(gd32_pwm_obj[i].tim_handle.channel + 1);
}
timer_periph = index_to_timer(gd32_pwm_obj[i].tim_handle.TimerIndex);
timer_channel_output_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, ocpara);
@ -378,8 +386,9 @@ static void channel_output_config(timer_oc_parameter_struct *ocpara)
timer_channel_output_mode_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, TIMER_OC_MODE_PWM0);
timer_channel_output_shadow_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, TIMER_OC_SHADOW_DISABLE);
/* auto-reload preload shadow reg enable */
// timer_auto_reload_shadow_enable(timer_periph);
/* timer_auto_reload_shadow_enable(timer_periph); */
timer_channel_output_state_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, TIMER_CCX_DISABLE);
timer_channel_complementary_output_state_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, TIMER_CCXN_DISABLE);
}
/* enable timer */
@ -388,6 +397,10 @@ static void channel_output_config(timer_oc_parameter_struct *ocpara)
if (-1 != gd32_timer_periph_list.TimerIndex[i])
{
timer_periph = index_to_timer(gd32_timer_periph_list.TimerIndex[i]);
if (timer_periph == TIMER0 || timer_periph == TIMER7)
{
timer_primary_output_config(timer_periph, ENABLE);
}
timer_enable(timer_periph);
}
}
@ -427,8 +440,16 @@ static rt_err_t drv_pwm_enable(TIMER_PORT_CHANNEL_MAP_S *pstTimerMap, struct rt_
}
else
{
timer_channel_output_state_config(index_to_timer(pstTimerMap->TimerIndex), configuration->channel,
TIMER_CCX_ENABLE);
if (configuration->complementary == RT_TRUE)
{
timer_channel_output_state_config(
index_to_timer(pstTimerMap->TimerIndex), configuration->channel - 1, TIMER_CCXN_ENABLE);
}
else
{
timer_channel_output_state_config(
index_to_timer(pstTimerMap->TimerIndex), configuration->channel, TIMER_CCX_ENABLE);
}
}
return RT_EOK;
@ -518,7 +539,7 @@ static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg
case PWM_CMD_GET:
return drv_pwm_get(pstTimerMap, configuration);
default:
return RT_EINVAL;
return -RT_EINVAL;
}
}
@ -569,3 +590,4 @@ __exit:
}
INIT_DEVICE_EXPORT(gd32_pwm_init);
#endif /* RT_USING_PWM */