mirror of https://github.com/RT-Thread/rt-thread
bsp:<bsp/gd32/arm/libraries/gd32_drivers/drv_pwm.c>[Support for non-complementary PWM output with advanced timers] (#10426)
bsp:<bsp/gd32/arm/libraries/gd32_drivers/drv_pwm.c> [Support for non-complementary PWM output with advanced timers] 1.当前结构体 TIMER_PORT_CHANNEL_MAP_Srt_int16_t 的成员channel为u16 为增加对非互补输出的支持 将uint16_t 改为int16_t /* timer channel: -2 is ch_1n, -1 is ch_0n, 0 is ch0, 1 is ch1 */ 2.对函数 channel_output_config 以及 drv_pwm_enable 进行修改，增加对非互补输出的支持 Signed-off-by: Yucai Liu <1486344514@qq.com>
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ricky
GitHub
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d62f1e46b8
commit
3e4f0ec015
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@ -5,7 +5,8 @@
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*
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* Change Logs:
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* Date Author Notes
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* 2023-06-05 zengjianwei first version
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* 2023-06-05 zengjianwei first version
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* 2025-06-23 Yucai Liu Support for non-complementary PWM output with advanced timers
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*/
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#include <board.h>
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@ -15,26 +16,27 @@
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#ifdef RT_USING_PWM
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//#define DRV_DEBUG
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/* #define DRV_DEBUG */
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#define LOG_TAG "drv.pwm"
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#include <rtdbg.h>
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#define MAX_PERIOD 65535
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#define MIN_PERIOD 3
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#define MIN_PULSE 2
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#define MIN_PULSE 2
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typedef struct
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{
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rt_int8_t TimerIndex; // timer index:0~13
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rt_uint32_t Port; // gpio port:GPIOA/GPIOB/GPIOC/...
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rt_uint32_t pin; // gpio pin:GPIO_PIN_0~GPIO_PIN_15
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rt_uint16_t channel; // timer channel
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char *name;
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rt_int8_t TimerIndex; /* timer index:0~13 */
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rt_uint32_t Port; /* gpio port:GPIOA/GPIOB/GPIOC/... */
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rt_uint32_t pin; /* gpio pin:GPIO_PIN_0~GPIO_PIN_15 */
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/* timer channel: -2 is ch_1n, -1 is ch_0n, 0 is ch0, 1 is ch1 */
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rt_int16_t channel;
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char *name;
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} TIMER_PORT_CHANNEL_MAP_S;
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struct gd32_pwm
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{
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struct rt_device_pwm pwm_device;
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struct rt_device_pwm pwm_device;
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TIMER_PORT_CHANNEL_MAP_S tim_handle;
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};
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@ -99,11 +101,11 @@ static struct gd32_pwm gd32_pwm_obj[] = {
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typedef struct
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{
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rt_uint32_t Port[7];
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rt_int8_t TimerIndex[14];
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rt_int8_t TimerIndex[14];
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} TIMER_PERIPH_LIST_S;
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static TIMER_PERIPH_LIST_S gd32_timer_periph_list = {
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.Port = {0, 0, 0, 0, 0, 0, 0},
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.Port = {0, 0, 0, 0, 0, 0, 0},
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.TimerIndex = {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1},
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};
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@ -365,12 +367,18 @@ static void timer_init_para(timer_parameter_struct *initpara)
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static void channel_output_config(timer_oc_parameter_struct *ocpara)
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{
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rt_int16_t i;
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rt_int16_t i;
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rt_uint32_t timer_periph;
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/* config the channel config */
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for (i = 0; i < sizeof(gd32_pwm_obj) / sizeof(gd32_pwm_obj[0]); ++i)
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{
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if (gd32_pwm_obj[i].tim_handle.channel < 0)
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{
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ocpara->outputstate = TIMER_CCX_DISABLE;
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ocpara->outputnstate = TIMER_CCXN_ENABLE;
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gd32_pwm_obj[i].tim_handle.channel = -(gd32_pwm_obj[i].tim_handle.channel + 1);
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}
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timer_periph = index_to_timer(gd32_pwm_obj[i].tim_handle.TimerIndex);
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timer_channel_output_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, ocpara);
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@ -378,8 +386,9 @@ static void channel_output_config(timer_oc_parameter_struct *ocpara)
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timer_channel_output_mode_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, TIMER_OC_MODE_PWM0);
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timer_channel_output_shadow_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, TIMER_OC_SHADOW_DISABLE);
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/* auto-reload preload shadow reg enable */
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// timer_auto_reload_shadow_enable(timer_periph);
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/* timer_auto_reload_shadow_enable(timer_periph); */
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timer_channel_output_state_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, TIMER_CCX_DISABLE);
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timer_channel_complementary_output_state_config(timer_periph, gd32_pwm_obj[i].tim_handle.channel, TIMER_CCXN_DISABLE);
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}
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/* enable timer */
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@ -388,6 +397,10 @@ static void channel_output_config(timer_oc_parameter_struct *ocpara)
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if (-1 != gd32_timer_periph_list.TimerIndex[i])
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{
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timer_periph = index_to_timer(gd32_timer_periph_list.TimerIndex[i]);
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if (timer_periph == TIMER0 || timer_periph == TIMER7)
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{
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timer_primary_output_config(timer_periph, ENABLE);
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}
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timer_enable(timer_periph);
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}
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}
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@ -396,23 +409,23 @@ static void channel_output_config(timer_oc_parameter_struct *ocpara)
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static void timer_config(void)
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{
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timer_oc_parameter_struct timer_ocintpara;
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timer_parameter_struct timer_initpara;
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timer_parameter_struct timer_initpara;
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/* TIMER configuration */
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timer_initpara.prescaler = 119;
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timer_initpara.alignedmode = TIMER_COUNTER_EDGE;
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timer_initpara.counterdirection = TIMER_COUNTER_UP;
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timer_initpara.period = 15999;
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timer_initpara.clockdivision = TIMER_CKDIV_DIV1;
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timer_initpara.prescaler = 119;
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timer_initpara.alignedmode = TIMER_COUNTER_EDGE;
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timer_initpara.counterdirection = TIMER_COUNTER_UP;
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timer_initpara.period = 15999;
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timer_initpara.clockdivision = TIMER_CKDIV_DIV1;
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timer_initpara.repetitioncounter = 0;
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timer_init_para(&timer_initpara);
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/* CHX configuration in PWM mode */
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timer_ocintpara.outputstate = TIMER_CCX_ENABLE;
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timer_ocintpara.outputstate = TIMER_CCX_ENABLE;
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timer_ocintpara.outputnstate = TIMER_CCXN_DISABLE;
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timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH;
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timer_ocintpara.ocnpolarity = TIMER_OCN_POLARITY_HIGH;
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timer_ocintpara.ocidlestate = TIMER_OC_IDLE_STATE_LOW;
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timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH;
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timer_ocintpara.ocnpolarity = TIMER_OCN_POLARITY_HIGH;
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timer_ocintpara.ocidlestate = TIMER_OC_IDLE_STATE_LOW;
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timer_ocintpara.ocnidlestate = TIMER_OCN_IDLE_STATE_LOW;
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channel_output_config(&timer_ocintpara);
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}
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@ -427,8 +440,16 @@ static rt_err_t drv_pwm_enable(TIMER_PORT_CHANNEL_MAP_S *pstTimerMap, struct rt_
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}
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else
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{
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timer_channel_output_state_config(index_to_timer(pstTimerMap->TimerIndex), configuration->channel,
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TIMER_CCX_ENABLE);
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if (configuration->complementary == RT_TRUE)
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{
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timer_channel_output_state_config(
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index_to_timer(pstTimerMap->TimerIndex), configuration->channel - 1, TIMER_CCXN_ENABLE);
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}
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else
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{
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timer_channel_output_state_config(
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index_to_timer(pstTimerMap->TimerIndex), configuration->channel, TIMER_CCX_ENABLE);
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}
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}
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return RT_EOK;
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@ -454,9 +475,9 @@ static rt_err_t drv_pwm_get(TIMER_PORT_CHANNEL_MAP_S *pstTimerMap, struct rt_pwm
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chxcv = timer_channel_capture_value_register_read(index_to_timer(pstTimerMap->TimerIndex), configuration->channel);
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/* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */
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tim_clock /= 1000000UL;
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configuration->period = (TIMER_CAR(index_to_timer(pstTimerMap->TimerIndex)) + 1) * (psc + 1) * 1000UL / tim_clock;
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configuration->pulse = (chxcv + 1) * (psc + 1) * 1000UL / tim_clock;
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tim_clock /= 1000000UL;
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configuration->period = (TIMER_CAR(index_to_timer(pstTimerMap->TimerIndex)) + 1) * (psc + 1) * 1000UL / tim_clock;
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configuration->pulse = (chxcv + 1) * (psc + 1) * 1000UL / tim_clock;
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return RT_EOK;
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}
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@ -470,9 +491,9 @@ static rt_err_t drv_pwm_set(TIMER_PORT_CHANNEL_MAP_S *pstTimerMap, struct rt_pwm
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/* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */
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tim_clock /= 1000000UL;
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period = (unsigned long long)configuration->period * tim_clock / 1000ULL;
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psc = period / MAX_PERIOD + 1;
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period = period / psc;
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period = (unsigned long long)configuration->period * tim_clock / 1000ULL;
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psc = period / MAX_PERIOD + 1;
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period = period / psc;
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timer_prescaler_config(index_to_timer(pstTimerMap->TimerIndex), psc - 1, TIMER_PSC_RELOAD_NOW);
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@ -505,7 +526,7 @@ static rt_err_t drv_pwm_set(TIMER_PORT_CHANNEL_MAP_S *pstTimerMap, struct rt_pwm
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static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
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{
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struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
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TIMER_PORT_CHANNEL_MAP_S *pstTimerMap = (TIMER_PORT_CHANNEL_MAP_S *)device->parent.user_data;
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TIMER_PORT_CHANNEL_MAP_S *pstTimerMap = (TIMER_PORT_CHANNEL_MAP_S *)device->parent.user_data;
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switch (cmd)
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{
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@ -518,7 +539,7 @@ static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg
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case PWM_CMD_GET:
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return drv_pwm_get(pstTimerMap, configuration);
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default:
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return RT_EINVAL;
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return -RT_EINVAL;
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}
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}
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@ -536,7 +557,7 @@ static rt_err_t gd32_hw_pwm_init(void)
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static int gd32_pwm_init(void)
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{
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int i = 0;
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int i = 0;
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int result = RT_EOK;
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/* pwm init */
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@ -553,7 +574,7 @@ static int gd32_pwm_init(void)
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{
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/* register pwm device */
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if (rt_device_pwm_register(&gd32_pwm_obj[i].pwm_device, gd32_pwm_obj[i].tim_handle.name, &drv_ops,
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&gd32_pwm_obj[i].tim_handle) == RT_EOK)
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&gd32_pwm_obj[i].tim_handle)== RT_EOK )
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{
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LOG_D("%s register success", gd32_pwm_obj[i].tim_handle.name);
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}
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}
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INIT_DEVICE_EXPORT(gd32_pwm_init);
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#endif /* RT_USING_PWM */
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