mirror of https://github.com/RT-Thread/rt-thread
[bsp][wch][risc-v] add drv_flash for ch32v307. (#10306)
* [bsp][wch][risc-v] add drv_flash for ch32v307. * [bsp][wch][risc-v] 1. add yml file for ch32v307. 2. fix programs a word at chip flash timeout. 3. priority use of fast mode. * [bsp][wch][risc-v] fix spi device for ch32v307.
This commit is contained in:
parent
31ff6fecc1
commit
5153f38047
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@ -51,6 +51,9 @@ if GetDepend('SOC_RISCV_FAMILY_CH32'):
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if GetDepend('BSP_USING_HWTIMER'):
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src += ['drv_hwtimer.c']
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if GetDepend(['BSP_USING_ON_CHIP_FLASH']):
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src += ['drv_flash.c']
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group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
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Return('group')
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@ -0,0 +1,254 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-05-20 Chasel first version
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*
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*/
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#include <rtconfig.h>
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#include <rtdef.h>
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#ifdef BSP_USING_ON_CHIP_FLASH
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#include "drv_flash.h"
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#include <board.h>
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#if defined(RT_USING_FAL)
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#include "fal.h"
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#endif
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#define DRV_DEBUG
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#define LOG_TAG "drv.flash"
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#include <drv_log.h>
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#define FLASH_PAGE_SIZE 4096
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/* @note If there is no down-frequency processing, the timeout time needs to be modified */
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#ifdef ProgramTimeout
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#undef ProgramTimeout
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#define ProgramTimeout ((uint32_t)0x00010000)
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#endif
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/**
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* @brief Gets the page of a given address
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* @param Addr: Address of the FLASH Memory
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* @retval The page of a given address
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*/
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static uint32_t GetPage(uint32_t addr)
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{
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uint32_t page = 0;
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page = RT_ALIGN_DOWN(addr, FLASH_PAGE_SIZE);
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return page;
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}
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/**
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* Read data from flash.
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* @note This operation's units is word.
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*
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* @param addr flash address
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* @param buf buffer to store read data
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* @param size read bytes size
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*
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* @return result
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*/
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int ch32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size)
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{
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size_t i;
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if ((addr + size) > CH32_FLASH_END_ADDRESS)
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{
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LOG_E("read outrange flash size! addr is (0x%p)", (void *)(addr + size));
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return -RT_EINVAL;
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}
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for (i = 0; i < size; i++, buf++, addr++)
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{
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*buf = *(rt_uint8_t *) addr;
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}
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return size;
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}
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/**
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* Write data to flash.
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* @note This operation's units is word.
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* @note This operation must after erase. @see flash_erase.
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*
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* @param addr flash address
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* @param buf the write data buffer
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* @param size write bytes size
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*
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* @return result
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*/
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int ch32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size)
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{
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rt_err_t result = RT_EOK;
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FLASH_Status status = 0;
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rt_uint32_t end_addr = addr + size;
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if (addr % 4 != 0)
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{
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LOG_E("write addr must be 4-byte alignment");
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return -RT_EINVAL;
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}
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if ((end_addr) > CH32_FLASH_END_ADDRESS)
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{
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LOG_E("write outrange flash size! addr is (0x%p)", (void *)(addr + size));
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return -RT_EINVAL;
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}
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if (((addr & 0x000000FF) == 0) && (size & 0xFFFFFF00)) {
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rt_uint32_t fast_size = (size & 0xFFFFFF00);
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status = FLASH_ROM_WRITE(addr, (rt_uint32_t *)buf, fast_size);
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if (status != FLASH_COMPLETE) {
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LOG_E("FLASH ROM Write Fail\r\n");
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return -RT_ERROR;
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}
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addr += fast_size;
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buf += fast_size;
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}
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if (addr == end_addr) {
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return size;
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}
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FLASH_Access_Clock_Cfg(FLASH_Access_SYSTEM_HALF);
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FLASH_Unlock();
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FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_WRPRTERR);
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while (addr < end_addr)
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{
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status = FLASH_ProgramWord(addr, *((rt_uint32_t *)buf));
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if (status == FLASH_COMPLETE)
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{
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if (*(rt_uint32_t *)addr != *(rt_uint32_t *)buf)
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{
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result = -RT_ERROR;
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break;
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}
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addr += 4;
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buf += 4;
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}
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else
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{
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result = -RT_ERROR;
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break;
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}
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}
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FLASH_Lock();
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FLASH_Access_Clock_Cfg(FLASH_Access_SYSTEM);
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if (result != RT_EOK)
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{
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return result;
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}
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return size;
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}
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/**
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* Erase data on flash .
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* @note This operation is irreversible.
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* @note This operation's units is different which on many chips.
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*
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* @param addr flash address
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* @param size erase bytes size
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*
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* @return result
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*/
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int ch32_flash_erase(rt_uint32_t addr, size_t size)
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{
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rt_err_t result = RT_EOK;
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FLASH_Status status = 0;
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uint32_t num_page = 0;
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uint32_t i = 0;
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rt_uint32_t total_size = size;
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if ((addr + size) > CH32_FLASH_END_ADDRESS)
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{
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LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size));
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return -RT_EINVAL;
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}
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if (((addr & 0x000000FF) == 0) && (total_size & 0xFFFFFF00)) {
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rt_uint32_t fast_size = (total_size & 0xFFFFFF00);
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status = FLASH_ROM_ERASE(addr, fast_size);
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if (status != FLASH_COMPLETE) {
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LOG_E("FLASH ROM Erase Fail\r\n");
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return -RT_ERROR;
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}
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addr += fast_size;
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total_size -= fast_size;
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}
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if (0 == total_size) {
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return size;
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}
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FLASH_Access_Clock_Cfg(FLASH_Access_SYSTEM_HALF);
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FLASH_Unlock();
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FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_WRPRTERR);
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num_page = (total_size + FLASH_PAGE_SIZE - 1) / FLASH_PAGE_SIZE;
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FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_WRPRTERR);
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for(i = 0; (i < num_page) && (status == FLASH_COMPLETE); i++)
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{
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status = FLASH_ErasePage(GetPage(addr + i * FLASH_PAGE_SIZE)); //Erase 4KB
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if(status != FLASH_COMPLETE)
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{
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LOG_E("FLASH Erase Fail\r\n");
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result = -RT_ERROR;
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goto __exit;
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}
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}
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__exit:
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FLASH_Lock();
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FLASH_Access_Clock_Cfg(FLASH_Access_SYSTEM);
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if (result != RT_EOK)
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{
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return -RT_ERROR;
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}
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return size;
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}
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#if defined(RT_USING_FAL)
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static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size);
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static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size);
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static int fal_flash_erase(long offset, size_t size);
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const struct fal_flash_dev ch32_onchip_flash = { "onchip_flash", CH32_FLASH_START_ADRESS, CH32_FLASH_SIZE, FLASH_PAGE_SIZE, {NULL, fal_flash_read, fal_flash_write, fal_flash_erase}, 8, {} ,};
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static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size)
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{
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return ch32_flash_read(ch32_onchip_flash.addr + offset, buf, size);
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}
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static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size)
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{
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return ch32_flash_write(ch32_onchip_flash.addr + offset, buf, size);
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}
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static int fal_flash_erase(long offset, size_t size)
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{
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return ch32_flash_erase(ch32_onchip_flash.addr + offset, size);
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}
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#endif
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#endif /* BSP_USING_ON_CHIP_FLASH */
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@ -0,0 +1,31 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-05-20 Chasel first version
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*/
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#ifndef __DRV_FLASH_H__
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#define __DRV_FLASH_H__
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#include <rtthread.h>
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#include "rtdevice.h"
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#include <rthw.h>
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#include <drv_common.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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int ch32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size);
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int ch32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size);
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int ch32_flash_erase(rt_uint32_t addr, size_t size);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __DRV_FLASH_H__ */
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@ -322,8 +322,9 @@ static rt_err_t ch32_spi_init(struct ch32_spi *spi_drv, struct rt_spi_configurat
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/* min prescaler 256 */
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spi_handle->Init.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256;
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}
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SystemCoreClockUpdate();
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LOG_D("sys freq: %d, pclk2 freq: %d, SPI limiting freq: %d, BaudRatePrescaler: %d",
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HAL_RCC_GetSysClockFreq(),
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SystemCoreClock,
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SPI_APB_CLOCK,
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cfg->max_hz,
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spi_handle->Init.SPI_BaudRatePrescaler);
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@ -0,0 +1,33 @@
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devices.gpio:
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kconfig:
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- CONFIG_BSP_USING_GPIO=y
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devices.adc:
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kconfig:
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- CONFIG_BSP_USING_ADC=y
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- CONFIG_BSP_USING_ADC1=y
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- CONFIG_BSP_USING_ADC2=n
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devices.dac:
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kconfig:
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- CONFIG_BSP_USING_DAC=y
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- CONFIG_BSP_USING_DAC_CHANNEL1=y
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- CONFIG_BSP_USING_DAC_CHANNEL2=n
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devices.i2c:
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kconfig:
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- CONFIG_BSP_USING_SOFT_I2C=y
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- CONFIG_BSP_USING_I2C1=y
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- CONFIG_BSP_USING_I2C2=y
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devices.spi:
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kconfig:
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- CONFIG_BSP_USING_SPI=y
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- CONFIG_BSP_USING_SPI1=n
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- CONFIG_BSP_USING_SPI2=n
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- CONFIG_BSP_USING_SPI3=y
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devices.uart:
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kconfig:
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- CONFIG_BSP_USING_UART=y
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devices.watchdog:
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kconfig:
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- CONFIG_BSP_USING_IWDT=y
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devices.flash:
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kconfig:
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- CONFIG_BSP_USING_ON_CHIP_FLASH=y
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@ -182,7 +182,7 @@ CONFIG_RT_USING_DEVICE=y
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CONFIG_RT_USING_CONSOLE=y
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CONFIG_RT_CONSOLEBUF_SIZE=128
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CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
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CONFIG_RT_VER_NUM=0x50200
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CONFIG_RT_VER_NUM=0x50201
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# CONFIG_RT_USING_STDC_ATOMIC is not set
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CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
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# end of RT-Thread Kernel
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@ -487,6 +487,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set
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# CONFIG_PKG_USING_LHC_MODBUS is not set
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# CONFIG_PKG_USING_QMODBUS is not set
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# CONFIG_PKG_USING_PNET is not set
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# CONFIG_PKG_USING_OPENER is not set
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# end of IoT - internet of things
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#
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@ -514,6 +516,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_JSMN is not set
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# CONFIG_PKG_USING_AGILE_JSMN is not set
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# CONFIG_PKG_USING_PARSON is not set
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# CONFIG_PKG_USING_RYAN_JSON is not set
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# end of JSON: JavaScript Object Notation, a lightweight data-interchange format
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#
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@ -618,6 +621,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
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# CONFIG_PKG_USING_VOFA_PLUS is not set
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# CONFIG_PKG_USING_ZDEBUG is not set
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# CONFIG_PKG_USING_RVBACKTRACE is not set
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# CONFIG_PKG_USING_HPATCHLITE is not set
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# end of tools packages
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#
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@ -629,7 +634,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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#
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# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
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# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
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# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
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# end of enhanced kernel services
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# CONFIG_PKG_USING_AUNITY is not set
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@ -647,7 +651,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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#
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# CONFIG_PKG_USING_CMSIS_5 is not set
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# CONFIG_PKG_USING_CMSIS_CORE is not set
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# CONFIG_PKG_USING_CMSIS_DSP is not set
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# CONFIG_PKG_USING_CMSIS_NN is not set
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# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
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# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
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@ -699,7 +702,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_ARM_2D is not set
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# CONFIG_PKG_USING_MCUBOOT is not set
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# CONFIG_PKG_USING_TINYUSB is not set
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# CONFIG_PKG_USING_CHERRYUSB is not set
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# CONFIG_PKG_USING_KMULTI_RTIMER is not set
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# CONFIG_PKG_USING_TFDB is not set
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# CONFIG_PKG_USING_QPC is not set
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|
@ -707,10 +709,13 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_FLASH_BLOB is not set
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# CONFIG_PKG_USING_MLIBC is not set
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# CONFIG_PKG_USING_TASK_MSG_BUS is not set
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# CONFIG_PKG_USING_UART_FRAMEWORK is not set
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# CONFIG_PKG_USING_SFDB is not set
|
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# CONFIG_PKG_USING_RTP is not set
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# CONFIG_PKG_USING_REB is not set
|
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# CONFIG_PKG_USING_RMP is not set
|
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# CONFIG_PKG_USING_R_RHEALSTONE is not set
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# CONFIG_PKG_USING_HEARTBEAT is not set
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# end of system packages
|
||||
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#
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|
@ -724,10 +729,44 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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#
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# STM32 HAL & SDK Drivers
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#
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# CONFIG_PKG_USING_STM32F0_HAL_DRIVER is not set
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# CONFIG_PKG_USING_STM32F0_CMSIS_DRIVER is not set
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# CONFIG_PKG_USING_STM32F1_HAL_DRIVER is not set
|
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# CONFIG_PKG_USING_STM32F1_CMSIS_DRIVER is not set
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# CONFIG_PKG_USING_STM32F2_HAL_DRIVER is not set
|
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# CONFIG_PKG_USING_STM32F2_CMSIS_DRIVER is not set
|
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# CONFIG_PKG_USING_STM32F3_HAL_DRIVER is not set
|
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# CONFIG_PKG_USING_STM32F3_CMSIS_DRIVER is not set
|
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# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
|
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# CONFIG_PKG_USING_STM32F7_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32F7_CMSIS_DRIVER is not set
|
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# CONFIG_PKG_USING_STM32G0_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32G0_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32G4_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32G4_CMSIS_DRIVER is not set
|
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# CONFIG_PKG_USING_STM32H5_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32H5_CMSIS_DRIVER is not set
|
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# CONFIG_PKG_USING_STM32H7_HAL_DRIVER is not set
|
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# CONFIG_PKG_USING_STM32H7_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32H7RS_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32H7RS_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32L0_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32L0_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32L5_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32L5_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32U5_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32U5_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32WB55_SDK is not set
|
||||
# CONFIG_PKG_USING_STM32_SDIO is not set
|
||||
# CONFIG_PKG_USING_STM32WL_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32WL_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32WB_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32WB_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32MP1_M4_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32MP1_M4_CMSIS_DRIVER is not set
|
||||
# end of STM32 HAL & SDK Drivers
|
||||
|
||||
#
|
||||
|
@ -760,6 +799,64 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_NRFX is not set
|
||||
# CONFIG_PKG_USING_NUCLEI_SDK is not set
|
||||
# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
|
||||
# CONFIG_PKG_USING_MM32 is not set
|
||||
|
||||
#
|
||||
# WCH HAL & SDK Drivers
|
||||
#
|
||||
# CONFIG_PKG_USING_CH32V20x_SDK is not set
|
||||
CONFIG_PKG_USING_CH32V307_SDK=y
|
||||
CONFIG_PKG_CH32V307_SDK_PATH="/packages/peripherals/hal-sdk/wch/ch32v307_sdk"
|
||||
CONFIG_PKG_USING_CH32V307_SDK_V207=y
|
||||
# CONFIG_PKG_USING_CH32V307_SDK_LATEST_VERSION is not set
|
||||
CONFIG_PKG_CH32V307_SDK_VER="v2.7"
|
||||
# end of WCH HAL & SDK Drivers
|
||||
|
||||
#
|
||||
# AT32 HAL & SDK Drivers
|
||||
#
|
||||
# CONFIG_PKG_USING_AT32A403A_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32A403A_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32A423_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32A423_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F45x_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F45x_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F402_405_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F402_405_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F403A_407_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F403A_407_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F413_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F413_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F415_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F415_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F421_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F421_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F423_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F423_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F425_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F425_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F435_437_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F435_437_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32M412_416_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32M412_416_CMSIS_DRIVER is not set
|
||||
# end of AT32 HAL & SDK Drivers
|
||||
|
||||
#
|
||||
# HC32 DDL Drivers
|
||||
#
|
||||
# end of HC32 DDL Drivers
|
||||
|
||||
#
|
||||
# NXP HAL & SDK Drivers
|
||||
#
|
||||
# CONFIG_PKG_USING_NXP_MCX_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_NXP_MCX_SERIES_DRIVER is not set
|
||||
# CONFIG_PKG_USING_NXP_LPC_DRIVER is not set
|
||||
# CONFIG_PKG_USING_NXP_LPC55S_DRIVER is not set
|
||||
# CONFIG_PKG_USING_NXP_IMX6SX_DRIVER is not set
|
||||
# CONFIG_PKG_USING_NXP_IMX6UL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_NXP_IMXRT_DRIVER is not set
|
||||
# end of NXP HAL & SDK Drivers
|
||||
# end of HAL & SDK Drivers
|
||||
|
||||
#
|
||||
|
@ -797,14 +894,17 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_BMI088 is not set
|
||||
# CONFIG_PKG_USING_HMC5883 is not set
|
||||
# CONFIG_PKG_USING_MAX6675 is not set
|
||||
# CONFIG_PKG_USING_MAX31855 is not set
|
||||
# CONFIG_PKG_USING_TMP1075 is not set
|
||||
# CONFIG_PKG_USING_SR04 is not set
|
||||
# CONFIG_PKG_USING_CCS811 is not set
|
||||
# CONFIG_PKG_USING_PMSXX is not set
|
||||
# CONFIG_PKG_USING_RT3020 is not set
|
||||
# CONFIG_PKG_USING_MLX90632 is not set
|
||||
# CONFIG_PKG_USING_MLX90382 is not set
|
||||
# CONFIG_PKG_USING_MLX90393 is not set
|
||||
# CONFIG_PKG_USING_MLX90392 is not set
|
||||
# CONFIG_PKG_USING_MLX90394 is not set
|
||||
# CONFIG_PKG_USING_MLX90397 is not set
|
||||
# CONFIG_PKG_USING_MS5611 is not set
|
||||
# CONFIG_PKG_USING_MAX31865 is not set
|
||||
|
@ -830,6 +930,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ICM20608 is not set
|
||||
# CONFIG_PKG_USING_PAJ7620 is not set
|
||||
# CONFIG_PKG_USING_STHS34PF80 is not set
|
||||
# CONFIG_PKG_USING_P3T1755 is not set
|
||||
# CONFIG_PKG_USING_QMI8658 is not set
|
||||
# end of sensors drivers
|
||||
|
||||
#
|
||||
|
@ -918,6 +1020,11 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
|
||||
# CONFIG_PKG_USING_BT_MX01 is not set
|
||||
# CONFIG_PKG_USING_RGPOWER is not set
|
||||
# CONFIG_PKG_USING_BT_MX02 is not set
|
||||
# CONFIG_PKG_USING_GC9A01 is not set
|
||||
# CONFIG_PKG_USING_IK485 is not set
|
||||
# CONFIG_PKG_USING_SERVO is not set
|
||||
# CONFIG_PKG_USING_SEAN_WS2812B is not set
|
||||
# CONFIG_PKG_USING_SPI_TOOLS is not set
|
||||
# end of peripheral libraries and drivers
|
||||
|
||||
|
@ -934,6 +1041,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_QUEST is not set
|
||||
# CONFIG_PKG_USING_NAXOS is not set
|
||||
# CONFIG_PKG_USING_R_TINYMAIX is not set
|
||||
# CONFIG_PKG_USING_LLMCHAT is not set
|
||||
# end of AI packages
|
||||
|
||||
#
|
||||
|
@ -1004,6 +1112,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_KI is not set
|
||||
# CONFIG_PKG_USING_ARMv7M_DWT is not set
|
||||
# CONFIG_PKG_USING_CRCLIB is not set
|
||||
# CONFIG_PKG_USING_LIBCRC is not set
|
||||
# CONFIG_PKG_USING_LWGPS is not set
|
||||
# CONFIG_PKG_USING_STATE_MACHINE is not set
|
||||
# CONFIG_PKG_USING_DESIGN_PATTERN is not set
|
||||
|
@ -1014,6 +1123,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_SOEM is not set
|
||||
# CONFIG_PKG_USING_QPARAM is not set
|
||||
# CONFIG_PKG_USING_CorevMCU_CLI is not set
|
||||
# CONFIG_PKG_USING_DRMP is not set
|
||||
# end of miscellaneous packages
|
||||
|
||||
#
|
||||
|
@ -1027,6 +1137,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SKETCH_LOADER_DEMO is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_RTDUINO_SENSORFUSION_SHIELD is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
|
||||
|
@ -1291,6 +1402,7 @@ CONFIG_BSP_USING_UART1=y
|
|||
# CONFIG_BSP_USING_RTC is not set
|
||||
CONFIG_LSI_VALUE=40000
|
||||
# CONFIG_BSP_USING_IWDT is not set
|
||||
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
|
||||
# CONFIG_BSP_USING_CAN is not set
|
||||
# CONFIG_BSP_USING_TIM is not set
|
||||
# end of On-chip Peripheral Drivers
|
||||
|
|
|
@ -286,6 +286,10 @@ menu "On-chip Peripheral Drivers"
|
|||
select LSI_VALUE
|
||||
default n
|
||||
|
||||
config BSP_USING_ON_CHIP_FLASH
|
||||
bool "Enable on-chip FLASH"
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_CAN
|
||||
bool "Enable CAN"
|
||||
default n
|
||||
|
|
|
@ -21,6 +21,10 @@
|
|||
#define SRAM_SIZE 96
|
||||
#define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
|
||||
|
||||
#define CH32_FLASH_START_ADRESS ((uint32_t)0x08000000)
|
||||
#define CH32_FLASH_SIZE (224 * 1024)
|
||||
#define CH32_FLASH_END_ADDRESS ((uint32_t)(CH32_FLASH_START_ADRESS + CH32_FLASH_SIZE))
|
||||
|
||||
extern int _ebss, _susrstack;
|
||||
#define HEAP_BEGIN ((void *)&_ebss)
|
||||
#define HEAP_END ((void *)&_susrstack)
|
||||
|
|
|
@ -103,7 +103,7 @@
|
|||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x50200
|
||||
#define RT_VER_NUM 0x50201
|
||||
#define RT_BACKTRACE_LEVEL_MAX_NR 32
|
||||
/* end of RT-Thread Kernel */
|
||||
#define RT_USING_HW_ATOMIC
|
||||
|
@ -287,6 +287,24 @@
|
|||
/* Kendryte SDK */
|
||||
|
||||
/* end of Kendryte SDK */
|
||||
|
||||
/* WCH HAL & SDK Drivers */
|
||||
|
||||
#define PKG_USING_CH32V307_SDK
|
||||
#define PKG_USING_CH32V307_SDK_V207
|
||||
/* end of WCH HAL & SDK Drivers */
|
||||
|
||||
/* AT32 HAL & SDK Drivers */
|
||||
|
||||
/* end of AT32 HAL & SDK Drivers */
|
||||
|
||||
/* HC32 DDL Drivers */
|
||||
|
||||
/* end of HC32 DDL Drivers */
|
||||
|
||||
/* NXP HAL & SDK Drivers */
|
||||
|
||||
/* end of NXP HAL & SDK Drivers */
|
||||
/* end of HAL & SDK Drivers */
|
||||
|
||||
/* sensors drivers */
|
||||
|
|
|
@ -0,0 +1,33 @@
|
|||
devices.gpio:
|
||||
kconfig:
|
||||
- CONFIG_BSP_USING_GPIO=y
|
||||
devices.adc:
|
||||
kconfig:
|
||||
- CONFIG_BSP_USING_ADC=y
|
||||
- CONFIG_BSP_USING_ADC1=y
|
||||
- CONFIG_BSP_USING_ADC2=n
|
||||
devices.dac:
|
||||
kconfig:
|
||||
- CONFIG_BSP_USING_DAC=y
|
||||
- CONFIG_BSP_USING_DAC_CHANNEL1=y
|
||||
- CONFIG_BSP_USING_DAC_CHANNEL2=n
|
||||
devices.i2c:
|
||||
kconfig:
|
||||
- CONFIG_BSP_USING_SOFT_I2C=y
|
||||
- CONFIG_BSP_USING_I2C1=y
|
||||
- CONFIG_BSP_USING_I2C2=y
|
||||
devices.spi:
|
||||
kconfig:
|
||||
- CONFIG_BSP_USING_SPI=y
|
||||
- CONFIG_BSP_USING_SPI1=n
|
||||
- CONFIG_BSP_USING_SPI2=n
|
||||
- CONFIG_BSP_USING_SPI3=y
|
||||
devices.uart:
|
||||
kconfig:
|
||||
- CONFIG_BSP_USING_UART=y
|
||||
devices.watchdog:
|
||||
kconfig:
|
||||
- CONFIG_BSP_USING_IWDT=y
|
||||
devices.flash:
|
||||
kconfig:
|
||||
- CONFIG_BSP_USING_ON_CHIP_FLASH=y
|
|
@ -182,7 +182,7 @@ CONFIG_RT_USING_DEVICE=y
|
|||
CONFIG_RT_USING_CONSOLE=y
|
||||
CONFIG_RT_CONSOLEBUF_SIZE=128
|
||||
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
|
||||
CONFIG_RT_VER_NUM=0x50200
|
||||
CONFIG_RT_VER_NUM=0x50201
|
||||
# CONFIG_RT_USING_STDC_ATOMIC is not set
|
||||
CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
|
||||
# end of RT-Thread Kernel
|
||||
|
@ -487,6 +487,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set
|
||||
# CONFIG_PKG_USING_LHC_MODBUS is not set
|
||||
# CONFIG_PKG_USING_QMODBUS is not set
|
||||
# CONFIG_PKG_USING_PNET is not set
|
||||
# CONFIG_PKG_USING_OPENER is not set
|
||||
# end of IoT - internet of things
|
||||
|
||||
#
|
||||
|
@ -514,6 +516,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_JSMN is not set
|
||||
# CONFIG_PKG_USING_AGILE_JSMN is not set
|
||||
# CONFIG_PKG_USING_PARSON is not set
|
||||
# CONFIG_PKG_USING_RYAN_JSON is not set
|
||||
# end of JSON: JavaScript Object Notation, a lightweight data-interchange format
|
||||
|
||||
#
|
||||
|
@ -618,6 +621,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
|
||||
# CONFIG_PKG_USING_VOFA_PLUS is not set
|
||||
# CONFIG_PKG_USING_ZDEBUG is not set
|
||||
# CONFIG_PKG_USING_RVBACKTRACE is not set
|
||||
# CONFIG_PKG_USING_HPATCHLITE is not set
|
||||
# end of tools packages
|
||||
|
||||
#
|
||||
|
@ -629,7 +634,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
#
|
||||
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
|
||||
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
|
||||
# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
|
||||
# end of enhanced kernel services
|
||||
|
||||
# CONFIG_PKG_USING_AUNITY is not set
|
||||
|
@ -647,7 +651,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
#
|
||||
# CONFIG_PKG_USING_CMSIS_5 is not set
|
||||
# CONFIG_PKG_USING_CMSIS_CORE is not set
|
||||
# CONFIG_PKG_USING_CMSIS_DSP is not set
|
||||
# CONFIG_PKG_USING_CMSIS_NN is not set
|
||||
# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
|
||||
# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
|
||||
|
@ -699,7 +702,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARM_2D is not set
|
||||
# CONFIG_PKG_USING_MCUBOOT is not set
|
||||
# CONFIG_PKG_USING_TINYUSB is not set
|
||||
# CONFIG_PKG_USING_CHERRYUSB is not set
|
||||
# CONFIG_PKG_USING_KMULTI_RTIMER is not set
|
||||
# CONFIG_PKG_USING_TFDB is not set
|
||||
# CONFIG_PKG_USING_QPC is not set
|
||||
|
@ -707,10 +709,13 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_FLASH_BLOB is not set
|
||||
# CONFIG_PKG_USING_MLIBC is not set
|
||||
# CONFIG_PKG_USING_TASK_MSG_BUS is not set
|
||||
# CONFIG_PKG_USING_UART_FRAMEWORK is not set
|
||||
# CONFIG_PKG_USING_SFDB is not set
|
||||
# CONFIG_PKG_USING_RTP is not set
|
||||
# CONFIG_PKG_USING_REB is not set
|
||||
# CONFIG_PKG_USING_RMP is not set
|
||||
# CONFIG_PKG_USING_R_RHEALSTONE is not set
|
||||
# CONFIG_PKG_USING_HEARTBEAT is not set
|
||||
# end of system packages
|
||||
|
||||
#
|
||||
|
@ -724,10 +729,44 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
#
|
||||
# STM32 HAL & SDK Drivers
|
||||
#
|
||||
# CONFIG_PKG_USING_STM32F0_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32F0_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32F1_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32F1_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32F2_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32F2_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32F3_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32F3_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32F7_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32F7_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32G0_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32G0_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32G4_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32G4_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32H5_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32H5_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32H7_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32H7_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32H7RS_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32H7RS_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32L0_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32L0_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32L5_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32L5_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32U5_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32U5_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32WB55_SDK is not set
|
||||
# CONFIG_PKG_USING_STM32_SDIO is not set
|
||||
# CONFIG_PKG_USING_STM32WL_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32WL_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32WB_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32WB_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32MP1_M4_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_STM32MP1_M4_CMSIS_DRIVER is not set
|
||||
# end of STM32 HAL & SDK Drivers
|
||||
|
||||
#
|
||||
|
@ -760,21 +799,64 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_NRFX is not set
|
||||
# CONFIG_PKG_USING_NUCLEI_SDK is not set
|
||||
# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
|
||||
# CONFIG_PKG_USING_MM32 is not set
|
||||
|
||||
#
|
||||
# WCH HAL & SDK Drivers
|
||||
#
|
||||
# CONFIG_PKG_USING_CH32V20x_SDK is not set
|
||||
CONFIG_PKG_USING_CH32V307_SDK=y
|
||||
CONFIG_PKG_CH32V307_SDK_PATH="/packages/peripherals/hal-sdk/wch/ch32v307_sdk"
|
||||
CONFIG_PKG_USING_CH32V307_SDK_V207=y
|
||||
# CONFIG_PKG_USING_CH32V307_SDK_LATEST_VERSION is not set
|
||||
CONFIG_PKG_CH32V307_SDK_VER="v2.7"
|
||||
CONFIG_PKG_USING_CH32V307_SDK_RTT_PATCH=y
|
||||
CONFIG_PKG_CH32V307_SDK_RTT_PATCH_PATH="/packages/peripherals/hal-sdk/wch/ch32v307_sdk_rtt_patch"
|
||||
CONFIG_PKG_USING_CH32V307_SDK_RTT_PATCH_V207=y
|
||||
# CONFIG_PKG_USING_CH32V307_SDK_RTT_PATCH_LATEST_VERSION is not set
|
||||
CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7"
|
||||
# end of WCH HAL & SDK Drivers
|
||||
|
||||
#
|
||||
# AT32 HAL & SDK Drivers
|
||||
#
|
||||
# CONFIG_PKG_USING_AT32A403A_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32A403A_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32A423_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32A423_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F45x_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F45x_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F402_405_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F402_405_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F403A_407_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F403A_407_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F413_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F413_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F415_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F415_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F421_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F421_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F423_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F423_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F425_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F425_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F435_437_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32F435_437_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32M412_416_HAL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_AT32M412_416_CMSIS_DRIVER is not set
|
||||
# end of AT32 HAL & SDK Drivers
|
||||
|
||||
#
|
||||
# HC32 DDL Drivers
|
||||
#
|
||||
# end of HC32 DDL Drivers
|
||||
|
||||
#
|
||||
# NXP HAL & SDK Drivers
|
||||
#
|
||||
# CONFIG_PKG_USING_NXP_MCX_CMSIS_DRIVER is not set
|
||||
# CONFIG_PKG_USING_NXP_MCX_SERIES_DRIVER is not set
|
||||
# CONFIG_PKG_USING_NXP_LPC_DRIVER is not set
|
||||
# CONFIG_PKG_USING_NXP_LPC55S_DRIVER is not set
|
||||
# CONFIG_PKG_USING_NXP_IMX6SX_DRIVER is not set
|
||||
# CONFIG_PKG_USING_NXP_IMX6UL_DRIVER is not set
|
||||
# CONFIG_PKG_USING_NXP_IMXRT_DRIVER is not set
|
||||
# end of NXP HAL & SDK Drivers
|
||||
# end of HAL & SDK Drivers
|
||||
|
||||
#
|
||||
|
@ -812,14 +894,17 @@ CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7"
|
|||
# CONFIG_PKG_USING_BMI088 is not set
|
||||
# CONFIG_PKG_USING_HMC5883 is not set
|
||||
# CONFIG_PKG_USING_MAX6675 is not set
|
||||
# CONFIG_PKG_USING_MAX31855 is not set
|
||||
# CONFIG_PKG_USING_TMP1075 is not set
|
||||
# CONFIG_PKG_USING_SR04 is not set
|
||||
# CONFIG_PKG_USING_CCS811 is not set
|
||||
# CONFIG_PKG_USING_PMSXX is not set
|
||||
# CONFIG_PKG_USING_RT3020 is not set
|
||||
# CONFIG_PKG_USING_MLX90632 is not set
|
||||
# CONFIG_PKG_USING_MLX90382 is not set
|
||||
# CONFIG_PKG_USING_MLX90393 is not set
|
||||
# CONFIG_PKG_USING_MLX90392 is not set
|
||||
# CONFIG_PKG_USING_MLX90394 is not set
|
||||
# CONFIG_PKG_USING_MLX90397 is not set
|
||||
# CONFIG_PKG_USING_MS5611 is not set
|
||||
# CONFIG_PKG_USING_MAX31865 is not set
|
||||
|
@ -845,6 +930,8 @@ CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7"
|
|||
# CONFIG_PKG_USING_ICM20608 is not set
|
||||
# CONFIG_PKG_USING_PAJ7620 is not set
|
||||
# CONFIG_PKG_USING_STHS34PF80 is not set
|
||||
# CONFIG_PKG_USING_P3T1755 is not set
|
||||
# CONFIG_PKG_USING_QMI8658 is not set
|
||||
# end of sensors drivers
|
||||
|
||||
#
|
||||
|
@ -933,6 +1020,11 @@ CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7"
|
|||
# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
|
||||
# CONFIG_PKG_USING_BT_MX01 is not set
|
||||
# CONFIG_PKG_USING_RGPOWER is not set
|
||||
# CONFIG_PKG_USING_BT_MX02 is not set
|
||||
# CONFIG_PKG_USING_GC9A01 is not set
|
||||
# CONFIG_PKG_USING_IK485 is not set
|
||||
# CONFIG_PKG_USING_SERVO is not set
|
||||
# CONFIG_PKG_USING_SEAN_WS2812B is not set
|
||||
# CONFIG_PKG_USING_SPI_TOOLS is not set
|
||||
# end of peripheral libraries and drivers
|
||||
|
||||
|
@ -949,6 +1041,7 @@ CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7"
|
|||
# CONFIG_PKG_USING_QUEST is not set
|
||||
# CONFIG_PKG_USING_NAXOS is not set
|
||||
# CONFIG_PKG_USING_R_TINYMAIX is not set
|
||||
# CONFIG_PKG_USING_LLMCHAT is not set
|
||||
# end of AI packages
|
||||
|
||||
#
|
||||
|
@ -1019,6 +1112,7 @@ CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7"
|
|||
# CONFIG_PKG_USING_KI is not set
|
||||
# CONFIG_PKG_USING_ARMv7M_DWT is not set
|
||||
# CONFIG_PKG_USING_CRCLIB is not set
|
||||
# CONFIG_PKG_USING_LIBCRC is not set
|
||||
# CONFIG_PKG_USING_LWGPS is not set
|
||||
# CONFIG_PKG_USING_STATE_MACHINE is not set
|
||||
# CONFIG_PKG_USING_DESIGN_PATTERN is not set
|
||||
|
@ -1029,6 +1123,7 @@ CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7"
|
|||
# CONFIG_PKG_USING_SOEM is not set
|
||||
# CONFIG_PKG_USING_QPARAM is not set
|
||||
# CONFIG_PKG_USING_CorevMCU_CLI is not set
|
||||
# CONFIG_PKG_USING_DRMP is not set
|
||||
# end of miscellaneous packages
|
||||
|
||||
#
|
||||
|
@ -1042,6 +1137,7 @@ CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7"
|
|||
# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SKETCH_LOADER_DEMO is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_RTDUINO_SENSORFUSION_SHIELD is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
|
||||
|
@ -1300,6 +1396,7 @@ CONFIG_BSP_USING_UART1=y
|
|||
# CONFIG_BSP_USING_RTC is not set
|
||||
CONFIG_LSI_VALUE=39000
|
||||
# CONFIG_BSP_USING_IWDT is not set
|
||||
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
|
||||
# CONFIG_BSP_USING_CAN is not set
|
||||
# CONFIG_BSP_USING_TIM is not set
|
||||
# end of On-chip Peripheral Drivers
|
||||
|
|
|
@ -234,6 +234,10 @@ menu "On-chip Peripheral Drivers"
|
|||
select RT_USING_WDT
|
||||
default n
|
||||
|
||||
config BSP_USING_ON_CHIP_FLASH
|
||||
bool "Enable on-chip FLASH"
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_CAN
|
||||
bool "Enable CAN"
|
||||
default n
|
||||
|
|
|
@ -22,6 +22,10 @@
|
|||
#define SRAM_SIZE 64
|
||||
#define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
|
||||
|
||||
#define CH32_FLASH_START_ADRESS ((uint32_t)0x08000000)
|
||||
#define CH32_FLASH_SIZE (256 * 1024)
|
||||
#define CH32_FLASH_END_ADDRESS ((uint32_t)(CH32_FLASH_START_ADRESS + CH32_FLASH_SIZE))
|
||||
|
||||
extern int _ebss, _susrstack;
|
||||
#define HEAP_BEGIN ((void *)&_ebss)
|
||||
#define HEAP_END ((void *)&_susrstack)
|
||||
|
|
|
@ -104,7 +104,7 @@
|
|||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x50200
|
||||
#define RT_VER_NUM 0x50201
|
||||
#define RT_BACKTRACE_LEVEL_MAX_NR 32
|
||||
/* end of RT-Thread Kernel */
|
||||
#define RT_USING_HW_ATOMIC
|
||||
|
@ -293,9 +293,19 @@
|
|||
|
||||
#define PKG_USING_CH32V307_SDK
|
||||
#define PKG_USING_CH32V307_SDK_V207
|
||||
#define PKG_USING_CH32V307_SDK_RTT_PATCH
|
||||
#define PKG_USING_CH32V307_SDK_RTT_PATCH_V207
|
||||
/* end of WCH HAL & SDK Drivers */
|
||||
|
||||
/* AT32 HAL & SDK Drivers */
|
||||
|
||||
/* end of AT32 HAL & SDK Drivers */
|
||||
|
||||
/* HC32 DDL Drivers */
|
||||
|
||||
/* end of HC32 DDL Drivers */
|
||||
|
||||
/* NXP HAL & SDK Drivers */
|
||||
|
||||
/* end of NXP HAL & SDK Drivers */
|
||||
/* end of HAL & SDK Drivers */
|
||||
|
||||
/* sensors drivers */
|
||||
|
|
Loading…
Reference in New Issue