RT-Thread
/
rt-thread
mirror of https://github.com/RT-Thread/rt-thread
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

format stm32 drivers

This commit is contained in:
Meco Man 2023-01-08 21:20:16 -05:00 committed by Man, Jianting (Meco)
parent 592284c66c
commit 7ecba50ff6
198 changed files with 247 additions and 247 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
bsp/stm32/libraries/HAL_Drivers/CMSIS/Include/cmsis_armcc.h
View File

@ -58,9 +58,9 @@
#ifndef __STATIC_INLINE #ifndef __STATIC_INLINE
#define __STATIC_INLINE static __inline #define __STATIC_INLINE static __inline
#endif #endif
#ifndef __STATIC_FORCEINLINE #ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE static __forceinline #define __STATIC_FORCEINLINE static __forceinline
#endif #endif
#ifndef __NO_RETURN #ifndef __NO_RETURN
#define __NO_RETURN __declspec(noreturn) #define __NO_RETURN __declspec(noreturn)
#endif #endif
@ -443,7 +443,7 @@ __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
__schedule_barrier();\ __schedule_barrier();\
} while (0U) } while (0U)
/** /**
\brief Reverse byte order (32 bit) \brief Reverse byte order (32 bit)
\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

8
bsp/stm32/libraries/HAL_Drivers/CMSIS/Include/cmsis_armclang.h
View File

@ -43,9 +43,9 @@
#ifndef __STATIC_INLINE #ifndef __STATIC_INLINE
#define __STATIC_INLINE static __inline #define __STATIC_INLINE static __inline
#endif #endif
#ifndef __STATIC_FORCEINLINE #ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline #define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline
#endif #endif
#ifndef __NO_RETURN #ifndef __NO_RETURN
#define __NO_RETURN __attribute__((__noreturn__)) #define __NO_RETURN __attribute__((__noreturn__))
#endif #endif
@ -570,7 +570,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure Stack Pointer Limit register hence zero is returned always in non-secure
mode. mode.
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM). \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
\return PSPLIM Register value \return PSPLIM Register value
*/ */
@ -616,7 +616,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure Stack Pointer Limit register hence the write is silently ignored in non-secure
mode. mode.
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/ */

10
bsp/stm32/libraries/HAL_Drivers/CMSIS/Include/cmsis_gcc.h
View File

@ -46,9 +46,9 @@
#ifndef __STATIC_INLINE #ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline #define __STATIC_INLINE static inline
#endif #endif
#ifndef __STATIC_FORCEINLINE #ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
#endif #endif
#ifndef __NO_RETURN #ifndef __NO_RETURN
#define __NO_RETURN __attribute__((__noreturn__)) #define __NO_RETURN __attribute__((__noreturn__))
#endif #endif
@ -585,7 +585,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure Stack Pointer Limit register hence zero is returned always in non-secure
mode. mode.
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM). \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
\return PSPLIM Register value \return PSPLIM Register value
*/ */
@ -630,7 +630,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure Stack Pointer Limit register hence the write is silently ignored in non-secure
mode. mode.
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/ */
@ -767,7 +767,7 @@ __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
{ {
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) ) (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
#if __has_builtin(__builtin_arm_get_fpscr) #if __has_builtin(__builtin_arm_get_fpscr)
// Re-enable using built-in when GCC has been fixed // Re-enable using built-in when GCC has been fixed
// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
/* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */

2
bsp/stm32/libraries/HAL_Drivers/CMSIS/Include/core_cm0.h
View File

@ -61,7 +61,7 @@
*/ */
#include "cmsis_version.h" #include "cmsis_version.h"
/* CMSIS CM0 definitions */ /* CMSIS CM0 definitions */
#define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ #define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
#define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ #define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */

2
bsp/stm32/libraries/HAL_Drivers/CMSIS/Include/core_cm0plus.h
View File

@ -61,7 +61,7 @@
*/ */
#include "cmsis_version.h" #include "cmsis_version.h"
/* CMSIS CM0+ definitions */ /* CMSIS CM0+ definitions */
#define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ #define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
#define __CM0PLUS_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ #define __CM0PLUS_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */

2
bsp/stm32/libraries/HAL_Drivers/CMSIS/Include/core_cm1.h
View File

@ -61,7 +61,7 @@
*/ */
#include "cmsis_version.h" #include "cmsis_version.h"
/* CMSIS CM1 definitions */ /* CMSIS CM1 definitions */
#define __CM1_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ #define __CM1_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
#define __CM1_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ #define __CM1_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */

6
bsp/stm32/libraries/HAL_Drivers/CMSIS/Include/core_cm23.h
View File

@ -1289,7 +1289,7 @@ typedef struct
/* Special LR values for Secure/Non-Secure call handling and exception handling */ /* Special LR values for Secure/Non-Secure call handling and exception handling */
/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ /* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ #define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */
/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ /* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
@ -1304,11 +1304,11 @@ typedef struct
/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ /* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */
#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */
#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ #define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */
#else #else
#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ #define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */
#endif #endif
/* Interrupt Priorities are WORD accessible only under Armv6-M */ /* Interrupt Priorities are WORD accessible only under Armv6-M */
/* The following MACROS handle generation of the register offset and byte masks */ /* The following MACROS handle generation of the register offset and byte masks */
#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) #define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)

4
bsp/stm32/libraries/HAL_Drivers/CMSIS/Include/core_cm33.h
View File

@ -2159,7 +2159,7 @@ typedef struct
/* Special LR values for Secure/Non-Secure call handling and exception handling */ /* Special LR values for Secure/Non-Secure call handling and exception handling */
/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ /* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ #define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */
/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ /* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
@ -2174,7 +2174,7 @@ typedef struct
/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ /* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */
#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */
#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ #define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */
#else #else
#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ #define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */
#endif #endif

32
bsp/stm32/libraries/HAL_Drivers/CMSIS/Include/mpu_armv7.h
View File

@ -21,13 +21,13 @@
* See the License for the specific language governing permissions and * See the License for the specific language governing permissions and
* limitations under the License. * limitations under the License.
*/ */
#if defined ( __ICCARM__ ) #if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */ #pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__) #elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */ #pragma clang system_header /* treat file as system include file */
#endif #endif
#ifndef ARM_MPU_ARMV7_H #ifndef ARM_MPU_ARMV7_H
#define ARM_MPU_ARMV7_H #define ARM_MPU_ARMV7_H
@ -79,12 +79,12 @@
/** /**
* MPU Memory Access Attributes * MPU Memory Access Attributes
* *
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. * \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
* \param IsShareable Region is shareable between multiple bus masters. * \param IsShareable Region is shareable between multiple bus masters.
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. * \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. * \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
*/ */
#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \ #define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
((((TypeExtField ) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \ ((((TypeExtField ) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
(((IsShareable ) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \ (((IsShareable ) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
@ -93,7 +93,7 @@
/** /**
* MPU Region Attribute and Size Register Value * MPU Region Attribute and Size Register Value
* *
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches. * \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. * \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_. * \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
@ -104,10 +104,10 @@
((((DisableExec ) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \ ((((DisableExec ) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
(((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \ (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
(((AccessAttributes) ) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) (((AccessAttributes) ) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk)))
/** /**
* MPU Region Attribute and Size Register Value * MPU Region Attribute and Size Register Value
* *
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches. * \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. * \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. * \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
@ -116,7 +116,7 @@
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. * \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
* \param SubRegionDisable Sub-region disable field. * \param SubRegionDisable Sub-region disable field.
* \param Size Region size of the region to be configured, for example 4K, 8K. * \param Size Region size of the region to be configured, for example 4K, 8K.
*/ */
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \ #define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size) ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
@ -126,7 +126,7 @@
* - Shareable * - Shareable
* - Non-cacheable * - Non-cacheable
* - Non-bufferable * - Non-bufferable
*/ */
#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U) #define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
/** /**
@ -137,7 +137,7 @@
* - Bufferable (if shareable) or non-bufferable (if non-shareable) * - Bufferable (if shareable) or non-bufferable (if non-shareable)
* *
* \param IsShareable Configures the device memory as shareable or non-shareable. * \param IsShareable Configures the device memory as shareable or non-shareable.
*/ */
#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U)) #define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
/** /**
@ -150,7 +150,7 @@
* \param OuterCp Configures the outer cache policy. * \param OuterCp Configures the outer cache policy.
* \param InnerCp Configures the inner cache policy. * \param InnerCp Configures the inner cache policy.
* \param IsShareable Configures the memory as shareable or non-shareable. * \param IsShareable Configures the memory as shareable or non-shareable.
*/ */
#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U)) #define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
/** /**
@ -181,7 +181,7 @@ typedef struct {
uint32_t RBAR; //!< The region base address register value (RBAR) uint32_t RBAR; //!< The region base address register value (RBAR)
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
} ARM_MPU_Region_t; } ARM_MPU_Region_t;
/** Enable the MPU. /** Enable the MPU.
* \param MPU_Control Default access permissions for unconfigured regions. * \param MPU_Control Default access permissions for unconfigured regions.
*/ */
@ -219,7 +219,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
/** Configure an MPU region. /** Configure an MPU region.
* \param rbar Value for RBAR register. * \param rbar Value for RBAR register.
* \param rsar Value for RSAR register. * \param rsar Value for RSAR register.
*/ */
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr) __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
{ {
MPU->RBAR = rbar; MPU->RBAR = rbar;
@ -230,7 +230,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
* \param rnr Region number to be configured. * \param rnr Region number to be configured.
* \param rbar Value for RBAR register. * \param rbar Value for RBAR register.
* \param rsar Value for RSAR register. * \param rsar Value for RSAR register.
*/ */
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr) __STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
{ {
MPU->RNR = rnr; MPU->RNR = rnr;
@ -246,7 +246,7 @@ __STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t r
__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) __STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
{ {
uint32_t i; uint32_t i;
for (i = 0U; i < len; ++i) for (i = 0U; i < len; ++i)
{ {
dst[i] = src[i]; dst[i] = src[i];
} }
@ -256,7 +256,7 @@ __STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRI
* \param table Pointer to the MPU configuration table. * \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured. * \param cnt Amount of regions to be configured.
*/ */
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) __STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
{ {
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
while (cnt > MPU_TYPE_RALIASES) { while (cnt > MPU_TYPE_RALIASES) {

28
bsp/stm32/libraries/HAL_Drivers/CMSIS/Include/mpu_armv8.h
View File

@ -108,7 +108,7 @@ typedef struct {
uint32_t RBAR; /*!< Region Base Address Register value */ uint32_t RBAR; /*!< Region Base Address Register value */
uint32_t RLAR; /*!< Region Limit Address Register value */ uint32_t RLAR; /*!< Region Limit Address Register value */
} ARM_MPU_Region_t; } ARM_MPU_Region_t;
/** Enable the MPU. /** Enable the MPU.
* \param MPU_Control Default access permissions for unconfigured regions. * \param MPU_Control Default access permissions for unconfigured regions.
*/ */
@ -171,11 +171,11 @@ __STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t at
const uint8_t reg = idx / 4U; const uint8_t reg = idx / 4U;
const uint32_t pos = ((idx % 4U) * 8U); const uint32_t pos = ((idx % 4U) * 8U);
const uint32_t mask = 0xFFU << pos; const uint32_t mask = 0xFFU << pos;
if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) { if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
return; // invalid index return; // invalid index
} }
mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask)); mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
} }
@ -222,7 +222,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
* \param rnr Region number to be cleared. * \param rnr Region number to be cleared.
*/ */
__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr) __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
{ {
ARM_MPU_ClrRegionEx(MPU_NS, rnr); ARM_MPU_ClrRegionEx(MPU_NS, rnr);
} }
#endif #endif
@ -232,7 +232,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
* \param rnr Region number to be configured. * \param rnr Region number to be configured.
* \param rbar Value for RBAR register. * \param rbar Value for RBAR register.
* \param rlar Value for RLAR register. * \param rlar Value for RLAR register.
*/ */
__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar) __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
{ {
mpu->RNR = rnr; mpu->RNR = rnr;
@ -244,7 +244,7 @@ __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t r
* \param rnr Region number to be configured. * \param rnr Region number to be configured.
* \param rbar Value for RBAR register. * \param rbar Value for RBAR register.
* \param rlar Value for RLAR register. * \param rlar Value for RLAR register.
*/ */
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar) __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{ {
ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar); ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
@ -255,10 +255,10 @@ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rla
* \param rnr Region number to be configured. * \param rnr Region number to be configured.
* \param rbar Value for RBAR register. * \param rbar Value for RBAR register.
* \param rlar Value for RLAR register. * \param rlar Value for RLAR register.
*/ */
__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar) __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{ {
ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar); ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
} }
#endif #endif
@ -270,7 +270,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t
__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) __STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
{ {
uint32_t i; uint32_t i;
for (i = 0U; i < len; ++i) for (i = 0U; i < len; ++i)
{ {
dst[i] = src[i]; dst[i] = src[i];
} }
@ -282,7 +282,7 @@ __STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRI
* \param table Pointer to the MPU configuration table. * \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured. * \param cnt Amount of regions to be configured.
*/ */
__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{ {
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
if (cnt == 1U) { if (cnt == 1U) {
@ -291,7 +291,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
} else { } else {
uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U); uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES; uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
mpu->RNR = rnrBase; mpu->RNR = rnrBase;
while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) { while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
uint32_t c = MPU_TYPE_RALIASES - rnrOffset; uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
@ -302,7 +302,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
rnrBase += MPU_TYPE_RALIASES; rnrBase += MPU_TYPE_RALIASES;
mpu->RNR = rnrBase; mpu->RNR = rnrBase;
} }
orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize); orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
} }
} }
@ -312,7 +312,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
* \param table Pointer to the MPU configuration table. * \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured. * \param cnt Amount of regions to be configured.
*/ */
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) __STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{ {
ARM_MPU_LoadEx(MPU, rnr, table, cnt); ARM_MPU_LoadEx(MPU, rnr, table, cnt);
} }
@ -323,7 +323,7 @@ __STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, u
* \param table Pointer to the MPU configuration table. * \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured. * \param cnt Amount of regions to be configured.
*/ */
__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) __STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{ {
ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt); ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
} }

18
bsp/stm32/libraries/HAL_Drivers/CMSIS/Include/tz_context.h
View File

@ -30,41 +30,41 @@
#ifndef TZ_CONTEXT_H #ifndef TZ_CONTEXT_H
#define TZ_CONTEXT_H #define TZ_CONTEXT_H
#include <stdint.h> #include <stdint.h>
#ifndef TZ_MODULEID_T #ifndef TZ_MODULEID_T
#define TZ_MODULEID_T #define TZ_MODULEID_T
/// \details Data type that identifies secure software modules called by a process. /// \details Data type that identifies secure software modules called by a process.
typedef uint32_t TZ_ModuleId_t; typedef uint32_t TZ_ModuleId_t;
#endif #endif
/// \details TZ Memory ID identifies an allocated memory slot. /// \details TZ Memory ID identifies an allocated memory slot.
typedef uint32_t TZ_MemoryId_t; typedef uint32_t TZ_MemoryId_t;
/// Initialize secure context memory system /// Initialize secure context memory system
/// \return execution status (1: success, 0: error) /// \return execution status (1: success, 0: error)
uint32_t TZ_InitContextSystem_S (void); uint32_t TZ_InitContextSystem_S (void);
/// Allocate context memory for calling secure software modules in TrustZone /// Allocate context memory for calling secure software modules in TrustZone
/// \param[in] module identifies software modules called from non-secure mode /// \param[in] module identifies software modules called from non-secure mode
/// \return value != 0 id TrustZone memory slot identifier /// \return value != 0 id TrustZone memory slot identifier
/// \return value 0 no memory available or internal error /// \return value 0 no memory available or internal error
TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
/// \param[in] id TrustZone memory slot identifier /// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error) /// \return execution status (1: success, 0: error)
uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
/// Load secure context (called on RTOS thread context switch) /// Load secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier /// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error) /// \return execution status (1: success, 0: error)
uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
/// Store secure context (called on RTOS thread context switch) /// Store secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier /// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error) /// \return execution status (1: success, 0: error)
uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
#endif // TZ_CONTEXT_H #endif // TZ_CONTEXT_H

2
bsp/stm32/libraries/HAL_Drivers/config/f0/adc_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f0/dma_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f0/pwm_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2022, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f0/tim_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f0/uart_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f1/adc_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f1/dma_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f1/pulse_encoder_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f1/pwm_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f1/sdio_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f1/spi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f1/tim_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f1/uart_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f1/usbd_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f2/adc_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f2/dma_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f2/pwm_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f2/sdio_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f2/spi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f2/tim_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f2/uart_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f3/dma_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f3/pwm_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f3/tim_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f3/uart_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f4/adc_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f4/dac_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f4/pulse_encoder_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f4/pwm_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f4/qspi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f4/sdio_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f4/spi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f4/tim_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f4/uart_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f4/usbd_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f7/adc_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f7/dma_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f7/pwm_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f7/qspi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f7/sdio_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f7/tim_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/f7/uart_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g0/adc_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g0/pwm_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g0/spi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g0/tim_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g4/adc_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g4/dma_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g4/pulse_encoder_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g4/pwm_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g4/qspi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g4/sdio_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g4/spi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g4/tim_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g4/uart_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/g4/usbd_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/h7/adc_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/h7/dac_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/h7/dma_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/h7/pwm_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2022, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/h7/qspi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/h7/sdio_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/h7/tim_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/h7/uart_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/h7/usbd_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l0/dma_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l0/uart_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l1/adc_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l1/dma_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l1/pulse_encoder_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l1/pwm_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l1/sdio_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l1/spi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l1/tim_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l1/uart_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l1/usbd_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l4/adc_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l4/dac_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l4/pwm_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l4/qspi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l4/sdio_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2021, RT-Thread Development Team * Copyright (c) 2006-2023, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

Some files were not shown because too many files have changed in this diff Show More