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[fix][bsp] GD32: fixed SPI adn SPI flash drivers

This commit is contained in:
Dmitriy 2025-03-03 10:47:57 +03:00 committed by Meco Man
parent 983f02151a
commit a574dd6357
2 changed files with 7 additions and 7 deletions
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12
bsp/gd32/arm/libraries/gd32_drivers/drv_spi.c
View File

@ -87,8 +87,8 @@ static const struct gd32_spi spi_bus_obj[] = {
#ifdef BSP_USING_SPI3 #ifdef BSP_USING_SPI3
{ {
SPI2, SPI3,
"spi2", "spi3",
RCU_SPI3, RCU_SPI3,
RCU_GPIOE, RCU_GPIOE,
&spi_bus3, &spi_bus3,
@ -146,7 +146,7 @@ static void gd32_spi_init(struct gd32_spi *gd32_spi)
gpio_af_set(gd32_spi->spi_port, gd32_spi->alt_func_num, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin); gpio_af_set(gd32_spi->spi_port, gd32_spi->alt_func_num, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
gpio_mode_set(gd32_spi->spi_port, GPIO_MODE_AF, GPIO_PUPD_NONE, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin); gpio_mode_set(gd32_spi->spi_port, GPIO_MODE_AF, GPIO_PUPD_NONE, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
gpio_output_options_set(gd32_spi->spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_200MHZ, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin); gpio_output_options_set(gd32_spi->spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_MAX, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
#else #else
/* Init SPI SCK MOSI */ /* Init SPI SCK MOSI */
gpio_init(gd32_spi->spi_port, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, gd32_spi->sck_pin | gd32_spi->mosi_pin); gpio_init(gd32_spi->spi_port, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, gd32_spi->sck_pin | gd32_spi->mosi_pin);
@ -287,7 +287,7 @@ static rt_ssize_t spixfer(struct rt_spi_device* device, struct rt_spi_message* m
struct rt_spi_bus * gd32_spi_bus = (struct rt_spi_bus *)device->bus; struct rt_spi_bus * gd32_spi_bus = (struct rt_spi_bus *)device->bus;
struct gd32_spi *spi_device = (struct gd32_spi *)gd32_spi_bus->parent.user_data; struct gd32_spi *spi_device = (struct gd32_spi *)gd32_spi_bus->parent.user_data;
struct rt_spi_configuration * config = &device->config; struct rt_spi_configuration * config = &device->config;
struct gd32_spi_cs * gd32_spi_cs = device->parent.user_data; rt_base_t cs_pin = (rt_base_t)device->parent.user_data;
uint32_t spi_periph = spi_device->spi_periph; uint32_t spi_periph = spi_device->spi_periph;
RT_ASSERT(device != NULL); RT_ASSERT(device != NULL);
@ -296,7 +296,7 @@ static rt_ssize_t spixfer(struct rt_spi_device* device, struct rt_spi_message* m
/* take CS */ /* take CS */
if(message->cs_take) if(message->cs_take)
{ {
gpio_bit_reset(gd32_spi_cs->GPIOx, gd32_spi_cs->GPIO_Pin); rt_pin_write(cs_pin, PIN_LOW);
LOG_D("spi take cs\n"); LOG_D("spi take cs\n");
} }
@ -372,7 +372,7 @@ static rt_ssize_t spixfer(struct rt_spi_device* device, struct rt_spi_message* m
/* release CS */ /* release CS */
if(message->cs_release) if(message->cs_release)
{ {
gpio_bit_set(gd32_spi_cs->GPIOx, gd32_spi_cs->GPIO_Pin); rt_pin_write(cs_pin, PIN_HIGH);
LOG_D("spi release cs\n"); LOG_D("spi release cs\n");
} }

2
bsp/gd32/arm/libraries/gd32_drivers/drv_spi_flash.c
View File

@ -67,7 +67,7 @@ static int rt_hw_spi_flash_with_sfud_init(void)
return RT_EOK; return RT_EOK;
} }
INIT_COMPONENT_EXPORT(rt_hw_spi_flash_with_sfud_init) INIT_COMPONENT_EXPORT(rt_hw_spi_flash_with_sfud_init);
#endif #endif
#ifdef RT_USING_DFS #ifdef RT_USING_DFS