This commit is contained in:
chunyexixiaoyu 2021-10-14 16:31:46 +08:00
parent 92ea0ec8c7
commit aa09f2b5c2
25 changed files with 2436 additions and 575 deletions

View File

@ -21,7 +21,15 @@ CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=4096 CONFIG_IDLE_THREAD_STACK_SIZE=4096
CONFIG_SYSTEM_THREAD_STACK_SIZE=4096
# CONFIG_RT_USING_TIMER_SOFT is not set # CONFIG_RT_USING_TIMER_SOFT is not set
#
# kservice optimization
#
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_ASM_MEMCPY is not set
CONFIG_RT_DEBUG=y CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y CONFIG_RT_DEBUG_COLOR=y
CONFIG_RT_DEBUG_INIT_CONFIG=y CONFIG_RT_DEBUG_INIT_CONFIG=y
@ -55,6 +63,8 @@ CONFIG_RT_USING_MEMHEAP=y
# CONFIG_RT_USING_SMALL_MEM is not set # CONFIG_RT_USING_SMALL_MEM is not set
CONFIG_RT_USING_SLAB=y CONFIG_RT_USING_SLAB=y
# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set # CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
# CONFIG_RT_USING_USERHEAP is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP=y CONFIG_RT_USING_HEAP=y
# #
@ -66,7 +76,8 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uarths" CONFIG_RT_CONSOLE_DEVICE_NAME="uarths"
CONFIG_RT_VER_NUM=0x40003 # CONFIG_RT_PRINTF_LONGLONG is not set
CONFIG_RT_VER_NUM=0x40004
CONFIG_ARCH_CPU_64BIT=y CONFIG_ARCH_CPU_64BIT=y
# CONFIG_RT_USING_CPU_FFS is not set # CONFIG_RT_USING_CPU_FFS is not set
CONFIG_ARCH_RISCV=y CONFIG_ARCH_RISCV=y
@ -86,25 +97,26 @@ CONFIG_RT_MAIN_THREAD_PRIORITY=10
# #
# C++ features # C++ features
# #
# CONFIG_RT_USING_CPLUSPLUS is not set CONFIG_RT_USING_CPLUSPLUS=y
# CONFIG_RT_USING_CPLUSPLUS11 is not set
# #
# Command shell # Command shell
# #
CONFIG_RT_USING_FINSH=y CONFIG_RT_USING_FINSH=y
CONFIG_RT_USING_MSH=y
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_THREAD_NAME="tshell" CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=16384
CONFIG_FINSH_USING_HISTORY=y CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5 CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_CMD_SIZE=80
CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
CONFIG_FINSH_USING_DESCRIPTION=y CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set # CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=16384
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set # CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
CONFIG_FINSH_USING_MSH_ONLY=y
CONFIG_FINSH_ARG_MAX=10 CONFIG_FINSH_ARG_MAX=10
# #
@ -128,16 +140,20 @@ CONFIG_RT_DFS_ELM_WORD_ACCESS=y
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set # CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
CONFIG_RT_DFS_ELM_USE_LFN_3=y CONFIG_RT_DFS_ELM_USE_LFN_3=y
CONFIG_RT_DFS_ELM_USE_LFN=3 CONFIG_RT_DFS_ELM_USE_LFN=3
CONFIG_RT_DFS_ELM_LFN_UNICODE_0=y
# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set
# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set
# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set
CONFIG_RT_DFS_ELM_LFN_UNICODE=0
CONFIG_RT_DFS_ELM_MAX_LFN=255 CONFIG_RT_DFS_ELM_MAX_LFN=255
CONFIG_RT_DFS_ELM_DRIVES=2 CONFIG_RT_DFS_ELM_DRIVES=2
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096 CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096
# CONFIG_RT_DFS_ELM_USE_ERASE is not set # CONFIG_RT_DFS_ELM_USE_ERASE is not set
CONFIG_RT_DFS_ELM_REENTRANT=y CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000
CONFIG_RT_USING_DFS_DEVFS=y CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set # CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set # CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_UFFS is not set
# CONFIG_RT_USING_DFS_JFFS2 is not set
# #
# Device Drivers # Device Drivers
@ -146,6 +162,8 @@ CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512 CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set # CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y CONFIG_RT_USING_SERIAL=y
CONFIG_RT_USING_SERIAL_V1=y
# CONFIG_RT_USING_SERIAL_V2 is not set
CONFIG_RT_SERIAL_USING_DMA=y CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_SERIAL_RB_BUFSZ=64 CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_CAN is not set
@ -198,7 +216,9 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_RT_USING_POSIX_TERMIOS is not set # CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_GETLINE is not set # CONFIG_RT_USING_POSIX_GETLINE is not set
# CONFIG_RT_USING_POSIX_AIO is not set # CONFIG_RT_USING_POSIX_AIO is not set
CONFIG_RT_LIBC_USING_TIME=y
# CONFIG_RT_USING_MODULE is not set # CONFIG_RT_USING_MODULE is not set
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# #
# Network # Network
@ -259,6 +279,13 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_ULOG_USING_FILTER is not set # CONFIG_ULOG_USING_FILTER is not set
# CONFIG_ULOG_USING_SYSLOG is not set # CONFIG_ULOG_USING_SYSLOG is not set
# CONFIG_RT_USING_UTEST is not set # CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_RT_LINK is not set
#
# RT-Thread Utestcases
#
# CONFIG_RT_USING_UTESTCASES is not set
# #
# RT-Thread online packages # RT-Thread online packages
@ -307,6 +334,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_AT_DEVICE is not set # CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set # CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set # CONFIG_PKG_USING_WIZNET is not set
# CONFIG_PKG_USING_ZB_COORDINATOR is not set
# #
# IoT Cloud # IoT Cloud
@ -327,8 +355,6 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_LIBRWS is not set # CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set # CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set # CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_DLT645 is not set # CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set # CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set # CONFIG_PKG_USING_SMTP_CLIENT is not set
@ -340,6 +366,20 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_NMEALIB is not set # CONFIG_PKG_USING_NMEALIB is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set # CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PDULIB is not set # CONFIG_PKG_USING_PDULIB is not set
# CONFIG_PKG_USING_BTSTACK is not set
# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
# CONFIG_PKG_USING_MAVLINK is not set
# CONFIG_PKG_USING_RAPIDJSON is not set
# CONFIG_PKG_USING_BSAL is not set
# CONFIG_PKG_USING_AGILE_MODBUS is not set
# CONFIG_PKG_USING_AGILE_FTP is not set
# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
# CONFIG_PKG_USING_RT_LINK_HW is not set
# CONFIG_PKG_USING_LORA_PKT_FWD is not set
# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
# CONFIG_PKG_USING_HM is not set
# #
# security packages # security packages
@ -356,6 +396,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_LUA is not set # CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set # CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set # CONFIG_PKG_USING_MICROPYTHON is not set
# CONFIG_PKG_USING_PIKASCRIPT is not set
# #
# multimedia packages # multimedia packages
@ -363,8 +404,28 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set # CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set # CONFIG_PKG_USING_STEMWIN is not set
#
# lvgl: powerful and easy-to-use embedded GUI library
#
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_LVGL is not set
# CONFIG_PKG_USING_WAVPLAYER is not set # CONFIG_PKG_USING_WAVPLAYER is not set
# CONFIG_PKG_USING_TJPGD is not set # CONFIG_PKG_USING_TJPGD is not set
# CONFIG_PKG_USING_PDFGEN is not set
# CONFIG_PKG_USING_HELIX is not set
# CONFIG_PKG_USING_AZUREGUIX is not set
# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
# CONFIG_PKG_USING_NUEMWIN is not set
# CONFIG_PKG_USING_MP3PLAYER is not set
# CONFIG_PKG_USING_TINYJPEG is not set
# CONFIG_PKG_USING_UGUI is not set
#
# u8g2: a monochrome graphic library
#
# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
# CONFIG_PKG_USING_U8G2 is not set
# #
# tools packages # tools packages
@ -373,12 +434,16 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_EASYFLASH is not set # CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set # CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set # CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_SEGGER_RTT is not set
# CONFIG_PKG_USING_RDB is not set # CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ULOG_FILE is not set
# CONFIG_PKG_USING_LOGMGR is not set
# CONFIG_PKG_USING_ADBD is not set # CONFIG_PKG_USING_ADBD is not set
# CONFIG_PKG_USING_COREMARK is not set # CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_DHRYSTONE is not set # CONFIG_PKG_USING_DHRYSTONE is not set
# CONFIG_PKG_USING_MEMORYPERF is not set
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set # CONFIG_PKG_USING_NR_MICRO_SHELL is not set
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set # CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set # CONFIG_PKG_USING_LUNAR_CALENDAR is not set
@ -386,23 +451,59 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_GPS_RMC is not set # CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set # CONFIG_PKG_USING_URLENCODE is not set
# CONFIG_PKG_USING_UMCN is not set # CONFIG_PKG_USING_UMCN is not set
# CONFIG_PKG_USING_LWRB2RTT is not set
# CONFIG_PKG_USING_CPU_USAGE is not set
# CONFIG_PKG_USING_GBK2UTF8 is not set
# CONFIG_PKG_USING_VCONSOLE is not set
# CONFIG_PKG_USING_KDB is not set
# CONFIG_PKG_USING_WAMR is not set
# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
# CONFIG_PKG_USING_LWLOG is not set
# CONFIG_PKG_USING_ANV_TRACE is not set
# CONFIG_PKG_USING_ANV_MEMLEAK is not set
# CONFIG_PKG_USING_ANV_TESTSUIT is not set
# CONFIG_PKG_USING_ANV_BENCH is not set
# CONFIG_PKG_USING_DEVMEM is not set
# CONFIG_PKG_USING_REGEX is not set
# CONFIG_PKG_USING_MEM_SANDBOX is not set
# CONFIG_PKG_USING_SOLAR_TERMS is not set
# CONFIG_PKG_USING_GAN_ZHI is not set
# #
# system packages # system packages
# #
#
# acceleration: Assembly language or algorithmic acceleration packages
#
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
# CONFIG_PKG_USING_QFPLIB_M3 is not set
#
# Micrium: Micrium software products porting for RT-Thread
#
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
# CONFIG_PKG_USING_UC_CRC is not set
# CONFIG_PKG_USING_UC_CLK is not set
# CONFIG_PKG_USING_UC_COMMON is not set
# CONFIG_PKG_USING_UC_MODBUS is not set
# CONFIG_PKG_USING_GUIENGINE is not set # CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_CAIRO is not set # CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set # CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set # CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set # CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_FLASHDB is not set # CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_SQLITE is not set # CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set # CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set # CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set # CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set # CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_DFS_JFFS2 is not set
# CONFIG_PKG_USING_DFS_UFFS is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_THREAD_POOL is not set # CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set # CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set # CONFIG_PKG_USING_EV is not set
@ -412,7 +513,16 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_RAMDISK is not set # CONFIG_PKG_USING_RAMDISK is not set
# CONFIG_PKG_USING_MININI is not set # CONFIG_PKG_USING_MININI is not set
# CONFIG_PKG_USING_QBOOT is not set # CONFIG_PKG_USING_QBOOT is not set
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set # CONFIG_PKG_USING_PPOOL is not set
# CONFIG_PKG_USING_OPENAMP is not set
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
# CONFIG_PKG_USING_LPM is not set
# CONFIG_PKG_USING_TLSF is not set
# CONFIG_PKG_USING_EVENT_RECORDER is not set
# CONFIG_PKG_USING_ARM_2D is not set
# CONFIG_PKG_USING_WCWIDTH is not set
# CONFIG_PKG_USING_MCUBOOT is not set
# CONFIG_PKG_USING_TINYUSB is not set
# #
# peripheral libraries and drivers # peripheral libraries and drivers
@ -421,9 +531,9 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set # CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_AS7341 is not set
# CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set # CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set # CONFIG_PKG_USING_SX12XX is not set
@ -436,15 +546,11 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_WM_LIBRARIES is not set # CONFIG_PKG_USING_WM_LIBRARIES is not set
CONFIG_PKG_USING_KENDRYTE_SDK=y CONFIG_PKG_USING_KENDRYTE_SDK=y
CONFIG_PKG_KENDRYTE_SDK_PATH="/packages/peripherals/kendryte-sdk" CONFIG_PKG_KENDRYTE_SDK_PATH="/packages/peripherals/kendryte-sdk"
# CONFIG_PKG_USING_KENDRYTE_SDK_V052 is not set CONFIG_PKG_USING_KENDRYTE_SDK_V057=y
# CONFIG_PKG_USING_KENDRYTE_SDK_V053 is not set
# CONFIG_PKG_USING_KENDRYTE_SDK_V054 is not set
CONFIG_PKG_USING_KENDRYTE_SDK_V055=y
# CONFIG_PKG_USING_KENDRYTE_SDK_LATEST_VERSION is not set # CONFIG_PKG_USING_KENDRYTE_SDK_LATEST_VERSION is not set
CONFIG_PKG_KENDRYTE_SDK_VER="v0.5.5" CONFIG_PKG_KENDRYTE_SDK_VER="v0.5.7"
CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055 CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0057
# CONFIG_PKG_USING_INFRARED is not set # CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AGILE_BUTTON is not set # CONFIG_PKG_USING_AGILE_BUTTON is not set
# CONFIG_PKG_USING_AGILE_LED is not set # CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set # CONFIG_PKG_USING_AT24CXX is not set
@ -474,25 +580,47 @@ CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055
# CONFIG_PKG_USING_AGILE_CONSOLE is not set # CONFIG_PKG_USING_AGILE_CONSOLE is not set
# CONFIG_PKG_USING_LD3320 is not set # CONFIG_PKG_USING_LD3320 is not set
# CONFIG_PKG_USING_WK2124 is not set # CONFIG_PKG_USING_WK2124 is not set
# CONFIG_PKG_USING_LY68L6400 is not set
# CONFIG_PKG_USING_DM9051 is not set
# CONFIG_PKG_USING_SSD1306 is not set
# CONFIG_PKG_USING_QKEY is not set
# CONFIG_PKG_USING_RS485 is not set
# CONFIG_PKG_USING_NES is not set
# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
# CONFIG_PKG_USING_VDEVICE is not set
# CONFIG_PKG_USING_SGM706 is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_RDA58XX is not set
# CONFIG_PKG_USING_LIBNFC is not set
# CONFIG_PKG_USING_MFOC is not set
# CONFIG_PKG_USING_TMC51XX is not set
# CONFIG_PKG_USING_TCA9534 is not set
# CONFIG_PKG_USING_KOBUKI is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_MICRO_ROS is not set
# CONFIG_PKG_USING_MCP23008 is not set
# CONFIG_PKG_USING_BLUETRUM_SDK is not set
# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
# CONFIG_PKG_USING_BL_MCU_SDK is not set
# CONFIG_PKG_USING_SOFT_SERIAL is not set
#
# AI packages
#
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_QUEST is not set
# CONFIG_PKG_USING_NAXOS is not set
# #
# miscellaneous packages # miscellaneous packages
# #
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
# #
# samples: kernel and components samples # samples: kernel and components samples
@ -501,18 +629,48 @@ CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set # CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set # CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set #
# CONFIG_PKG_USING_NNOM is not set # entertainment: terminal games and other interesting software packages
# CONFIG_PKG_USING_LIBANN is not set #
# CONFIG_PKG_USING_ELAPACK is not set # CONFIG_PKG_USING_CMATRIX is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set # CONFIG_PKG_USING_SL is not set
# CONFIG_PKG_USING_VT100 is not set # CONFIG_PKG_USING_CAL is not set
# CONFIG_PKG_USING_ULAPACK is not set # CONFIG_PKG_USING_ACLOCK is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
# CONFIG_PKG_USING_THREES is not set # CONFIG_PKG_USING_THREES is not set
# CONFIG_PKG_USING_2048 is not set # CONFIG_PKG_USING_2048 is not set
# CONFIG_PKG_USING_SNAKE is not set
# CONFIG_PKG_USING_TETRIS is not set
# CONFIG_PKG_USING_DONUT is not set
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_LZMA is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_MINIZIP is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_KI is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
# CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_STATE_MACHINE is not set
# CONFIG_PKG_USING_MCURSES is not set
# CONFIG_PKG_USING_COWSAY is not set
# CONFIG_PKG_USING_TERMBOX is not set
CONFIG_BOARD_K210_EVB=y CONFIG_BOARD_K210_EVB=y
CONFIG_BSP_USING_UART_HS=y CONFIG_BSP_USING_UART_HS=y
@ -539,15 +697,15 @@ CONFIG_BSP_USING_LCD=y
CONFIG_BSP_LCD_CS_PIN=36 CONFIG_BSP_LCD_CS_PIN=36
CONFIG_BSP_LCD_WR_PIN=39 CONFIG_BSP_LCD_WR_PIN=39
CONFIG_BSP_LCD_DC_PIN=38 CONFIG_BSP_LCD_DC_PIN=38
CONFIG_BSP_LCD_RST_PIN=37
CONFIG_BSP_LCD_BACKLIGHT_PIN=-1
CONFIG_BSP_LCD_BACKLIGHT_ACTIVE_LOW=y
# CONFIG_BSP_LCD_BACKLIGHT_ACTIVE_HIGH is not set
CONFIG_BSP_LCD_CLK_FREQ=15000000
# CONFIG_BSP_BOARD_KD233 is not set
CONFIG_BSP_BOARD_K210_OPENMV_TEST=y
# CONFIG_BSP_BOARD_USER is not set
CONFIG_BSP_LCD_X_MAX=240 CONFIG_BSP_LCD_X_MAX=240
CONFIG_BSP_LCD_Y_MAX=320 CONFIG_BSP_LCD_Y_MAX=320
CONFIG_BSP_USING_CAMERA=y # CONFIG_BSP_USING_CAMERA is not set
CONFIG_BSP_CAMERA_SCCB_SDA_PIN=9
CONFIG_BSP_CAMERA_SCCB_SCLK_PIN=10
CONFIG_BSP_CAMERA_CMOS_RST_PIN=11
CONFIG_BSP_CAMERA_CMOS_VSYNC_PIN=12
CONFIG_BSP_CAMERA_CMOS_PWDN_PIN=13
CONFIG_BSP_CAMERA_CMOS_XCLK_PIN=14
CONFIG_BSP_CAMERA_CMOS_PCLK_PIN=15
CONFIG_BSP_CAMERA_CMOS_HREF_PIN=17
CONFIG___STACKSIZE__=4096 CONFIG___STACKSIZE__=4096

View File

@ -0,0 +1,101 @@
#include <rtthread.h>
#include <rtdevice.h>
#include <stdint.h>
#include <stdlib.h>
#include "drv_lcd.h"
static void drawarea(rt_device_t dev, struct rt_device_graphic_info *info,
int x, int y, int w, int h, uint16_t c)
{
struct rt_device_rect_info rect;
uint16_t *fb;
int i, j;
fb = (uint16_t *)info->framebuffer;
fb += (info->width * y);
fb += x;
for (j = 0; j < h; j++)
{
for (i = 0; i < w; i++)
{
fb[i] = c;
}
fb += info->width;
}
rect.x = x;
rect.y = y;
rect.width = w;
rect.height = h;
rt_device_control(dev, RTGRAPHIC_CTRL_RECT_UPDATE, &rect);
}
static int showcolor(int argc, char **argv)
{
unsigned char r = 0, g = 0, b = 0;
char *devname = "lcd";
rt_device_t dev;
struct rt_device_graphic_info info;
int result;
int x = 0, y = 0;
int i;
uint16_t c;
for (i = 1; i < argc; i++)
{
switch (i)
{
case 1:
r = atoi(argv[i]);
break;
case 2:
g = atoi(argv[i]);
break;
case 3:
b = atoi(argv[i]);
break;
}
}
dev = rt_device_find(devname);
if (!dev)
{
rt_kprintf("lcd: %s not found\n", devname);
return -1;
}
if (rt_device_open(dev, 0) != 0)
{
rt_kprintf("lcd open fail\n");
return -1;
}
result = rt_device_control(dev, RTGRAPHIC_CTRL_GET_INFO, &info);
if (result != RT_EOK)
{
rt_kprintf("get device information failed\n");
return result;
}
c = (uint16_t)(((r >> 3) << 11) | ((g >> 2) << 6) | ((b >> 3)));
drawarea(dev, &info, x, y, 24, 24, c);
lcd_set_color(BLACK, BLUE);
lcd_show_string(0, 40, 16, "hello world");
lcd_show_string(0, 60, 24, "hello world");
lcd_show_string(0, 90, 32, "hello world");
lcd_draw_line(0, 200, 319, 200);
lcd_draw_circle(270, 120, 30);
lcd_set_color(BLACK, RED);
lcd_show_string(0, 130, 32, "after set color");
lcd_draw_line(0, 0, 319, 239);
lcd_draw_rectangle(50, 10, 170, 145);
lcd_draw_circle(160, 120, 50);
rt_device_close(dev);
return 0;
}
MSH_CMD_EXPORT(showcolor, showcolor R G B-- R / G / B : 0 ~255);

View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

View File

@ -119,6 +119,40 @@ if BSP_USING_LCD
config BSP_LCD_DC_PIN config BSP_LCD_DC_PIN
int "DC pin number of 8080 interface" int "DC pin number of 8080 interface"
default 8 default 8
config BSP_LCD_RST_PIN
int "RESET pin number of 8080 interface (-1 for not used)"
default -1
config BSP_LCD_BACKLIGHT_PIN
int "Backlight control pin number (-1 for not used)"
default -1
choice
prompt "backlight active polarity"
default BSP_LCD_BACKLIGHT_ACTIVE_LOW
config BSP_LCD_BACKLIGHT_ACTIVE_LOW
bool "lcd backlight on low level"
config BSP_LCD_BACKLIGHT_ACTIVE_HIGH
bool "lcd_backlight on high level"
endchoice
config BSP_LCD_CLK_FREQ
int "Lcd max clk frequency"
default 15000000
choice
prompt "lcd scan direction"
default BSP_BOARD_K210_OPENMV_TEST
config BSP_BOARD_KD233
bool "board_kd233 lcd scan: DIR_YX_RLUD"
config BSP_BOARD_K210_OPENMV_TEST
bool "board_k210_openmv lcd scan: DIR_YX_LRUD"
config BSP_BOARD_USER
bool "board_user: user defined."
endchoice
config BSP_LCD_X_MAX config BSP_LCD_X_MAX
int "LCD Height" int "LCD Height"
default 240 default 240

View File

@ -9,6 +9,7 @@ heap.c
drv_uart.c drv_uart.c
drv_io_config.c drv_io_config.c
drv_interrupt.c drv_interrupt.c
dmalock.c
''') ''')
CPPPATH = [cwd] CPPPATH = [cwd]
@ -17,6 +18,7 @@ if GetDepend('RT_USING_PIN'):
if GetDepend('BSP_USING_LCD'): if GetDepend('BSP_USING_LCD'):
src += ['drv_lcd.c'] src += ['drv_lcd.c']
src += ['drv_mpylcd.c']
if GetDepend('RT_USING_HWTIMER'): if GetDepend('RT_USING_HWTIMER'):
src += ['drv_hw_timer.c'] src += ['drv_hw_timer.c']

View File

@ -19,6 +19,7 @@
#include "encoding.h" #include "encoding.h"
#include "fpioa.h" #include "fpioa.h"
#include "dmac.h" #include "dmac.h"
#include "dmalock.h"
void init_bss(void) void init_bss(void)
{ {
@ -80,10 +81,13 @@ void rt_hw_board_init(void)
{ {
sysctl_pll_set_freq(SYSCTL_PLL0, 800000000UL); sysctl_pll_set_freq(SYSCTL_PLL0, 800000000UL);
sysctl_pll_set_freq(SYSCTL_PLL1, 400000000UL); sysctl_pll_set_freq(SYSCTL_PLL1, 400000000UL);
sysctl_pll_set_freq(SYSCTL_PLL2, 45158400UL);
sysctl_clock_set_threshold(SYSCTL_THRESHOLD_APB1, 2);
/* Init FPIOA */ /* Init FPIOA */
fpioa_init(); fpioa_init();
/* Dmac init */ /* Dmac init */
dmac_init(); dmac_init();
dmalock_init();
/* initalize interrupt */ /* initalize interrupt */
rt_hw_interrupt_init(); rt_hw_interrupt_init();

View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

90
bsp/k210/driver/dmalock.c Normal file
View File

@ -0,0 +1,90 @@
/* Copyright Canaan Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <rtthread.h>
#include "dmalock.h"
struct dmac_host
{
struct rt_semaphore sem;
struct rt_mutex mutex;
uint8_t channel_used[DMAC_CHANNEL_COUNT];
char *channel_name[DMAC_CHANNEL_COUNT];
};
static struct dmac_host _dmac_host;
void dmalock_init(void)
{
rt_sem_init(&_dmac_host.sem, "dma_sem", DMAC_CHANNEL_COUNT, RT_IPC_FLAG_FIFO);
rt_mutex_init(&_dmac_host.mutex, "dma_mutex", RT_IPC_FLAG_FIFO);
for (int i = 0; i < DMAC_CHANNEL_COUNT; i++)
{
_dmac_host.channel_used[i] = 0;
_dmac_host.channel_name[i] = NULL;
}
}
int _dmalock_sync_take(dmac_channel_number_t *chn, int timeout_ms, const char *name)
{
rt_err_t result;
*chn = DMAC_CHANNEL_MAX;
result = rt_sem_take(&_dmac_host.sem, timeout_ms);
if (result == RT_EOK)
{
rt_mutex_take(&_dmac_host.mutex, RT_WAITING_FOREVER);
for (int i = 0; i < DMAC_CHANNEL_COUNT; i++)
{
if (_dmac_host.channel_used[i] == 0)
{
_dmac_host.channel_used[i] = 1;
_dmac_host.channel_name[i] = name;
*chn = i;
break;
}
}
rt_mutex_release(&_dmac_host.mutex);
}
return result;
}
void dmalock_release(dmac_channel_number_t chn)
{
if (chn >= DMAC_CHANNEL_MAX)
return;
_dmac_host.channel_name[chn] = NULL;
_dmac_host.channel_used[chn] = 0;
rt_sem_release(&_dmac_host.sem);
}
static void dma_ch_info(int argc, char **argv)
{
uint32_t cnt = 0;
for (int i = 0; i < DMAC_CHANNEL_COUNT; i++)
{
if (_dmac_host.channel_used[i] != 0)
{
rt_kprintf("dma_ch%d is using by func [%s]\n", i, _dmac_host.channel_name[i]);
cnt++;
}
}
if(cnt == 0)
rt_kprintf(" no dma_ch is using.\n");
}
MSH_CMD_EXPORT(dma_ch_info, list dma channel informationn.);

14
bsp/k210/driver/dmalock.h Normal file
View File

@ -0,0 +1,14 @@
#ifndef __DMALOCK_H
#define __DMALOCK_H
#include <stdint.h>
#include <rtdef.h>
#include <dmac.h>
#define dmalock_sync_take(x,y) _dmalock_sync_take(x, y, __func__)
void dmalock_init(void);
int _dmalock_sync_take(dmac_channel_number_t *chn, int timeout_ms, const char *name);
void dmalock_release(dmac_channel_number_t chn);
#endif

View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@ -27,12 +27,12 @@
#define FUNC_GPIOHS(n) (FUNC_GPIOHS0 + n) #define FUNC_GPIOHS(n) (FUNC_GPIOHS0 + n)
static int pin_alloc_table[FPIOA_NUM_IO]; static short pin_alloc_table[FPIOA_NUM_IO];
static uint32_t free_pin = 0; static uint32_t free_pin = 0;
static int alloc_pin_channel(rt_base_t pin_index) static int alloc_pin_channel(rt_base_t pin_index)
{ {
if(free_pin == 31) if(free_pin == 32)
{ {
LOG_E("no free gpiohs channel to alloc"); LOG_E("no free gpiohs channel to alloc");
return -1; return -1;
@ -51,7 +51,7 @@ static int alloc_pin_channel(rt_base_t pin_index)
return pin_alloc_table[pin_index]; return pin_alloc_table[pin_index];
} }
static int get_pin_channel(rt_base_t pin_index) int get_pin_channel(rt_base_t pin_index)
{ {
return pin_alloc_table[pin_index]; return pin_alloc_table[pin_index];
} }
@ -125,7 +125,7 @@ static int drv_pin_read(struct rt_device *device, rt_base_t pin)
static struct static struct
{ {
void (*hdr)(void *args); void (*hdr)(void *args);
void *args; void* args;
gpio_pin_edge_t edge; gpio_pin_edge_t edge;
} irq_table[32]; } irq_table[32];
@ -251,14 +251,13 @@ const static struct rt_pin_ops drv_pin_ops =
drv_pin_attach_irq, drv_pin_attach_irq,
drv_pin_detach_irq, drv_pin_detach_irq,
drv_pin_irq_enable, drv_pin_irq_enable
RT_NULL,
}; };
int rt_hw_pin_init(void) int rt_hw_pin_init(void)
{ {
rt_err_t ret = RT_EOK; rt_err_t ret = RT_EOK;
memset(pin_alloc_table, -1, sizeof pin_alloc_table); memset(pin_alloc_table, 0xff, sizeof pin_alloc_table);
free_pin = GPIO_ALLOC_START; free_pin = GPIO_ALLOC_START;
ret = rt_device_pin_register("pin", &drv_pin_ops, RT_NULL); ret = rt_device_pin_register("pin", &drv_pin_ops, RT_NULL);

View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@ -28,6 +28,12 @@ static struct io_config
IOCONFIG(BSP_LCD_CS_PIN, FUNC_SPI0_SS0), /* LCD CS PIN */ IOCONFIG(BSP_LCD_CS_PIN, FUNC_SPI0_SS0), /* LCD CS PIN */
IOCONFIG(BSP_LCD_WR_PIN, FUNC_SPI0_SCLK), /* LCD WR PIN */ IOCONFIG(BSP_LCD_WR_PIN, FUNC_SPI0_SCLK), /* LCD WR PIN */
IOCONFIG(BSP_LCD_DC_PIN, HS_GPIO(LCD_DC_PIN)), /* LCD DC PIN */ IOCONFIG(BSP_LCD_DC_PIN, HS_GPIO(LCD_DC_PIN)), /* LCD DC PIN */
#if BSP_LCD_RST_PIN >= 0
IOCONFIG(BSP_LCD_RST_PIN, HS_GPIO(LCD_RST_PIN)), /* LCD RESET PIN */
#endif
#if BSP_LCD_BACKLIGHT_PIN >= 0
IOCONFIG(BSP_LCD_BACKLIGHT_PIN, HS_GPIO(LCD_BACKLIGHT_PIN)), /* LCD BACKLIGHT PIN */
#endif
#endif #endif
#ifdef BSP_USING_CAMERA #ifdef BSP_USING_CAMERA

View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@ -11,10 +11,18 @@
#ifndef __DRV_IO_CONFIG_H__ #ifndef __DRV_IO_CONFIG_H__
#define __DRV_IO_CONFIG_H__ #define __DRV_IO_CONFIG_H__
#include <rtconfig.h>
enum HS_GPIO_CONFIG enum HS_GPIO_CONFIG
{ {
#ifdef BSP_USING_LCD #ifdef BSP_USING_LCD
LCD_DC_PIN = 0, /* LCD DC PIN */ LCD_DC_PIN = 0, /* LCD DC PIN */
#if BSP_LCD_RST_PIN >= 0
LCD_RST_PIN,
#endif
#if BSP_LCD_BACKLIGHT_PIN >= 0
LCD_BACKLIGHT_PIN,
#endif
#endif #endif
#ifdef BSP_SPI1_USING_SS0 #ifdef BSP_SPI1_USING_SS0
SPI1_CS0_PIN, SPI1_CS0_PIN,
@ -28,6 +36,11 @@ enum HS_GPIO_CONFIG
#ifdef BSP_SPI1_USING_SS3 #ifdef BSP_SPI1_USING_SS3
SPI1_CS3_PIN, SPI1_CS3_PIN,
#endif #endif
#ifdef BSP_USING_BRIDGE
SPI2_INT_PIN,
SPI2_READY_PIN,
#endif
GPIO_ALLOC_START /* index of gpio driver start */ GPIO_ALLOC_START /* index of gpio driver start */
}; };

View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@ -20,6 +20,8 @@
#include <spi.h> #include <spi.h>
#include <drv_io_config.h> #include <drv_io_config.h>
#include <rthw.h> #include <rthw.h>
#include "dmalock.h"
#include "sleep.h"
#define DBG_TAG "LCD" #define DBG_TAG "LCD"
#define DBG_LVL DBG_WARNING #define DBG_LVL DBG_WARNING
@ -102,23 +104,18 @@
#define DIGITAL_GAMMA_CTL2 0xE3 #define DIGITAL_GAMMA_CTL2 0xE3
#define INTERFACE_CTL 0xF6 #define INTERFACE_CTL 0xF6
typedef enum _lcd_dir
{
DIR_XY_RLUD = 0x00,
DIR_YX_RLUD = 0x20,
DIR_XY_LRUD = 0x40,
DIR_YX_LRUD = 0x60,
DIR_XY_RLDU = 0x80,
DIR_YX_RLDU = 0xA0,
DIR_XY_LRDU = 0xC0,
DIR_YX_LRDU = 0xE0,
DIR_XY_MASK = 0x20,
DIR_MASK = 0xE0,
} lcd_dir_t;
#define LCD_SPI_CHANNEL SPI_DEVICE_0 #define LCD_SPI_CHANNEL SPI_DEVICE_0
#define LCD_SPI_CHIP_SELECT SPI_CHIP_SELECT_0 #define LCD_SPI_CHIP_SELECT SPI_CHIP_SELECT_0
#if defined(BSP_BOARD_K210_OPENMV_TEST)
#define LCD_SCAN_DIR DIR_YX_LRUD
#elif defined(BSP_BOARD_KD233)
#define LCD_SCAN_DIR (DIR_YX_RLUD | 0x08)
#elif defined(BSP_BOARD_USER)
/*user define.*/
#define LCD_SCAN_DIR DIR_YX_RLUD
#endif
typedef struct lcd_8080_device typedef struct lcd_8080_device
{ {
struct rt_device parent; struct rt_device parent;
@ -126,9 +123,17 @@ typedef struct lcd_8080_device
int spi_channel; int spi_channel;
int cs; int cs;
int dc_pin; int dc_pin;
#if BSP_LCD_RST_PIN >= 0
int rst_pin;
#endif
#if BSP_LCD_BACKLIGHT_PIN >= 0
int backlight_pin;
#endif
int dma_channel; int dma_channel;
} * lcd_8080_device_t; } * lcd_8080_device_t;
static struct lcd_8080_device _lcddev;
static void drv_lcd_cmd(lcd_8080_device_t lcd, rt_uint8_t cmd) static void drv_lcd_cmd(lcd_8080_device_t lcd, rt_uint8_t cmd)
{ {
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_LOW); gpiohs_set_pin(lcd->dc_pin, GPIO_PV_LOW);
@ -167,17 +172,36 @@ static void drv_lcd_data_word(lcd_8080_device_t lcd, rt_uint32_t *data_buf, rt_u
static void drv_lcd_hw_init(lcd_8080_device_t lcd) static void drv_lcd_hw_init(lcd_8080_device_t lcd)
{ {
#if BSP_LCD_RST_PIN >= 0
{
gpiohs_set_drive_mode(lcd->rst_pin, GPIO_DM_OUTPUT);
gpiohs_set_pin(lcd->rst_pin, GPIO_PV_LOW);
msleep(20);
gpiohs_set_pin(lcd->rst_pin, GPIO_PV_HIGH);
msleep(20);
}
#endif
#if BSP_LCD_BACKLIGHT_PIN >= 0
{
gpiohs_set_drive_mode(lcd->backlight_pin, GPIO_DM_OUTPUT);
#if defined(BSP_LCD_BACKLIGHT_ACTIVE_LOW)
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
#elif defined(BSP_LCD_BACKLIGHT_ACTIVE_HIGH)
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH);
#else
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
#endif
}
#endif
gpiohs_set_drive_mode(lcd->dc_pin, GPIO_DM_OUTPUT); gpiohs_set_drive_mode(lcd->dc_pin, GPIO_DM_OUTPUT);
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH); gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0); spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
spi_set_clk_rate(lcd->spi_channel, 25000000); spi_set_clk_rate(lcd->spi_channel, BSP_LCD_CLK_FREQ);
} }
static void drv_lcd_set_direction(lcd_8080_device_t lcd, lcd_dir_t dir) static void drv_lcd_set_direction(lcd_8080_device_t lcd, lcd_dir_t dir)
{ {
#if !BOARD_LICHEEDAN
dir |= 0x08;
#endif
if (dir & DIR_XY_MASK) if (dir & DIR_XY_MASK)
{ {
lcd->lcd_info.width = BSP_LCD_Y_MAX; lcd->lcd_info.width = BSP_LCD_Y_MAX;
@ -345,14 +369,14 @@ static void drv_lcd_rect_update(lcd_8080_device_t lcd, uint16_t x1, uint16_t y1,
if(x1 == 0 && y1 == 0 && width == lcd->lcd_info.width && height == lcd->lcd_info.height) if(x1 == 0 && y1 == 0 && width == lcd->lcd_info.width && height == lcd->lcd_info.height)
{ {
drv_lcd_set_area(lcd, x1, y1, x1 + width - 1, y1 + height - 1); drv_lcd_set_area(lcd, x1, y1, x1 + width - 1, y1 + height - 1);
drv_lcd_data_word(lcd, (rt_uint32_t *)lcd->lcd_info.framebuffer, width * height / (lcd->lcd_info.bits_per_pixel / 8)); drv_lcd_data_half_word(lcd, (rt_uint32_t *)lcd->lcd_info.framebuffer, width * height);
} }
else else
{ {
rt_bitblt(rect_buffer, width, height, 0, 0, width, height, rt_bitblt(rect_buffer, width, height, 0, 0, width, height,
(rt_uint16_t *)lcd->lcd_info.framebuffer, lcd->lcd_info.width, lcd->lcd_info.height, x1, y1); (rt_uint16_t *)lcd->lcd_info.framebuffer, lcd->lcd_info.width, lcd->lcd_info.height, x1, y1);
drv_lcd_set_area(lcd, x1, y1, x1 + width - 1, y1 + height - 1); drv_lcd_set_area(lcd, x1, y1, x1 + width - 1, y1 + height - 1);
drv_lcd_data_word(lcd, (rt_uint32_t *)rect_buffer, width * height / 2); drv_lcd_data_half_word(lcd, (rt_uint16_t *)rect_buffer, width * height);
} }
} }
@ -381,16 +405,20 @@ static rt_err_t drv_lcd_init(rt_device_t dev)
drv_lcd_data_byte(lcd, &data, 1); drv_lcd_data_byte(lcd, &data, 1);
/* set direction */ /* set direction */
drv_lcd_set_direction(lcd, DIR_YX_RLUD); drv_lcd_set_direction(lcd, LCD_SCAN_DIR);
lcd->lcd_info.framebuffer = rt_malloc_align(lcd->lcd_info.height * lcd->lcd_info.width * (lcd->lcd_info.bits_per_pixel / 8), 64); lcd->lcd_info.framebuffer = rt_malloc_align(lcd->lcd_info.height * lcd->lcd_info.width * (lcd->lcd_info.bits_per_pixel / 8), 64);
RT_ASSERT(lcd->lcd_info.framebuffer); RT_ASSERT(lcd->lcd_info.framebuffer);
uint16_t *framebuffer = (uint16_t *)(lcd->lcd_info.framebuffer);
for(uint32_t i=0; i<(lcd->lcd_info.height * lcd->lcd_info.width * (lcd->lcd_info.bits_per_pixel / 8))/2; i++) {
framebuffer[i] = BLACK;
}
/*display on*/ /*display on*/
drv_lcd_cmd(lcd, DISPALY_ON); drv_lcd_cmd(lcd, DISPALY_ON);
/* set to black */ /* set to black */
drv_lcd_clear(lcd, 0x0000); drv_lcd_clear(lcd, BLACK);
return ret; return ret;
} }
@ -446,15 +474,27 @@ static rt_err_t drv_lcd_control(rt_device_t dev, int cmd, void *args)
drv_lcd_rect_update(lcd, rect_info->x, rect_info->y, rect_info->width, rect_info->height); drv_lcd_rect_update(lcd, rect_info->x, rect_info->y, rect_info->width, rect_info->height);
break; break;
#if BSP_LCD_BACKLIGHT_PIN >= 0
case RTGRAPHIC_CTRL_POWERON: case RTGRAPHIC_CTRL_POWERON:
/* Todo: power on */ #if defined(BSP_LCD_BACKLIGHT_ACTIVE_LOW)
ret = -RT_ENOSYS; gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
#elif defined(BSP_LCD_BACKLIGHT_ACTIVE_HIGH)
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH);
#else
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
#endif
break; break;
case RTGRAPHIC_CTRL_POWEROFF: case RTGRAPHIC_CTRL_POWEROFF:
/* Todo: power off */ #if defined(BSP_LCD_BACKLIGHT_ACTIVE_LOW)
ret = -RT_ENOSYS; gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH);
#elif defined(BSP_LCD_BACKLIGHT_ACTIVE_HIGH)
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
#else
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH);
#endif
break; break;
#endif /* BSP_LCD_BACKLIGHT_PIN >= 0 */
case RTGRAPHIC_CTRL_GET_INFO: case RTGRAPHIC_CTRL_GET_INFO:
*(struct rt_device_graphic_info *)args = lcd->lcd_info; *(struct rt_device_graphic_info *)args = lcd->lcd_info;
@ -490,15 +530,17 @@ const static struct rt_device_ops drv_lcd_ops =
int rt_hw_lcd_init(void) int rt_hw_lcd_init(void)
{ {
rt_err_t ret = RT_EOK; rt_err_t ret = RT_EOK;
lcd_8080_device_t lcd_dev = (lcd_8080_device_t)rt_malloc(sizeof(struct lcd_8080_device)); lcd_8080_device_t lcd_dev = &_lcddev;
if(!lcd_dev)
{
return -1;
}
lcd_dev->cs = SPI_CHIP_SELECT_0; lcd_dev->cs = SPI_CHIP_SELECT_0;
lcd_dev->dc_pin = LCD_DC_PIN; lcd_dev->dc_pin = LCD_DC_PIN;
lcd_dev->dma_channel = DMAC_CHANNEL0; #if BSP_LCD_RST_PIN >= 0
lcd_dev->rst_pin = LCD_RST_PIN;
#endif
#if BSP_LCD_BACKLIGHT_PIN >= 0
lcd_dev->backlight_pin = LCD_BACKLIGHT_PIN;
#endif
dmalock_sync_take(&lcd_dev->dma_channel, RT_WAITING_FOREVER);
lcd_dev->spi_channel = SPI_DEVICE_0; lcd_dev->spi_channel = SPI_DEVICE_0;
lcd_dev->lcd_info.bits_per_pixel = 16; lcd_dev->lcd_info.bits_per_pixel = 16;
lcd_dev->lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565; lcd_dev->lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565;
@ -526,4 +568,9 @@ int rt_hw_lcd_init(void)
} }
INIT_DEVICE_EXPORT(rt_hw_lcd_init); INIT_DEVICE_EXPORT(rt_hw_lcd_init);
void lcd_set_direction(lcd_dir_t dir)
{
drv_lcd_set_direction(&_lcddev, dir);
}
#endif #endif

View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@ -12,4 +12,53 @@
#define DRV_LCD_H__ #define DRV_LCD_H__
int rt_hw_lcd_init(void); int rt_hw_lcd_init(void);
//POINT_COLOR
#define WHITE 0xFFFF
#define BLACK 0x0000
#define BLUE 0x001F
#define BRED 0XF81F
#define GRED 0XFFE0
#define GBLUE 0X07FF
#define RED 0xF800
#define MAGENTA 0xF81F
#define GREEN 0x07E0
#define CYAN 0x7FFF
#define YELLOW 0xFFE0
#define BROWN 0XBC40
#define BRRED 0XFC07
#define GRAY 0X8430
#define GRAY175 0XAD75
#define GRAY151 0X94B2
#define GRAY187 0XBDD7
#define GRAY240 0XF79E
typedef enum _lcd_dir
{
DIR_XY_RLUD = 0x00,
DIR_YX_RLUD = 0x20,
DIR_XY_LRUD = 0x40,
DIR_YX_LRUD = 0x60,
DIR_XY_RLDU = 0x80,
DIR_YX_RLDU = 0xA0,
DIR_XY_LRDU = 0xC0,
DIR_YX_LRDU = 0xE0,
DIR_XY_MASK = 0x20,
DIR_MASK = 0xE0,
} lcd_dir_t;
/* for mpy machine.lcd */
void lcd_display_on(void);
void lcd_display_off(void);
void lcd_clear(int color);
void lcd_draw_point_color(int x, int y, int color);
void lcd_show_string(int x, int y, int size, const char *data);
void lcd_draw_line(int x1, int y1, int x2, int y2);
void lcd_draw_rectangle(int x1, int y1, int x2, int y2);
void lcd_draw_circle(int x1, int y1, int r);
void lcd_set_color(int back, int fore);
void lcd_show_image(int x, int y, int length, int wide, const unsigned char *buf);
void lcd_set_direction(lcd_dir_t dir);
#endif #endif

1278
bsp/k210/driver/drv_mpylcd.c Normal file

File diff suppressed because it is too large Load Diff

View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@ -15,7 +15,7 @@
#include "drv_spi.h" #include "drv_spi.h"
#include <drv_io_config.h> #include <drv_io_config.h>
#include <spi.h> #include <spi.h>
#include <dmac.h> #include "dmalock.h"
#include <sysctl.h> #include <sysctl.h>
#include <gpiohs.h> #include <gpiohs.h>
#include <string.h> #include <string.h>
@ -31,6 +31,7 @@ struct drv_spi_bus
spi_device_num_t spi_instance; spi_device_num_t spi_instance;
dmac_channel_number_t dma_send_channel; dmac_channel_number_t dma_send_channel;
dmac_channel_number_t dma_recv_channel; dmac_channel_number_t dma_recv_channel;
struct rt_completion dma_completion;
}; };
struct drv_cs struct drv_cs
@ -89,6 +90,14 @@ void __spi_set_tmod(uint8_t spi_num, uint32_t tmod)
} }
set_bit(&spi_handle->ctrlr0, 3 << tmod_offset, tmod << tmod_offset); set_bit(&spi_handle->ctrlr0, 3 << tmod_offset, tmod << tmod_offset);
} }
int dma_irq_callback(void *ctx)
{
struct rt_completion * cmp = ctx;
if(cmp)
{
rt_completion_done(cmp);
}
}
static rt_uint32_t drv_spi_xfer(struct rt_spi_device *device, struct rt_spi_message *message) static rt_uint32_t drv_spi_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
{ {
@ -99,8 +108,10 @@ static rt_uint32_t drv_spi_xfer(struct rt_spi_device *device, struct rt_spi_mess
uint32_t * rx_buff = RT_NULL; uint32_t * rx_buff = RT_NULL;
int i; int i;
rt_ubase_t dummy = 0xFFFFFFFFU; rt_ubase_t dummy = 0xFFFFFFFFU;
if(cfg->data_width != 8)
__spi_set_tmod(bus->spi_instance, SPI_TMOD_TRANS_RECV); {
return 0;
}
RT_ASSERT(bus != RT_NULL); RT_ASSERT(bus != RT_NULL);
@ -110,37 +121,25 @@ static rt_uint32_t drv_spi_xfer(struct rt_spi_device *device, struct rt_spi_mess
} }
if(message->length) if(message->length)
{ {
spi_instance[bus->spi_instance]->dmacr = 0x3; bus->dma_send_channel = DMAC_CHANNEL_MAX;
spi_instance[bus->spi_instance]->ssienr = 0x01; bus->dma_recv_channel = DMAC_CHANNEL_MAX;
sysctl_dma_select(bus->dma_send_channel, SYSCTL_DMA_SELECT_SSI0_TX_REQ + bus->spi_instance * 2); rt_completion_init(&bus->dma_completion);
if(message->recv_buf)
{
dmalock_sync_take(&bus->dma_recv_channel, RT_WAITING_FOREVER);
sysctl_dma_select(bus->dma_recv_channel, SYSCTL_DMA_SELECT_SSI0_RX_REQ + bus->spi_instance * 2); sysctl_dma_select(bus->dma_recv_channel, SYSCTL_DMA_SELECT_SSI0_RX_REQ + bus->spi_instance * 2);
if(!message->recv_buf)
{
dmac_set_single_mode(bus->dma_recv_channel, (void *)(&spi_instance[bus->spi_instance]->dr[0]), &dummy, DMAC_ADDR_NOCHANGE, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, message->length);
}
else
{
rx_buff = rt_calloc(message->length * 4, 1); rx_buff = rt_calloc(message->length * 4, 1);
if(!rx_buff) if(!rx_buff)
{ {
goto transfer_done; goto transfer_done;
} }
dmac_set_single_mode(bus->dma_recv_channel, (void *)(&spi_instance[bus->spi_instance]->dr[0]), rx_buff, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, message->length);
} }
if(message->send_buf)
if(!message->send_buf)
{
dmac_set_single_mode(bus->dma_send_channel, &dummy, (void *)(&spi_instance[bus->spi_instance]->dr[0]), DMAC_ADDR_NOCHANGE, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, message->length);
}
else
{ {
dmalock_sync_take(&bus->dma_send_channel, RT_WAITING_FOREVER);
sysctl_dma_select(bus->dma_send_channel, SYSCTL_DMA_SELECT_SSI0_TX_REQ + bus->spi_instance * 2);
tx_buff = rt_malloc(message->length * 4); tx_buff = rt_malloc(message->length * 4);
if(!tx_buff) if(!tx_buff)
{ {
@ -150,13 +149,54 @@ static rt_uint32_t drv_spi_xfer(struct rt_spi_device *device, struct rt_spi_mess
{ {
tx_buff[i] = ((uint8_t *)message->send_buf)[i]; tx_buff[i] = ((uint8_t *)message->send_buf)[i];
} }
}
if(message->send_buf && message->recv_buf)
{
dmac_irq_register(bus->dma_recv_channel, dma_irq_callback, &bus->dma_completion, 1);
__spi_set_tmod(bus->spi_instance, SPI_TMOD_TRANS_RECV);
spi_instance[bus->spi_instance]->dmacr = 0x3;
spi_instance[bus->spi_instance]->ssienr = 0x01;
dmac_set_single_mode(bus->dma_recv_channel, (void *)(&spi_instance[bus->spi_instance]->dr[0]), rx_buff, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, message->length);
dmac_set_single_mode(bus->dma_send_channel, tx_buff, (void *)(&spi_instance[bus->spi_instance]->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE, dmac_set_single_mode(bus->dma_send_channel, tx_buff, (void *)(&spi_instance[bus->spi_instance]->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, message->length); DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, message->length);
} }
else if(message->send_buf)
{
dmac_irq_register(bus->dma_send_channel, dma_irq_callback, &bus->dma_completion, 1);
__spi_set_tmod(bus->spi_instance, SPI_TMOD_TRANS);
spi_instance[bus->spi_instance]->dmacr = 0x2;
spi_instance[bus->spi_instance]->ssienr = 0x01;
dmac_set_single_mode(bus->dma_send_channel, tx_buff, (void *)(&spi_instance[bus->spi_instance]->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, message->length);
}
else if(message->recv_buf)
{
dmac_irq_register(bus->dma_recv_channel, dma_irq_callback, &bus->dma_completion, 1);
__spi_set_tmod(bus->spi_instance, SPI_TMOD_RECV);
spi_instance[bus->spi_instance]->ctrlr1 = message->length - 1;
spi_instance[bus->spi_instance]->dmacr = 0x1;
spi_instance[bus->spi_instance]->ssienr = 0x01;
spi_instance[bus->spi_instance]->dr[0] = 0xFF;
dmac_set_single_mode(bus->dma_recv_channel, (void *)(&spi_instance[bus->spi_instance]->dr[0]), rx_buff, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, message->length);
}
else
{
goto transfer_done;
}
spi_instance[bus->spi_instance]->ser = 1U << cs->cs_index; spi_instance[bus->spi_instance]->ser = 1U << cs->cs_index;
dmac_wait_done(bus->dma_send_channel);
dmac_wait_done(bus->dma_recv_channel); rt_completion_wait(&bus->dma_completion, RT_WAITING_FOREVER);
if(message->recv_buf)
dmac_irq_unregister(bus->dma_recv_channel);
else
dmac_irq_unregister(bus->dma_send_channel);
// wait until all data has been transmitted
while ((spi_instance[bus->spi_instance]->sr & 0x05) != 0x04)
;
spi_instance[bus->spi_instance]->ser = 0x00; spi_instance[bus->spi_instance]->ser = 0x00;
spi_instance[bus->spi_instance]->ssienr = 0x00; spi_instance[bus->spi_instance]->ssienr = 0x00;
@ -169,6 +209,8 @@ static rt_uint32_t drv_spi_xfer(struct rt_spi_device *device, struct rt_spi_mess
} }
transfer_done: transfer_done:
dmalock_release(bus->dma_send_channel);
dmalock_release(bus->dma_recv_channel);
if(tx_buff) if(tx_buff)
{ {
rt_free(tx_buff); rt_free(tx_buff);
@ -201,8 +243,6 @@ int rt_hw_spi_init(void)
{ {
static struct drv_spi_bus spi_bus1; static struct drv_spi_bus spi_bus1;
spi_bus1.spi_instance = SPI_DEVICE_1; spi_bus1.spi_instance = SPI_DEVICE_1;
spi_bus1.dma_send_channel = DMAC_CHANNEL1;
spi_bus1.dma_recv_channel = DMAC_CHANNEL2;
ret = rt_spi_bus_register(&spi_bus1.parent, "spi1", &drv_spi_ops); ret = rt_spi_bus_register(&spi_bus1.parent, "spi1", &drv_spi_ops);
#ifdef BSP_SPI1_USING_SS0 #ifdef BSP_SPI1_USING_SS0

View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2018, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

View File

@ -18,6 +18,10 @@
#define RT_USING_IDLE_HOOK #define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4 #define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 4096 #define IDLE_THREAD_STACK_SIZE 4096
#define SYSTEM_THREAD_STACK_SIZE 4096
/* kservice optimization */
#define RT_DEBUG #define RT_DEBUG
#define RT_DEBUG_COLOR #define RT_DEBUG_COLOR
#define RT_DEBUG_INIT_CONFIG #define RT_DEBUG_INIT_CONFIG
@ -45,7 +49,7 @@
#define RT_USING_CONSOLE #define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uarths" #define RT_CONSOLE_DEVICE_NAME "uarths"
#define RT_VER_NUM 0x40003 #define RT_VER_NUM 0x40004
#define ARCH_CPU_64BIT #define ARCH_CPU_64BIT
#define ARCH_RISCV #define ARCH_RISCV
#define ARCH_RISCV_FPU #define ARCH_RISCV_FPU
@ -61,21 +65,22 @@
/* C++ features */ /* C++ features */
#define RT_USING_CPLUSPLUS
/* Command shell */ /* Command shell */
#define RT_USING_FINSH #define RT_USING_FINSH
#define RT_USING_MSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell" #define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 16384
#define FINSH_USING_HISTORY #define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5 #define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB #define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 16384
#define FINSH_CMD_SIZE 80 #define FINSH_CMD_SIZE 80
#define FINSH_USING_MSH #define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_MSH_DEFAULT #define FINSH_USING_DESCRIPTION
#define FINSH_USING_MSH_ONLY
#define FINSH_ARG_MAX 10 #define FINSH_ARG_MAX 10
/* Device virtual file system */ /* Device virtual file system */
@ -93,10 +98,13 @@
#define RT_DFS_ELM_WORD_ACCESS #define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3 #define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3 #define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_LFN_UNICODE_0
#define RT_DFS_ELM_LFN_UNICODE 0
#define RT_DFS_ELM_MAX_LFN 255 #define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 2 #define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096 #define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
#define RT_DFS_ELM_REENTRANT #define RT_DFS_ELM_REENTRANT
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
#define RT_USING_DFS_DEVFS #define RT_USING_DFS_DEVFS
/* Device Drivers */ /* Device Drivers */
@ -104,6 +112,7 @@
#define RT_USING_DEVICE_IPC #define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 512 #define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL #define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA #define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64 #define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN #define RT_USING_PIN
@ -122,6 +131,8 @@
#define RT_USING_LIBC #define RT_USING_LIBC
#define RT_USING_POSIX #define RT_USING_POSIX
#define RT_LIBC_USING_TIME
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* Network */ /* Network */
@ -156,6 +167,9 @@
#define ULOG_OUTPUT_TAG #define ULOG_OUTPUT_TAG
#define ULOG_BACKEND_USING_CONSOLE #define ULOG_BACKEND_USING_CONSOLE
/* RT-Thread Utestcases */
/* RT-Thread online packages */ /* RT-Thread online packages */
/* IoT - internet of things */ /* IoT - internet of things */
@ -181,23 +195,39 @@
/* multimedia packages */ /* multimedia packages */
/* lvgl: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* tools packages */ /* tools packages */
/* system packages */ /* system packages */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* Micrium: Micrium software products porting for RT-Thread */
/* peripheral libraries and drivers */ /* peripheral libraries and drivers */
#define PKG_USING_KENDRYTE_SDK #define PKG_USING_KENDRYTE_SDK
#define PKG_USING_KENDRYTE_SDK_V055 #define PKG_USING_KENDRYTE_SDK_V057
#define PKG_KENDRYTE_SDK_VERNUM 0x0055 #define PKG_KENDRYTE_SDK_VERNUM 0x0057
/* AI packages */
/* miscellaneous packages */ /* miscellaneous packages */
/* samples: kernel and components samples */ /* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
#define BOARD_K210_EVB #define BOARD_K210_EVB
#define BSP_USING_UART_HS #define BSP_USING_UART_HS
@ -216,17 +246,13 @@
#define BSP_LCD_CS_PIN 36 #define BSP_LCD_CS_PIN 36
#define BSP_LCD_WR_PIN 39 #define BSP_LCD_WR_PIN 39
#define BSP_LCD_DC_PIN 38 #define BSP_LCD_DC_PIN 38
#define BSP_LCD_RST_PIN 37
#define BSP_LCD_BACKLIGHT_PIN -1
#define BSP_LCD_BACKLIGHT_ACTIVE_LOW
#define BSP_LCD_CLK_FREQ 15000000
#define BSP_BOARD_K210_OPENMV_TEST
#define BSP_LCD_X_MAX 240 #define BSP_LCD_X_MAX 240
#define BSP_LCD_Y_MAX 320 #define BSP_LCD_Y_MAX 320
#define BSP_USING_CAMERA
#define BSP_CAMERA_SCCB_SDA_PIN 9
#define BSP_CAMERA_SCCB_SCLK_PIN 10
#define BSP_CAMERA_CMOS_RST_PIN 11
#define BSP_CAMERA_CMOS_VSYNC_PIN 12
#define BSP_CAMERA_CMOS_PWDN_PIN 13
#define BSP_CAMERA_CMOS_XCLK_PIN 14
#define BSP_CAMERA_CMOS_PCLK_PIN 15
#define BSP_CAMERA_CMOS_HREF_PIN 17
#define __STACKSIZE__ 4096 #define __STACKSIZE__ 4096
#endif #endif