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[bsp][stm32][artpi]:fix artpi nano (#10122)

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CYFS 2025-03-18 22:55:13 +08:00 committed by GitHub
parent bf60f31526
commit b0e7cba9fd
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GPG Key ID: B5690EEEBB952194
3 changed files with 9 additions and 5 deletions
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7
bsp/stm32/stm32h750-artpi/.ci/attachconfig/ci.attachconfig.yml
View File

@ -1,7 +1,12 @@
scons.args: &scons
scons_arg:
- '--strict'
# ------ nano CI ------
nano:
<<: *scons
kconfig:
- CONFIG_RT_USING_NANO=y
# ------ peripheral CI ------
peripheral.eth:
kconfig:

1
bsp/stm32/stm32h750-artpi/applications/main.c
View File

@ -9,7 +9,6 @@
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <board.h>
/* defined the LED0 pin: PI8 */

6
libcpu/arm/cortex-m7/cpu_cache.c
View File

@ -76,15 +76,15 @@ void rt_hw_cpu_dcache_ops(int ops, void* addr, int size)
if ((ops & clean_invalid) == clean_invalid)
{
SCB_CleanInvalidateDCache_by_Addr((rt_uint32_t *)startAddr, size_byte);
SCB_CleanInvalidateDCache_by_Addr((void *)startAddr, size_byte);
}
else if (ops & RT_HW_CACHE_FLUSH)
{
SCB_CleanDCache_by_Addr((rt_uint32_t *)startAddr, size_byte);
SCB_CleanDCache_by_Addr((void *)startAddr, size_byte);
}
else if (ops & RT_HW_CACHE_INVALIDATE)
{
SCB_InvalidateDCache_by_Addr((rt_uint32_t *)startAddr, size_byte);
SCB_InvalidateDCache_by_Addr((void *)startAddr, size_byte);
}
else
{