diff --git a/bsp/lpc408x/.config b/bsp/lpc408x/.config
index 6cc0eb3a01..7ffb5f8906 100644
--- a/bsp/lpc408x/.config
+++ b/bsp/lpc408x/.config
@@ -57,7 +57,6 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
#
# Memory Management
#
-CONFIG_RT_PAGE_MAX_ORDER=11
CONFIG_RT_USING_MEMPOOL=y
# CONFIG_RT_USING_SMALL_MEM is not set
# CONFIG_RT_USING_SLAB is not set
@@ -84,7 +83,7 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
-CONFIG_RT_VER_NUM=0x50000
+CONFIG_RT_VER_NUM=0x50001
# CONFIG_RT_USING_STDC_ATOMIC is not set
# CONFIG_RT_USING_CACHE is not set
CONFIG_RT_USING_HW_ATOMIC=y
@@ -118,13 +117,19 @@ CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_ARG_MAX=10
+
+#
+# DFS: device virtual file system
+#
CONFIG_RT_USING_DFS=y
CONFIG_DFS_USING_POSIX=y
CONFIG_DFS_USING_WORKDIR=y
+# CONFIG_RT_USING_DFS_MNTTABLE is not set
+CONFIG_DFS_FD_MAX=16
+CONFIG_RT_USING_DFS_V1=y
+# CONFIG_RT_USING_DFS_V2 is not set
CONFIG_DFS_FILESYSTEMS_MAX=2
CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
-CONFIG_DFS_FD_MAX=16
-# CONFIG_RT_USING_DFS_MNTTABLE is not set
CONFIG_RT_USING_DFS_ELMFAT=y
#
@@ -474,6 +479,7 @@ CONFIG_RT_USING_POSIX_DELAY=y
# CONFIG_PKG_USING_HASH_MATCH is not set
# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
# CONFIG_PKG_USING_VOFA_PLUS is not set
+# CONFIG_PKG_USING_RT_TRACE is not set
#
# system packages
@@ -545,6 +551,7 @@ CONFIG_RT_USING_POSIX_DELAY=y
# CONFIG_PKG_USING_QPC is not set
# CONFIG_PKG_USING_AGILE_UPGRADE is not set
# CONFIG_PKG_USING_FLASH_BLOB is not set
+# CONFIG_PKG_USING_MLIBC is not set
#
# peripheral libraries and drivers
@@ -629,6 +636,7 @@ CONFIG_RT_USING_POSIX_DELAY=y
# CONFIG_PKG_USING_FT5426 is not set
# CONFIG_PKG_USING_FT6236 is not set
# CONFIG_PKG_USING_XPT2046_TOUCH is not set
+# CONFIG_PKG_USING_CST816X is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ESP_IDF is not set
@@ -641,7 +649,6 @@ CONFIG_RT_USING_POSIX_DELAY=y
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
-# CONFIG_PKG_USING_WM_LIBRARIES is not set
#
# Kendryte SDK
@@ -699,14 +706,15 @@ CONFIG_RT_USING_POSIX_DELAY=y
# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
-# CONFIG_PKG_USING_BL_MCU_SDK is not set
# CONFIG_PKG_USING_SOFT_SERIAL is not set
# CONFIG_PKG_USING_MB85RS16 is not set
# CONFIG_PKG_USING_RFM300 is not set
# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
# CONFIG_PKG_USING_LRF_NV7LIDAR is not set
+# CONFIG_PKG_USING_AIP650 is not set
# CONFIG_PKG_USING_FINGERPRINT is not set
+# CONFIG_PKG_USING_SPI_TOOLS is not set
#
# AI packages
@@ -725,7 +733,10 @@ CONFIG_RT_USING_POSIX_DELAY=y
# Signal Processing and Control Algorithm Packages
#
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
+# CONFIG_PKG_USING_QPID is not set
# CONFIG_PKG_USING_UKAL is not set
+# CONFIG_PKG_USING_DIGITALCTRL is not set
+# CONFIG_PKG_USING_KISSFFT is not set
#
# miscellaneous packages
@@ -772,7 +783,6 @@ CONFIG_RT_USING_POSIX_DELAY=y
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
-# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
# CONFIG_PKG_USING_HELLO is not set
@@ -799,6 +809,7 @@ CONFIG_RT_USING_POSIX_DELAY=y
#
# Projects
#
+# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
@@ -945,14 +956,20 @@ CONFIG_RT_USING_POSIX_DELAY=y
#
# Display
#
+# CONFIG_PKG_USING_ARDUINO_TFT_ESPI is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set
# CONFIG_PKG_USING_ARDUINO_U8G2 is not set
# CONFIG_PKG_USING_ARDUINO_U8GLIB_ARDUINO is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
# CONFIG_PKG_USING_SEEED_TM1637 is not set
#
# Timing
#
# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
+# CONFIG_PKG_USING_ARDUINO_TICKER is not set
+# CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
#
# Data Processing
diff --git a/bsp/lpc408x/Libraries/Device/NXP/LPC407x_8x_177x_8x/Source/Templates/IAR/startup_LPC407x_8x_177x_8x.s b/bsp/lpc408x/Libraries/Device/NXP/LPC407x_8x_177x_8x/Source/Templates/IAR/startup_LPC407x_8x_177x_8x.s
index 55f4be7484..81a4008c85 100644
--- a/bsp/lpc408x/Libraries/Device/NXP/LPC407x_8x_177x_8x/Source/Templates/IAR/startup_LPC407x_8x_177x_8x.s
+++ b/bsp/lpc408x/Libraries/Device/NXP/LPC407x_8x_177x_8x/Source/Templates/IAR/startup_LPC407x_8x_177x_8x.s
@@ -1,9 +1,9 @@
;/*****************************************************************************
-; * @file: startup_LPC177x_8x.s
-; * @purpose: CMSIS Cortex-M3 Core Device Startup File
-; * for the NXP LPC17xx Device Series
-; * @version: V1.03
-; * @date: 09. February 2010
+; * @file: startup_LPC407x_8x.s
+; * @purpose: CMSIS Cortex-M4 Core Device Startup File
+; * for the NXP LPC40xx Device Series
+; * @version: V1.00
+; * @date: September 2012
; *----------------------------------------------------------------------------
; *
; * Copyright (C) 2010 ARM Limited. All rights reserved.
@@ -75,49 +75,47 @@ __vector_table_0x1c
DCD SysTick_Handler
; External Interrupts
- DCD WDT_IRQHandler ; 16: Watchdog Timer
- DCD TIMER0_IRQHandler ; 17: Timer0
- DCD TIMER1_IRQHandler ; 18: Timer1
- DCD TIMER2_IRQHandler ; 19: Timer2
- DCD TIMER3_IRQHandler ; 20: Timer3
- DCD UART0_IRQHandler ; 21: UART0
- DCD UART1_IRQHandler ; 22: UART1
- DCD UART2_IRQHandler ; 23: UART2
- DCD UART3_IRQHandler ; 24: UART3
- DCD PWM1_IRQHandler ; 25: PWM1
- DCD I2C0_IRQHandler ; 26: I2C0
- DCD I2C1_IRQHandler ; 27: I2C1
- DCD I2C2_IRQHandler ; 28: I2C2
- DCD 0 ; 29: reserved; not for SPIFI anymore
- DCD SSP0_IRQHandler ; 30: SSP0
- DCD SSP1_IRQHandler ; 31: SSP1
- DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL)
- DCD RTC_IRQHandler ; 33: Real Time Clock
- DCD EINT0_IRQHandler ; 34: External Interrupt 0
- DCD EINT1_IRQHandler ; 35: External Interrupt 1
- DCD EINT2_IRQHandler ; 36: External Interrupt 2
- DCD EINT3_IRQHandler ; 37: External Interrupt 3
- DCD ADC_IRQHandler ; 38: A/D Converter
- DCD BOD_IRQHandler ; 39: Brown-Out Detect
- DCD USB_IRQHandler ; 40: USB
- DCD CAN_IRQHandler ; 41: CAN
- DCD DMA_IRQHandler ; 42: General Purpose DMA
- DCD I2S_IRQHandler ; 43: I2S
- DCD ENET_IRQHandler ; 44: Ethernet
- DCD MCI_IRQHandler ; 45: MCI Card
- DCD MCPWM_IRQHandler ; 46: Motor Control PWM
- DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface
- DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL)
- DCD USBActivity_IRQHandler ; 49: USB Activity Interrupt
- DCD CANActivity_IRQHandler ; 50: CAN Activity Interrupt
- DCD UART4_IRQHandler ; 51: UART4
- DCD SSP2_IRQHandler ; 52: SSP2
- DCD LCD_IRQHandler ; 53: LCD
- DCD GPIO_IRQHandler ; 54: GPIO
- DCD PWM0_IRQHandler ; 55: PWM0
- DCD EEPROM_IRQHandler ; 56: EEPROM
-
-
+ DCD WDT_IRQHandler ; 16: Watchdog Timer
+ DCD TIMER0_IRQHandler ; 17: Timer0
+ DCD TIMER1_IRQHandler ; 18: Timer1
+ DCD TIMER2_IRQHandler ; 19: Timer2
+ DCD TIMER3_IRQHandler ; 20: Timer3
+ DCD UART0_IRQHandler ; 21: UART0
+ DCD UART1_IRQHandler ; 22: UART1
+ DCD UART2_IRQHandler ; 23: UART2
+ DCD UART3_IRQHandler ; 24: UART3
+ DCD PWM1_IRQHandler ; 25: PWM1
+ DCD I2C0_IRQHandler ; 26: I2C0
+ DCD I2C1_IRQHandler ; 27: I2C1
+ DCD I2C2_IRQHandler ; 28: I2C2
+ DCD 0 ; 29: Reserved
+ DCD SSP0_IRQHandler ; 30: SSP0
+ DCD SSP1_IRQHandler ; 31: SSP1
+ DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL)
+ DCD RTC_IRQHandler ; 33: Real Time Clock
+ DCD EINT0_IRQHandler ; 34: External Interrupt 0
+ DCD EINT1_IRQHandler ; 35: External Interrupt 1
+ DCD EINT2_IRQHandler ; 36: External Interrupt 2
+ DCD EINT3_IRQHandler ; 37: External Interrupt 3
+ DCD ADC_IRQHandler ; 38: A/D Converter
+ DCD BOD_IRQHandler ; 39: Brown-Out Detect
+ DCD USB_IRQHandler ; 40: USB
+ DCD CAN_IRQHandler ; 41: CAN
+ DCD DMA_IRQHandler ; 42: General Purpose DMA
+ DCD I2S_IRQHandler ; 43: I2S
+ DCD ENET_IRQHandler ; 44: Ethernet
+ DCD MCI_IRQHandler ; 45: MCI Card
+ DCD MCPWM_IRQHandler ; 46: Motor Control PWM
+ DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface
+ DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL)
+ DCD USBActivity_IRQHandler ; 49: USB Activity Interrupt
+ DCD CANActivity_IRQHandler ; 50: CAN Activity Interrupt
+ DCD UART4_IRQHandler ; 51: UART4
+ DCD SSP2_IRQHandler ; 52: SSP2
+ DCD LCD_IRQHandler ; 53: LCD
+ DCD GPIO_IRQHandler ; 54: GPIO
+ DCD PWM0_IRQHandler ; 55: PWM0
+ DCD EEPROM_IRQHandler ; 56: EEPROM
__Vectors_End
@@ -125,10 +123,7 @@ __Vectors_End
__Vectors EQU __vector_table
__Vectors_Size EQU __Vectors_End - __Vectors
- PUBLIC CRP_Value
- RSEG CRPKEY : CODE(2)
-CRP_Value
- DCD 0xFFFFFFFF
+
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Default interrupt handlers.
@@ -136,7 +131,7 @@ CRP_Value
THUMB
PUBWEAK Reset_Handler
- SECTION .text:CODE:REORDER(2)
+ SECTION .text:CODE:REORDER:NOROOT(2)
Reset_Handler
LDR R0, =SystemInit
BLX R0
@@ -144,253 +139,281 @@ Reset_Handler
BX R0
PUBWEAK NMI_Handler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
NMI_Handler
B NMI_Handler
PUBWEAK HardFault_Handler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
HardFault_Handler
B HardFault_Handler
PUBWEAK MemManage_Handler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
MemManage_Handler
B MemManage_Handler
PUBWEAK BusFault_Handler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
BusFault_Handler
B BusFault_Handler
PUBWEAK UsageFault_Handler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
UsageFault_Handler
B UsageFault_Handler
PUBWEAK SVC_Handler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
SVC_Handler
B SVC_Handler
PUBWEAK DebugMon_Handler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
DebugMon_Handler
B DebugMon_Handler
PUBWEAK PendSV_Handler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
PendSV_Handler
B PendSV_Handler
PUBWEAK SysTick_Handler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
SysTick_Handler
B SysTick_Handler
PUBWEAK WDT_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
WDT_IRQHandler
B WDT_IRQHandler
PUBWEAK TIMER0_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
TIMER0_IRQHandler
B TIMER0_IRQHandler
PUBWEAK TIMER1_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
TIMER1_IRQHandler
B TIMER1_IRQHandler
PUBWEAK TIMER2_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
TIMER2_IRQHandler
B TIMER2_IRQHandler
PUBWEAK TIMER3_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
TIMER3_IRQHandler
B TIMER3_IRQHandler
PUBWEAK UART0_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
UART0_IRQHandler
B UART0_IRQHandler
PUBWEAK UART1_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
UART1_IRQHandler
B UART1_IRQHandler
PUBWEAK UART2_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
UART2_IRQHandler
B UART2_IRQHandler
PUBWEAK UART3_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
UART3_IRQHandler
B UART3_IRQHandler
PUBWEAK PWM1_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
PWM1_IRQHandler
B PWM1_IRQHandler
PUBWEAK I2C0_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
I2C0_IRQHandler
B I2C0_IRQHandler
PUBWEAK I2C1_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
I2C1_IRQHandler
B I2C1_IRQHandler
PUBWEAK I2C2_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
I2C2_IRQHandler
B I2C2_IRQHandler
- ;PUBWEAK SPIFI_IRQHandler
- ;SECTION .text:CODE:REORDER(1)
+; PUBWEAK SPIFI_IRQHandler
+; SECTION .text:CODE:REORDER:NOROOT(1)
;SPIFI_IRQHandler
- ;B SPIFI_IRQHandler
+; B SPIFI_IRQHandler
PUBWEAK SSP0_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
SSP0_IRQHandler
B SSP0_IRQHandler
PUBWEAK SSP1_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
SSP1_IRQHandler
B SSP1_IRQHandler
PUBWEAK PLL0_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
PLL0_IRQHandler
B PLL0_IRQHandler
PUBWEAK RTC_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
RTC_IRQHandler
B RTC_IRQHandler
PUBWEAK EINT0_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
EINT0_IRQHandler
B EINT0_IRQHandler
PUBWEAK EINT1_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
EINT1_IRQHandler
B EINT1_IRQHandler
PUBWEAK EINT2_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
EINT2_IRQHandler
B EINT2_IRQHandler
PUBWEAK EINT3_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
EINT3_IRQHandler
B EINT3_IRQHandler
PUBWEAK ADC_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
ADC_IRQHandler
B ADC_IRQHandler
PUBWEAK BOD_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
BOD_IRQHandler
B BOD_IRQHandler
PUBWEAK USB_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
USB_IRQHandler
B USB_IRQHandler
PUBWEAK CAN_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
CAN_IRQHandler
B CAN_IRQHandler
PUBWEAK DMA_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
DMA_IRQHandler
B DMA_IRQHandler
PUBWEAK I2S_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
I2S_IRQHandler
B I2S_IRQHandler
PUBWEAK ENET_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
ENET_IRQHandler
B ENET_IRQHandler
PUBWEAK MCI_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
MCI_IRQHandler
B MCI_IRQHandler
PUBWEAK MCPWM_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
MCPWM_IRQHandler
B MCPWM_IRQHandler
PUBWEAK QEI_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
QEI_IRQHandler
B QEI_IRQHandler
PUBWEAK PLL1_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
PLL1_IRQHandler
B PLL1_IRQHandler
PUBWEAK USBActivity_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
USBActivity_IRQHandler
B USBActivity_IRQHandler
PUBWEAK CANActivity_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
CANActivity_IRQHandler
B CANActivity_IRQHandler
PUBWEAK UART4_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
UART4_IRQHandler
B UART4_IRQHandler
PUBWEAK SSP2_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
SSP2_IRQHandler
B SSP2_IRQHandler
PUBWEAK LCD_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
LCD_IRQHandler
B LCD_IRQHandler
PUBWEAK GPIO_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
GPIO_IRQHandler
B GPIO_IRQHandler
PUBWEAK PWM0_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
PWM0_IRQHandler
B PWM0_IRQHandler
PUBWEAK EEPROM_IRQHandler
- SECTION .text:CODE:REORDER(1)
+ SECTION .text:CODE:REORDER:NOROOT(1)
EEPROM_IRQHandler
B EEPROM_IRQHandler
+#ifndef SRAM
+ SECTION .crp:CODE:ROOT(2)
+ DATA
+
+/* Code Read Protection
+CRP1 0x12345678 - Write to RAM command can not access RAM below 0x10000200.
+ - Read Memory command: disabled.
+ - Copy RAM to Flash command: cannot write to Sector 0.
+ - "Go" command: disabled.
+ - Erase sector(s) command: can erase any individual sector except
+ sector 0 only, or can erase all sectors at once.
+ - Compare command: disabled
+CRP2 0x87654321 - Write to RAM command: disabled.
+ - Copy RAM to Flash: disabled.
+ - Erase command: only allows erase of all sectors.
+CRP3 0x43218765 - Access to chip via the SWD pins is disabled. ISP entry
+ by pulling PIO0_1 LOW is disabled if a valid user code is
+ present in flash sector 0.
+Caution: If CRP3 is selected, no future factory testing can be
+performed on the device.
+*/
+
+#ifndef CRP
+ #define CRP 0xFFFFFFFF
+#endif
+
+ DCD CRP
+#endif
END
diff --git a/bsp/lpc408x/drivers/linker_scripts/link.icf b/bsp/lpc408x/drivers/linker_scripts/link.icf
new file mode 100644
index 0000000000..58b721f2f5
--- /dev/null
+++ b/bsp/lpc408x/drivers/linker_scripts/link.icf
@@ -0,0 +1,51 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x00000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0007FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x10000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x1000FFDF;
+define symbol __ICFEDIT_region_SDRAM_start__ = 0xA0000000;
+define symbol __ICFEDIT_region_SDRAM_end__ = 0xA3FFFFFF;
+
+define symbol _AHB_RAM_start__ = 0x20000000;
+define symbol _AHB_RAM_end__ = 0x20007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1C00;
+define symbol __ICFEDIT_size_heap__ = 0x000;
+/**** End of ICF editor section. ###ICF###*/
+
+define symbol __CRP_start__ = 0x000002FC;
+define symbol __CRP_end__ = 0x000002FF;
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__] - mem:[from __CRP_start__ to __CRP_end__];
+define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region SDRAM_region = mem:[from __ICFEDIT_region_SDRAM_start__ to __ICFEDIT_region_SDRAM_end__];
+define region AHB_RAM_region = mem:[from _AHB_RAM_start__ to _AHB_RAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+do not initialize { section USB_DMA_RAM };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK,
+ block HEAP};
+place in AHB_RAM_region
+ { readwrite data section AHB_RAM_MEMORY, section USB_DMA_RAM, section EMAC_DMA_RAM};
+
+place in SDRAM_region {section SDRAM,section EXFLASH_RAM};
+
+place in CRP_region { section .crp };
+
+define exported symbol SDRAM_BASE_ADDR = __ICFEDIT_region_SDRAM_start__;
\ No newline at end of file
diff --git a/bsp/lpc408x/rtconfig.h b/bsp/lpc408x/rtconfig.h
index e6b2629981..e8313d5ca9 100644
--- a/bsp/lpc408x/rtconfig.h
+++ b/bsp/lpc408x/rtconfig.h
@@ -33,7 +33,6 @@
/* Memory Management */
-#define RT_PAGE_MAX_ORDER 11
#define RT_USING_MEMPOOL
#define RT_USING_MEMHEAP
#define RT_MEMHEAP_FAST_MODE
@@ -47,7 +46,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
-#define RT_VER_NUM 0x50000
+#define RT_VER_NUM 0x50001
#define RT_USING_HW_ATOMIC
#define RT_USING_CPU_FFS
#define ARCH_ARM
@@ -73,12 +72,16 @@
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
+
+/* DFS: device virtual file system */
+
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
+#define DFS_FD_MAX 16
+#define RT_USING_DFS_V1
#define DFS_FILESYSTEMS_MAX 2
#define DFS_FILESYSTEM_TYPES_MAX 2
-#define DFS_FD_MAX 16
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
diff --git a/bsp/lpc408x/rtconfig.py b/bsp/lpc408x/rtconfig.py
index 030719b339..56782c7fea 100644
--- a/bsp/lpc408x/rtconfig.py
+++ b/bsp/lpc408x/rtconfig.py
@@ -15,10 +15,8 @@ elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = 'D:/Keil'
elif CROSS_TOOL == 'iar':
- print('================ERROR============================')
- print('Not support iar yet!')
- print('=================================================')
- exit(0)
+ PLATFORM = 'iccarm'
+ EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.4'
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
@@ -43,7 +41,7 @@ if PLATFORM == 'gcc':
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T drivers/linker_scripts/link.lds'
CXXFLAGS = CFLAGS
-
+
CPATH = ''
LPATH = ''
@@ -82,3 +80,53 @@ elif PLATFORM == 'armcc':
CFLAGS += ' -O2'
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+elif PLATFORM == 'iccarm':
+ # toolchains
+ CC = 'iccarm'
+ CXX = 'iccarm'
+ AS = 'iasmarm'
+ AR = 'iarchive'
+ LINK = 'ilinkarm'
+ TARGET_EXT = 'out'
+
+ DEVICE = '-Dewarm'
+
+ CFLAGS = DEVICE
+ CFLAGS += ' --diag_suppress Pa050'
+ CFLAGS += ' --no_cse'
+ CFLAGS += ' --no_unroll'
+ CFLAGS += ' --no_inline'
+ CFLAGS += ' --no_code_motion'
+ CFLAGS += ' --no_tbaa'
+ CFLAGS += ' --no_clustering'
+ CFLAGS += ' --no_scheduling'
+ CFLAGS += ' --endian=little'
+ CFLAGS += ' --cpu=Cortex-M4'
+ CFLAGS += ' -e'
+ CFLAGS += ' --fpu=VFPv4_sp'
+ CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
+ CFLAGS += ' --silent'
+
+ AFLAGS = DEVICE
+ AFLAGS += ' -s+'
+ AFLAGS += ' -w+'
+ AFLAGS += ' -r'
+ AFLAGS += ' --cpu Cortex-M4'
+ AFLAGS += ' --fpu VFPv4_sp'
+ AFLAGS += ' -S'
+
+ if BUILD == 'debug':
+ CFLAGS += ' --debug'
+ CFLAGS += ' -On'
+ else:
+ CFLAGS += ' -Oh'
+
+ LFLAGS = ' --config "drivers/linker_scripts/link.icf"'
+ LFLAGS += ' --entry __iar_program_start'
+
+ CXXFLAGS = CFLAGS
+
+ EXEC_PATH = EXEC_PATH + '/arm/bin/'
+ POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
+
diff --git a/bsp/lpc408x/template.ewp b/bsp/lpc408x/template.ewp
new file mode 100644
index 0000000000..604f60f380
--- /dev/null
+++ b/bsp/lpc408x/template.ewp
@@ -0,0 +1,2031 @@
+
+
+ 3
+
+ rt-thread
+
+ ARM
+
+ 1
+
+ General
+ 3
+
+ 29
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 1
+
+
+
+
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 1
+
+
+
+
+
+
+ BILINK
+ 0
+
+
+
+
+ Release
+
+ ARM
+
+ 0
+
+ General
+ 3
+
+ 29
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ ICCARM
+ 2
+
+ 34
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ AARM
+ 2
+
+ 10
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ OBJCOPY
+ 0
+
+ 1
+ 1
+ 0
+
+
+
+
+
+
+
+
+ CUSTOM
+ 3
+
+
+
+ 0
+
+
+
+ BICOMP
+ 0
+
+
+
+ BUILDACTION
+ 1
+
+
+
+
+
+
+ ILINK
+ 0
+
+ 20
+ 1
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ IARCHIVE
+ 0
+
+ 0
+ 1
+ 0
+
+
+
+
+
+
+ BILINK
+ 0
+
+
+
+
diff --git a/bsp/lpc408x/template.eww b/bsp/lpc408x/template.eww
new file mode 100644
index 0000000000..bd036bb4c9
--- /dev/null
+++ b/bsp/lpc408x/template.eww
@@ -0,0 +1,10 @@
+
+
+
+
+ $WS_DIR$\template.ewp
+
+
+
+
+