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add stm32 radio 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@9 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
bernard.xiong 2009-07-27 23:28:26 +00:00
parent 7b2813b739
commit e653914623
125 changed files with 55727 additions and 0 deletions
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82
bsp/stm32_radio/application.c Normal file
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/*
* File : app.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard the first version
*/
/**
* @addtogroup STM32
*/
/*@{*/
#include <rtthread.h>
#include <finsh.h>
#ifdef RT_USING_DFS
/* dfs init */
#include <dfs_init.h>
/* dfs filesystem:FAT filesystem init */
#include <dfs_fat.h>
/* dfs filesystem:EFS filesystem init */
#include <dfs_efs.h>
/* dfs Filesystem APIs */
#include <dfs_fs.h>
#endif
#ifdef RT_USING_LWIP
#include <lwip/sys.h>
#include <lwip/api.h>
#endif
/* thread phase init */
void rt_init_thread_entry(void *parameter)
{
/* Filesystem Initialization */
#ifdef RT_USING_DFS
{
/* init the device filesystem */
dfs_init();
/* init the efsl filesystam*/
efsl_init();
/* mount sd card fat partition 1 as root directory */
if (dfs_mount("sd0", "/", "efs", 0, 0) == 0)
rt_kprintf("File System initialized!\n");
else
rt_kprintf("File System init failed!\n");
}
#endif
/* LwIP Initialization */
#ifdef RT_USING_LWIP
{
extern void lwip_sys_init(void);
/* init lwip system */
lwip_sys_init();
rt_kprintf("TCP/IP initialized!\n");
}
#endif
}
int rt_application_init()
{
rt_thread_t init_thread;
init_thread = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
1024, 8, 20);
rt_thread_startup(init_thread);
return 0;
}
/*@}*/

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bsp/stm32_radio/board.c Normal file
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/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-08-23 Bernard first implementation
*/
#include <rthw.h>
#include <rtthread.h>
#include "stm32f10x_lib.h"
static void rt_hw_console_init(void);
/**
* @addtogroup STM32
*/
/*@{*/
ErrorStatus HSEStartUpStatus;
/*******************************************************************************
* Function Name : RCC_Configuration
* Description : Configures the different system clocks.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void RCC_Configuration(void)
{
/* RCC system reset(for debug purpose) */
RCC_DeInit();
/* Enable HSE */
RCC_HSEConfig(RCC_HSE_ON);
/* Wait till HSE is ready */
HSEStartUpStatus = RCC_WaitForHSEStartUp();
if(HSEStartUpStatus == SUCCESS)
{
/* HCLK = SYSCLK */
RCC_HCLKConfig(RCC_SYSCLK_Div1);
/* PCLK2 = HCLK */
RCC_PCLK2Config(RCC_HCLK_Div1);
/* PCLK1 = HCLK/2 */
RCC_PCLK1Config(RCC_HCLK_Div2);
/* Flash 2 wait state */
FLASH_SetLatency(FLASH_Latency_2);
/* Enable Prefetch Buffer */
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
/* PLLCLK = 8MHz * 9 = 72 MHz */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
/* Enable PLL */
RCC_PLLCmd(ENABLE);
/* Wait till PLL is ready */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) ;
/* Select PLL as system clock source */
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
/* Wait till PLL is used as system clock source */
while(RCC_GetSYSCLKSource() != 0x08) ;
}
}
/*******************************************************************************
* Function Name : NVIC_Configuration
* Description : Configures Vector Table base location.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void NVIC_Configuration(void)
{
#ifdef VECT_TAB_RAM
/* Set the Vector Table base location at 0x20000000 */
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
#else /* VECT_TAB_FLASH */
/* Set the Vector Table base location at 0x08000000 */
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif
}
/*******************************************************************************
* Function Name : SysTick_Configuration
* Description : Configures the SysTick for OS tick.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void SysTick_Configuration(void)
{
RCC_ClocksTypeDef rcc_clocks;
rt_uint32_t cnts;
RCC_GetClocksFreq(&rcc_clocks);
cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
SysTick_SetReload(cnts);
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
SysTick_CounterCmd(SysTick_Counter_Enable);
SysTick_ITConfig(ENABLE);
}
extern void rt_hw_interrupt_thread_switch(void);
/**
* This is the timer interrupt service routine.
*
*/
void rt_hw_timer_handler(void)
{
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
rt_hw_interrupt_thread_switch();
}
/*******************************************************************************
* Function Name : FSMC_SRAM_Init
* Description : Configures the FSMC and GPIOs to interface with the SRAM memory.
* This function must be called before any write/read operation
* on the SRAM.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void FSMC_SRAM_Init(void)
{
FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
FSMC_NORSRAMTimingInitTypeDef p;
GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE |
RCC_APB2Periph_GPIOF, ENABLE);
/*-- GPIO Configuration ------------------------------------------------------*/
/* SRAM Data lines configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
GPIO_Pin_15;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/* SRAM Address lines configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 |
GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOF, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5;
GPIO_Init(GPIOG, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* NOE and NWE configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 |GPIO_Pin_5;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* NE3 configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
GPIO_Init(GPIOG, &GPIO_InitStructure);
/* NBL0, NBL1 configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/*-- FSMC Configuration ------------------------------------------------------*/
p.FSMC_AddressSetupTime = 0;
p.FSMC_AddressHoldTime = 0;
p.FSMC_DataSetupTime = 2;
p.FSMC_BusTurnAroundDuration = 0;
p.FSMC_CLKDivision = 0;
p.FSMC_DataLatency = 0;
p.FSMC_AccessMode = FSMC_AccessMode_A;
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
/* Enable FSMC Bank1_SRAM Bank */
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
}
/*******************************************************************************
* Function Name : FSMC_NOR_Init
* Description : Configures the FSMC and GPIOs to interface with the NOR memory.
* This function must be called before any write/read operation
* on the NOR.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void FSMC_NOR_Init(void)
{
FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
FSMC_NORSRAMTimingInitTypeDef p;
GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE |
RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG, ENABLE);
/*-- GPIO Configuration ------------------------------------------------------*/
/* NOR Data lines configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 |
GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/* NOR Address lines configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 |
GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOF, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 |
GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
GPIO_Init(GPIOG, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/* NOE and NWE configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* NE2 configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_Init(GPIOG, &GPIO_InitStructure);
/*-- FSMC Configuration ----------------------------------------------------*/
p.FSMC_AddressSetupTime = 0x03;
p.FSMC_AddressHoldTime = 0x00;
p.FSMC_DataSetupTime = 0x04;
p.FSMC_BusTurnAroundDuration = 0x00;
p.FSMC_CLKDivision = 0x00;
p.FSMC_DataLatency = 0x00;
p.FSMC_AccessMode = FSMC_AccessMode_B;
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR;
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
/* Enable FSMC Bank1_NOR Bank */
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);
}
/**
* This function will initial STM32 board.
*/
void rt_hw_board_init()
{
/* Configure the system clocks */
RCC_Configuration();
/* NVIC Configuration */
NVIC_Configuration();
/* SRAM init */
FSMC_SRAM_Init();
/* Configure the SysTick */
SysTick_Configuration();
rt_hw_console_init();
}
/* init console to support rt_kprintf */
static void rt_hw_console_init()
{
/* Enable USART1 and GPIOA clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
/* GPIO configuration */
{
GPIO_InitTypeDef GPIO_InitStructure;
/* Configure USART1 Tx (PA.09) as alternate function push-pull */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* Configure USART1 Rx (PA.10) as input floating */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOA, &GPIO_InitStructure);
}
/* USART configuration */
{
USART_InitTypeDef USART_InitStructure;
/* USART1 configured as follow:
- BaudRate = 115200 baud
- Word Length = 8 Bits
- One Stop Bit
- No parity
- Hardware flow control disabled (RTS and CTS signals)
- Receive and transmit enabled
- USART Clock disabled
- USART CPOL: Clock is active low
- USART CPHA: Data is captured on the middle
- USART LastBit: The clock pulse of the last data bit is not output to
the SCLK pin
*/
USART_InitStructure.USART_BaudRate = 115200;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USART1, &USART_InitStructure);
/* Enable USART1 */
USART_Cmd(USART1, ENABLE);
}
}
/* write one character to serial, must not trigger interrupt */
static void rt_hw_console_putc(const char c)
{
/*
to be polite with serial console add a line feed
to the carriage return character
*/
if (c=='\n')rt_hw_console_putc('\r');
while (!(USART1->SR & USART_FLAG_TXE));
USART1->DR = (c & 0x1FF);
}
/**
* This function is used by rt_kprintf to display a string on console.
*
* @param str the displayed string
*/
void rt_hw_console_output(const char* str)
{
while (*str)
{
rt_hw_console_putc (*str++);
}
}
/*@}*/

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/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-10-08 Bernard add board.h to this bsp
*/
#ifndef __BOARD_H__
#define __BOARD_H__
void rt_hw_board_led_on(int n);
void rt_hw_board_led_off(int n);
void rt_hw_board_init(void);
void rt_hw_usart_init(void);
void rt_hw_sdcard_init(void);
#endif

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bsp/stm32_radio/cortexm3_macro.s Normal file
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;******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
;* File Name : cortexm3_macro.s
;* Author : MCD Application Team
;* Version : V1.1
;* Date : 11/26/2007
;* Description : Instruction wrappers for special Cortex-M3 instructions.
;*******************************************************************************
; THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
THUMB
REQUIRE8
PRESERVE8
AREA |.text|, CODE, READONLY, ALIGN=2
; Exported functions
EXPORT __WFI
EXPORT __WFE
EXPORT __SEV
EXPORT __ISB
EXPORT __DSB
EXPORT __DMB
EXPORT __SVC
EXPORT __MRS_CONTROL
EXPORT __MSR_CONTROL
EXPORT __MRS_PSP
EXPORT __MSR_PSP
EXPORT __MRS_MSP
EXPORT __MSR_MSP
EXPORT __SETPRIMASK
EXPORT __RESETPRIMASK
EXPORT __SETFAULTMASK
EXPORT __RESETFAULTMASK
EXPORT __BASEPRICONFIG
EXPORT __GetBASEPRI
EXPORT __REV_HalfWord
EXPORT __REV_Word
;*******************************************************************************
; Function Name : __WFI
; Description : Assembler function for the WFI instruction.
; Input : None
; Return : None
;*******************************************************************************
__WFI
WFI
BX r14
;*******************************************************************************
; Function Name : __WFE
; Description : Assembler function for the WFE instruction.
; Input : None
; Return : None
;*******************************************************************************
__WFE
WFE
BX r14
;*******************************************************************************
; Function Name : __SEV
; Description : Assembler function for the SEV instruction.
; Input : None
; Return : None
;*******************************************************************************
__SEV
SEV
BX r14
;*******************************************************************************
; Function Name : __ISB
; Description : Assembler function for the ISB instruction.
; Input : None
; Return : None
;*******************************************************************************
__ISB
ISB
BX r14
;*******************************************************************************
; Function Name : __DSB
; Description : Assembler function for the DSB instruction.
; Input : None
; Return : None
;*******************************************************************************
__DSB
DSB
BX r14
;*******************************************************************************
; Function Name : __DMB
; Description : Assembler function for the DMB instruction.
; Input : None
; Return : None
;*******************************************************************************
__DMB
DMB
BX r14
;*******************************************************************************
; Function Name : __SVC
; Description : Assembler function for the SVC instruction.
; Input : None
; Return : None
;*******************************************************************************
__SVC
SVC 0x01
BX r14
;*******************************************************************************
; Function Name : __MRS_CONTROL
; Description : Assembler function for the MRS instruction.
; Input : None
; Return : - r0 : Cortex-M3 CONTROL register value.
;*******************************************************************************
__MRS_CONTROL
MRS r0, CONTROL
BX r14
;*******************************************************************************
; Function Name : __MSR_CONTROL
; Description : Assembler function for the MSR instruction.
; Input : - r0 : Cortex-M3 CONTROL register new value.
; Return : None
;*******************************************************************************
__MSR_CONTROL
MSR CONTROL, r0
ISB
BX r14
;*******************************************************************************
; Function Name : __MRS_PSP
; Description : Assembler function for the MRS instruction.
; Input : None
; Return : - r0 : Process Stack value.
;*******************************************************************************
__MRS_PSP
MRS r0, PSP
BX r14
;*******************************************************************************
; Function Name : __MSR_PSP
; Description : Assembler function for the MSR instruction.
; Input : - r0 : Process Stack new value.
; Return : None
;*******************************************************************************
__MSR_PSP
MSR PSP, r0 ; set Process Stack value
BX r14
;*******************************************************************************
; Function Name : __MRS_MSP
; Description : Assembler function for the MRS instruction.
; Input : None
; Return : - r0 : Main Stack value.
;*******************************************************************************
__MRS_MSP
MRS r0, MSP
BX r14
;*******************************************************************************
; Function Name : __MSR_MSP
; Description : Assembler function for the MSR instruction.
; Input : - r0 : Main Stack new value.
; Return : None
;*******************************************************************************
__MSR_MSP
MSR MSP, r0 ; set Main Stack value
BX r14
;*******************************************************************************
; Function Name : __SETPRIMASK
; Description : Assembler function to set the PRIMASK.
; Input : None
; Return : None
;*******************************************************************************
__SETPRIMASK
CPSID i
BX r14
;*******************************************************************************
; Function Name : __RESETPRIMASK
; Description : Assembler function to reset the PRIMASK.
; Input : None
; Return : None
;*******************************************************************************
__RESETPRIMASK
CPSIE i
BX r14
;*******************************************************************************
; Function Name : __SETFAULTMASK
; Description : Assembler function to set the FAULTMASK.
; Input : None
; Return : None
;*******************************************************************************
__SETFAULTMASK
CPSID f
BX r14
;*******************************************************************************
; Function Name : __RESETFAULTMASK
; Description : Assembler function to reset the FAULTMASK.
; Input : None
; Return : None
;*******************************************************************************
__RESETFAULTMASK
CPSIE f
BX r14
;*******************************************************************************
; Function Name : __BASEPRICONFIG
; Description : Assembler function to set the Base Priority.
; Input : - r0 : Base Priority new value
; Return : None
;*******************************************************************************
__BASEPRICONFIG
MSR BASEPRI, r0
BX r14
;*******************************************************************************
; Function Name : __GetBASEPRI
; Description : Assembler function to get the Base Priority value.
; Input : None
; Return : - r0 : Base Priority value
;*******************************************************************************
__GetBASEPRI
MRS r0, BASEPRI_MAX
BX r14
;*******************************************************************************
; Function Name : __REV_HalfWord
; Description : Reverses the byte order in HalfWord(16-bit) input variable.
; Input : - r0 : specifies the input variable
; Return : - r0 : holds tve variable value after byte reversing.
;*******************************************************************************
__REV_HalfWord
REV16 r0, r0
BX r14
;*******************************************************************************
; Function Name : __REV_Word
; Description : Reverses the byte order in Word(32-bit) input variable.
; Input : - r0 : specifies the input variable
; Return : - r0 : holds tve variable value after byte reversing.
;*******************************************************************************
__REV_Word
REV r0, r0
BX r14
END
;******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE*****

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#include <rtthread.h>
#include "dac.h"
short dac_buffer[MAX_BUFFERS][DAC_BUFFER_MAX_SIZE];
int dac_buffer_size[MAX_BUFFERS];
int stopped;
unsigned long current_srate;
unsigned int underruns;
void dac_reset()
{
stopped = 1;
underruns = 0;
dac_set_srate(44100);
}
// return the index of the next writeable buffer or -1 on failure
int dac_get_writeable_buffer()
{
return 0;
}
// returns -1 if there is no free DMA buffer
int dac_fill_dma()
{
return 0;
}
int dac_set_srate(unsigned long srate)
{
if (current_srate == srate)
return 0;
rt_kprintf("setting rate %lu\n", srate);
switch(srate) {
case 8000:
case 8021:
case 32000:
case 44100:
case 48000:
case 88200:
case 96000:
break;
default:
return -1;
}
current_srate = srate;
return 0;
}
void dac_init(void)
{
dac_reset();
}

33
bsp/stm32_radio/dac.h Normal file
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@ -0,0 +1,33 @@
#ifndef _DAC_H_
#define _DAC_H_
#define MAX_BUFFERS 1
#define DAC_BUFFER_MAX_SIZE 2400
extern short dac_buffer[MAX_BUFFERS][DAC_BUFFER_MAX_SIZE];
extern int dac_buffer_size[MAX_BUFFERS];
extern unsigned long current_srate;
extern unsigned int underruns;
void dac_reset(void);
int dac_get_writeable_buffer(void);
int dac_get_readable_buffer(void);
int dac_readable_buffers(void);
int dac_writeable_buffers(void);
int dac_busy_buffers(void);
int adc_busy_buffers(void);
int dac_fill_dma(void);
void dac_enable_dma(void);
void dac_disable_dma(void);
int dac_next_dma_empty(void);
int dac_first_dma_empty(void);
int adc_next_dma_empty(void);
int adc_first_dma_empty(void);
void dac_set_first_dma(short *buffer, int n);
void dac_set_next_dma(short *buffer, int n);
int dma_endtx(void);
void dac_write_reg(unsigned char reg, unsigned short value);
int dac_set_srate(unsigned long srate);
void dac_init(void);
#endif /* _DAC_H_ */

727
bsp/stm32_radio/enc28j60.c Normal file
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#include "enc28j60.h"
#include <netif/ethernetif.h>
#include "lwipopts.h"
#include "stm32f10x_lib.h"
#define MAX_ADDR_LEN 6
// #define CSACTIVE GPIO_ResetBits(GPIOB, GPIO_Pin_12);
// #define CSPASSIVE GPIO_SetBits(GPIOB, GPIO_Pin_12);
#define CSACTIVE GPIOB->BRR = GPIO_Pin_12;
#define CSPASSIVE GPIOB->BSRR = GPIO_Pin_12;
struct net_device
{
/* inherit from ethernet device */
struct eth_device parent;
/* interface address info. */
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
};
static struct net_device enc28j60_dev_entry;
static struct net_device *enc28j60_dev =&enc28j60_dev_entry;
static rt_uint8_t Enc28j60Bank;
static rt_uint16_t NextPacketPtr;
static struct rt_semaphore tx_sem;
void _delay_us(rt_uint32_t us)
{
rt_uint32_t len;
for (;us > 0; us --)
for (len = 0; len < 20; len++ );
}
void delay_ms(rt_uint32_t ms)
{
rt_uint32_t len;
for (;ms > 0; ms --)
for (len = 0; len < 100; len++ );
}
rt_uint8_t spi_read_op(rt_uint8_t op, rt_uint8_t address)
{
int temp=0;
CSACTIVE;
SPI_I2S_SendData(SPI2, (op | (address & ADDR_MASK)));
while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_BSY)==SET);
SPI_I2S_ReceiveData(SPI2);
SPI_I2S_SendData(SPI2, 0x00);
while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_BSY)==SET);
// do dummy read if needed (for mac and mii, see datasheet page 29)
if(address & 0x80)
{
SPI_I2S_ReceiveData(SPI2);
SPI_I2S_SendData(SPI2, 0x00);
while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_BSY)==SET);
}
// release CS
temp=SPI_I2S_ReceiveData(SPI2);
// for(t=0;t<20;t++);
CSPASSIVE;
return (temp);
}
void spi_write_op(rt_uint8_t op, rt_uint8_t address, rt_uint8_t data)
{
rt_uint32_t level;
level = rt_hw_interrupt_disable();
CSACTIVE;
SPI_I2S_SendData(SPI2, op | (address & ADDR_MASK));
while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_BSY)==SET);
SPI_I2S_SendData(SPI2,data);
while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_BSY)==SET);
CSPASSIVE;
rt_hw_interrupt_enable(level);
}
void enc28j60_set_bank(rt_uint8_t address)
{
// set the bank (if needed)
if((address & BANK_MASK) != Enc28j60Bank)
{
// set the bank
spi_write_op(ENC28J60_BIT_FIELD_CLR, ECON1, (ECON1_BSEL1|ECON1_BSEL0));
spi_write_op(ENC28J60_BIT_FIELD_SET, ECON1, (address & BANK_MASK)>>5);
Enc28j60Bank = (address & BANK_MASK);
}
}
rt_uint8_t spi_read(rt_uint8_t address)
{
// set the bank
enc28j60_set_bank(address);
// do the read
return spi_read_op(ENC28J60_READ_CTRL_REG, address);
}
void spi_write(rt_uint8_t address, rt_uint8_t data)
{
// set the bank
enc28j60_set_bank(address);
// do the write
spi_write_op(ENC28J60_WRITE_CTRL_REG, address, data);
}
void enc28j60_phy_write(rt_uint8_t address, rt_uint16_t data)
{
// set the PHY register address
spi_write(MIREGADR, address);
// write the PHY data
spi_write(MIWRL, data);
spi_write(MIWRH, data>>8);
// wait until the PHY write completes
while(spi_read(MISTAT) & MISTAT_BUSY)
{
_delay_us(15);
}
}
// read upper 8 bits
rt_uint16_t enc28j60_phy_read(rt_uint8_t address)
{
// Set the right address and start the register read operation
spi_write(MIREGADR, address);
spi_write(MICMD, MICMD_MIIRD);
_delay_us(15);
// wait until the PHY read completes
while(spi_read(MISTAT) & MISTAT_BUSY);
// reset reading bit
spi_write(MICMD, 0x00);
return (spi_read(MIRDH));
}
void enc28j60_clkout(rt_uint8_t clk)
{
//setup clkout: 2 is 12.5MHz:
spi_write(ECOCON, clk & 0x7);
}
/*
* Access the PHY to determine link status
*/
static void enc28j60_check_link_status()
{
rt_uint16_t reg;
int duplex;
reg = enc28j60_phy_read(PHSTAT2);
duplex = reg & PHSTAT2_DPXSTAT;
if (reg & PHSTAT2_LSTAT)
{
/* on */
}
else
{
/* off */
}
}
#ifdef RT_USING_FINSH
#include <finsh.h>
/*
* Debug routine to dump useful register contents
*/
static void enc28j60(void)
{
rt_kprintf("-- enc28j60 registers:\n");
rt_kprintf("HwRevID: 0x%02x\n", spi_read(EREVID));
rt_kprintf("Cntrl: ECON1 ECON2 ESTAT EIR EIE\n");
rt_kprintf(" 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n",spi_read(ECON1), spi_read(ECON2), spi_read(ESTAT), spi_read(EIR), spi_read(EIE));
rt_kprintf("MAC : MACON1 MACON3 MACON4\n");
rt_kprintf(" 0x%02x 0x%02x 0x%02x\n", spi_read(MACON1), spi_read(MACON3), spi_read(MACON4));
rt_kprintf("Rx : ERXST ERXND ERXWRPT ERXRDPT ERXFCON EPKTCNT MAMXFL\n");
rt_kprintf(" 0x%04x 0x%04x 0x%04x 0x%04x ",
(spi_read(ERXSTH) << 8) | spi_read(ERXSTL),
(spi_read(ERXNDH) << 8) | spi_read(ERXNDL),
(spi_read(ERXWRPTH) << 8) | spi_read(ERXWRPTL),
(spi_read(ERXRDPTH) << 8) | spi_read(ERXRDPTL));
rt_kprintf("0x%02x 0x%02x 0x%04x\n", spi_read(ERXFCON), spi_read(EPKTCNT),
(spi_read(MAMXFLH) << 8) | spi_read(MAMXFLL));
rt_kprintf("Tx : ETXST ETXND MACLCON1 MACLCON2 MAPHSUP\n");
rt_kprintf(" 0x%04x 0x%04x 0x%02x 0x%02x 0x%02x\n",
(spi_read(ETXSTH) << 8) | spi_read(ETXSTL),
(spi_read(ETXNDH) << 8) | spi_read(ETXNDL),
spi_read(MACLCON1), spi_read(MACLCON2), spi_read(MAPHSUP));
}
FINSH_FUNCTION_EXPORT(enc28j60, dump enc28j60 registers)
#endif
/*
* RX handler
* ignore PKTIF because is unreliable! (look at the errata datasheet)
* check EPKTCNT is the suggested workaround.
* We don't need to clear interrupt flag, automatically done when
* enc28j60_hw_rx() decrements the packet counter.
* Returns how many packet processed.
*/
void enc28j60_isr()
{
/* Variable definitions can be made now. */
volatile rt_uint32_t eir, pk_counter;
volatile rt_bool_t rx_activiated;
rx_activiated = RT_FALSE;
/* get EIR */
eir = spi_read(EIR);
// rt_kprintf("eir: 0x%08x\n", eir);
do
{
/* errata #4, PKTIF does not reliable */
pk_counter = spi_read(EPKTCNT);
if (pk_counter)
{
rt_err_t result;
/* a frame has been received */
result = eth_device_ready((struct eth_device*)&(enc28j60_dev->parent));
RT_ASSERT(result == RT_EOK);
// switch to bank 0
enc28j60_set_bank(EIE);
// disable rx interrutps
spi_write_op(ENC28J60_BIT_FIELD_CLR, EIE, EIE_PKTIE);
}
/* clear PKTIF */
if (eir & EIR_PKTIF)
{
enc28j60_set_bank(EIR);
spi_write_op(ENC28J60_BIT_FIELD_CLR, EIR, EIR_PKTIF);
rx_activiated = RT_TRUE;
}
/* clear DMAIF */
if (eir & EIR_DMAIF)
{
enc28j60_set_bank(EIR);
spi_write_op(ENC28J60_BIT_FIELD_CLR, EIR, EIR_DMAIF);
}
/* LINK changed handler */
if ( eir & EIR_LINKIF)
{
enc28j60_check_link_status();
/* read PHIR to clear the flag */
enc28j60_phy_read(PHIR);
enc28j60_set_bank(EIR);
spi_write_op(ENC28J60_BIT_FIELD_CLR, EIR, EIR_LINKIF);
}
if (eir & EIR_TXIF)
{
/* A frame has been transmitted. */
rt_sem_release(&tx_sem);
enc28j60_set_bank(EIR);
spi_write_op(ENC28J60_BIT_FIELD_CLR, EIR, EIR_TXIF);
}
eir = spi_read(EIR);
// rt_kprintf("inner eir: 0x%08x\n", eir);
} while ((rx_activiated != RT_TRUE && eir != 0));
}
/* RT-Thread Device Interface */
/* initialize the interface */
rt_err_t enc28j60_init(rt_device_t dev)
{
CSPASSIVE;
// perform system reset
spi_write_op(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET);
delay_ms(50);
NextPacketPtr = RXSTART_INIT;
// Rx start
spi_write(ERXSTL, RXSTART_INIT&0xFF);
spi_write(ERXSTH, RXSTART_INIT>>8);
// set receive pointer address
spi_write(ERXRDPTL, RXSTOP_INIT&0xFF);
spi_write(ERXRDPTH, RXSTOP_INIT>>8);
// RX end
spi_write(ERXNDL, RXSTOP_INIT&0xFF);
spi_write(ERXNDH, RXSTOP_INIT>>8);
// TX start
spi_write(ETXSTL, TXSTART_INIT&0xFF);
spi_write(ETXSTH, TXSTART_INIT>>8);
// set transmission pointer address
spi_write(EWRPTL, TXSTART_INIT&0xFF);
spi_write(EWRPTH, TXSTART_INIT>>8);
// TX end
spi_write(ETXNDL, TXSTOP_INIT&0xFF);
spi_write(ETXNDH, TXSTOP_INIT>>8);
// do bank 1 stuff, packet filter:
// For broadcast packets we allow only ARP packtets
// All other packets should be unicast only for our mac (MAADR)
//
// The pattern to match on is therefore
// Type ETH.DST
// ARP BROADCAST
// 06 08 -- ff ff ff ff ff ff -> ip checksum for theses bytes=f7f9
// in binary these poitions are:11 0000 0011 1111
// This is hex 303F->EPMM0=0x3f,EPMM1=0x30
spi_write(ERXFCON, ERXFCON_UCEN|ERXFCON_CRCEN|ERXFCON_BCEN);
// do bank 2 stuff
// enable MAC receive
spi_write(MACON1, MACON1_MARXEN|MACON1_TXPAUS|MACON1_RXPAUS);
// enable automatic padding to 60bytes and CRC operations
// spi_write_op(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN);
spi_write_op(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN | MACON3_FULDPX);
// bring MAC out of reset
// set inter-frame gap (back-to-back)
// spi_write(MABBIPG, 0x12);
spi_write(MABBIPG, 0x15);
spi_write(MACON4, MACON4_DEFER);
spi_write(MACLCON2, 63);
// set inter-frame gap (non-back-to-back)
spi_write(MAIPGL, 0x12);
spi_write(MAIPGH, 0x0C);
// Set the maximum packet size which the controller will accept
// Do not send packets longer than MAX_FRAMELEN:
spi_write(MAMXFLL, MAX_FRAMELEN&0xFF);
spi_write(MAMXFLH, MAX_FRAMELEN>>8);
// do bank 3 stuff
// write MAC address
// NOTE: MAC address in ENC28J60 is byte-backward
spi_write(MAADR0, enc28j60_dev->dev_addr[5]);
spi_write(MAADR1, enc28j60_dev->dev_addr[4]);
spi_write(MAADR2, enc28j60_dev->dev_addr[3]);
spi_write(MAADR3, enc28j60_dev->dev_addr[2]);
spi_write(MAADR4, enc28j60_dev->dev_addr[1]);
spi_write(MAADR5, enc28j60_dev->dev_addr[0]);
/* output off */
spi_write(ECOCON, 0x00);
// enc28j60_phy_write(PHCON1, 0x00);
enc28j60_phy_write(PHCON1, PHCON1_PDPXMD); // full duplex
// no loopback of transmitted frames
enc28j60_phy_write(PHCON2, PHCON2_HDLDIS);
enc28j60_set_bank(ECON2);
spi_write_op(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_AUTOINC);
// switch to bank 0
enc28j60_set_bank(ECON1);
// enable interrutps
spi_write_op(ENC28J60_BIT_FIELD_SET, EIE, EIE_INTIE|EIE_PKTIE|EIR_TXIF);
// enable packet reception
spi_write_op(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
/* clock out */
// enc28j60_clkout(2);
enc28j60_phy_write(PHLCON, 0xD76); //0x476
delay_ms(20);
rt_kprintf("enc28j60 init ok!\n");
return RT_EOK;
}
/* control the interface */
rt_err_t enc28j60_control(rt_device_t dev, rt_uint8_t cmd, void *args)
{
switch(cmd)
{
case NIOCTL_GADDR:
/* get mac address */
if(args) rt_memcpy(args, enc28j60_dev_entry.dev_addr, 6);
else return -RT_ERROR;
break;
default :
break;
}
return RT_EOK;
}
/* Open the ethernet interface */
rt_err_t enc28j60_open(rt_device_t dev, rt_uint16_t oflag)
{
return RT_EOK;
}
/* Close the interface */
rt_err_t enc28j60_close(rt_device_t dev)
{
return RT_EOK;
}
/* Read */
rt_size_t enc28j60_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
}
/* Write */
rt_size_t enc28j60_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
}
/* ethernet device interface */
/*
* Transmit packet.
*/
rt_err_t enc28j60_tx( rt_device_t dev, struct pbuf* p)
{
struct pbuf* q;
rt_uint32_t len;
rt_uint8_t* ptr;
// rt_kprintf("tx pbuf: 0x%08x\n", p);
/* lock tx operation */
rt_sem_take(&tx_sem, RT_WAITING_FOREVER);
// Set the write pointer to start of transmit buffer area
spi_write(EWRPTL, TXSTART_INIT&0xFF);
spi_write(EWRPTH, TXSTART_INIT>>8);
// Set the TXND pointer to correspond to the packet size given
spi_write(ETXNDL, (TXSTART_INIT+ p->tot_len + 1)&0xFF);
spi_write(ETXNDH, (TXSTART_INIT+ p->tot_len + 1)>>8);
// write per-packet control byte (0x00 means use macon3 settings)
spi_write_op(ENC28J60_WRITE_BUF_MEM, 0, 0x00);
for (q = p; q != NULL; q = q->next)
{
CSACTIVE;
SPI_I2S_SendData(SPI2, ENC28J60_WRITE_BUF_MEM);
while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_BSY)==SET);
len = q->len;
ptr = q->payload;
while(len)
{
SPI_I2S_SendData(SPI2,*ptr) ;
while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_BSY)==SET);;
ptr++;
len--;
}
CSPASSIVE;
}
// send the contents of the transmit buffer onto the network
spi_write_op(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRTS);
// Reset the transmit logic problem. See Rev. B4 Silicon Errata point 12.
if( (spi_read(EIR) & EIR_TXERIF) )
{
spi_write_op(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRTS);
}
// rt_kprintf("tx ok\n");
return RT_EOK;
}
struct pbuf *enc28j60_rx(rt_device_t dev)
{
struct pbuf* p;
rt_uint32_t len;
rt_uint16_t rxstat;
rt_uint32_t pk_counter;
p = RT_NULL;
pk_counter = spi_read(EPKTCNT);
if (pk_counter)
{
// Set the read pointer to the start of the received packet
spi_write(ERDPTL, (NextPacketPtr));
spi_write(ERDPTH, (NextPacketPtr)>>8);
// read the next packet pointer
NextPacketPtr = spi_read_op(ENC28J60_READ_BUF_MEM, 0);
NextPacketPtr |= spi_read_op(ENC28J60_READ_BUF_MEM, 0)<<8;
// read the packet length (see datasheet page 43)
len = spi_read_op(ENC28J60_READ_BUF_MEM, 0); //0x54
len |= spi_read_op(ENC28J60_READ_BUF_MEM, 0) <<8; //5554
len-=4; //remove the CRC count
// read the receive status (see datasheet page 43)
rxstat = spi_read_op(ENC28J60_READ_BUF_MEM, 0);
rxstat |= ((rt_uint16_t)spi_read_op(ENC28J60_READ_BUF_MEM, 0))<<8;
// check CRC and symbol errors (see datasheet page 44, table 7-3):
// The ERXFCON.CRCEN is set by default. Normally we should not
// need to check this.
if ((rxstat & 0x80)==0)
{
// invalid
len=0;
}
else
{
/* allocation pbuf */
p = pbuf_alloc(PBUF_LINK, len, PBUF_RAM);
if (p != RT_NULL)
{
rt_uint8_t* data;
struct pbuf* q;
for (q = p; q != RT_NULL; q= q->next)
{
data = q->payload;
len = q->len;
CSACTIVE;
SPI_I2S_SendData(SPI2,ENC28J60_READ_BUF_MEM);
while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_BSY)==SET);
SPI_I2S_ReceiveData(SPI2);
while(len)
{
len--;
SPI_I2S_SendData(SPI2,0x00) ;
while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_BSY)==SET);
*data= SPI_I2S_ReceiveData(SPI2);
data++;
}
CSPASSIVE;
}
}
}
// Move the RX read pointer to the start of the next received packet
// This frees the memory we just read out
spi_write(ERXRDPTL, (NextPacketPtr));
spi_write(ERXRDPTH, (NextPacketPtr)>>8);
// decrement the packet counter indicate we are done with this packet
spi_write_op(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PKTDEC);
}
else
{
rt_uint32_t level;
/* lock enc28j60 */
level = rt_hw_interrupt_disable();
// switch to bank 0
enc28j60_set_bank(EIE);
// enable interrutps
spi_write_op(ENC28J60_BIT_FIELD_SET, EIE, EIE_PKTIE);
// switch to bank 0
enc28j60_set_bank(ECON1);
// enable packet reception
spi_write_op(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
/* enable interrupt */
rt_hw_interrupt_enable(level);
}
return p;
}
static void RCC_Configuration(void)
{
/* enable spi2 clock */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
/* enable gpiob port clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE);
}
static void NVIC_Configuration(void)
{
NVIC_InitTypeDef NVIC_InitStructure;
/* Configure one bit for preemption priority */
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
/* Enable the EXTI0 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = EXTI0_IRQChannel;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
static void GPIO_Configuration()
{
GPIO_InitTypeDef GPIO_InitStructure;
EXTI_InitTypeDef EXTI_InitStructure;
/* configure PB0 as external interrupt */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* Configure SPI2 pins: SCK, MISO and MOSI ----------------------------*/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* Connect ENC28J60 EXTI Line to GPIOB Pin 0 */
GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource0);
/* Configure ENC28J60 EXTI Line to generate an interrupt on falling edge */
EXTI_InitStructure.EXTI_Line = EXTI_Line0;
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
EXTI_Init(&EXTI_InitStructure);
/* Clear the Key Button EXTI line pending bit */
EXTI_ClearITPendingBit(EXTI_Line0);
}
static void SetupSPI (void)
{
SPI_InitTypeDef SPI_InitStructure;
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI2, &SPI_InitStructure);
SPI_Cmd(SPI2, ENABLE);
}
static rt_timer_t enc28j60_timer;
void rt_hw_enc28j60_timeout(void* parameter)
{
// switch to bank 0
enc28j60_set_bank(EIE);
// enable interrutps
spi_write_op(ENC28J60_BIT_FIELD_SET, EIE, EIE_PKTIE);
// switch to bank 0
enc28j60_set_bank(ECON1);
// enable packet reception
spi_write_op(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
enc28j60_isr();
}
int rt_hw_enc28j60_init()
{
rt_err_t result;
/* configuration PB5 as INT */
RCC_Configuration();
NVIC_Configuration();
GPIO_Configuration();
SetupSPI();
/* init rt-thread device interface */
enc28j60_dev_entry.parent.parent.init = enc28j60_init;
enc28j60_dev_entry.parent.parent.open = enc28j60_open;
enc28j60_dev_entry.parent.parent.close = enc28j60_close;
enc28j60_dev_entry.parent.parent.read = enc28j60_read;
enc28j60_dev_entry.parent.parent.write = enc28j60_write;
enc28j60_dev_entry.parent.parent.control = enc28j60_control;
enc28j60_dev_entry.parent.eth_rx = enc28j60_rx;
enc28j60_dev_entry.parent.eth_tx = enc28j60_tx;
/* Update MAC address */
enc28j60_dev_entry.dev_addr[0] = 0x1e;
enc28j60_dev_entry.dev_addr[1] = 0x30;
enc28j60_dev_entry.dev_addr[2] = 0x6c;
enc28j60_dev_entry.dev_addr[3] = 0xa2;
enc28j60_dev_entry.dev_addr[4] = 0x45;
enc28j60_dev_entry.dev_addr[5] = 0x5e;
rt_sem_init(&tx_sem, "emac", 1, RT_IPC_FLAG_FIFO);
result = eth_device_init(&(enc28j60_dev->parent), "E0");
/* workaround for enc28j60 interrupt */
enc28j60_timer = rt_timer_create("etimer",
rt_hw_enc28j60_timeout, RT_NULL,
50, RT_TIMER_FLAG_PERIODIC);
if (enc28j60_timer != RT_NULL)
rt_timer_start(enc28j60_timer);
return RT_EOK;
}

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#ifndef __ENC28J60_H__
#define __ENC28J60_H__
#include <rtthread.h>
// ENC28J60 Control Registers
// Control register definitions are a combination of address,
// bank number, and Ethernet/MAC/PHY indicator bits.
// - Register address (bits 0-4)
// - Bank number (bits 5-6)
// - MAC/PHY indicator (bit 7)
#define ADDR_MASK 0x1F
#define BANK_MASK 0x60
#define SPRD_MASK 0x80
// All-bank registers
#define EIE 0x1B
#define EIR 0x1C
#define ESTAT 0x1D
#define ECON2 0x1E
#define ECON1 0x1F
// Bank 0 registers
#define ERDPTL (0x00|0x00)
#define ERDPTH (0x01|0x00)
#define EWRPTL (0x02|0x00)
#define EWRPTH (0x03|0x00)
#define ETXSTL (0x04|0x00)
#define ETXSTH (0x05|0x00)
#define ETXNDL (0x06|0x00)
#define ETXNDH (0x07|0x00)
#define ERXSTL (0x08|0x00)
#define ERXSTH (0x09|0x00)
#define ERXNDL (0x0A|0x00)
#define ERXNDH (0x0B|0x00)
#define ERXRDPTL (0x0C|0x00)
#define ERXRDPTH (0x0D|0x00)
#define ERXWRPTL (0x0E|0x00)
#define ERXWRPTH (0x0F|0x00)
#define EDMASTL (0x10|0x00)
#define EDMASTH (0x11|0x00)
#define EDMANDL (0x12|0x00)
#define EDMANDH (0x13|0x00)
#define EDMADSTL (0x14|0x00)
#define EDMADSTH (0x15|0x00)
#define EDMACSL (0x16|0x00)
#define EDMACSH (0x17|0x00)
// Bank 1 registers
#define EHT0 (0x00|0x20)
#define EHT1 (0x01|0x20)
#define EHT2 (0x02|0x20)
#define EHT3 (0x03|0x20)
#define EHT4 (0x04|0x20)
#define EHT5 (0x05|0x20)
#define EHT6 (0x06|0x20)
#define EHT7 (0x07|0x20)
#define EPMM0 (0x08|0x20)
#define EPMM1 (0x09|0x20)
#define EPMM2 (0x0A|0x20)
#define EPMM3 (0x0B|0x20)
#define EPMM4 (0x0C|0x20)
#define EPMM5 (0x0D|0x20)
#define EPMM6 (0x0E|0x20)
#define EPMM7 (0x0F|0x20)
#define EPMCSL (0x10|0x20)
#define EPMCSH (0x11|0x20)
#define EPMOL (0x14|0x20)
#define EPMOH (0x15|0x20)
#define EWOLIE (0x16|0x20)
#define EWOLIR (0x17|0x20)
#define ERXFCON (0x18|0x20)
#define EPKTCNT (0x19|0x20)
// Bank 2 registers
#define MACON1 (0x00|0x40|0x80)
#define MACON2 (0x01|0x40|0x80)
#define MACON3 (0x02|0x40|0x80)
#define MACON4 (0x03|0x40|0x80)
#define MABBIPG (0x04|0x40|0x80)
#define MAIPGL (0x06|0x40|0x80)
#define MAIPGH (0x07|0x40|0x80)
#define MACLCON1 (0x08|0x40|0x80)
#define MACLCON2 (0x09|0x40|0x80)
#define MAMXFLL (0x0A|0x40|0x80)
#define MAMXFLH (0x0B|0x40|0x80)
#define MAPHSUP (0x0D|0x40|0x80)
#define MICON (0x11|0x40|0x80)
#define MICMD (0x12|0x40|0x80)
#define MIREGADR (0x14|0x40|0x80)
#define MIWRL (0x16|0x40|0x80)
#define MIWRH (0x17|0x40|0x80)
#define MIRDL (0x18|0x40|0x80)
#define MIRDH (0x19|0x40|0x80)
// Bank 3 registers
#define MAADR1 (0x00|0x60|0x80)
#define MAADR0 (0x01|0x60|0x80)
#define MAADR3 (0x02|0x60|0x80)
#define MAADR2 (0x03|0x60|0x80)
#define MAADR5 (0x04|0x60|0x80)
#define MAADR4 (0x05|0x60|0x80)
#define EBSTSD (0x06|0x60)
#define EBSTCON (0x07|0x60)
#define EBSTCSL (0x08|0x60)
#define EBSTCSH (0x09|0x60)
#define MISTAT (0x0A|0x60|0x80)
#define EREVID (0x12|0x60)
#define ECOCON (0x15|0x60)
#define EFLOCON (0x17|0x60)
#define EPAUSL (0x18|0x60)
#define EPAUSH (0x19|0x60)
// PHY registers
#define PHCON1 0x00
#define PHSTAT1 0x01
#define PHHID1 0x02
#define PHHID2 0x03
#define PHCON2 0x10
#define PHSTAT2 0x11
#define PHIE 0x12
#define PHIR 0x13
#define PHLCON 0x14
// ENC28J60 ERXFCON Register Bit Definitions
#define ERXFCON_UCEN 0x80
#define ERXFCON_ANDOR 0x40
#define ERXFCON_CRCEN 0x20
#define ERXFCON_PMEN 0x10
#define ERXFCON_MPEN 0x08
#define ERXFCON_HTEN 0x04
#define ERXFCON_MCEN 0x02
#define ERXFCON_BCEN 0x01
// ENC28J60 EIE Register Bit Definitions
#define EIE_INTIE 0x80
#define EIE_PKTIE 0x40
#define EIE_DMAIE 0x20
#define EIE_LINKIE 0x10
#define EIE_TXIE 0x08
#define EIE_WOLIE 0x04
#define EIE_TXERIE 0x02
#define EIE_RXERIE 0x01
// ENC28J60 EIR Register Bit Definitions
#define EIR_PKTIF 0x40
#define EIR_DMAIF 0x20
#define EIR_LINKIF 0x10
#define EIR_TXIF 0x08
#define EIR_WOLIF 0x04
#define EIR_TXERIF 0x02
#define EIR_RXERIF 0x01
// ENC28J60 ESTAT Register Bit Definitions
#define ESTAT_INT 0x80
#define ESTAT_LATECOL 0x10
#define ESTAT_RXBUSY 0x04
#define ESTAT_TXABRT 0x02
#define ESTAT_CLKRDY 0x01
// ENC28J60 ECON2 Register Bit Definitions
#define ECON2_AUTOINC 0x80
#define ECON2_PKTDEC 0x40
#define ECON2_PWRSV 0x20
#define ECON2_VRPS 0x08
// ENC28J60 ECON1 Register Bit Definitions
#define ECON1_TXRST 0x80
#define ECON1_RXRST 0x40
#define ECON1_DMAST 0x20
#define ECON1_CSUMEN 0x10
#define ECON1_TXRTS 0x08
#define ECON1_RXEN 0x04
#define ECON1_BSEL1 0x02
#define ECON1_BSEL0 0x01
// ENC28J60 MACON1 Register Bit Definitions
#define MACON1_LOOPBK 0x10
#define MACON1_TXPAUS 0x08
#define MACON1_RXPAUS 0x04
#define MACON1_PASSALL 0x02
#define MACON1_MARXEN 0x01
// ENC28J60 MACON2 Register Bit Definitions
#define MACON2_MARST 0x80
#define MACON2_RNDRST 0x40
#define MACON2_MARXRST 0x08
#define MACON2_RFUNRST 0x04
#define MACON2_MATXRST 0x02
#define MACON2_TFUNRST 0x01
// ENC28J60 MACON3 Register Bit Definitions
#define MACON3_PADCFG2 0x80
#define MACON3_PADCFG1 0x40
#define MACON3_PADCFG0 0x20
#define MACON3_TXCRCEN 0x10
#define MACON3_PHDRLEN 0x08
#define MACON3_HFRMLEN 0x04
#define MACON3_FRMLNEN 0x02
#define MACON3_FULDPX 0x01
// ENC28J60 MACON4 Register Bit Definitions
#define MACON4_DEFER (1<<6)
#define MACON4_BPEN (1<<5)
#define MACON4_NOBKOFF (1<<4)
// ENC28J60 MICMD Register Bit Definitions
#define MICMD_MIISCAN 0x02
#define MICMD_MIIRD 0x01
// ENC28J60 MISTAT Register Bit Definitions
#define MISTAT_NVALID 0x04
#define MISTAT_SCAN 0x02
#define MISTAT_BUSY 0x01
// ENC28J60 PHY PHCON1 Register Bit Definitions
#define PHCON1_PRST 0x8000
#define PHCON1_PLOOPBK 0x4000
#define PHCON1_PPWRSV 0x0800
#define PHCON1_PDPXMD 0x0100
// ENC28J60 PHY PHSTAT1 Register Bit Definitions
#define PHSTAT1_PFDPX 0x1000
#define PHSTAT1_PHDPX 0x0800
#define PHSTAT1_LLSTAT 0x0004
#define PHSTAT1_JBSTAT 0x0002
/* ENC28J60 PHY PHSTAT2 Register Bit Definitions */
#define PHSTAT2_TXSTAT (1 << 13)
#define PHSTAT2_RXSTAT (1 << 12)
#define PHSTAT2_COLSTAT (1 << 11)
#define PHSTAT2_LSTAT (1 << 10)
#define PHSTAT2_DPXSTAT (1 << 9)
#define PHSTAT2_PLRITY (1 << 5)
// ENC28J60 PHY PHCON2 Register Bit Definitions
#define PHCON2_FRCLINK 0x4000
#define PHCON2_TXDIS 0x2000
#define PHCON2_JABBER 0x0400
#define PHCON2_HDLDIS 0x0100
// ENC28J60 Packet Control Byte Bit Definitions
#define PKTCTRL_PHUGEEN 0x08
#define PKTCTRL_PPADEN 0x04
#define PKTCTRL_PCRCEN 0x02
#define PKTCTRL_POVERRIDE 0x01
// SPI operation codes
#define ENC28J60_READ_CTRL_REG 0x00
#define ENC28J60_READ_BUF_MEM 0x3A
#define ENC28J60_WRITE_CTRL_REG 0x40
#define ENC28J60_WRITE_BUF_MEM 0x7A
#define ENC28J60_BIT_FIELD_SET 0x80
#define ENC28J60_BIT_FIELD_CLR 0xA0
#define ENC28J60_SOFT_RESET 0xFF
// The RXSTART_INIT should be zero. See Rev. B4 Silicon Errata
// buffer boundaries applied to internal 8K ram
// the entire available packet buffer space is allocated
//
// start with recbuf at 0/
#define RXSTART_INIT 0x0
// receive buffer end
#define RXSTOP_INIT (0x1FFF-0x0600) - 1
// start TX buffer at 0x1FFF-0x0600, pace for one full ethernet frame (~1500 bytes)
#define TXSTART_INIT (0x1FFF-0x0600)
// stp TX buffer at end of mem
#define TXSTOP_INIT 0x1FFF
// max frame length which the conroller will accept:
#define MAX_FRAMELEN 1518
int rt_hw_enc28j60_init(void);
#endif

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : cortexm3_macro.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : Header file for cortexm3_macro.s.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __CORTEXM3_MACRO_H
#define __CORTEXM3_MACRO_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_type.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void __WFI(void);
void __WFE(void);
void __SEV(void);
void __ISB(void);
void __DSB(void);
void __DMB(void);
void __SVC(void);
u32 __MRS_CONTROL(void);
void __MSR_CONTROL(u32 Control);
u32 __MRS_PSP(void);
void __MSR_PSP(u32 TopOfProcessStack);
u32 __MRS_MSP(void);
void __MSR_MSP(u32 TopOfMainStack);
void __RESETPRIMASK(void);
void __SETPRIMASK(void);
u32 __READ_PRIMASK(void);
void __RESETFAULTMASK(void);
void __SETFAULTMASK(void);
u32 __READ_FAULTMASK(void);
void __BASEPRICONFIG(u32 NewPriority);
u32 __GetBASEPRI(void);
u16 __REV_HalfWord(u16 Data);
u32 __REV_Word(u32 Data);
#endif /* __CORTEXM3_MACRO_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_adc.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* ADC firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_ADC_H
#define __STM32F10x_ADC_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* ADC Init structure definition */
typedef struct
{
u32 ADC_Mode;
FunctionalState ADC_ScanConvMode;
FunctionalState ADC_ContinuousConvMode;
u32 ADC_ExternalTrigConv;
u32 ADC_DataAlign;
u8 ADC_NbrOfChannel;
}ADC_InitTypeDef;
/* Exported constants --------------------------------------------------------*/
#define IS_ADC_ALL_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == ADC1_BASE) || \
((*(u32*)&(PERIPH)) == ADC2_BASE) || \
((*(u32*)&(PERIPH)) == ADC3_BASE))
#define IS_ADC_DMA_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == ADC1_BASE) || \
((*(u32*)&(PERIPH)) == ADC3_BASE))
/* ADC dual mode -------------------------------------------------------------*/
#define ADC_Mode_Independent ((u32)0x00000000)
#define ADC_Mode_RegInjecSimult ((u32)0x00010000)
#define ADC_Mode_RegSimult_AlterTrig ((u32)0x00020000)
#define ADC_Mode_InjecSimult_FastInterl ((u32)0x00030000)
#define ADC_Mode_InjecSimult_SlowInterl ((u32)0x00040000)
#define ADC_Mode_InjecSimult ((u32)0x00050000)
#define ADC_Mode_RegSimult ((u32)0x00060000)
#define ADC_Mode_FastInterl ((u32)0x00070000)
#define ADC_Mode_SlowInterl ((u32)0x00080000)
#define ADC_Mode_AlterTrig ((u32)0x00090000)
#define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
((MODE) == ADC_Mode_RegInjecSimult) || \
((MODE) == ADC_Mode_RegSimult_AlterTrig) || \
((MODE) == ADC_Mode_InjecSimult_FastInterl) || \
((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \
((MODE) == ADC_Mode_InjecSimult) || \
((MODE) == ADC_Mode_RegSimult) || \
((MODE) == ADC_Mode_FastInterl) || \
((MODE) == ADC_Mode_SlowInterl) || \
((MODE) == ADC_Mode_AlterTrig))
/* ADC extrenal trigger sources for regular channels conversion --------------*/
/* for ADC1 and ADC2 */
#define ADC_ExternalTrigConv_T1_CC1 ((u32)0x00000000)
#define ADC_ExternalTrigConv_T1_CC2 ((u32)0x00020000)
#define ADC_ExternalTrigConv_T2_CC2 ((u32)0x00060000)
#define ADC_ExternalTrigConv_T3_TRGO ((u32)0x00080000)
#define ADC_ExternalTrigConv_T4_CC4 ((u32)0x000A0000)
#define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((u32)0x000C0000)
/* for ADC1, ADC2 and ADC3 */
#define ADC_ExternalTrigConv_T1_CC3 ((u32)0x00040000)
#define ADC_ExternalTrigConv_None ((u32)0x000E0000)
/* for ADC3 */
#define ADC_ExternalTrigConv_T3_CC1 ((u32)0x00000000)
#define ADC_ExternalTrigConv_T2_CC3 ((u32)0x00020000)
#define ADC_ExternalTrigConv_T8_CC1 ((u32)0x00060000)
#define ADC_ExternalTrigConv_T8_TRGO ((u32)0x00080000)
#define ADC_ExternalTrigConv_T5_CC1 ((u32)0x000A0000)
#define ADC_ExternalTrigConv_T5_CC3 ((u32)0x000C0000)
#define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \
((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \
((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \
((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \
((REGTRIG) == ADC_ExternalTrigConv_None) || \
((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \
((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \
((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \
((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \
((REGTRIG) == ADC_ExternalTrigConv_T5_CC3))
/* ADC data align ------------------------------------------------------------*/
#define ADC_DataAlign_Right ((u32)0x00000000)
#define ADC_DataAlign_Left ((u32)0x00000800)
#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
((ALIGN) == ADC_DataAlign_Left))
/* ADC channels --------------------------------------------------------------*/
#define ADC_Channel_0 ((u8)0x00)
#define ADC_Channel_1 ((u8)0x01)
#define ADC_Channel_2 ((u8)0x02)
#define ADC_Channel_3 ((u8)0x03)
#define ADC_Channel_4 ((u8)0x04)
#define ADC_Channel_5 ((u8)0x05)
#define ADC_Channel_6 ((u8)0x06)
#define ADC_Channel_7 ((u8)0x07)
#define ADC_Channel_8 ((u8)0x08)
#define ADC_Channel_9 ((u8)0x09)
#define ADC_Channel_10 ((u8)0x0A)
#define ADC_Channel_11 ((u8)0x0B)
#define ADC_Channel_12 ((u8)0x0C)
#define ADC_Channel_13 ((u8)0x0D)
#define ADC_Channel_14 ((u8)0x0E)
#define ADC_Channel_15 ((u8)0x0F)
#define ADC_Channel_16 ((u8)0x10)
#define ADC_Channel_17 ((u8)0x11)
#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \
((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \
((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \
((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \
((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \
((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \
((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \
((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \
((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17))
/* ADC sampling times --------------------------------------------------------*/
#define ADC_SampleTime_1Cycles5 ((u8)0x00)
#define ADC_SampleTime_7Cycles5 ((u8)0x01)
#define ADC_SampleTime_13Cycles5 ((u8)0x02)
#define ADC_SampleTime_28Cycles5 ((u8)0x03)
#define ADC_SampleTime_41Cycles5 ((u8)0x04)
#define ADC_SampleTime_55Cycles5 ((u8)0x05)
#define ADC_SampleTime_71Cycles5 ((u8)0x06)
#define ADC_SampleTime_239Cycles5 ((u8)0x07)
#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \
((TIME) == ADC_SampleTime_7Cycles5) || \
((TIME) == ADC_SampleTime_13Cycles5) || \
((TIME) == ADC_SampleTime_28Cycles5) || \
((TIME) == ADC_SampleTime_41Cycles5) || \
((TIME) == ADC_SampleTime_55Cycles5) || \
((TIME) == ADC_SampleTime_71Cycles5) || \
((TIME) == ADC_SampleTime_239Cycles5))
/* ADC extrenal trigger sources for injected channels conversion -------------*/
/* For ADC1 and ADC2 */
#define ADC_ExternalTrigInjecConv_T2_TRGO ((u32)0x00002000)
#define ADC_ExternalTrigInjecConv_T2_CC1 ((u32)0x00003000)
#define ADC_ExternalTrigInjecConv_T3_CC4 ((u32)0x00004000)
#define ADC_ExternalTrigInjecConv_T4_TRGO ((u32)0x00005000)
#define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((u32)0x00006000)
/* For ADC1, ADC2 and ADC3 */
#define ADC_ExternalTrigInjecConv_T1_TRGO ((u32)0x00000000)
#define ADC_ExternalTrigInjecConv_T1_CC4 ((u32)0x00001000)
#define ADC_ExternalTrigInjecConv_None ((u32)0x00007000)
/* For ADC3 */
#define ADC_ExternalTrigInjecConv_T4_CC3 ((u32)0x00002000)
#define ADC_ExternalTrigInjecConv_T8_CC2 ((u32)0x00003000)
#define ADC_ExternalTrigInjecConv_T8_CC4 ((u32)0x00004000)
#define ADC_ExternalTrigInjecConv_T5_TRGO ((u32)0x00005000)
#define ADC_ExternalTrigInjecConv_T5_CC4 ((u32)0x00006000)
#define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4))
/* ADC injected channel selection --------------------------------------------*/
#define ADC_InjectedChannel_1 ((u8)0x14)
#define ADC_InjectedChannel_2 ((u8)0x18)
#define ADC_InjectedChannel_3 ((u8)0x1C)
#define ADC_InjectedChannel_4 ((u8)0x20)
#define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
((CHANNEL) == ADC_InjectedChannel_2) || \
((CHANNEL) == ADC_InjectedChannel_3) || \
((CHANNEL) == ADC_InjectedChannel_4))
/* ADC analog watchdog selection ---------------------------------------------*/
#define ADC_AnalogWatchdog_SingleRegEnable ((u32)0x00800200)
#define ADC_AnalogWatchdog_SingleInjecEnable ((u32)0x00400200)
#define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((u32)0x00C00200)
#define ADC_AnalogWatchdog_AllRegEnable ((u32)0x00800000)
#define ADC_AnalogWatchdog_AllInjecEnable ((u32)0x00400000)
#define ADC_AnalogWatchdog_AllRegAllInjecEnable ((u32)0x00C00000)
#define ADC_AnalogWatchdog_None ((u32)0x00000000)
#define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
((WATCHDOG) == ADC_AnalogWatchdog_None))
/* ADC interrupts definition -------------------------------------------------*/
#define ADC_IT_EOC ((u16)0x0220)
#define ADC_IT_AWD ((u16)0x0140)
#define ADC_IT_JEOC ((u16)0x0480)
#define IS_ADC_IT(IT) ((((IT) & (u16)0xF81F) == 0x00) && ((IT) != 0x00))
#define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \
((IT) == ADC_IT_JEOC))
/* ADC flags definition ------------------------------------------------------*/
#define ADC_FLAG_AWD ((u8)0x01)
#define ADC_FLAG_EOC ((u8)0x02)
#define ADC_FLAG_JEOC ((u8)0x04)
#define ADC_FLAG_JSTRT ((u8)0x08)
#define ADC_FLAG_STRT ((u8)0x10)
#define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (u8)0xE0) == 0x00) && ((FLAG) != 0x00))
#define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \
((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \
((FLAG) == ADC_FLAG_STRT))
/* ADC thresholds ------------------------------------------------------------*/
#define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
/* ADC injected offset -------------------------------------------------------*/
#define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
/* ADC injected length -------------------------------------------------------*/
#define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
/* ADC injected rank ---------------------------------------------------------*/
#define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4))
/* ADC regular length --------------------------------------------------------*/
#define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))
/* ADC regular rank ----------------------------------------------------------*/
#define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10))
/* ADC regular discontinuous mode number -------------------------------------*/
#define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void ADC_DeInit(ADC_TypeDef* ADCx);
void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_ITConfig(ADC_TypeDef* ADCx, u16 ADC_IT, FunctionalState NewState);
void ADC_ResetCalibration(ADC_TypeDef* ADCx);
FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx);
void ADC_StartCalibration(ADC_TypeDef* ADCx);
FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx);
void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx);
void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, u8 Number);
void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, u8 ADC_Channel, u8 Rank, u8 ADC_SampleTime);
void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
u16 ADC_GetConversionValue(ADC_TypeDef* ADCx);
u32 ADC_GetDualModeConversionValue(void);
void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, u32 ADC_ExternalTrigInjecConv);
void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx);
void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, u8 ADC_Channel, u8 Rank, u8 ADC_SampleTime);
void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, u8 Length);
void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, u8 ADC_InjectedChannel, u16 Offset);
u16 ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, u8 ADC_InjectedChannel);
void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, u32 ADC_AnalogWatchdog);
void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, u16 HighThreshold, u16 LowThreshold);
void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, u8 ADC_Channel);
void ADC_TempSensorVrefintCmd(FunctionalState NewState);
FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, u8 ADC_FLAG);
void ADC_ClearFlag(ADC_TypeDef* ADCx, u8 ADC_FLAG);
ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, u16 ADC_IT);
void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, u16 ADC_IT);
#endif /*__STM32F10x_ADC_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_bkp.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* BKP firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_BKP_H
#define __STM32F10x_BKP_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Tamper Pin active level */
#define BKP_TamperPinLevel_High ((u16)0x0000)
#define BKP_TamperPinLevel_Low ((u16)0x0001)
#define IS_BKP_TAMPER_PIN_LEVEL(LEVEL) (((LEVEL) == BKP_TamperPinLevel_High) || \
((LEVEL) == BKP_TamperPinLevel_Low))
/* RTC output source to output on the Tamper pin */
#define BKP_RTCOutputSource_None ((u16)0x0000)
#define BKP_RTCOutputSource_CalibClock ((u16)0x0080)
#define BKP_RTCOutputSource_Alarm ((u16)0x0100)
#define BKP_RTCOutputSource_Second ((u16)0x0300)
#define IS_BKP_RTC_OUTPUT_SOURCE(SOURCE) (((SOURCE) == BKP_RTCOutputSource_None) || \
((SOURCE) == BKP_RTCOutputSource_CalibClock) || \
((SOURCE) == BKP_RTCOutputSource_Alarm) || \
((SOURCE) == BKP_RTCOutputSource_Second))
/* Data Backup Register */
#define BKP_DR1 ((u16)0x0004)
#define BKP_DR2 ((u16)0x0008)
#define BKP_DR3 ((u16)0x000C)
#define BKP_DR4 ((u16)0x0010)
#define BKP_DR5 ((u16)0x0014)
#define BKP_DR6 ((u16)0x0018)
#define BKP_DR7 ((u16)0x001C)
#define BKP_DR8 ((u16)0x0020)
#define BKP_DR9 ((u16)0x0024)
#define BKP_DR10 ((u16)0x0028)
#define BKP_DR11 ((u16)0x0040)
#define BKP_DR12 ((u16)0x0044)
#define BKP_DR13 ((u16)0x0048)
#define BKP_DR14 ((u16)0x004C)
#define BKP_DR15 ((u16)0x0050)
#define BKP_DR16 ((u16)0x0054)
#define BKP_DR17 ((u16)0x0058)
#define BKP_DR18 ((u16)0x005C)
#define BKP_DR19 ((u16)0x0060)
#define BKP_DR20 ((u16)0x0064)
#define BKP_DR21 ((u16)0x0068)
#define BKP_DR22 ((u16)0x006C)
#define BKP_DR23 ((u16)0x0070)
#define BKP_DR24 ((u16)0x0074)
#define BKP_DR25 ((u16)0x0078)
#define BKP_DR26 ((u16)0x007C)
#define BKP_DR27 ((u16)0x0080)
#define BKP_DR28 ((u16)0x0084)
#define BKP_DR29 ((u16)0x0088)
#define BKP_DR30 ((u16)0x008C)
#define BKP_DR31 ((u16)0x0090)
#define BKP_DR32 ((u16)0x0094)
#define BKP_DR33 ((u16)0x0098)
#define BKP_DR34 ((u16)0x009C)
#define BKP_DR35 ((u16)0x00A0)
#define BKP_DR36 ((u16)0x00A4)
#define BKP_DR37 ((u16)0x00A8)
#define BKP_DR38 ((u16)0x00AC)
#define BKP_DR39 ((u16)0x00B0)
#define BKP_DR40 ((u16)0x00B4)
#define BKP_DR41 ((u16)0x00B8)
#define BKP_DR42 ((u16)0x00BC)
#define IS_BKP_DR(DR) (((DR) == BKP_DR1) || ((DR) == BKP_DR2) || ((DR) == BKP_DR3) || \
((DR) == BKP_DR4) || ((DR) == BKP_DR5) || ((DR) == BKP_DR6) || \
((DR) == BKP_DR7) || ((DR) == BKP_DR8) || ((DR) == BKP_DR9) || \
((DR) == BKP_DR10) || ((DR) == BKP_DR11) || ((DR) == BKP_DR12) || \
((DR) == BKP_DR13) || ((DR) == BKP_DR14) || ((DR) == BKP_DR15) || \
((DR) == BKP_DR16) || ((DR) == BKP_DR17) || ((DR) == BKP_DR18) || \
((DR) == BKP_DR19) || ((DR) == BKP_DR20) || ((DR) == BKP_DR21) || \
((DR) == BKP_DR22) || ((DR) == BKP_DR23) || ((DR) == BKP_DR24) || \
((DR) == BKP_DR25) || ((DR) == BKP_DR26) || ((DR) == BKP_DR27) || \
((DR) == BKP_DR28) || ((DR) == BKP_DR29) || ((DR) == BKP_DR30) || \
((DR) == BKP_DR31) || ((DR) == BKP_DR32) || ((DR) == BKP_DR33) || \
((DR) == BKP_DR34) || ((DR) == BKP_DR35) || ((DR) == BKP_DR36) || \
((DR) == BKP_DR37) || ((DR) == BKP_DR38) || ((DR) == BKP_DR39) || \
((DR) == BKP_DR40) || ((DR) == BKP_DR41) || ((DR) == BKP_DR42))
#define IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F)
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void BKP_DeInit(void);
void BKP_TamperPinLevelConfig(u16 BKP_TamperPinLevel);
void BKP_TamperPinCmd(FunctionalState NewState);
void BKP_ITConfig(FunctionalState NewState);
void BKP_RTCOutputConfig(u16 BKP_RTCOutputSource);
void BKP_SetRTCCalibrationValue(u8 CalibrationValue);
void BKP_WriteBackupRegister(u16 BKP_DR, u16 Data);
u16 BKP_ReadBackupRegister(u16 BKP_DR);
FlagStatus BKP_GetFlagStatus(void);
void BKP_ClearFlag(void);
ITStatus BKP_GetITStatus(void);
void BKP_ClearITPendingBit(void);
#endif /* __STM32F10x_BKP_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_can.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* CAN firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_CAN_H
#define __STM32F10x_CAN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* CAN init structure definition */
typedef struct
{
FunctionalState CAN_TTCM;
FunctionalState CAN_ABOM;
FunctionalState CAN_AWUM;
FunctionalState CAN_NART;
FunctionalState CAN_RFLM;
FunctionalState CAN_TXFP;
u8 CAN_Mode;
u8 CAN_SJW;
u8 CAN_BS1;
u8 CAN_BS2;
u16 CAN_Prescaler;
} CAN_InitTypeDef;
/* CAN filter init structure definition */
typedef struct
{
u8 CAN_FilterNumber;
u8 CAN_FilterMode;
u8 CAN_FilterScale;
u16 CAN_FilterIdHigh;
u16 CAN_FilterIdLow;
u16 CAN_FilterMaskIdHigh;
u16 CAN_FilterMaskIdLow;
u16 CAN_FilterFIFOAssignment;
FunctionalState CAN_FilterActivation;
} CAN_FilterInitTypeDef;
/* CAN Tx message structure definition */
typedef struct
{
u32 StdId;
u32 ExtId;
u8 IDE;
u8 RTR;
u8 DLC;
u8 Data[8];
} CanTxMsg;
/* CAN Rx message structure definition */
typedef struct
{
u32 StdId;
u32 ExtId;
u8 IDE;
u8 RTR;
u8 DLC;
u8 Data[8];
u8 FMI;
} CanRxMsg;
/* Exported constants --------------------------------------------------------*/
/* CAN sleep constants */
#define CANINITFAILED ((u8)0x00) /* CAN initialization failed */
#define CANINITOK ((u8)0x01) /* CAN initialization failed */
/* CAN operating mode */
#define CAN_Mode_Normal ((u8)0x00) /* normal mode */
#define CAN_Mode_LoopBack ((u8)0x01) /* loopback mode */
#define CAN_Mode_Silent ((u8)0x02) /* silent mode */
#define CAN_Mode_Silent_LoopBack ((u8)0x03) /* loopback combined with silent mode */
#define IS_CAN_MODE(MODE) (((MODE) == CAN_Mode_Normal) || ((MODE) == CAN_Mode_LoopBack)|| \
((MODE) == CAN_Mode_Silent) || ((MODE) == CAN_Mode_Silent_LoopBack))
/* CAN synchronisation jump width */
#define CAN_SJW_1tq ((u8)0x00) /* 1 time quantum */
#define CAN_SJW_2tq ((u8)0x01) /* 2 time quantum */
#define CAN_SJW_3tq ((u8)0x02) /* 3 time quantum */
#define CAN_SJW_4tq ((u8)0x03) /* 4 time quantum */
#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1tq) || ((SJW) == CAN_SJW_2tq)|| \
((SJW) == CAN_SJW_3tq) || ((SJW) == CAN_SJW_4tq))
/* time quantum in bit segment 1 */
#define CAN_BS1_1tq ((u8)0x00) /* 1 time quantum */
#define CAN_BS1_2tq ((u8)0x01) /* 2 time quantum */
#define CAN_BS1_3tq ((u8)0x02) /* 3 time quantum */
#define CAN_BS1_4tq ((u8)0x03) /* 4 time quantum */
#define CAN_BS1_5tq ((u8)0x04) /* 5 time quantum */
#define CAN_BS1_6tq ((u8)0x05) /* 6 time quantum */
#define CAN_BS1_7tq ((u8)0x06) /* 7 time quantum */
#define CAN_BS1_8tq ((u8)0x07) /* 8 time quantum */
#define CAN_BS1_9tq ((u8)0x08) /* 9 time quantum */
#define CAN_BS1_10tq ((u8)0x09) /* 10 time quantum */
#define CAN_BS1_11tq ((u8)0x0A) /* 11 time quantum */
#define CAN_BS1_12tq ((u8)0x0B) /* 12 time quantum */
#define CAN_BS1_13tq ((u8)0x0C) /* 13 time quantum */
#define CAN_BS1_14tq ((u8)0x0D) /* 14 time quantum */
#define CAN_BS1_15tq ((u8)0x0E) /* 15 time quantum */
#define CAN_BS1_16tq ((u8)0x0F) /* 16 time quantum */
#define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16tq)
/* time quantum in bit segment 2 */
#define CAN_BS2_1tq ((u8)0x00) /* 1 time quantum */
#define CAN_BS2_2tq ((u8)0x01) /* 2 time quantum */
#define CAN_BS2_3tq ((u8)0x02) /* 3 time quantum */
#define CAN_BS2_4tq ((u8)0x03) /* 4 time quantum */
#define CAN_BS2_5tq ((u8)0x04) /* 5 time quantum */
#define CAN_BS2_6tq ((u8)0x05) /* 6 time quantum */
#define CAN_BS2_7tq ((u8)0x06) /* 7 time quantum */
#define CAN_BS2_8tq ((u8)0x07) /* 8 time quantum */
#define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8tq)
/* CAN clock prescaler */
#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
/* CAN filter number */
#define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 13)
/* CAN filter mode */
#define CAN_FilterMode_IdMask ((u8)0x00) /* id/mask mode */
#define CAN_FilterMode_IdList ((u8)0x01) /* identifier list mode */
#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FilterMode_IdMask) || \
((MODE) == CAN_FilterMode_IdList))
/* CAN filter scale */
#define CAN_FilterScale_16bit ((u8)0x00) /* 16-bit filter scale */
#define CAN_FilterScale_32bit ((u8)0x01) /* 2-bit filter scale */
#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FilterScale_16bit) || \
((SCALE) == CAN_FilterScale_32bit))
/* CAN filter FIFO assignation */
#define CAN_FilterFIFO0 ((u8)0x00) /* Filter FIFO 0 assignment for filter x */
#define CAN_FilterFIFO1 ((u8)0x01) /* Filter FIFO 1 assignment for filter x */
#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FilterFIFO0) || \
((FIFO) == CAN_FilterFIFO1))
/* CAN Tx */
#define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((u8)0x02))
#define IS_CAN_STDID(STDID) ((STDID) <= ((u32)0x7FF))
#define IS_CAN_EXTID(EXTID) ((EXTID) <= ((u32)0x1FFFFFFF))
#define IS_CAN_DLC(DLC) ((DLC) <= ((u8)0x08))
/* CAN identifier type */
#define CAN_ID_STD ((u32)0x00000000) /* Standard Id */
#define CAN_ID_EXT ((u32)0x00000004) /* Extended Id */
#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || ((IDTYPE) == CAN_ID_EXT))
/* CAN remote transmission request */
#define CAN_RTR_DATA ((u32)0x00000000) /* Data frame */
#define CAN_RTR_REMOTE ((u32)0x00000002) /* Remote frame */
#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
/* CAN transmit constants */
#define CANTXFAILED ((u8)0x00) /* CAN transmission failed */
#define CANTXOK ((u8)0x01) /* CAN transmission succeeded */
#define CANTXPENDING ((u8)0x02) /* CAN transmission pending */
#define CAN_NO_MB ((u8)0x04) /* CAN cell did not provide an empty mailbox */
/* CAN receive FIFO number constants */
#define CAN_FIFO0 ((u8)0x00) /* CAN FIFO0 used to receive */
#define CAN_FIFO1 ((u8)0x01) /* CAN FIFO1 used to receive */
#define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
/* CAN sleep constants */
#define CANSLEEPFAILED ((u8)0x00) /* CAN did not enter the sleep mode */
#define CANSLEEPOK ((u8)0x01) /* CAN entered the sleep mode */
/* CAN wake up constants */
#define CANWAKEUPFAILED ((u8)0x00) /* CAN did not leave the sleep mode */
#define CANWAKEUPOK ((u8)0x01) /* CAN leaved the sleep mode */
/* CAN flags */
#define CAN_FLAG_EWG ((u32)0x00000001) /* Error Warning Flag */
#define CAN_FLAG_EPV ((u32)0x00000002) /* Error Passive Flag */
#define CAN_FLAG_BOF ((u32)0x00000004) /* Bus-Off Flag */
#define IS_CAN_FLAG(FLAG) (((FLAG) == CAN_FLAG_EWG) || ((FLAG) == CAN_FLAG_EPV) ||\
((FLAG) == CAN_FLAG_BOF))
/* CAN interrupts */
#define CAN_IT_RQCP0 ((u32)0x00000005) /* Request completed mailbox 0 */
#define CAN_IT_RQCP1 ((u32)0x00000006) /* Request completed mailbox 1 */
#define CAN_IT_RQCP2 ((u32)0x00000007) /* Request completed mailbox 2 */
#define CAN_IT_TME ((u32)0x00000001) /* Transmit mailbox empty */
#define CAN_IT_FMP0 ((u32)0x00000002) /* FIFO 0 message pending */
#define CAN_IT_FF0 ((u32)0x00000004) /* FIFO 0 full */
#define CAN_IT_FOV0 ((u32)0x00000008) /* FIFO 0 overrun */
#define CAN_IT_FMP1 ((u32)0x00000010) /* FIFO 1 message pending */
#define CAN_IT_FF1 ((u32)0x00000020) /* FIFO 1 full */
#define CAN_IT_FOV1 ((u32)0x00000040) /* FIFO 1 overrun */
#define CAN_IT_EWG ((u32)0x00000100) /* Error warning */
#define CAN_IT_EPV ((u32)0x00000200) /* Error passive */
#define CAN_IT_BOF ((u32)0x00000400) /* Bus-off */
#define CAN_IT_LEC ((u32)0x00000800) /* Last error code */
#define CAN_IT_ERR ((u32)0x00008000) /* Error */
#define CAN_IT_WKU ((u32)0x00010000) /* Wake-up */
#define CAN_IT_SLK ((u32)0x00020000) /* Sleep */
#define IS_CAN_ITConfig(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP0) ||\
((IT) == CAN_IT_FF0) || ((IT) == CAN_IT_FOV0) ||\
((IT) == CAN_IT_FMP1) || ((IT) == CAN_IT_FF1) ||\
((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\
((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\
((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\
((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK))
#define IS_CAN_ITStatus(IT) (((IT) == CAN_IT_RQCP0) || ((IT) == CAN_IT_RQCP1) ||\
((IT) == CAN_IT_RQCP2) || ((IT) == CAN_IT_FF0) ||\
((IT) == CAN_IT_FOV0) || ((IT) == CAN_IT_FF1) ||\
((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\
((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\
((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK))
/* Exported macro ------------------------------------------------------------*/
/* Exported function protypes ----------------------------------------------- */
void CAN_DeInit(void);
u8 CAN_Init(CAN_InitTypeDef* CAN_InitStruct);
void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct);
void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct);
void CAN_ITConfig(u32 CAN_IT, FunctionalState NewState);
u8 CAN_Transmit(CanTxMsg* TxMessage);
u8 CAN_TransmitStatus(u8 TransmitMailbox);
void CAN_CancelTransmit(u8 Mailbox);
void CAN_FIFORelease(u8 FIFONumber);
u8 CAN_MessagePending(u8 FIFONumber);
void CAN_Receive(u8 FIFONumber, CanRxMsg* RxMessage);
u8 CAN_Sleep(void);
u8 CAN_WakeUp(void);
FlagStatus CAN_GetFlagStatus(u32 CAN_FLAG);
void CAN_ClearFlag(u32 CAN_FLAG);
ITStatus CAN_GetITStatus(u32 CAN_IT);
void CAN_ClearITPendingBit(u32 CAN_IT);
#endif /* __STM32F10x_CAN_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_crc.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* CRC firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_CRC_H
#define __STM32F10x_CRC_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void CRC_ResetDR(void);
u32 CRC_CalcCRC(u32 Data);
u32 CRC_CalcBlockCRC(u32 pBuffer[], u32 BufferLength);
u32 CRC_GetCRC(void);
void CRC_SetIDRegister(u8 IDValue);
u8 CRC_GetIDRegister(void);
#endif /* __STM32F10x_CRC_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_dac.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* DAC firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_DAC_H
#define __STM32F10x_DAC_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* DAC Init structure definition */
typedef struct
{
u32 DAC_Trigger;
u32 DAC_WaveGeneration;
u32 DAC_LFSRUnmask_TriangleAmplitude;
u32 DAC_OutputBuffer;
}DAC_InitTypeDef;
/* Exported constants --------------------------------------------------------*/
/* DAC trigger selection */
#define DAC_Trigger_None ((u32)0x00000000)
#define DAC_Trigger_T6_TRGO ((u32)0x00000004)
#define DAC_Trigger_T8_TRGO ((u32)0x0000000C)
#define DAC_Trigger_T7_TRGO ((u32)0x00000014)
#define DAC_Trigger_T5_TRGO ((u32)0x0000001C)
#define DAC_Trigger_T2_TRGO ((u32)0x00000024)
#define DAC_Trigger_T4_TRGO ((u32)0x0000002C)
#define DAC_Trigger_Ext_IT9 ((u32)0x00000034)
#define DAC_Trigger_Software ((u32)0x0000003C)
#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_Trigger_None) || \
((TRIGGER) == DAC_Trigger_T6_TRGO) || \
((TRIGGER) == DAC_Trigger_T8_TRGO) || \
((TRIGGER) == DAC_Trigger_T7_TRGO) || \
((TRIGGER) == DAC_Trigger_T5_TRGO) || \
((TRIGGER) == DAC_Trigger_T2_TRGO) || \
((TRIGGER) == DAC_Trigger_T4_TRGO) || \
((TRIGGER) == DAC_Trigger_Ext_IT9) || \
((TRIGGER) == DAC_Trigger_Software))
/* DAC wave generation */
#define DAC_WaveGeneration_None ((u32)0x00000000)
#define DAC_WaveGeneration_Noise ((u32)0x00000040)
#define DAC_WaveGeneration_Triangle ((u32)0x00000080)
#define IS_DAC_GENERATE_WAVE(WAVE) (((WAVE) == DAC_WaveGeneration_None) || \
((WAVE) == DAC_WaveGeneration_Noise) || \
((WAVE) == DAC_WaveGeneration_Triangle))
/* DAC noise wave generation mask / triangle wave generation max amplitude */
#define DAC_LFSRUnmask_Bit0 ((u32)0x00000000)
#define DAC_LFSRUnmask_Bits1_0 ((u32)0x00000100)
#define DAC_LFSRUnmask_Bits2_0 ((u32)0x00000200)
#define DAC_LFSRUnmask_Bits3_0 ((u32)0x00000300)
#define DAC_LFSRUnmask_Bits4_0 ((u32)0x00000400)
#define DAC_LFSRUnmask_Bits5_0 ((u32)0x00000500)
#define DAC_LFSRUnmask_Bits6_0 ((u32)0x00000600)
#define DAC_LFSRUnmask_Bits7_0 ((u32)0x00000700)
#define DAC_LFSRUnmask_Bits8_0 ((u32)0x00000800)
#define DAC_LFSRUnmask_Bits9_0 ((u32)0x00000900)
#define DAC_LFSRUnmask_Bits10_0 ((u32)0x00000A00)
#define DAC_LFSRUnmask_Bits11_0 ((u32)0x00000B00)
#define DAC_TriangleAmplitude_1 ((u32)0x00000000)
#define DAC_TriangleAmplitude_3 ((u32)0x00000100)
#define DAC_TriangleAmplitude_7 ((u32)0x00000200)
#define DAC_TriangleAmplitude_15 ((u32)0x00000300)
#define DAC_TriangleAmplitude_31 ((u32)0x00000400)
#define DAC_TriangleAmplitude_63 ((u32)0x00000500)
#define DAC_TriangleAmplitude_127 ((u32)0x00000600)
#define DAC_TriangleAmplitude_255 ((u32)0x00000700)
#define DAC_TriangleAmplitude_511 ((u32)0x00000800)
#define DAC_TriangleAmplitude_1023 ((u32)0x00000900)
#define DAC_TriangleAmplitude_2047 ((u32)0x00000A00)
#define DAC_TriangleAmplitude_4095 ((u32)0x00000B00)
#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUnmask_Bit0) || \
((VALUE) == DAC_LFSRUnmask_Bits1_0) || \
((VALUE) == DAC_LFSRUnmask_Bits2_0) || \
((VALUE) == DAC_LFSRUnmask_Bits3_0) || \
((VALUE) == DAC_LFSRUnmask_Bits4_0) || \
((VALUE) == DAC_LFSRUnmask_Bits5_0) || \
((VALUE) == DAC_LFSRUnmask_Bits6_0) || \
((VALUE) == DAC_LFSRUnmask_Bits7_0) || \
((VALUE) == DAC_LFSRUnmask_Bits8_0) || \
((VALUE) == DAC_LFSRUnmask_Bits9_0) || \
((VALUE) == DAC_LFSRUnmask_Bits10_0) || \
((VALUE) == DAC_LFSRUnmask_Bits11_0) || \
((VALUE) == DAC_TriangleAmplitude_1) || \
((VALUE) == DAC_TriangleAmplitude_3) || \
((VALUE) == DAC_TriangleAmplitude_7) || \
((VALUE) == DAC_TriangleAmplitude_15) || \
((VALUE) == DAC_TriangleAmplitude_31) || \
((VALUE) == DAC_TriangleAmplitude_63) || \
((VALUE) == DAC_TriangleAmplitude_127) || \
((VALUE) == DAC_TriangleAmplitude_255) || \
((VALUE) == DAC_TriangleAmplitude_511) || \
((VALUE) == DAC_TriangleAmplitude_1023) || \
((VALUE) == DAC_TriangleAmplitude_2047) || \
((VALUE) == DAC_TriangleAmplitude_4095))
/* DAC output buffer */
#define DAC_OutputBuffer_Enable ((u32)0x00000000)
#define DAC_OutputBuffer_Disable ((u32)0x00000002)
#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OutputBuffer_Enable) || \
((STATE) == DAC_OutputBuffer_Disable))
/* DAC Channel selection */
#define DAC_Channel_1 ((u32)0x00000000)
#define DAC_Channel_2 ((u32)0x00000010)
#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_Channel_1) || \
((CHANNEL) == DAC_Channel_2))
/* DAC data alignement */
#define DAC_Align_12b_R ((u32)0x00000000)
#define DAC_Align_12b_L ((u32)0x00000004)
#define DAC_Align_8b_R ((u32)0x00000008)
#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_Align_12b_R) || \
((ALIGN) == DAC_Align_12b_L) || \
((ALIGN) == DAC_Align_8b_R))
/* DAC wave generation */
#define DAC_Wave_Noise ((u32)0x00000040)
#define DAC_Wave_Triangle ((u32)0x00000080)
#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_Wave_Noise) || \
((WAVE) == DAC_Wave_Triangle))
/* DAC data ------------------------------------------------------------------*/
#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0)
/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
void DAC_DeInit(void);
void DAC_Init(u32 DAC_Channel, DAC_InitTypeDef* DAC_InitStruct);
void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct);
void DAC_Cmd(u32 DAC_Channel, FunctionalState NewState);
void DAC_DMACmd(u32 DAC_Channel, FunctionalState NewState);
void DAC_SoftwareTriggerCmd(u32 DAC_Channel, FunctionalState NewState);
void DAC_DualSoftwareTriggerCmd(FunctionalState NewState);
void DAC_WaveGenerationCmd(u32 DAC_Channel, u32 DAC_Wave, FunctionalState NewState);
void DAC_SetChannel1Data(u32 DAC_Align, u16 Data);
void DAC_SetChannel2Data(u32 DAC_Align, u16 Data);
void DAC_SetDualChannelData(u32 DAC_Align, u16 Data2, u16 Data1);
u16 DAC_GetDataOutputValue(u32 DAC_Channel);
#endif /*__STM32F10x_DAC_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
* File Name : stm32f10x_dbgmcu.h
* Author : MCD Application Team
* Version : V2.0.3Patch1
* Date : 04/06/2009
* Description : This file contains all the functions prototypes for the
* DBGMCU firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_DBGMCU_H
#define __STM32F10x_DBGMCU_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
#define DBGMCU_SLEEP ((u32)0x00000001)
#define DBGMCU_STOP ((u32)0x00000002)
#define DBGMCU_STANDBY ((u32)0x00000004)
#define DBGMCU_IWDG_STOP ((u32)0x00000100)
#define DBGMCU_WWDG_STOP ((u32)0x00000200)
#define DBGMCU_TIM1_STOP ((u32)0x00000400)
#define DBGMCU_TIM2_STOP ((u32)0x00000800)
#define DBGMCU_TIM3_STOP ((u32)0x00001000)
#define DBGMCU_TIM4_STOP ((u32)0x00002000)
#define DBGMCU_CAN_STOP ((u32)0x00004000)
#define DBGMCU_I2C1_SMBUS_TIMEOUT ((u32)0x00008000)
#define DBGMCU_I2C2_SMBUS_TIMEOUT ((u32)0x00010000)
#define DBGMCU_TIM8_STOP ((u32)0x00020000)
#define DBGMCU_TIM5_STOP ((u32)0x00040000)
#define DBGMCU_TIM6_STOP ((u32)0x00080000)
#define DBGMCU_TIM7_STOP ((u32)0x00100000)
#define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFE000F8) == 0x00) && ((PERIPH) != 0x00))
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
u32 DBGMCU_GetREVID(void);
u32 DBGMCU_GetDEVID(void);
void DBGMCU_Config(u32 DBGMCU_Periph, FunctionalState NewState);
#endif /* __STM32F10x_DBGMCU_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_dma.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* DMA firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_DMA_H
#define __STM32F10x_DMA_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* DMA Init structure definition */
typedef struct
{
u32 DMA_PeripheralBaseAddr;
u32 DMA_MemoryBaseAddr;
u32 DMA_DIR;
u32 DMA_BufferSize;
u32 DMA_PeripheralInc;
u32 DMA_MemoryInc;
u32 DMA_PeripheralDataSize;
u32 DMA_MemoryDataSize;
u32 DMA_Mode;
u32 DMA_Priority;
u32 DMA_M2M;
}DMA_InitTypeDef;
/* Exported constants --------------------------------------------------------*/
#define IS_DMA_ALL_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == DMA1_Channel1_BASE) || \
((*(u32*)&(PERIPH)) == DMA1_Channel2_BASE) || \
((*(u32*)&(PERIPH)) == DMA1_Channel3_BASE) || \
((*(u32*)&(PERIPH)) == DMA1_Channel4_BASE) || \
((*(u32*)&(PERIPH)) == DMA1_Channel5_BASE) || \
((*(u32*)&(PERIPH)) == DMA1_Channel6_BASE) || \
((*(u32*)&(PERIPH)) == DMA1_Channel7_BASE) || \
((*(u32*)&(PERIPH)) == DMA2_Channel1_BASE) || \
((*(u32*)&(PERIPH)) == DMA2_Channel2_BASE) || \
((*(u32*)&(PERIPH)) == DMA2_Channel3_BASE) || \
((*(u32*)&(PERIPH)) == DMA2_Channel4_BASE) || \
((*(u32*)&(PERIPH)) == DMA2_Channel5_BASE))
/* DMA data transfer direction -----------------------------------------------*/
#define DMA_DIR_PeripheralDST ((u32)0x00000010)
#define DMA_DIR_PeripheralSRC ((u32)0x00000000)
#define IS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || \
((DIR) == DMA_DIR_PeripheralSRC))
/* DMA peripheral incremented mode -------------------------------------------*/
#define DMA_PeripheralInc_Enable ((u32)0x00000040)
#define DMA_PeripheralInc_Disable ((u32)0x00000000)
#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \
((STATE) == DMA_PeripheralInc_Disable))
/* DMA memory incremented mode -----------------------------------------------*/
#define DMA_MemoryInc_Enable ((u32)0x00000080)
#define DMA_MemoryInc_Disable ((u32)0x00000000)
#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \
((STATE) == DMA_MemoryInc_Disable))
/* DMA peripheral data size --------------------------------------------------*/
#define DMA_PeripheralDataSize_Byte ((u32)0x00000000)
#define DMA_PeripheralDataSize_HalfWord ((u32)0x00000100)
#define DMA_PeripheralDataSize_Word ((u32)0x00000200)
#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || \
((SIZE) == DMA_PeripheralDataSize_HalfWord) || \
((SIZE) == DMA_PeripheralDataSize_Word))
/* DMA memory data size ------------------------------------------------------*/
#define DMA_MemoryDataSize_Byte ((u32)0x00000000)
#define DMA_MemoryDataSize_HalfWord ((u32)0x00000400)
#define DMA_MemoryDataSize_Word ((u32)0x00000800)
#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || \
((SIZE) == DMA_MemoryDataSize_HalfWord) || \
((SIZE) == DMA_MemoryDataSize_Word))
/* DMA circular/normal mode --------------------------------------------------*/
#define DMA_Mode_Circular ((u32)0x00000020)
#define DMA_Mode_Normal ((u32)0x00000000)
#define IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal))
/* DMA priority level --------------------------------------------------------*/
#define DMA_Priority_VeryHigh ((u32)0x00003000)
#define DMA_Priority_High ((u32)0x00002000)
#define DMA_Priority_Medium ((u32)0x00001000)
#define DMA_Priority_Low ((u32)0x00000000)
#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || \
((PRIORITY) == DMA_Priority_High) || \
((PRIORITY) == DMA_Priority_Medium) || \
((PRIORITY) == DMA_Priority_Low))
/* DMA memory to memory ------------------------------------------------------*/
#define DMA_M2M_Enable ((u32)0x00004000)
#define DMA_M2M_Disable ((u32)0x00000000)
#define IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable))
/* DMA interrupts definition -------------------------------------------------*/
#define DMA_IT_TC ((u32)0x00000002)
#define DMA_IT_HT ((u32)0x00000004)
#define DMA_IT_TE ((u32)0x00000008)
#define IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00))
/* For DMA1 */
#define DMA1_IT_GL1 ((u32)0x00000001)
#define DMA1_IT_TC1 ((u32)0x00000002)
#define DMA1_IT_HT1 ((u32)0x00000004)
#define DMA1_IT_TE1 ((u32)0x00000008)
#define DMA1_IT_GL2 ((u32)0x00000010)
#define DMA1_IT_TC2 ((u32)0x00000020)
#define DMA1_IT_HT2 ((u32)0x00000040)
#define DMA1_IT_TE2 ((u32)0x00000080)
#define DMA1_IT_GL3 ((u32)0x00000100)
#define DMA1_IT_TC3 ((u32)0x00000200)
#define DMA1_IT_HT3 ((u32)0x00000400)
#define DMA1_IT_TE3 ((u32)0x00000800)
#define DMA1_IT_GL4 ((u32)0x00001000)
#define DMA1_IT_TC4 ((u32)0x00002000)
#define DMA1_IT_HT4 ((u32)0x00004000)
#define DMA1_IT_TE4 ((u32)0x00008000)
#define DMA1_IT_GL5 ((u32)0x00010000)
#define DMA1_IT_TC5 ((u32)0x00020000)
#define DMA1_IT_HT5 ((u32)0x00040000)
#define DMA1_IT_TE5 ((u32)0x00080000)
#define DMA1_IT_GL6 ((u32)0x00100000)
#define DMA1_IT_TC6 ((u32)0x00200000)
#define DMA1_IT_HT6 ((u32)0x00400000)
#define DMA1_IT_TE6 ((u32)0x00800000)
#define DMA1_IT_GL7 ((u32)0x01000000)
#define DMA1_IT_TC7 ((u32)0x02000000)
#define DMA1_IT_HT7 ((u32)0x04000000)
#define DMA1_IT_TE7 ((u32)0x08000000)
/* For DMA2 */
#define DMA2_IT_GL1 ((u32)0x10000001)
#define DMA2_IT_TC1 ((u32)0x10000002)
#define DMA2_IT_HT1 ((u32)0x10000004)
#define DMA2_IT_TE1 ((u32)0x10000008)
#define DMA2_IT_GL2 ((u32)0x10000010)
#define DMA2_IT_TC2 ((u32)0x10000020)
#define DMA2_IT_HT2 ((u32)0x10000040)
#define DMA2_IT_TE2 ((u32)0x10000080)
#define DMA2_IT_GL3 ((u32)0x10000100)
#define DMA2_IT_TC3 ((u32)0x10000200)
#define DMA2_IT_HT3 ((u32)0x10000400)
#define DMA2_IT_TE3 ((u32)0x10000800)
#define DMA2_IT_GL4 ((u32)0x10001000)
#define DMA2_IT_TC4 ((u32)0x10002000)
#define DMA2_IT_HT4 ((u32)0x10004000)
#define DMA2_IT_TE4 ((u32)0x10008000)
#define DMA2_IT_GL5 ((u32)0x10010000)
#define DMA2_IT_TC5 ((u32)0x10020000)
#define DMA2_IT_HT5 ((u32)0x10040000)
#define DMA2_IT_TE5 ((u32)0x10080000)
#define IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00))
#define IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || \
((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || \
((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || \
((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || \
((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || \
((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || \
((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || \
((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || \
((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || \
((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5) || \
((IT) == DMA1_IT_GL6) || ((IT) == DMA1_IT_TC6) || \
((IT) == DMA1_IT_HT6) || ((IT) == DMA1_IT_TE6) || \
((IT) == DMA1_IT_GL7) || ((IT) == DMA1_IT_TC7) || \
((IT) == DMA1_IT_HT7) || ((IT) == DMA1_IT_TE7) || \
((IT) == DMA2_IT_GL1) || ((IT) == DMA2_IT_TC1) || \
((IT) == DMA2_IT_HT1) || ((IT) == DMA2_IT_TE1) || \
((IT) == DMA2_IT_GL2) || ((IT) == DMA2_IT_TC2) || \
((IT) == DMA2_IT_HT2) || ((IT) == DMA2_IT_TE2) || \
((IT) == DMA2_IT_GL3) || ((IT) == DMA2_IT_TC3) || \
((IT) == DMA2_IT_HT3) || ((IT) == DMA2_IT_TE3) || \
((IT) == DMA2_IT_GL4) || ((IT) == DMA2_IT_TC4) || \
((IT) == DMA2_IT_HT4) || ((IT) == DMA2_IT_TE4) || \
((IT) == DMA2_IT_GL5) || ((IT) == DMA2_IT_TC5) || \
((IT) == DMA2_IT_HT5) || ((IT) == DMA2_IT_TE5))
/* DMA flags definition ------------------------------------------------------*/
/* For DMA1 */
#define DMA1_FLAG_GL1 ((u32)0x00000001)
#define DMA1_FLAG_TC1 ((u32)0x00000002)
#define DMA1_FLAG_HT1 ((u32)0x00000004)
#define DMA1_FLAG_TE1 ((u32)0x00000008)
#define DMA1_FLAG_GL2 ((u32)0x00000010)
#define DMA1_FLAG_TC2 ((u32)0x00000020)
#define DMA1_FLAG_HT2 ((u32)0x00000040)
#define DMA1_FLAG_TE2 ((u32)0x00000080)
#define DMA1_FLAG_GL3 ((u32)0x00000100)
#define DMA1_FLAG_TC3 ((u32)0x00000200)
#define DMA1_FLAG_HT3 ((u32)0x00000400)
#define DMA1_FLAG_TE3 ((u32)0x00000800)
#define DMA1_FLAG_GL4 ((u32)0x00001000)
#define DMA1_FLAG_TC4 ((u32)0x00002000)
#define DMA1_FLAG_HT4 ((u32)0x00004000)
#define DMA1_FLAG_TE4 ((u32)0x00008000)
#define DMA1_FLAG_GL5 ((u32)0x00010000)
#define DMA1_FLAG_TC5 ((u32)0x00020000)
#define DMA1_FLAG_HT5 ((u32)0x00040000)
#define DMA1_FLAG_TE5 ((u32)0x00080000)
#define DMA1_FLAG_GL6 ((u32)0x00100000)
#define DMA1_FLAG_TC6 ((u32)0x00200000)
#define DMA1_FLAG_HT6 ((u32)0x00400000)
#define DMA1_FLAG_TE6 ((u32)0x00800000)
#define DMA1_FLAG_GL7 ((u32)0x01000000)
#define DMA1_FLAG_TC7 ((u32)0x02000000)
#define DMA1_FLAG_HT7 ((u32)0x04000000)
#define DMA1_FLAG_TE7 ((u32)0x08000000)
/* For DMA2 */
#define DMA2_FLAG_GL1 ((u32)0x10000001)
#define DMA2_FLAG_TC1 ((u32)0x10000002)
#define DMA2_FLAG_HT1 ((u32)0x10000004)
#define DMA2_FLAG_TE1 ((u32)0x10000008)
#define DMA2_FLAG_GL2 ((u32)0x10000010)
#define DMA2_FLAG_TC2 ((u32)0x10000020)
#define DMA2_FLAG_HT2 ((u32)0x10000040)
#define DMA2_FLAG_TE2 ((u32)0x10000080)
#define DMA2_FLAG_GL3 ((u32)0x10000100)
#define DMA2_FLAG_TC3 ((u32)0x10000200)
#define DMA2_FLAG_HT3 ((u32)0x10000400)
#define DMA2_FLAG_TE3 ((u32)0x10000800)
#define DMA2_FLAG_GL4 ((u32)0x10001000)
#define DMA2_FLAG_TC4 ((u32)0x10002000)
#define DMA2_FLAG_HT4 ((u32)0x10004000)
#define DMA2_FLAG_TE4 ((u32)0x10008000)
#define DMA2_FLAG_GL5 ((u32)0x10010000)
#define DMA2_FLAG_TC5 ((u32)0x10020000)
#define DMA2_FLAG_HT5 ((u32)0x10040000)
#define DMA2_FLAG_TE5 ((u32)0x10080000)
#define IS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00))
#define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || \
((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || \
((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || \
((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || \
((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || \
((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || \
((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || \
((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || \
((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || \
((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5) || \
((FLAG) == DMA1_FLAG_GL6) || ((FLAG) == DMA1_FLAG_TC6) || \
((FLAG) == DMA1_FLAG_HT6) || ((FLAG) == DMA1_FLAG_TE6) || \
((FLAG) == DMA1_FLAG_GL7) || ((FLAG) == DMA1_FLAG_TC7) || \
((FLAG) == DMA1_FLAG_HT7) || ((FLAG) == DMA1_FLAG_TE7) || \
((FLAG) == DMA2_FLAG_GL1) || ((FLAG) == DMA2_FLAG_TC1) || \
((FLAG) == DMA2_FLAG_HT1) || ((FLAG) == DMA2_FLAG_TE1) || \
((FLAG) == DMA2_FLAG_GL2) || ((FLAG) == DMA2_FLAG_TC2) || \
((FLAG) == DMA2_FLAG_HT2) || ((FLAG) == DMA2_FLAG_TE2) || \
((FLAG) == DMA2_FLAG_GL3) || ((FLAG) == DMA2_FLAG_TC3) || \
((FLAG) == DMA2_FLAG_HT3) || ((FLAG) == DMA2_FLAG_TE3) || \
((FLAG) == DMA2_FLAG_GL4) || ((FLAG) == DMA2_FLAG_TC4) || \
((FLAG) == DMA2_FLAG_HT4) || ((FLAG) == DMA2_FLAG_TE4) || \
((FLAG) == DMA2_FLAG_GL5) || ((FLAG) == DMA2_FLAG_TC5) || \
((FLAG) == DMA2_FLAG_HT5) || ((FLAG) == DMA2_FLAG_TE5))
/* DMA Buffer Size -----------------------------------------------------------*/
#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx);
void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct);
void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct);
void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState);
void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, u32 DMA_IT, FunctionalState NewState);
u16 DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx);
FlagStatus DMA_GetFlagStatus(u32 DMA_FLAG);
void DMA_ClearFlag(u32 DMA_FLAG);
ITStatus DMA_GetITStatus(u32 DMA_IT);
void DMA_ClearITPendingBit(u32 DMA_IT);
#endif /*__STM32F10x_DMA_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_exti.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* EXTI firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_EXTI_H
#define __STM32F10x_EXTI_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* EXTI mode enumeration -----------------------------------------------------*/
typedef enum
{
EXTI_Mode_Interrupt = 0x00,
EXTI_Mode_Event = 0x04
}EXTIMode_TypeDef;
#define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
/* EXTI Trigger enumeration --------------------------------------------------*/
typedef enum
{
EXTI_Trigger_Rising = 0x08,
EXTI_Trigger_Falling = 0x0C,
EXTI_Trigger_Rising_Falling = 0x10
}EXTITrigger_TypeDef;
#define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
((TRIGGER) == EXTI_Trigger_Falling) || \
((TRIGGER) == EXTI_Trigger_Rising_Falling))
/* EXTI Init Structure definition --------------------------------------------*/
typedef struct
{
u32 EXTI_Line;
EXTIMode_TypeDef EXTI_Mode;
EXTITrigger_TypeDef EXTI_Trigger;
FunctionalState EXTI_LineCmd;
}EXTI_InitTypeDef;
/* Exported constants --------------------------------------------------------*/
/* EXTI Lines ----------------------------------------------------------------*/
#define EXTI_Line0 ((u32)0x00001) /* External interrupt line 0 */
#define EXTI_Line1 ((u32)0x00002) /* External interrupt line 1 */
#define EXTI_Line2 ((u32)0x00004) /* External interrupt line 2 */
#define EXTI_Line3 ((u32)0x00008) /* External interrupt line 3 */
#define EXTI_Line4 ((u32)0x00010) /* External interrupt line 4 */
#define EXTI_Line5 ((u32)0x00020) /* External interrupt line 5 */
#define EXTI_Line6 ((u32)0x00040) /* External interrupt line 6 */
#define EXTI_Line7 ((u32)0x00080) /* External interrupt line 7 */
#define EXTI_Line8 ((u32)0x00100) /* External interrupt line 8 */
#define EXTI_Line9 ((u32)0x00200) /* External interrupt line 9 */
#define EXTI_Line10 ((u32)0x00400) /* External interrupt line 10 */
#define EXTI_Line11 ((u32)0x00800) /* External interrupt line 11 */
#define EXTI_Line12 ((u32)0x01000) /* External interrupt line 12 */
#define EXTI_Line13 ((u32)0x02000) /* External interrupt line 13 */
#define EXTI_Line14 ((u32)0x04000) /* External interrupt line 14 */
#define EXTI_Line15 ((u32)0x08000) /* External interrupt line 15 */
#define EXTI_Line16 ((u32)0x10000) /* External interrupt line 16
Connected to the PVD Output */
#define EXTI_Line17 ((u32)0x20000) /* External interrupt line 17
Connected to the RTC Alarm event */
#define EXTI_Line18 ((u32)0x40000) /* External interrupt line 18
Connected to the USB Wakeup from
suspend event */
#define IS_EXTI_LINE(LINE) ((((LINE) & (u32)0xFFF80000) == 0x00) && ((LINE) != (u16)0x00))
#define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
((LINE) == EXTI_Line18))
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void EXTI_DeInit(void);
void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
void EXTI_GenerateSWInterrupt(u32 EXTI_Line);
FlagStatus EXTI_GetFlagStatus(u32 EXTI_Line);
void EXTI_ClearFlag(u32 EXTI_Line);
ITStatus EXTI_GetITStatus(u32 EXTI_Line);
void EXTI_ClearITPendingBit(u32 EXTI_Line);
#endif /* __STM32F10x_EXTI_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_flash.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* FLASH firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_FLASH_H
#define __STM32F10x_FLASH_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
#ifdef _FLASH_PROG
/* FLASH Status */
typedef enum
{
FLASH_BUSY = 1,
FLASH_ERROR_PG,
FLASH_ERROR_WRP,
FLASH_COMPLETE,
FLASH_TIMEOUT
}FLASH_Status;
#endif
/* Flash Latency -------------------------------------------------------------*/
#define FLASH_Latency_0 ((u32)0x00000000) /* FLASH Zero Latency cycle */
#define FLASH_Latency_1 ((u32)0x00000001) /* FLASH One Latency cycle */
#define FLASH_Latency_2 ((u32)0x00000002) /* FLASH Two Latency cycles */
#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \
((LATENCY) == FLASH_Latency_1) || \
((LATENCY) == FLASH_Latency_2))
/* Half Cycle Enable/Disable -------------------------------------------------*/
#define FLASH_HalfCycleAccess_Enable ((u32)0x00000008) /* FLASH Half Cycle Enable */
#define FLASH_HalfCycleAccess_Disable ((u32)0x00000000) /* FLASH Half Cycle Disable */
#define IS_FLASH_HALFCYCLEACCESS_STATE(STATE) (((STATE) == FLASH_HalfCycleAccess_Enable) || \
((STATE) == FLASH_HalfCycleAccess_Disable))
/* Prefetch Buffer Enable/Disable --------------------------------------------*/
#define FLASH_PrefetchBuffer_Enable ((u32)0x00000010) /* FLASH Prefetch Buffer Enable */
#define FLASH_PrefetchBuffer_Disable ((u32)0x00000000) /* FLASH Prefetch Buffer Disable */
#define IS_FLASH_PREFETCHBUFFER_STATE(STATE) (((STATE) == FLASH_PrefetchBuffer_Enable) || \
((STATE) == FLASH_PrefetchBuffer_Disable))
#ifdef _FLASH_PROG
/* Option Bytes Write Protection ---------------------------------------------*/
/* Values to be used with STM32F10Xxx Medium-density devices: FLASH memory density
ranges between 32 and 128 Kbytes with page size equal to 1 Kbytes */
#define FLASH_WRProt_Pages0to3 ((u32)0x00000001) /* Write protection of page 0 to 3 */
#define FLASH_WRProt_Pages4to7 ((u32)0x00000002) /* Write protection of page 4 to 7 */
#define FLASH_WRProt_Pages8to11 ((u32)0x00000004) /* Write protection of page 8 to 11 */
#define FLASH_WRProt_Pages12to15 ((u32)0x00000008) /* Write protection of page 12 to 15 */
#define FLASH_WRProt_Pages16to19 ((u32)0x00000010) /* Write protection of page 16 to 19 */
#define FLASH_WRProt_Pages20to23 ((u32)0x00000020) /* Write protection of page 20 to 23 */
#define FLASH_WRProt_Pages24to27 ((u32)0x00000040) /* Write protection of page 24 to 27 */
#define FLASH_WRProt_Pages28to31 ((u32)0x00000080) /* Write protection of page 28 to 31 */
#define FLASH_WRProt_Pages32to35 ((u32)0x00000100) /* Write protection of page 32 to 35 */
#define FLASH_WRProt_Pages36to39 ((u32)0x00000200) /* Write protection of page 36 to 39 */
#define FLASH_WRProt_Pages40to43 ((u32)0x00000400) /* Write protection of page 40 to 43 */
#define FLASH_WRProt_Pages44to47 ((u32)0x00000800) /* Write protection of page 44 to 47 */
#define FLASH_WRProt_Pages48to51 ((u32)0x00001000) /* Write protection of page 48 to 51 */
#define FLASH_WRProt_Pages52to55 ((u32)0x00002000) /* Write protection of page 52 to 55 */
#define FLASH_WRProt_Pages56to59 ((u32)0x00004000) /* Write protection of page 56 to 59 */
#define FLASH_WRProt_Pages60to63 ((u32)0x00008000) /* Write protection of page 60 to 63 */
#define FLASH_WRProt_Pages64to67 ((u32)0x00010000) /* Write protection of page 64 to 67 */
#define FLASH_WRProt_Pages68to71 ((u32)0x00020000) /* Write protection of page 68 to 71 */
#define FLASH_WRProt_Pages72to75 ((u32)0x00040000) /* Write protection of page 72 to 75 */
#define FLASH_WRProt_Pages76to79 ((u32)0x00080000) /* Write protection of page 76 to 79 */
#define FLASH_WRProt_Pages80to83 ((u32)0x00100000) /* Write protection of page 80 to 83 */
#define FLASH_WRProt_Pages84to87 ((u32)0x00200000) /* Write protection of page 84 to 87 */
#define FLASH_WRProt_Pages88to91 ((u32)0x00400000) /* Write protection of page 88 to 91 */
#define FLASH_WRProt_Pages92to95 ((u32)0x00800000) /* Write protection of page 92 to 95 */
#define FLASH_WRProt_Pages96to99 ((u32)0x01000000) /* Write protection of page 96 to 99 */
#define FLASH_WRProt_Pages100to103 ((u32)0x02000000) /* Write protection of page 100 to 103 */
#define FLASH_WRProt_Pages104to107 ((u32)0x04000000) /* Write protection of page 104 to 107 */
#define FLASH_WRProt_Pages108to111 ((u32)0x08000000) /* Write protection of page 108 to 111 */
#define FLASH_WRProt_Pages112to115 ((u32)0x10000000) /* Write protection of page 112 to 115 */
#define FLASH_WRProt_Pages116to119 ((u32)0x20000000) /* Write protection of page 115 to 119 */
#define FLASH_WRProt_Pages120to123 ((u32)0x40000000) /* Write protection of page 120 to 123 */
#define FLASH_WRProt_Pages124to127 ((u32)0x80000000) /* Write protection of page 124 to 127 */
/* Values to be used with STM32F10Xxx High-density devices: FLASH memory density
ranges between 256 and 512 Kbytes with page size equal to 2 Kbytes */
#define FLASH_WRProt_Pages0to1 ((u32)0x00000001) /* Write protection of page 0 to 1 */
#define FLASH_WRProt_Pages2to3 ((u32)0x00000002) /* Write protection of page 2 to 3 */
#define FLASH_WRProt_Pages4to5 ((u32)0x00000004) /* Write protection of page 4 to 5 */
#define FLASH_WRProt_Pages6to7 ((u32)0x00000008) /* Write protection of page 6 to 7 */
#define FLASH_WRProt_Pages8to9 ((u32)0x00000010) /* Write protection of page 8 to 9 */
#define FLASH_WRProt_Pages10to11 ((u32)0x00000020) /* Write protection of page 10 to 11 */
#define FLASH_WRProt_Pages12to13 ((u32)0x00000040) /* Write protection of page 12 to 13 */
#define FLASH_WRProt_Pages14to15 ((u32)0x00000080) /* Write protection of page 14 to 15 */
#define FLASH_WRProt_Pages16to17 ((u32)0x00000100) /* Write protection of page 16 to 17 */
#define FLASH_WRProt_Pages18to19 ((u32)0x00000200) /* Write protection of page 18 to 19 */
#define FLASH_WRProt_Pages20to21 ((u32)0x00000400) /* Write protection of page 20 to 21 */
#define FLASH_WRProt_Pages22to23 ((u32)0x00000800) /* Write protection of page 22 to 23 */
#define FLASH_WRProt_Pages24to25 ((u32)0x00001000) /* Write protection of page 24 to 25 */
#define FLASH_WRProt_Pages26to27 ((u32)0x00002000) /* Write protection of page 26 to 27 */
#define FLASH_WRProt_Pages28to29 ((u32)0x00004000) /* Write protection of page 28 to 29 */
#define FLASH_WRProt_Pages30to31 ((u32)0x00008000) /* Write protection of page 30 to 31 */
#define FLASH_WRProt_Pages32to33 ((u32)0x00010000) /* Write protection of page 32 to 33 */
#define FLASH_WRProt_Pages34to35 ((u32)0x00020000) /* Write protection of page 34 to 35 */
#define FLASH_WRProt_Pages36to37 ((u32)0x00040000) /* Write protection of page 36 to 37 */
#define FLASH_WRProt_Pages38to39 ((u32)0x00080000) /* Write protection of page 38 to 39 */
#define FLASH_WRProt_Pages40to41 ((u32)0x00100000) /* Write protection of page 40 to 41 */
#define FLASH_WRProt_Pages42to43 ((u32)0x00200000) /* Write protection of page 42 to 43 */
#define FLASH_WRProt_Pages44to45 ((u32)0x00400000) /* Write protection of page 44 to 45 */
#define FLASH_WRProt_Pages46to47 ((u32)0x00800000) /* Write protection of page 46 to 47 */
#define FLASH_WRProt_Pages48to49 ((u32)0x01000000) /* Write protection of page 48 to 49 */
#define FLASH_WRProt_Pages50to51 ((u32)0x02000000) /* Write protection of page 50 to 51 */
#define FLASH_WRProt_Pages52to53 ((u32)0x04000000) /* Write protection of page 52 to 53 */
#define FLASH_WRProt_Pages54to55 ((u32)0x08000000) /* Write protection of page 54 to 55 */
#define FLASH_WRProt_Pages56to57 ((u32)0x10000000) /* Write protection of page 56 to 57 */
#define FLASH_WRProt_Pages58to59 ((u32)0x20000000) /* Write protection of page 58 to 59 */
#define FLASH_WRProt_Pages60to61 ((u32)0x40000000) /* Write protection of page 60 to 61 */
#define FLASH_WRProt_Pages62to255 ((u32)0x80000000) /* Write protection of page 62 to 255 */
#define FLASH_WRProt_AllPages ((u32)0xFFFFFFFF) /* Write protection of all Pages */
#define IS_FLASH_WRPROT_PAGE(PAGE) (((PAGE) != 0x00000000))
#define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x0807FFFF))
#define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == 0x1FFFF804) || ((ADDRESS) == 0x1FFFF806))
/* Option Bytes IWatchdog ----------------------------------------------------*/
#define OB_IWDG_SW ((u16)0x0001) /* Software IWDG selected */
#define OB_IWDG_HW ((u16)0x0000) /* Hardware IWDG selected */
#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
/* Option Bytes nRST_STOP ----------------------------------------------------*/
#define OB_STOP_NoRST ((u16)0x0002) /* No reset generated when entering in STOP */
#define OB_STOP_RST ((u16)0x0000) /* Reset generated when entering in STOP */
#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST))
/* Option Bytes nRST_STDBY ---------------------------------------------------*/
#define OB_STDBY_NoRST ((u16)0x0004) /* No reset generated when entering in STANDBY */
#define OB_STDBY_RST ((u16)0x0000) /* Reset generated when entering in STANDBY */
#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST))
/* FLASH Interrupts ----------------------------------------------------------*/
#define FLASH_IT_ERROR ((u32)0x00000400) /* FPEC error interrupt source */
#define FLASH_IT_EOP ((u32)0x00001000) /* End of FLASH Operation Interrupt source */
#define IS_FLASH_IT(IT) ((((IT) & (u32)0xFFFFEBFF) == 0x00000000) && (((IT) != 0x00000000)))
/* FLASH Flags ---------------------------------------------------------------*/
#define FLASH_FLAG_BSY ((u32)0x00000001) /* FLASH Busy flag */
#define FLASH_FLAG_EOP ((u32)0x00000020) /* FLASH End of Operation flag */
#define FLASH_FLAG_PGERR ((u32)0x00000004) /* FLASH Program error flag */
#define FLASH_FLAG_WRPRTERR ((u32)0x00000010) /* FLASH Write protected error flag */
#define FLASH_FLAG_OPTERR ((u32)0x00000001) /* FLASH Option Byte error flag */
#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (u32)0xFFFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000))
#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \
((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \
((FLAG) == FLASH_FLAG_OPTERR))
#endif
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void FLASH_SetLatency(u32 FLASH_Latency);
void FLASH_HalfCycleAccessCmd(u32 FLASH_HalfCycleAccess);
void FLASH_PrefetchBufferCmd(u32 FLASH_PrefetchBuffer);
#ifdef _FLASH_PROG
void FLASH_Unlock(void);
void FLASH_Lock(void);
FLASH_Status FLASH_ErasePage(u32 Page_Address);
FLASH_Status FLASH_EraseAllPages(void);
FLASH_Status FLASH_EraseOptionBytes(void);
FLASH_Status FLASH_ProgramWord(u32 Address, u32 Data);
FLASH_Status FLASH_ProgramHalfWord(u32 Address, u16 Data);
FLASH_Status FLASH_ProgramOptionByteData(u32 Address, u8 Data);
FLASH_Status FLASH_EnableWriteProtection(u32 FLASH_Pages);
FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState);
FLASH_Status FLASH_UserOptionByteConfig(u16 OB_IWDG, u16 OB_STOP, u16 OB_STDBY);
u32 FLASH_GetUserOptionByte(void);
u32 FLASH_GetWriteProtectionOptionByte(void);
FlagStatus FLASH_GetReadOutProtectionStatus(void);
FlagStatus FLASH_GetPrefetchBufferStatus(void);
void FLASH_ITConfig(u16 FLASH_IT, FunctionalState NewState);
FlagStatus FLASH_GetFlagStatus(u16 FLASH_FLAG);
void FLASH_ClearFlag(u16 FLASH_FLAG);
FLASH_Status FLASH_GetStatus(void);
FLASH_Status FLASH_WaitForLastOperation(u32 Timeout);
#endif
#endif /* __STM32F10x_FLASH_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
* File Name : stm32f10x_fsmc.h
* Author : MCD Application Team
* Version : V2.0.3Patch1
* Date : 04/06/2009
* Description : This file contains all the functions prototypes for the
* FSMC firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_FSMC_H
#define __STM32F10x_FSMC_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* Timing parameters For NOR/SRAM Banks */
typedef struct
{
u32 FSMC_AddressSetupTime;
u32 FSMC_AddressHoldTime;
u32 FSMC_DataSetupTime;
u32 FSMC_BusTurnAroundDuration;
u32 FSMC_CLKDivision;
u32 FSMC_DataLatency;
u32 FSMC_AccessMode;
}FSMC_NORSRAMTimingInitTypeDef;
/* FSMC NOR/SRAM Init structure definition */
typedef struct
{
u32 FSMC_Bank;
u32 FSMC_DataAddressMux;
u32 FSMC_MemoryType;
u32 FSMC_MemoryDataWidth;
u32 FSMC_BurstAccessMode;
u32 FSMC_WaitSignalPolarity;
u32 FSMC_WrapMode;
u32 FSMC_WaitSignalActive;
u32 FSMC_WriteOperation;
u32 FSMC_WaitSignal;
u32 FSMC_ExtendedMode;
u32 FSMC_WriteBurst;
/* Timing Parameters for write and read access if the ExtendedMode is not used*/
FSMC_NORSRAMTimingInitTypeDef* FSMC_ReadWriteTimingStruct;
/* Timing Parameters for write access if the ExtendedMode is used*/
FSMC_NORSRAMTimingInitTypeDef* FSMC_WriteTimingStruct;
}FSMC_NORSRAMInitTypeDef;
/* Timing parameters For FSMC NAND and PCCARD Banks */
typedef struct
{
u32 FSMC_SetupTime;
u32 FSMC_WaitSetupTime;
u32 FSMC_HoldSetupTime;
u32 FSMC_HiZSetupTime;
}FSMC_NAND_PCCARDTimingInitTypeDef;
/* FSMC NAND Init structure definition */
typedef struct
{
u32 FSMC_Bank;
u32 FSMC_Waitfeature;
u32 FSMC_MemoryDataWidth;
u32 FSMC_ECC;
u32 FSMC_ECCPageSize;
u32 FSMC_TCLRSetupTime;
u32 FSMC_TARSetupTime;
/* FSMC Common Space Timing */
FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct;
/* FSMC Attribute Space Timing */
FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct;
}FSMC_NANDInitTypeDef;
/* FSMC PCCARD Init structure definition */
typedef struct
{
u32 FSMC_Waitfeature;
u32 FSMC_TCLRSetupTime;
u32 FSMC_TARSetupTime;
/* FSMC Common Space Timing */
FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct;
/* FSMC Attribute Space Timing */
FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct;
/* FSMC IO Space Timing */
FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_IOSpaceTimingStruct;
}FSMC_PCCARDInitTypeDef;
/* Exported constants --------------------------------------------------------*/
/*-------------------------------FSMC Banks definitions ----------------------*/
#define FSMC_Bank1_NORSRAM1 ((u32)0x00000000)
#define FSMC_Bank1_NORSRAM2 ((u32)0x00000002)
#define FSMC_Bank1_NORSRAM3 ((u32)0x00000004)
#define FSMC_Bank1_NORSRAM4 ((u32)0x00000006)
#define FSMC_Bank2_NAND ((u32)0x00000010)
#define FSMC_Bank3_NAND ((u32)0x00000100)
#define FSMC_Bank4_PCCARD ((u32)0x00001000)
#define IS_FSMC_NORSRAM_BANK(BANK) (((BANK) == FSMC_Bank1_NORSRAM1) || \
((BANK) == FSMC_Bank1_NORSRAM2) || \
((BANK) == FSMC_Bank1_NORSRAM3) || \
((BANK) == FSMC_Bank1_NORSRAM4))
#define IS_FSMC_NAND_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
((BANK) == FSMC_Bank3_NAND))
#define IS_FSMC_GETFLAG_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
((BANK) == FSMC_Bank3_NAND) || \
((BANK) == FSMC_Bank4_PCCARD))
#define IS_FSMC_IT_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
((BANK) == FSMC_Bank3_NAND) || \
((BANK) == FSMC_Bank4_PCCARD))
/*------------------------------- NOR/SRAM Banks -----------------------------*/
/* FSMC Data/Address Bus Multiplexing ----------------------------------------*/
#define FSMC_DataAddressMux_Disable ((u32)0x00000000)
#define FSMC_DataAddressMux_Enable ((u32)0x00000002)
#define IS_FSMC_MUX(MUX) (((MUX) == FSMC_DataAddressMux_Disable) || \
((MUX) == FSMC_DataAddressMux_Enable))
/* FSMC Memory Type ----------------------------------------------------------*/
#define FSMC_MemoryType_SRAM ((u32)0x00000000)
#define FSMC_MemoryType_PSRAM ((u32)0x00000004)
#define FSMC_MemoryType_NOR ((u32)0x00000008)
#define IS_FSMC_MEMORY(MEMORY) (((MEMORY) == FSMC_MemoryType_SRAM) || \
((MEMORY) == FSMC_MemoryType_PSRAM)|| \
((MEMORY) == FSMC_MemoryType_NOR))
/* FSMC Data Width ----------------------------------------------------------*/
#define FSMC_MemoryDataWidth_8b ((u32)0x00000000)
#define FSMC_MemoryDataWidth_16b ((u32)0x00000010)
#define IS_FSMC_MEMORY_WIDTH(WIDTH) (((WIDTH) == FSMC_MemoryDataWidth_8b) || \
((WIDTH) == FSMC_MemoryDataWidth_16b))
/* FSMC Burst Access Mode ----------------------------------------------------*/
#define FSMC_BurstAccessMode_Disable ((u32)0x00000000)
#define FSMC_BurstAccessMode_Enable ((u32)0x00000100)
#define IS_FSMC_BURSTMODE(STATE) (((STATE) == FSMC_BurstAccessMode_Disable) || \
((STATE) == FSMC_BurstAccessMode_Enable))
/* FSMC Wait Signal Polarity -------------------------------------------------*/
#define FSMC_WaitSignalPolarity_Low ((u32)0x00000000)
#define FSMC_WaitSignalPolarity_High ((u32)0x00000200)
#define IS_FSMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FSMC_WaitSignalPolarity_Low) || \
((POLARITY) == FSMC_WaitSignalPolarity_High))
/* FSMC Wrap Mode ------------------------------------------------------------*/
#define FSMC_WrapMode_Disable ((u32)0x00000000)
#define FSMC_WrapMode_Enable ((u32)0x00000400)
#define IS_FSMC_WRAP_MODE(MODE) (((MODE) == FSMC_WrapMode_Disable) || \
((MODE) == FSMC_WrapMode_Enable))
/* FSMC Wait Timing ----------------------------------------------------------*/
#define FSMC_WaitSignalActive_BeforeWaitState ((u32)0x00000000)
#define FSMC_WaitSignalActive_DuringWaitState ((u32)0x00000800)
#define IS_FSMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FSMC_WaitSignalActive_BeforeWaitState) || \
((ACTIVE) == FSMC_WaitSignalActive_DuringWaitState))
/* FSMC Write Operation ------------------------------------------------------*/
#define FSMC_WriteOperation_Disable ((u32)0x00000000)
#define FSMC_WriteOperation_Enable ((u32)0x00001000)
#define IS_FSMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FSMC_WriteOperation_Disable) || \
((OPERATION) == FSMC_WriteOperation_Enable))
/* FSMC Wait Signal ----------------------------------------------------------*/
#define FSMC_WaitSignal_Disable ((u32)0x00000000)
#define FSMC_WaitSignal_Enable ((u32)0x00002000)
#define IS_FSMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FSMC_WaitSignal_Disable) || \
((SIGNAL) == FSMC_WaitSignal_Enable))
/* FSMC Extended Mode --------------------------------------------------------*/
#define FSMC_ExtendedMode_Disable ((u32)0x00000000)
#define FSMC_ExtendedMode_Enable ((u32)0x00004000)
#define IS_FSMC_EXTENDED_MODE(MODE) (((MODE) == FSMC_ExtendedMode_Disable) || \
((MODE) == FSMC_ExtendedMode_Enable))
/* FSMC Write Burst ----------------------------------------------------------*/
#define FSMC_WriteBurst_Disable ((u32)0x00000000)
#define FSMC_WriteBurst_Enable ((u32)0x00080000)
#define IS_FSMC_WRITE_BURST(BURST) (((BURST) == FSMC_WriteBurst_Disable) || \
((BURST) == FSMC_WriteBurst_Enable))
/* FSMC Address Setup Time ---------------------------------------------------*/
#define IS_FSMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 0xF)
/* FSMC Address Hold Time ----------------------------------------------------*/
#define IS_FSMC_ADDRESS_HOLD_TIME(TIME) ((TIME) <= 0xF)
/* FSMC Data Setup Time ------------------------------------------------------*/
#define IS_FSMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 0xFF))
/* FSMC Bus Turn around Duration ---------------------------------------------*/
#define IS_FSMC_TURNAROUND_TIME(TIME) ((TIME) <= 0xF)
/* FSMC CLK Division ---------------------------------------------------------*/
#define IS_FSMC_CLK_DIV(DIV) ((DIV) <= 0xF)
/* FSMC Data Latency ---------------------------------------------------------*/
#define IS_FSMC_DATA_LATENCY(LATENCY) ((LATENCY) <= 0xF)
/* FSMC Access Mode ----------------------------------------------------------*/
#define FSMC_AccessMode_A ((u32)0x00000000)
#define FSMC_AccessMode_B ((u32)0x10000000)
#define FSMC_AccessMode_C ((u32)0x20000000)
#define FSMC_AccessMode_D ((u32)0x30000000)
#define IS_FSMC_ACCESS_MODE(MODE) (((MODE) == FSMC_AccessMode_A) || \
((MODE) == FSMC_AccessMode_B) || \
((MODE) == FSMC_AccessMode_C) || \
((MODE) == FSMC_AccessMode_D))
/*----------------------------- NAND and PCCARD Banks ------------------------*/
/* FSMC Wait feature ---------------------------------------------------------*/
#define FSMC_Waitfeature_Disable ((u32)0x00000000)
#define FSMC_Waitfeature_Enable ((u32)0x00000002)
#define IS_FSMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FSMC_Waitfeature_Disable) || \
((FEATURE) == FSMC_Waitfeature_Enable))
/* FSMC Memory Data Width ----------------------------------------------------*/
#define FSMC_MemoryDataWidth_8b ((u32)0x00000000)
#define FSMC_MemoryDataWidth_16b ((u32)0x00000010)
#define IS_FSMC_DATA_WIDTH(WIDTH) (((WIDTH) == FSMC_MemoryDataWidth_8b) || \
((WIDTH) == FSMC_MemoryDataWidth_16b))
/* FSMC ECC ------------------------------------------------------------------*/
#define FSMC_ECC_Disable ((u32)0x00000000)
#define FSMC_ECC_Enable ((u32)0x00000040)
#define IS_FSMC_ECC_STATE(STATE) (((STATE) == FSMC_ECC_Disable) || \
((STATE) == FSMC_ECC_Enable))
/* FSMC ECC Page Size --------------------------------------------------------*/
#define FSMC_ECCPageSize_256Bytes ((u32)0x00000000)
#define FSMC_ECCPageSize_512Bytes ((u32)0x00020000)
#define FSMC_ECCPageSize_1024Bytes ((u32)0x00040000)
#define FSMC_ECCPageSize_2048Bytes ((u32)0x00060000)
#define FSMC_ECCPageSize_4096Bytes ((u32)0x00080000)
#define FSMC_ECCPageSize_8192Bytes ((u32)0x000A0000)
#define IS_FSMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FSMC_ECCPageSize_256Bytes) || \
((SIZE) == FSMC_ECCPageSize_512Bytes) || \
((SIZE) == FSMC_ECCPageSize_1024Bytes) || \
((SIZE) == FSMC_ECCPageSize_2048Bytes) || \
((SIZE) == FSMC_ECCPageSize_4096Bytes) || \
((SIZE) == FSMC_ECCPageSize_8192Bytes))
/* FSMC TCLR Setup Time ------------------------------------------------------*/
#define IS_FSMC_TCLR_TIME(TIME) ((TIME) <= 0xFF)
/* FSMC TAR Setup Time -------------------------------------------------------*/
#define IS_FSMC_TAR_TIME(TIME) ((TIME) <= 0xFF)
/* FSMC Setup Time ----------------------------------------------------*/
#define IS_FSMC_SETUP_TIME(TIME) ((TIME) <= 0xFF)
/* FSMC Wait Setup Time -----------------------------------------------*/
#define IS_FSMC_WAIT_TIME(TIME) ((TIME) <= 0xFF)
/* FSMC Hold Setup Time -----------------------------------------------*/
#define IS_FSMC_HOLD_TIME(TIME) ((TIME) <= 0xFF)
/* FSMC HiZ Setup Time ------------------------------------------------*/
#define IS_FSMC_HIZ_TIME(TIME) ((TIME) <= 0xFF)
/* FSMC Interrupt sources ----------------------------------------------------*/
#define FSMC_IT_RisingEdge ((u32)0x00000008)
#define FSMC_IT_Level ((u32)0x00000010)
#define FSMC_IT_FallingEdge ((u32)0x00000020)
#define IS_FSMC_IT(IT) ((((IT) & (u32)0xFFFFFFC7) == 0x00000000) && ((IT) != 0x00000000))
#define IS_FSMC_GET_IT(IT) (((IT) == FSMC_IT_RisingEdge) || \
((IT) == FSMC_IT_Level) || \
((IT) == FSMC_IT_FallingEdge))
/* FSMC Flags ----------------------------------------------------------------*/
#define FSMC_FLAG_RisingEdge ((u32)0x00000001)
#define FSMC_FLAG_Level ((u32)0x00000002)
#define FSMC_FLAG_FallingEdge ((u32)0x00000004)
#define FSMC_FLAG_FEMPT ((u32)0x00000040)
#define IS_FSMC_GET_FLAG(FLAG) (((FLAG) == FSMC_FLAG_RisingEdge) || \
((FLAG) == FSMC_FLAG_Level) || \
((FLAG) == FSMC_FLAG_FallingEdge) || \
((FLAG) == FSMC_FLAG_FEMPT))
#define IS_FSMC_CLEAR_FLAG(FLAG) ((((FLAG) & (u32)0xFFFFFFF8) == 0x00000000) && ((FLAG) != 0x00000000))
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void FSMC_NORSRAMDeInit(u32 FSMC_Bank);
void FSMC_NANDDeInit(u32 FSMC_Bank);
void FSMC_PCCARDDeInit(void);
void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct);
void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct);
void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct);
void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct);
void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct);
void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct);
void FSMC_NORSRAMCmd(u32 FSMC_Bank, FunctionalState NewState);
void FSMC_NANDCmd(u32 FSMC_Bank, FunctionalState NewState);
void FSMC_PCCARDCmd(FunctionalState NewState);
void FSMC_NANDECCCmd(u32 FSMC_Bank, FunctionalState NewState);
u32 FSMC_GetECC(u32 FSMC_Bank);
void FSMC_ITConfig(u32 FSMC_Bank, u32 FSMC_IT, FunctionalState NewState);
FlagStatus FSMC_GetFlagStatus(u32 FSMC_Bank, u32 FSMC_FLAG);
void FSMC_ClearFlag(u32 FSMC_Bank, u32 FSMC_FLAG);
ITStatus FSMC_GetITStatus(u32 FSMC_Bank, u32 FSMC_IT);
void FSMC_ClearITPendingBit(u32 FSMC_Bank, u32 FSMC_IT);
#endif /*__STM32F10x_FSMC_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_gpio.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* GPIO firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_GPIO_H
#define __STM32F10x_GPIO_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
#define IS_GPIO_ALL_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == GPIOA_BASE) || \
((*(u32*)&(PERIPH)) == GPIOB_BASE) || \
((*(u32*)&(PERIPH)) == GPIOC_BASE) || \
((*(u32*)&(PERIPH)) == GPIOD_BASE) || \
((*(u32*)&(PERIPH)) == GPIOE_BASE) || \
((*(u32*)&(PERIPH)) == GPIOF_BASE) || \
((*(u32*)&(PERIPH)) == GPIOG_BASE))
/* Output Maximum frequency selection ----------------------------------------*/
typedef enum
{
GPIO_Speed_10MHz = 1,
GPIO_Speed_2MHz,
GPIO_Speed_50MHz
}GPIOSpeed_TypeDef;
#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \
((SPEED) == GPIO_Speed_50MHz))
/* Configuration Mode enumeration --------------------------------------------*/
typedef enum
{ GPIO_Mode_AIN = 0x0,
GPIO_Mode_IN_FLOATING = 0x04,
GPIO_Mode_IPD = 0x28,
GPIO_Mode_IPU = 0x48,
GPIO_Mode_Out_OD = 0x14,
GPIO_Mode_Out_PP = 0x10,
GPIO_Mode_AF_OD = 0x1C,
GPIO_Mode_AF_PP = 0x18
}GPIOMode_TypeDef;
#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \
((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \
((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \
((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP))
/* GPIO Init structure definition */
typedef struct
{
u16 GPIO_Pin;
GPIOSpeed_TypeDef GPIO_Speed;
GPIOMode_TypeDef GPIO_Mode;
}GPIO_InitTypeDef;
/* Bit_SET and Bit_RESET enumeration -----------------------------------------*/
typedef enum
{ Bit_RESET = 0,
Bit_SET
}BitAction;
#define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))
/* Exported constants --------------------------------------------------------*/
/* GPIO pins define ----------------------------------------------------------*/
#define GPIO_Pin_0 ((u16)0x0001) /* Pin 0 selected */
#define GPIO_Pin_1 ((u16)0x0002) /* Pin 1 selected */
#define GPIO_Pin_2 ((u16)0x0004) /* Pin 2 selected */
#define GPIO_Pin_3 ((u16)0x0008) /* Pin 3 selected */
#define GPIO_Pin_4 ((u16)0x0010) /* Pin 4 selected */
#define GPIO_Pin_5 ((u16)0x0020) /* Pin 5 selected */
#define GPIO_Pin_6 ((u16)0x0040) /* Pin 6 selected */
#define GPIO_Pin_7 ((u16)0x0080) /* Pin 7 selected */
#define GPIO_Pin_8 ((u16)0x0100) /* Pin 8 selected */
#define GPIO_Pin_9 ((u16)0x0200) /* Pin 9 selected */
#define GPIO_Pin_10 ((u16)0x0400) /* Pin 10 selected */
#define GPIO_Pin_11 ((u16)0x0800) /* Pin 11 selected */
#define GPIO_Pin_12 ((u16)0x1000) /* Pin 12 selected */
#define GPIO_Pin_13 ((u16)0x2000) /* Pin 13 selected */
#define GPIO_Pin_14 ((u16)0x4000) /* Pin 14 selected */
#define GPIO_Pin_15 ((u16)0x8000) /* Pin 15 selected */
#define GPIO_Pin_All ((u16)0xFFFF) /* All pins selected */
#define IS_GPIO_PIN(PIN) ((((PIN) & (u16)0x00) == 0x00) && ((PIN) != (u16)0x00))
#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
((PIN) == GPIO_Pin_1) || \
((PIN) == GPIO_Pin_2) || \
((PIN) == GPIO_Pin_3) || \
((PIN) == GPIO_Pin_4) || \
((PIN) == GPIO_Pin_5) || \
((PIN) == GPIO_Pin_6) || \
((PIN) == GPIO_Pin_7) || \
((PIN) == GPIO_Pin_8) || \
((PIN) == GPIO_Pin_9) || \
((PIN) == GPIO_Pin_10) || \
((PIN) == GPIO_Pin_11) || \
((PIN) == GPIO_Pin_12) || \
((PIN) == GPIO_Pin_13) || \
((PIN) == GPIO_Pin_14) || \
((PIN) == GPIO_Pin_15))
/* GPIO Remap define ---------------------------------------------------------*/
#define GPIO_Remap_SPI1 ((u32)0x00000001) /* SPI1 Alternate Function mapping */
#define GPIO_Remap_I2C1 ((u32)0x00000002) /* I2C1 Alternate Function mapping */
#define GPIO_Remap_USART1 ((u32)0x00000004) /* USART1 Alternate Function mapping */
#define GPIO_Remap_USART2 ((u32)0x00000008) /* USART2 Alternate Function mapping */
#define GPIO_PartialRemap_USART3 ((u32)0x00140010) /* USART3 Partial Alternate Function mapping */
#define GPIO_FullRemap_USART3 ((u32)0x00140030) /* USART3 Full Alternate Function mapping */
#define GPIO_PartialRemap_TIM1 ((u32)0x00160040) /* TIM1 Partial Alternate Function mapping */
#define GPIO_FullRemap_TIM1 ((u32)0x001600C0) /* TIM1 Full Alternate Function mapping */
#define GPIO_PartialRemap1_TIM2 ((u32)0x00180100) /* TIM2 Partial1 Alternate Function mapping */
#define GPIO_PartialRemap2_TIM2 ((u32)0x00180200) /* TIM2 Partial2 Alternate Function mapping */
#define GPIO_FullRemap_TIM2 ((u32)0x00180300) /* TIM2 Full Alternate Function mapping */
#define GPIO_PartialRemap_TIM3 ((u32)0x001A0800) /* TIM3 Partial Alternate Function mapping */
#define GPIO_FullRemap_TIM3 ((u32)0x001A0C00) /* TIM3 Full Alternate Function mapping */
#define GPIO_Remap_TIM4 ((u32)0x00001000) /* TIM4 Alternate Function mapping */
#define GPIO_Remap1_CAN ((u32)0x001D4000) /* CAN Alternate Function mapping */
#define GPIO_Remap2_CAN ((u32)0x001D6000) /* CAN Alternate Function mapping */
#define GPIO_Remap_PD01 ((u32)0x00008000) /* PD01 Alternate Function mapping */
#define GPIO_Remap_TIM5CH4_LSI ((u32)0x00200001) /* LSI connected to TIM5 Channel4 input capture for calibration */
#define GPIO_Remap_ADC1_ETRGINJ ((u32)0x00200002) /* ADC1 External Trigger Injected Conversion remapping */
#define GPIO_Remap_ADC1_ETRGREG ((u32)0x00200004) /* ADC1 External Trigger Regular Conversion remapping */
#define GPIO_Remap_ADC2_ETRGINJ ((u32)0x00200008) /* ADC2 External Trigger Injected Conversion remapping */
#define GPIO_Remap_ADC2_ETRGREG ((u32)0x00200010) /* ADC2 External Trigger Regular Conversion remapping */
#define GPIO_Remap_SWJ_NoJTRST ((u32)0x00300100) /* Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */
#define GPIO_Remap_SWJ_JTAGDisable ((u32)0x00300200) /* JTAG-DP Disabled and SW-DP Enabled */
#define GPIO_Remap_SWJ_Disable ((u32)0x00300400) /* Full SWJ Disabled (JTAG-DP + SW-DP) */
#define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \
((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || \
((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || \
((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || \
((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || \
((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || \
((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || \
((REMAP) == GPIO_Remap1_CAN) || ((REMAP) == GPIO_Remap2_CAN) || \
((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || \
((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \
((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || \
((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable)|| \
((REMAP) == GPIO_Remap_SWJ_Disable))
/* GPIO Port Sources ---------------------------------------------------------*/
#define GPIO_PortSourceGPIOA ((u8)0x00)
#define GPIO_PortSourceGPIOB ((u8)0x01)
#define GPIO_PortSourceGPIOC ((u8)0x02)
#define GPIO_PortSourceGPIOD ((u8)0x03)
#define GPIO_PortSourceGPIOE ((u8)0x04)
#define GPIO_PortSourceGPIOF ((u8)0x05)
#define GPIO_PortSourceGPIOG ((u8)0x06)
#define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
((PORTSOURCE) == GPIO_PortSourceGPIOE))
#define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
((PORTSOURCE) == GPIO_PortSourceGPIOE) || \
((PORTSOURCE) == GPIO_PortSourceGPIOF) || \
((PORTSOURCE) == GPIO_PortSourceGPIOG))
/* GPIO Pin sources ----------------------------------------------------------*/
#define GPIO_PinSource0 ((u8)0x00)
#define GPIO_PinSource1 ((u8)0x01)
#define GPIO_PinSource2 ((u8)0x02)
#define GPIO_PinSource3 ((u8)0x03)
#define GPIO_PinSource4 ((u8)0x04)
#define GPIO_PinSource5 ((u8)0x05)
#define GPIO_PinSource6 ((u8)0x06)
#define GPIO_PinSource7 ((u8)0x07)
#define GPIO_PinSource8 ((u8)0x08)
#define GPIO_PinSource9 ((u8)0x09)
#define GPIO_PinSource10 ((u8)0x0A)
#define GPIO_PinSource11 ((u8)0x0B)
#define GPIO_PinSource12 ((u8)0x0C)
#define GPIO_PinSource13 ((u8)0x0D)
#define GPIO_PinSource14 ((u8)0x0E)
#define GPIO_PinSource15 ((u8)0x0F)
#define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \
((PINSOURCE) == GPIO_PinSource1) || \
((PINSOURCE) == GPIO_PinSource2) || \
((PINSOURCE) == GPIO_PinSource3) || \
((PINSOURCE) == GPIO_PinSource4) || \
((PINSOURCE) == GPIO_PinSource5) || \
((PINSOURCE) == GPIO_PinSource6) || \
((PINSOURCE) == GPIO_PinSource7) || \
((PINSOURCE) == GPIO_PinSource8) || \
((PINSOURCE) == GPIO_PinSource9) || \
((PINSOURCE) == GPIO_PinSource10) || \
((PINSOURCE) == GPIO_PinSource11) || \
((PINSOURCE) == GPIO_PinSource12) || \
((PINSOURCE) == GPIO_PinSource13) || \
((PINSOURCE) == GPIO_PinSource14) || \
((PINSOURCE) == GPIO_PinSource15))
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void GPIO_DeInit(GPIO_TypeDef* GPIOx);
void GPIO_AFIODeInit(void);
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
u8 GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, u16 GPIO_Pin);
u16 GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
u8 GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, u16 GPIO_Pin);
u16 GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
void GPIO_SetBits(GPIO_TypeDef* GPIOx, u16 GPIO_Pin);
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, u16 GPIO_Pin);
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, u16 GPIO_Pin, BitAction BitVal);
void GPIO_Write(GPIO_TypeDef* GPIOx, u16 PortVal);
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, u16 GPIO_Pin);
void GPIO_EventOutputConfig(u8 GPIO_PortSource, u8 GPIO_PinSource);
void GPIO_EventOutputCmd(FunctionalState NewState);
void GPIO_PinRemapConfig(u32 GPIO_Remap, FunctionalState NewState);
void GPIO_EXTILineConfig(u8 GPIO_PortSource, u8 GPIO_PinSource);
#endif /* __STM32F10x_GPIO_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
* File Name : stm32f10x_i2c.h
* Author : MCD Application Team
* Version : V2.0.3Patch1
* Date : 04/06/2009
* Description : This file contains all the functions prototypes for the
* I2C firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_I2C_H
#define __STM32F10x_I2C_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* I2C Init structure definition */
typedef struct
{
u16 I2C_Mode;
u16 I2C_DutyCycle;
u16 I2C_OwnAddress1;
u16 I2C_Ack;
u16 I2C_AcknowledgedAddress;
u32 I2C_ClockSpeed;
}I2C_InitTypeDef;
/* Exported constants --------------------------------------------------------*/
#define IS_I2C_ALL_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == I2C1_BASE) || \
((*(u32*)&(PERIPH)) == I2C2_BASE))
/* I2C modes */
#define I2C_Mode_I2C ((u16)0x0000)
#define I2C_Mode_SMBusDevice ((u16)0x0002)
#define I2C_Mode_SMBusHost ((u16)0x000A)
#define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
((MODE) == I2C_Mode_SMBusDevice) || \
((MODE) == I2C_Mode_SMBusHost))
/* I2C duty cycle in fast mode */
#define I2C_DutyCycle_16_9 ((u16)0x4000)
#define I2C_DutyCycle_2 ((u16)0xBFFF)
#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \
((CYCLE) == I2C_DutyCycle_2))
/* I2C cknowledgementy */
#define I2C_Ack_Enable ((u16)0x0400)
#define I2C_Ack_Disable ((u16)0x0000)
#define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \
((STATE) == I2C_Ack_Disable))
/* I2C transfer direction */
#define I2C_Direction_Transmitter ((u8)0x00)
#define I2C_Direction_Receiver ((u8)0x01)
#define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
((DIRECTION) == I2C_Direction_Receiver))
/* I2C acknowledged address defines */
#define I2C_AcknowledgedAddress_7bit ((u16)0x4000)
#define I2C_AcknowledgedAddress_10bit ((u16)0xC000)
#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
((ADDRESS) == I2C_AcknowledgedAddress_10bit))
/* I2C registers */
#define I2C_Register_CR1 ((u8)0x00)
#define I2C_Register_CR2 ((u8)0x04)
#define I2C_Register_OAR1 ((u8)0x08)
#define I2C_Register_OAR2 ((u8)0x0C)
#define I2C_Register_DR ((u8)0x10)
#define I2C_Register_SR1 ((u8)0x14)
#define I2C_Register_SR2 ((u8)0x18)
#define I2C_Register_CCR ((u8)0x1C)
#define I2C_Register_TRISE ((u8)0x20)
#define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
((REGISTER) == I2C_Register_CR2) || \
((REGISTER) == I2C_Register_OAR1) || \
((REGISTER) == I2C_Register_OAR2) || \
((REGISTER) == I2C_Register_DR) || \
((REGISTER) == I2C_Register_SR1) || \
((REGISTER) == I2C_Register_SR2) || \
((REGISTER) == I2C_Register_CCR) || \
((REGISTER) == I2C_Register_TRISE))
/* I2C SMBus alert pin level */
#define I2C_SMBusAlert_Low ((u16)0x2000)
#define I2C_SMBusAlert_High ((u16)0xDFFF)
#define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \
((ALERT) == I2C_SMBusAlert_High))
/* I2C PEC position */
#define I2C_PECPosition_Next ((u16)0x0800)
#define I2C_PECPosition_Current ((u16)0xF7FF)
#define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \
((POSITION) == I2C_PECPosition_Current))
/* I2C interrupts definition */
#define I2C_IT_BUF ((u16)0x0400)
#define I2C_IT_EVT ((u16)0x0200)
#define I2C_IT_ERR ((u16)0x0100)
#define IS_I2C_CONFIG_IT(IT) ((((IT) & (u16)0xF8FF) == 0x00) && ((IT) != 0x00))
/* I2C interrupts definition */
#define I2C_IT_SMBALERT ((u32)0x01008000)
#define I2C_IT_TIMEOUT ((u32)0x01004000)
#define I2C_IT_PECERR ((u32)0x01001000)
#define I2C_IT_OVR ((u32)0x01000800)
#define I2C_IT_AF ((u32)0x01000400)
#define I2C_IT_ARLO ((u32)0x01000200)
#define I2C_IT_BERR ((u32)0x01000100)
#define I2C_IT_TXE ((u32)0x06000080)
#define I2C_IT_RXNE ((u32)0x06000040)
#define I2C_IT_STOPF ((u32)0x02000010)
#define I2C_IT_ADD10 ((u32)0x02000008)
#define I2C_IT_BTF ((u32)0x02000004)
#define I2C_IT_ADDR ((u32)0x02000002)
#define I2C_IT_SB ((u32)0x02000001)
#define IS_I2C_CLEAR_IT(IT) ((((IT) & (u16)0x20FF) == 0x00) && ((IT) != (u16)0x00))
#define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \
((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \
((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \
((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \
((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \
((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \
((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB))
/* I2C flags definition */
/* SR2 register flags */
#define I2C_FLAG_DUALF ((u32)0x00800000)
#define I2C_FLAG_SMBHOST ((u32)0x00400000)
#define I2C_FLAG_SMBDEFAULT ((u32)0x00200000)
#define I2C_FLAG_GENCALL ((u32)0x00100000)
#define I2C_FLAG_TRA ((u32)0x00040000)
#define I2C_FLAG_BUSY ((u32)0x00020000)
#define I2C_FLAG_MSL ((u32)0x00010000)
/* SR1 register flags */
#define I2C_FLAG_SMBALERT ((u32)0x10008000)
#define I2C_FLAG_TIMEOUT ((u32)0x10004000)
#define I2C_FLAG_PECERR ((u32)0x10001000)
#define I2C_FLAG_OVR ((u32)0x10000800)
#define I2C_FLAG_AF ((u32)0x10000400)
#define I2C_FLAG_ARLO ((u32)0x10000200)
#define I2C_FLAG_BERR ((u32)0x10000100)
#define I2C_FLAG_TXE ((u32)0x10000080)
#define I2C_FLAG_RXNE ((u32)0x10000040)
#define I2C_FLAG_STOPF ((u32)0x10000010)
#define I2C_FLAG_ADD10 ((u32)0x10000008)
#define I2C_FLAG_BTF ((u32)0x10000004)
#define I2C_FLAG_ADDR ((u32)0x10000002)
#define I2C_FLAG_SB ((u32)0x10000001)
#define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (u16)0x20FF) == 0x00) && ((FLAG) != (u16)0x00))
#define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \
((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \
((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \
((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \
((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \
((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \
((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \
((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \
((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \
((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \
((FLAG) == I2C_FLAG_SB))
/* I2C Events */
/* EV1 */
#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((u32)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((u32)0x00020002) /* BUSY and ADDR flags */
#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((u32)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((u32)0x00820000) /* DUALF and BUSY flags */
#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((u32)0x00120000) /* GENCALL and BUSY flags */
/* EV2 */
#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((u32)0x00020040) /* BUSY and RXNE flags */
/* EV3 */
#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((u32)0x00060084) /* TRA, BUSY, TXE and BTF flags */
/* EV4 */
#define I2C_EVENT_SLAVE_STOP_DETECTED ((u32)0x00000010) /* STOPF flag */
/* EV5 */
#define I2C_EVENT_MASTER_MODE_SELECT ((u32)0x00030001) /* BUSY, MSL and SB flag */
/* EV6 */
#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((u32)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((u32)0x00030002) /* BUSY, MSL and ADDR flags */
/* EV7 */
#define I2C_EVENT_MASTER_BYTE_RECEIVED ((u32)0x00030040) /* BUSY, MSL and RXNE flags */
/* EV8 */
#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((u32)0x00070080) /* TRA, BUSY, MSL, TXE flags */
/* EV8_2 */
#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((u32)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
/* EV9 */
#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((u32)0x00030008) /* BUSY, MSL and ADD10 flags */
/* EV3_2 */
#define I2C_EVENT_SLAVE_ACK_FAILURE ((u32)0x00000400) /* AF flag */
#define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \
((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \
((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \
((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \
((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \
((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \
((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \
((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \
((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \
((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \
((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE))
/* I2C own address1 -----------------------------------------------------------*/
#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)
/* I2C clock speed ------------------------------------------------------------*/
#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void I2C_DeInit(I2C_TypeDef* I2Cx);
void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, u8 Address);
void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_ITConfig(I2C_TypeDef* I2Cx, u16 I2C_IT, FunctionalState NewState);
void I2C_SendData(I2C_TypeDef* I2Cx, u8 Data);
u8 I2C_ReceiveData(I2C_TypeDef* I2Cx);
void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, u8 Address, u8 I2C_Direction);
u16 I2C_ReadRegister(I2C_TypeDef* I2Cx, u8 I2C_Register);
void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, u16 I2C_SMBusAlert);
void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, u16 I2C_PECPosition);
void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
u8 I2C_GetPEC(I2C_TypeDef* I2Cx);
void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, u16 I2C_DutyCycle);
u32 I2C_GetLastEvent(I2C_TypeDef* I2Cx);
ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, u32 I2C_EVENT);
FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, u32 I2C_FLAG);
void I2C_ClearFlag(I2C_TypeDef* I2Cx, u32 I2C_FLAG);
ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, u32 I2C_IT);
void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, u32 I2C_IT);
#endif /*__STM32F10x_I2C_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_iwdg.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* IWDG firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_IWDG_H
#define __STM32F10x_IWDG_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Write access to IWDG_PR and IWDG_RLR registers */
#define IWDG_WriteAccess_Enable ((u16)0x5555)
#define IWDG_WriteAccess_Disable ((u16)0x0000)
#define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
((ACCESS) == IWDG_WriteAccess_Disable))
/* IWDG prescaler */
#define IWDG_Prescaler_4 ((u8)0x00)
#define IWDG_Prescaler_8 ((u8)0x01)
#define IWDG_Prescaler_16 ((u8)0x02)
#define IWDG_Prescaler_32 ((u8)0x03)
#define IWDG_Prescaler_64 ((u8)0x04)
#define IWDG_Prescaler_128 ((u8)0x05)
#define IWDG_Prescaler_256 ((u8)0x06)
#define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \
((PRESCALER) == IWDG_Prescaler_8) || \
((PRESCALER) == IWDG_Prescaler_16) || \
((PRESCALER) == IWDG_Prescaler_32) || \
((PRESCALER) == IWDG_Prescaler_64) || \
((PRESCALER) == IWDG_Prescaler_128)|| \
((PRESCALER) == IWDG_Prescaler_256))
/* IWDG Flag */
#define IWDG_FLAG_PVU ((u16)0x0001)
#define IWDG_FLAG_RVU ((u16)0x0002)
#define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
#define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void IWDG_WriteAccessCmd(u16 IWDG_WriteAccess);
void IWDG_SetPrescaler(u8 IWDG_Prescaler);
void IWDG_SetReload(u16 Reload);
void IWDG_ReloadCounter(void);
void IWDG_Enable(void);
FlagStatus IWDG_GetFlagStatus(u16 IWDG_FLAG);
#endif /* __STM32F10x_IWDG_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_lib.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file includes the peripherals header files in the
* user application.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_LIB_H
#define __STM32F10x_LIB_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
#ifdef _ADC
#include "stm32f10x_adc.h"
#endif /*_ADC */
#ifdef _BKP
#include "stm32f10x_bkp.h"
#endif /*_BKP */
#ifdef _CAN
#include "stm32f10x_can.h"
#endif /*_CAN */
#ifdef _CRC
#include "stm32f10x_crc.h"
#endif /*_CRC */
#ifdef _DAC
#include "stm32f10x_dac.h"
#endif /*_DAC */
#ifdef _DBGMCU
#include "stm32f10x_dbgmcu.h"
#endif /*_DBGMCU */
#ifdef _DMA
#include "stm32f10x_dma.h"
#endif /*_DMA */
#ifdef _EXTI
#include "stm32f10x_exti.h"
#endif /*_EXTI */
#ifdef _FLASH
#include "stm32f10x_flash.h"
#endif /*_FLASH */
#ifdef _FSMC
#include "stm32f10x_fsmc.h"
#endif /*_FSMC */
#ifdef _GPIO
#include "stm32f10x_gpio.h"
#endif /*_GPIO */
#ifdef _I2C
#include "stm32f10x_i2c.h"
#endif /*_I2C */
#ifdef _IWDG
#include "stm32f10x_iwdg.h"
#endif /*_IWDG */
#ifdef _NVIC
#include "stm32f10x_nvic.h"
#endif /*_NVIC */
#ifdef _PWR
#include "stm32f10x_pwr.h"
#endif /*_PWR */
#ifdef _RCC
#include "stm32f10x_rcc.h"
#endif /*_RCC */
#ifdef _RTC
#include "stm32f10x_rtc.h"
#endif /*_RTC */
#ifdef _SDIO
#include "stm32f10x_sdio.h"
#endif /*_SDIO */
#ifdef _SPI
#include "stm32f10x_spi.h"
#endif /*_SPI */
#ifdef _SysTick
#include "stm32f10x_systick.h"
#endif /*_SysTick */
#ifdef _TIM
#include "stm32f10x_tim.h"
#endif /*_TIM */
#ifdef _USART
#include "stm32f10x_usart.h"
#endif /*_USART */
#ifdef _WWDG
#include "stm32f10x_wwdg.h"
#endif /*_WWDG */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void debug(void);
#endif /* __STM32F10x_LIB_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_nvic.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* NVIC firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_NVIC_H
#define __STM32F10x_NVIC_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* NVIC Init Structure definition */
typedef struct
{
u8 NVIC_IRQChannel;
u8 NVIC_IRQChannelPreemptionPriority;
u8 NVIC_IRQChannelSubPriority;
FunctionalState NVIC_IRQChannelCmd;
} NVIC_InitTypeDef;
/* Exported constants --------------------------------------------------------*/
/* IRQ Channels --------------------------------------------------------------*/
#define WWDG_IRQChannel ((u8)0x00) /* Window WatchDog Interrupt */
#define PVD_IRQChannel ((u8)0x01) /* PVD through EXTI Line detection Interrupt */
#define TAMPER_IRQChannel ((u8)0x02) /* Tamper Interrupt */
#define RTC_IRQChannel ((u8)0x03) /* RTC global Interrupt */
#define FLASH_IRQChannel ((u8)0x04) /* FLASH global Interrupt */
#define RCC_IRQChannel ((u8)0x05) /* RCC global Interrupt */
#define EXTI0_IRQChannel ((u8)0x06) /* EXTI Line0 Interrupt */
#define EXTI1_IRQChannel ((u8)0x07) /* EXTI Line1 Interrupt */
#define EXTI2_IRQChannel ((u8)0x08) /* EXTI Line2 Interrupt */
#define EXTI3_IRQChannel ((u8)0x09) /* EXTI Line3 Interrupt */
#define EXTI4_IRQChannel ((u8)0x0A) /* EXTI Line4 Interrupt */
#define DMA1_Channel1_IRQChannel ((u8)0x0B) /* DMA1 Channel 1 global Interrupt */
#define DMA1_Channel2_IRQChannel ((u8)0x0C) /* DMA1 Channel 2 global Interrupt */
#define DMA1_Channel3_IRQChannel ((u8)0x0D) /* DMA1 Channel 3 global Interrupt */
#define DMA1_Channel4_IRQChannel ((u8)0x0E) /* DMA1 Channel 4 global Interrupt */
#define DMA1_Channel5_IRQChannel ((u8)0x0F) /* DMA1 Channel 5 global Interrupt */
#define DMA1_Channel6_IRQChannel ((u8)0x10) /* DMA1 Channel 6 global Interrupt */
#define DMA1_Channel7_IRQChannel ((u8)0x11) /* DMA1 Channel 7 global Interrupt */
#define ADC1_2_IRQChannel ((u8)0x12) /* ADC1 et ADC2 global Interrupt */
#define USB_HP_CAN_TX_IRQChannel ((u8)0x13) /* USB High Priority or CAN TX Interrupts */
#define USB_LP_CAN_RX0_IRQChannel ((u8)0x14) /* USB Low Priority or CAN RX0 Interrupts */
#define CAN_RX1_IRQChannel ((u8)0x15) /* CAN RX1 Interrupt */
#define CAN_SCE_IRQChannel ((u8)0x16) /* CAN SCE Interrupt */
#define EXTI9_5_IRQChannel ((u8)0x17) /* External Line[9:5] Interrupts */
#define TIM1_BRK_IRQChannel ((u8)0x18) /* TIM1 Break Interrupt */
#define TIM1_UP_IRQChannel ((u8)0x19) /* TIM1 Update Interrupt */
#define TIM1_TRG_COM_IRQChannel ((u8)0x1A) /* TIM1 Trigger and Commutation Interrupt */
#define TIM1_CC_IRQChannel ((u8)0x1B) /* TIM1 Capture Compare Interrupt */
#define TIM2_IRQChannel ((u8)0x1C) /* TIM2 global Interrupt */
#define TIM3_IRQChannel ((u8)0x1D) /* TIM3 global Interrupt */
#define TIM4_IRQChannel ((u8)0x1E) /* TIM4 global Interrupt */
#define I2C1_EV_IRQChannel ((u8)0x1F) /* I2C1 Event Interrupt */
#define I2C1_ER_IRQChannel ((u8)0x20) /* I2C1 Error Interrupt */
#define I2C2_EV_IRQChannel ((u8)0x21) /* I2C2 Event Interrupt */
#define I2C2_ER_IRQChannel ((u8)0x22) /* I2C2 Error Interrupt */
#define SPI1_IRQChannel ((u8)0x23) /* SPI1 global Interrupt */
#define SPI2_IRQChannel ((u8)0x24) /* SPI2 global Interrupt */
#define USART1_IRQChannel ((u8)0x25) /* USART1 global Interrupt */
#define USART2_IRQChannel ((u8)0x26) /* USART2 global Interrupt */
#define USART3_IRQChannel ((u8)0x27) /* USART3 global Interrupt */
#define EXTI15_10_IRQChannel ((u8)0x28) /* External Line[15:10] Interrupts */
#define RTCAlarm_IRQChannel ((u8)0x29) /* RTC Alarm through EXTI Line Interrupt */
#define USBWakeUp_IRQChannel ((u8)0x2A) /* USB WakeUp from suspend through EXTI Line Interrupt */
#define TIM8_BRK_IRQChannel ((u8)0x2B) /* TIM8 Break Interrupt */
#define TIM8_UP_IRQChannel ((u8)0x2C) /* TIM8 Update Interrupt */
#define TIM8_TRG_COM_IRQChannel ((u8)0x2D) /* TIM8 Trigger and Commutation Interrupt */
#define TIM8_CC_IRQChannel ((u8)0x2E) /* TIM8 Capture Compare Interrupt */
#define ADC3_IRQChannel ((u8)0x2F) /* ADC3 global Interrupt */
#define FSMC_IRQChannel ((u8)0x30) /* FSMC global Interrupt */
#define SDIO_IRQChannel ((u8)0x31) /* SDIO global Interrupt */
#define TIM5_IRQChannel ((u8)0x32) /* TIM5 global Interrupt */
#define SPI3_IRQChannel ((u8)0x33) /* SPI3 global Interrupt */
#define UART4_IRQChannel ((u8)0x34) /* UART4 global Interrupt */
#define UART5_IRQChannel ((u8)0x35) /* UART5 global Interrupt */
#define TIM6_IRQChannel ((u8)0x36) /* TIM6 global Interrupt */
#define TIM7_IRQChannel ((u8)0x37) /* TIM7 global Interrupt */
#define DMA2_Channel1_IRQChannel ((u8)0x38) /* DMA2 Channel 1 global Interrupt */
#define DMA2_Channel2_IRQChannel ((u8)0x39) /* DMA2 Channel 2 global Interrupt */
#define DMA2_Channel3_IRQChannel ((u8)0x3A) /* DMA2 Channel 3 global Interrupt */
#define DMA2_Channel4_5_IRQChannel ((u8)0x3B) /* DMA2 Channel 4 and DMA2 Channel 5 global Interrupt */
#define IS_NVIC_IRQ_CHANNEL(CHANNEL) (((CHANNEL) == WWDG_IRQChannel) || \
((CHANNEL) == PVD_IRQChannel) || \
((CHANNEL) == TAMPER_IRQChannel) || \
((CHANNEL) == RTC_IRQChannel) || \
((CHANNEL) == FLASH_IRQChannel) || \
((CHANNEL) == RCC_IRQChannel) || \
((CHANNEL) == EXTI0_IRQChannel) || \
((CHANNEL) == EXTI1_IRQChannel) || \
((CHANNEL) == EXTI2_IRQChannel) || \
((CHANNEL) == EXTI3_IRQChannel) || \
((CHANNEL) == EXTI4_IRQChannel) || \
((CHANNEL) == DMA1_Channel1_IRQChannel) || \
((CHANNEL) == DMA1_Channel2_IRQChannel) || \
((CHANNEL) == DMA1_Channel3_IRQChannel) || \
((CHANNEL) == DMA1_Channel4_IRQChannel) || \
((CHANNEL) == DMA1_Channel5_IRQChannel) || \
((CHANNEL) == DMA1_Channel6_IRQChannel) || \
((CHANNEL) == DMA1_Channel7_IRQChannel) || \
((CHANNEL) == ADC1_2_IRQChannel) || \
((CHANNEL) == USB_HP_CAN_TX_IRQChannel) || \
((CHANNEL) == USB_LP_CAN_RX0_IRQChannel) || \
((CHANNEL) == CAN_RX1_IRQChannel) || \
((CHANNEL) == CAN_SCE_IRQChannel) || \
((CHANNEL) == EXTI9_5_IRQChannel) || \
((CHANNEL) == TIM1_BRK_IRQChannel) || \
((CHANNEL) == TIM1_UP_IRQChannel) || \
((CHANNEL) == TIM1_TRG_COM_IRQChannel) || \
((CHANNEL) == TIM1_CC_IRQChannel) || \
((CHANNEL) == TIM2_IRQChannel) || \
((CHANNEL) == TIM3_IRQChannel) || \
((CHANNEL) == TIM4_IRQChannel) || \
((CHANNEL) == I2C1_EV_IRQChannel) || \
((CHANNEL) == I2C1_ER_IRQChannel) || \
((CHANNEL) == I2C2_EV_IRQChannel) || \
((CHANNEL) == I2C2_ER_IRQChannel) || \
((CHANNEL) == SPI1_IRQChannel) || \
((CHANNEL) == SPI2_IRQChannel) || \
((CHANNEL) == USART1_IRQChannel) || \
((CHANNEL) == USART2_IRQChannel) || \
((CHANNEL) == USART3_IRQChannel) || \
((CHANNEL) == EXTI15_10_IRQChannel) || \
((CHANNEL) == RTCAlarm_IRQChannel) || \
((CHANNEL) == USBWakeUp_IRQChannel) || \
((CHANNEL) == TIM8_BRK_IRQChannel) || \
((CHANNEL) == TIM8_UP_IRQChannel) || \
((CHANNEL) == TIM8_TRG_COM_IRQChannel) || \
((CHANNEL) == TIM8_CC_IRQChannel) || \
((CHANNEL) == ADC3_IRQChannel) || \
((CHANNEL) == FSMC_IRQChannel) || \
((CHANNEL) == SDIO_IRQChannel) || \
((CHANNEL) == TIM5_IRQChannel) || \
((CHANNEL) == SPI3_IRQChannel) || \
((CHANNEL) == UART4_IRQChannel) || \
((CHANNEL) == UART5_IRQChannel) || \
((CHANNEL) == TIM6_IRQChannel) || \
((CHANNEL) == TIM7_IRQChannel) || \
((CHANNEL) == DMA2_Channel1_IRQChannel) || \
((CHANNEL) == DMA2_Channel2_IRQChannel) || \
((CHANNEL) == DMA2_Channel3_IRQChannel) || \
((CHANNEL) == DMA2_Channel4_5_IRQChannel))
/* System Handlers -----------------------------------------------------------*/
#define SystemHandler_NMI ((u32)0x00001F) /* NMI Handler */
#define SystemHandler_HardFault ((u32)0x000000) /* Hard Fault Handler */
#define SystemHandler_MemoryManage ((u32)0x043430) /* Memory Manage Handler */
#define SystemHandler_BusFault ((u32)0x547931) /* Bus Fault Handler */
#define SystemHandler_UsageFault ((u32)0x24C232) /* Usage Fault Handler */
#define SystemHandler_SVCall ((u32)0x01FF40) /* SVCall Handler */
#define SystemHandler_DebugMonitor ((u32)0x0A0080) /* Debug Monitor Handler */
#define SystemHandler_PSV ((u32)0x02829C) /* PSV Handler */
#define SystemHandler_SysTick ((u32)0x02C39A) /* SysTick Handler */
#define IS_CONFIG_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \
((HANDLER) == SystemHandler_BusFault) || \
((HANDLER) == SystemHandler_UsageFault))
#define IS_PRIORITY_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \
((HANDLER) == SystemHandler_BusFault) || \
((HANDLER) == SystemHandler_UsageFault) || \
((HANDLER) == SystemHandler_SVCall) || \
((HANDLER) == SystemHandler_DebugMonitor) || \
((HANDLER) == SystemHandler_PSV) || \
((HANDLER) == SystemHandler_SysTick))
#define IS_GET_PENDING_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \
((HANDLER) == SystemHandler_BusFault) || \
((HANDLER) == SystemHandler_SVCall))
#define IS_SET_PENDING_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_NMI) || \
((HANDLER) == SystemHandler_PSV) || \
((HANDLER) == SystemHandler_SysTick))
#define IS_CLEAR_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_PSV) || \
((HANDLER) == SystemHandler_SysTick))
#define IS_GET_ACTIVE_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \
((HANDLER) == SystemHandler_BusFault) || \
((HANDLER) == SystemHandler_UsageFault) || \
((HANDLER) == SystemHandler_SVCall) || \
((HANDLER) == SystemHandler_DebugMonitor) || \
((HANDLER) == SystemHandler_PSV) || \
((HANDLER) == SystemHandler_SysTick))
#define IS_FAULT_SOURCE_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_HardFault) || \
((HANDLER) == SystemHandler_MemoryManage) || \
((HANDLER) == SystemHandler_BusFault) || \
((HANDLER) == SystemHandler_UsageFault) || \
((HANDLER) == SystemHandler_DebugMonitor))
#define IS_FAULT_ADDRESS_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \
((HANDLER) == SystemHandler_BusFault))
/* Vector Table Base ---------------------------------------------------------*/
#define NVIC_VectTab_RAM ((u32)0x20000000)
#define NVIC_VectTab_FLASH ((u32)0x08000000)
#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
((VECTTAB) == NVIC_VectTab_FLASH))
/* System Low Power ----------------------------------------------------------*/
#define NVIC_LP_SEVONPEND ((u8)0x10)
#define NVIC_LP_SLEEPDEEP ((u8)0x04)
#define NVIC_LP_SLEEPONEXIT ((u8)0x02)
#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
((LP) == NVIC_LP_SLEEPDEEP) || \
((LP) == NVIC_LP_SLEEPONEXIT))
/* Preemption Priority Group -------------------------------------------------*/
#define NVIC_PriorityGroup_0 ((u32)0x700) /* 0 bits for pre-emption priority
4 bits for subpriority */
#define NVIC_PriorityGroup_1 ((u32)0x600) /* 1 bits for pre-emption priority
3 bits for subpriority */
#define NVIC_PriorityGroup_2 ((u32)0x500) /* 2 bits for pre-emption priority
2 bits for subpriority */
#define NVIC_PriorityGroup_3 ((u32)0x400) /* 3 bits for pre-emption priority
1 bits for subpriority */
#define NVIC_PriorityGroup_4 ((u32)0x300) /* 4 bits for pre-emption priority
0 bits for subpriority */
#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
((GROUP) == NVIC_PriorityGroup_1) || \
((GROUP) == NVIC_PriorityGroup_2) || \
((GROUP) == NVIC_PriorityGroup_3) || \
((GROUP) == NVIC_PriorityGroup_4))
#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
#define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x0007FFFF)
#define IS_NVIC_BASE_PRI(PRI) ((PRI) < 0x10)
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NVIC_DeInit(void);
void NVIC_SCBDeInit(void);
void NVIC_PriorityGroupConfig(u32 NVIC_PriorityGroup);
void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
void NVIC_StructInit(NVIC_InitTypeDef* NVIC_InitStruct);
void NVIC_SETPRIMASK(void);
void NVIC_RESETPRIMASK(void);
void NVIC_SETFAULTMASK(void);
void NVIC_RESETFAULTMASK(void);
void NVIC_BASEPRICONFIG(u32 NewPriority);
u32 NVIC_GetBASEPRI(void);
u16 NVIC_GetCurrentPendingIRQChannel(void);
ITStatus NVIC_GetIRQChannelPendingBitStatus(u8 NVIC_IRQChannel);
void NVIC_SetIRQChannelPendingBit(u8 NVIC_IRQChannel);
void NVIC_ClearIRQChannelPendingBit(u8 NVIC_IRQChannel);
u16 NVIC_GetCurrentActiveHandler(void);
ITStatus NVIC_GetIRQChannelActiveBitStatus(u8 NVIC_IRQChannel);
u32 NVIC_GetCPUID(void);
void NVIC_SetVectorTable(u32 NVIC_VectTab, u32 Offset);
void NVIC_GenerateSystemReset(void);
void NVIC_GenerateCoreReset(void);
void NVIC_SystemLPConfig(u8 LowPowerMode, FunctionalState NewState);
void NVIC_SystemHandlerConfig(u32 SystemHandler, FunctionalState NewState);
void NVIC_SystemHandlerPriorityConfig(u32 SystemHandler, u8 SystemHandlerPreemptionPriority,
u8 SystemHandlerSubPriority);
ITStatus NVIC_GetSystemHandlerPendingBitStatus(u32 SystemHandler);
void NVIC_SetSystemHandlerPendingBit(u32 SystemHandler);
void NVIC_ClearSystemHandlerPendingBit(u32 SystemHandler);
ITStatus NVIC_GetSystemHandlerActiveBitStatus(u32 SystemHandler);
u32 NVIC_GetFaultHandlerSources(u32 SystemHandler);
u32 NVIC_GetFaultAddress(u32 SystemHandler);
#endif /* __STM32F10x_NVIC_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_pwr.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* PWR firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_PWR_H
#define __STM32F10x_PWR_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* PVD detection level */
#define PWR_PVDLevel_2V2 ((u32)0x00000000)
#define PWR_PVDLevel_2V3 ((u32)0x00000020)
#define PWR_PVDLevel_2V4 ((u32)0x00000040)
#define PWR_PVDLevel_2V5 ((u32)0x00000060)
#define PWR_PVDLevel_2V6 ((u32)0x00000080)
#define PWR_PVDLevel_2V7 ((u32)0x000000A0)
#define PWR_PVDLevel_2V8 ((u32)0x000000C0)
#define PWR_PVDLevel_2V9 ((u32)0x000000E0)
#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \
((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \
((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \
((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9))
/* Regulator state is STOP mode */
#define PWR_Regulator_ON ((u32)0x00000000)
#define PWR_Regulator_LowPower ((u32)0x00000001)
#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
((REGULATOR) == PWR_Regulator_LowPower))
/* STOP mode entry */
#define PWR_STOPEntry_WFI ((u8)0x01)
#define PWR_STOPEntry_WFE ((u8)0x02)
#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
/* PWR Flag */
#define PWR_FLAG_WU ((u32)0x00000001)
#define PWR_FLAG_SB ((u32)0x00000002)
#define PWR_FLAG_PVDO ((u32)0x00000004)
#define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
((FLAG) == PWR_FLAG_PVDO))
#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void PWR_DeInit(void);
void PWR_BackupAccessCmd(FunctionalState NewState);
void PWR_PVDCmd(FunctionalState NewState);
void PWR_PVDLevelConfig(u32 PWR_PVDLevel);
void PWR_WakeUpPinCmd(FunctionalState NewState);
void PWR_EnterSTOPMode(u32 PWR_Regulator, u8 PWR_STOPEntry);
void PWR_EnterSTANDBYMode(void);
FlagStatus PWR_GetFlagStatus(u32 PWR_FLAG);
void PWR_ClearFlag(u32 PWR_FLAG);
#endif /* __STM32F10x_PWR_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_rcc.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* RCC firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_RCC_H
#define __STM32F10x_RCC_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
typedef struct
{
u32 SYSCLK_Frequency;
u32 HCLK_Frequency;
u32 PCLK1_Frequency;
u32 PCLK2_Frequency;
u32 ADCCLK_Frequency;
}RCC_ClocksTypeDef;
/* Exported constants --------------------------------------------------------*/
/* HSE configuration */
#define RCC_HSE_OFF ((u32)0x00000000)
#define RCC_HSE_ON ((u32)0x00010000)
#define RCC_HSE_Bypass ((u32)0x00040000)
#define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \
((HSE) == RCC_HSE_Bypass))
/* PLL entry clock source */
#define RCC_PLLSource_HSI_Div2 ((u32)0x00000000)
#define RCC_PLLSource_HSE_Div1 ((u32)0x00010000)
#define RCC_PLLSource_HSE_Div2 ((u32)0x00030000)
#define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \
((SOURCE) == RCC_PLLSource_HSE_Div1) || \
((SOURCE) == RCC_PLLSource_HSE_Div2))
/* PLL multiplication factor */
#define RCC_PLLMul_2 ((u32)0x00000000)
#define RCC_PLLMul_3 ((u32)0x00040000)
#define RCC_PLLMul_4 ((u32)0x00080000)
#define RCC_PLLMul_5 ((u32)0x000C0000)
#define RCC_PLLMul_6 ((u32)0x00100000)
#define RCC_PLLMul_7 ((u32)0x00140000)
#define RCC_PLLMul_8 ((u32)0x00180000)
#define RCC_PLLMul_9 ((u32)0x001C0000)
#define RCC_PLLMul_10 ((u32)0x00200000)
#define RCC_PLLMul_11 ((u32)0x00240000)
#define RCC_PLLMul_12 ((u32)0x00280000)
#define RCC_PLLMul_13 ((u32)0x002C0000)
#define RCC_PLLMul_14 ((u32)0x00300000)
#define RCC_PLLMul_15 ((u32)0x00340000)
#define RCC_PLLMul_16 ((u32)0x00380000)
#define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_2) || ((MUL) == RCC_PLLMul_3) || \
((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \
((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \
((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \
((MUL) == RCC_PLLMul_10) || ((MUL) == RCC_PLLMul_11) || \
((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_13) || \
((MUL) == RCC_PLLMul_14) || ((MUL) == RCC_PLLMul_15) || \
((MUL) == RCC_PLLMul_16))
/* System clock source */
#define RCC_SYSCLKSource_HSI ((u32)0x00000000)
#define RCC_SYSCLKSource_HSE ((u32)0x00000001)
#define RCC_SYSCLKSource_PLLCLK ((u32)0x00000002)
#define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \
((SOURCE) == RCC_SYSCLKSource_HSE) || \
((SOURCE) == RCC_SYSCLKSource_PLLCLK))
/* AHB clock source */
#define RCC_SYSCLK_Div1 ((u32)0x00000000)
#define RCC_SYSCLK_Div2 ((u32)0x00000080)
#define RCC_SYSCLK_Div4 ((u32)0x00000090)
#define RCC_SYSCLK_Div8 ((u32)0x000000A0)
#define RCC_SYSCLK_Div16 ((u32)0x000000B0)
#define RCC_SYSCLK_Div64 ((u32)0x000000C0)
#define RCC_SYSCLK_Div128 ((u32)0x000000D0)
#define RCC_SYSCLK_Div256 ((u32)0x000000E0)
#define RCC_SYSCLK_Div512 ((u32)0x000000F0)
#define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \
((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \
((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \
((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \
((HCLK) == RCC_SYSCLK_Div512))
/* APB1/APB2 clock source */
#define RCC_HCLK_Div1 ((u32)0x00000000)
#define RCC_HCLK_Div2 ((u32)0x00000400)
#define RCC_HCLK_Div4 ((u32)0x00000500)
#define RCC_HCLK_Div8 ((u32)0x00000600)
#define RCC_HCLK_Div16 ((u32)0x00000700)
#define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \
((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \
((PCLK) == RCC_HCLK_Div16))
/* RCC Interrupt source */
#define RCC_IT_LSIRDY ((u8)0x01)
#define RCC_IT_LSERDY ((u8)0x02)
#define RCC_IT_HSIRDY ((u8)0x04)
#define RCC_IT_HSERDY ((u8)0x08)
#define RCC_IT_PLLRDY ((u8)0x10)
#define RCC_IT_CSS ((u8)0x80)
#define IS_RCC_IT(IT) ((((IT) & (u8)0xE0) == 0x00) && ((IT) != 0x00))
#define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS))
#define IS_RCC_CLEAR_IT(IT) ((((IT) & (u8)0x60) == 0x00) && ((IT) != 0x00))
/* USB clock source */
#define RCC_USBCLKSource_PLLCLK_1Div5 ((u8)0x00)
#define RCC_USBCLKSource_PLLCLK_Div1 ((u8)0x01)
#define IS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_1Div5) || \
((SOURCE) == RCC_USBCLKSource_PLLCLK_Div1))
/* ADC clock source */
#define RCC_PCLK2_Div2 ((u32)0x00000000)
#define RCC_PCLK2_Div4 ((u32)0x00004000)
#define RCC_PCLK2_Div6 ((u32)0x00008000)
#define RCC_PCLK2_Div8 ((u32)0x0000C000)
#define IS_RCC_ADCCLK(ADCCLK) (((ADCCLK) == RCC_PCLK2_Div2) || ((ADCCLK) == RCC_PCLK2_Div4) || \
((ADCCLK) == RCC_PCLK2_Div6) || ((ADCCLK) == RCC_PCLK2_Div8))
/* LSE configuration */
#define RCC_LSE_OFF ((u8)0x00)
#define RCC_LSE_ON ((u8)0x01)
#define RCC_LSE_Bypass ((u8)0x04)
#define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \
((LSE) == RCC_LSE_Bypass))
/* RTC clock source */
#define RCC_RTCCLKSource_LSE ((u32)0x00000100)
#define RCC_RTCCLKSource_LSI ((u32)0x00000200)
#define RCC_RTCCLKSource_HSE_Div128 ((u32)0x00000300)
#define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \
((SOURCE) == RCC_RTCCLKSource_LSI) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div128))
/* AHB peripheral */
#define RCC_AHBPeriph_DMA1 ((u32)0x00000001)
#define RCC_AHBPeriph_DMA2 ((u32)0x00000002)
#define RCC_AHBPeriph_SRAM ((u32)0x00000004)
#define RCC_AHBPeriph_FLITF ((u32)0x00000010)
#define RCC_AHBPeriph_CRC ((u32)0x00000040)
#define RCC_AHBPeriph_FSMC ((u32)0x00000100)
#define RCC_AHBPeriph_SDIO ((u32)0x00000400)
#define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFAA8) == 0x00) && ((PERIPH) != 0x00))
/* APB2 peripheral */
#define RCC_APB2Periph_AFIO ((u32)0x00000001)
#define RCC_APB2Periph_GPIOA ((u32)0x00000004)
#define RCC_APB2Periph_GPIOB ((u32)0x00000008)
#define RCC_APB2Periph_GPIOC ((u32)0x00000010)
#define RCC_APB2Periph_GPIOD ((u32)0x00000020)
#define RCC_APB2Periph_GPIOE ((u32)0x00000040)
#define RCC_APB2Periph_GPIOF ((u32)0x00000080)
#define RCC_APB2Periph_GPIOG ((u32)0x00000100)
#define RCC_APB2Periph_ADC1 ((u32)0x00000200)
#define RCC_APB2Periph_ADC2 ((u32)0x00000400)
#define RCC_APB2Periph_TIM1 ((u32)0x00000800)
#define RCC_APB2Periph_SPI1 ((u32)0x00001000)
#define RCC_APB2Periph_TIM8 ((u32)0x00002000)
#define RCC_APB2Periph_USART1 ((u32)0x00004000)
#define RCC_APB2Periph_ADC3 ((u32)0x00008000)
#define RCC_APB2Periph_ALL ((u32)0x0000FFFD)
#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFFF0002) == 0x00) && ((PERIPH) != 0x00))
/* APB1 peripheral */
#define RCC_APB1Periph_TIM2 ((u32)0x00000001)
#define RCC_APB1Periph_TIM3 ((u32)0x00000002)
#define RCC_APB1Periph_TIM4 ((u32)0x00000004)
#define RCC_APB1Periph_TIM5 ((u32)0x00000008)
#define RCC_APB1Periph_TIM6 ((u32)0x00000010)
#define RCC_APB1Periph_TIM7 ((u32)0x00000020)
#define RCC_APB1Periph_WWDG ((u32)0x00000800)
#define RCC_APB1Periph_SPI2 ((u32)0x00004000)
#define RCC_APB1Periph_SPI3 ((u32)0x00008000)
#define RCC_APB1Periph_USART2 ((u32)0x00020000)
#define RCC_APB1Periph_USART3 ((u32)0x00040000)
#define RCC_APB1Periph_UART4 ((u32)0x00080000)
#define RCC_APB1Periph_UART5 ((u32)0x00100000)
#define RCC_APB1Periph_I2C1 ((u32)0x00200000)
#define RCC_APB1Periph_I2C2 ((u32)0x00400000)
#define RCC_APB1Periph_USB ((u32)0x00800000)
#define RCC_APB1Periph_CAN ((u32)0x02000000)
#define RCC_APB1Periph_BKP ((u32)0x08000000)
#define RCC_APB1Periph_PWR ((u32)0x10000000)
#define RCC_APB1Periph_DAC ((u32)0x20000000)
#define RCC_APB1Periph_ALL ((u32)0x3AFEC83F)
#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0xC50137C0) == 0x00) && ((PERIPH) != 0x00))
/* Clock source to output on MCO pin */
#define RCC_MCO_NoClock ((u8)0x00)
#define RCC_MCO_SYSCLK ((u8)0x04)
#define RCC_MCO_HSI ((u8)0x05)
#define RCC_MCO_HSE ((u8)0x06)
#define RCC_MCO_PLLCLK_Div2 ((u8)0x07)
#define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \
((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \
((MCO) == RCC_MCO_PLLCLK_Div2))
/* RCC Flag */
#define RCC_FLAG_HSIRDY ((u8)0x21)
#define RCC_FLAG_HSERDY ((u8)0x31)
#define RCC_FLAG_PLLRDY ((u8)0x39)
#define RCC_FLAG_LSERDY ((u8)0x41)
#define RCC_FLAG_LSIRDY ((u8)0x61)
#define RCC_FLAG_PINRST ((u8)0x7A)
#define RCC_FLAG_PORRST ((u8)0x7B)
#define RCC_FLAG_SFTRST ((u8)0x7C)
#define RCC_FLAG_IWDGRST ((u8)0x7D)
#define RCC_FLAG_WWDGRST ((u8)0x7E)
#define RCC_FLAG_LPWRRST ((u8)0x7F)
#define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \
((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \
((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \
((FLAG) == RCC_FLAG_LPWRRST))
#define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void RCC_DeInit(void);
void RCC_HSEConfig(u32 RCC_HSE);
ErrorStatus RCC_WaitForHSEStartUp(void);
void RCC_AdjustHSICalibrationValue(u8 HSICalibrationValue);
void RCC_HSICmd(FunctionalState NewState);
void RCC_PLLConfig(u32 RCC_PLLSource, u32 RCC_PLLMul);
void RCC_PLLCmd(FunctionalState NewState);
void RCC_SYSCLKConfig(u32 RCC_SYSCLKSource);
u8 RCC_GetSYSCLKSource(void);
void RCC_HCLKConfig(u32 RCC_SYSCLK);
void RCC_PCLK1Config(u32 RCC_HCLK);
void RCC_PCLK2Config(u32 RCC_HCLK);
void RCC_ITConfig(u8 RCC_IT, FunctionalState NewState);
void RCC_USBCLKConfig(u32 RCC_USBCLKSource);
void RCC_ADCCLKConfig(u32 RCC_PCLK2);
void RCC_LSEConfig(u8 RCC_LSE);
void RCC_LSICmd(FunctionalState NewState);
void RCC_RTCCLKConfig(u32 RCC_RTCCLKSource);
void RCC_RTCCLKCmd(FunctionalState NewState);
void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
void RCC_AHBPeriphClockCmd(u32 RCC_AHBPeriph, FunctionalState NewState);
void RCC_APB2PeriphClockCmd(u32 RCC_APB2Periph, FunctionalState NewState);
void RCC_APB1PeriphClockCmd(u32 RCC_APB1Periph, FunctionalState NewState);
void RCC_APB2PeriphResetCmd(u32 RCC_APB2Periph, FunctionalState NewState);
void RCC_APB1PeriphResetCmd(u32 RCC_APB1Periph, FunctionalState NewState);
void RCC_BackupResetCmd(FunctionalState NewState);
void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
void RCC_MCOConfig(u8 RCC_MCO);
FlagStatus RCC_GetFlagStatus(u8 RCC_FLAG);
void RCC_ClearFlag(void);
ITStatus RCC_GetITStatus(u8 RCC_IT);
void RCC_ClearITPendingBit(u8 RCC_IT);
#endif /* __STM32F10x_RCC_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_rtc.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* RTC firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_RTC_H
#define __STM32F10x_RTC_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* RTC interrupts define -----------------------------------------------------*/
#define RTC_IT_OW ((u16)0x0004) /* Overflow interrupt */
#define RTC_IT_ALR ((u16)0x0002) /* Alarm interrupt */
#define RTC_IT_SEC ((u16)0x0001) /* Second interrupt */
#define IS_RTC_IT(IT) ((((IT) & (u16)0xFFF8) == 0x00) && ((IT) != 0x00))
#define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \
((IT) == RTC_IT_SEC))
/* RTC interrupts flags ------------------------------------------------------*/
#define RTC_FLAG_RTOFF ((u16)0x0020) /* RTC Operation OFF flag */
#define RTC_FLAG_RSF ((u16)0x0008) /* Registers Synchronized flag */
#define RTC_FLAG_OW ((u16)0x0004) /* Overflow flag */
#define RTC_FLAG_ALR ((u16)0x0002) /* Alarm flag */
#define RTC_FLAG_SEC ((u16)0x0001) /* Second flag */
#define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (u16)0xFFF0) == 0x00) && ((FLAG) != 0x00))
#define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \
((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \
((FLAG) == RTC_FLAG_SEC))
#define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF)
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void RTC_ITConfig(u16 RTC_IT, FunctionalState NewState);
void RTC_EnterConfigMode(void);
void RTC_ExitConfigMode(void);
u32 RTC_GetCounter(void);
void RTC_SetCounter(u32 CounterValue);
void RTC_SetPrescaler(u32 PrescalerValue);
void RTC_SetAlarm(u32 AlarmValue);
u32 RTC_GetDivider(void);
void RTC_WaitForLastTask(void);
void RTC_WaitForSynchro(void);
FlagStatus RTC_GetFlagStatus(u16 RTC_FLAG);
void RTC_ClearFlag(u16 RTC_FLAG);
ITStatus RTC_GetITStatus(u16 RTC_IT);
void RTC_ClearITPendingBit(u16 RTC_IT);
#endif /* __STM32F10x_RTC_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_sdio.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* SDIO firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_SDIO_H
#define __STM32F10x_SDIO_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
typedef struct
{
u8 SDIO_ClockDiv;
u32 SDIO_ClockEdge;
u32 SDIO_ClockBypass;
u32 SDIO_ClockPowerSave;
u32 SDIO_BusWide;
u32 SDIO_HardwareFlowControl;
} SDIO_InitTypeDef;
typedef struct
{
u32 SDIO_Argument;
u32 SDIO_CmdIndex;
u32 SDIO_Response;
u32 SDIO_Wait;
u32 SDIO_CPSM;
} SDIO_CmdInitTypeDef;
typedef struct
{
u32 SDIO_DataTimeOut;
u32 SDIO_DataLength;
u32 SDIO_DataBlockSize;
u32 SDIO_TransferDir;
u32 SDIO_TransferMode;
u32 SDIO_DPSM;
} SDIO_DataInitTypeDef;
/* Exported constants --------------------------------------------------------*/
/* SDIO Clock Edge -----------------------------------------------------------*/
#define SDIO_ClockEdge_Rising ((u32)0x00000000)
#define SDIO_ClockEdge_Falling ((u32)0x00002000)
#define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \
((EDGE) == SDIO_ClockEdge_Falling))
/* SDIO Clock Bypass ----------------------------------------------------------*/
#define SDIO_ClockBypass_Disable ((u32)0x00000000)
#define SDIO_ClockBypass_Enable ((u32)0x00000400)
#define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \
((BYPASS) == SDIO_ClockBypass_Enable))
/* SDIO Clock Power Save ----------------------------------------------------*/
#define SDIO_ClockPowerSave_Disable ((u32)0x00000000)
#define SDIO_ClockPowerSave_Enable ((u32)0x00000200)
#define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \
((SAVE) == SDIO_ClockPowerSave_Enable))
/* SDIO Bus Wide -------------------------------------------------------------*/
#define SDIO_BusWide_1b ((u32)0x00000000)
#define SDIO_BusWide_4b ((u32)0x00000800)
#define SDIO_BusWide_8b ((u32)0x00001000)
#define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \
((WIDE) == SDIO_BusWide_8b))
/* SDIO Hardware Flow Control -----------------------------------------------*/
#define SDIO_HardwareFlowControl_Disable ((u32)0x00000000)
#define SDIO_HardwareFlowControl_Enable ((u32)0x00004000)
#define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \
((CONTROL) == SDIO_HardwareFlowControl_Enable))
/* SDIO Power State ----------------------------------------------------------*/
#define SDIO_PowerState_OFF ((u32)0x00000000)
#define SDIO_PowerState_ON ((u32)0x00000003)
#define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON))
/* SDIO Interrupt soucres ----------------------------------------------------*/
#define SDIO_IT_CCRCFAIL ((u32)0x00000001)
#define SDIO_IT_DCRCFAIL ((u32)0x00000002)
#define SDIO_IT_CTIMEOUT ((u32)0x00000004)
#define SDIO_IT_DTIMEOUT ((u32)0x00000008)
#define SDIO_IT_TXUNDERR ((u32)0x00000010)
#define SDIO_IT_RXOVERR ((u32)0x00000020)
#define SDIO_IT_CMDREND ((u32)0x00000040)
#define SDIO_IT_CMDSENT ((u32)0x00000080)
#define SDIO_IT_DATAEND ((u32)0x00000100)
#define SDIO_IT_STBITERR ((u32)0x00000200)
#define SDIO_IT_DBCKEND ((u32)0x00000400)
#define SDIO_IT_CMDACT ((u32)0x00000800)
#define SDIO_IT_TXACT ((u32)0x00001000)
#define SDIO_IT_RXACT ((u32)0x00002000)
#define SDIO_IT_TXFIFOHE ((u32)0x00004000)
#define SDIO_IT_RXFIFOHF ((u32)0x00008000)
#define SDIO_IT_TXFIFOF ((u32)0x00010000)
#define SDIO_IT_RXFIFOF ((u32)0x00020000)
#define SDIO_IT_TXFIFOE ((u32)0x00040000)
#define SDIO_IT_RXFIFOE ((u32)0x00080000)
#define SDIO_IT_TXDAVL ((u32)0x00100000)
#define SDIO_IT_RXDAVL ((u32)0x00200000)
#define SDIO_IT_SDIOIT ((u32)0x00400000)
#define SDIO_IT_CEATAEND ((u32)0x00800000)
#define IS_SDIO_IT(IT) ((((IT) & (u32)0xFF000000) == 0x00) && ((IT) != (u32)0x00))
/* SDIO Command Index -------------------------------------------------------*/
#define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40)
/* SDIO Response Type --------------------------------------------------------*/
#define SDIO_Response_No ((u32)0x00000000)
#define SDIO_Response_Short ((u32)0x00000040)
#define SDIO_Response_Long ((u32)0x000000C0)
#define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \
((RESPONSE) == SDIO_Response_Short) || \
((RESPONSE) == SDIO_Response_Long))
/* SDIO Wait Interrupt State -------------------------------------------------*/
#define SDIO_Wait_No ((u32)0x00000000) /* SDIO No Wait, TimeOut is enabled */
#define SDIO_Wait_IT ((u32)0x00000100) /* SDIO Wait Interrupt Request */
#define SDIO_Wait_Pend ((u32)0x00000200) /* SDIO Wait End of transfer */
#define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \
((WAIT) == SDIO_Wait_Pend))
/* SDIO CPSM State -----------------------------------------------------------*/
#define SDIO_CPSM_Disable ((u32)0x00000000)
#define SDIO_CPSM_Enable ((u32)0x00000400)
#define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable))
/* SDIO Response Registers ---------------------------------------------------*/
#define SDIO_RESP1 ((u32)0x00000000)
#define SDIO_RESP2 ((u32)0x00000004)
#define SDIO_RESP3 ((u32)0x00000008)
#define SDIO_RESP4 ((u32)0x0000000C)
#define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \
((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4))
/* SDIO Data Length ----------------------------------------------------------*/
#define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF)
/* SDIO Data Block Size ------------------------------------------------------*/
#define SDIO_DataBlockSize_1b ((u32)0x00000000)
#define SDIO_DataBlockSize_2b ((u32)0x00000010)
#define SDIO_DataBlockSize_4b ((u32)0x00000020)
#define SDIO_DataBlockSize_8b ((u32)0x00000030)
#define SDIO_DataBlockSize_16b ((u32)0x00000040)
#define SDIO_DataBlockSize_32b ((u32)0x00000050)
#define SDIO_DataBlockSize_64b ((u32)0x00000060)
#define SDIO_DataBlockSize_128b ((u32)0x00000070)
#define SDIO_DataBlockSize_256b ((u32)0x00000080)
#define SDIO_DataBlockSize_512b ((u32)0x00000090)
#define SDIO_DataBlockSize_1024b ((u32)0x000000A0)
#define SDIO_DataBlockSize_2048b ((u32)0x000000B0)
#define SDIO_DataBlockSize_4096b ((u32)0x000000C0)
#define SDIO_DataBlockSize_8192b ((u32)0x000000D0)
#define SDIO_DataBlockSize_16384b ((u32)0x000000E0)
#define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \
((SIZE) == SDIO_DataBlockSize_2b) || \
((SIZE) == SDIO_DataBlockSize_4b) || \
((SIZE) == SDIO_DataBlockSize_8b) || \
((SIZE) == SDIO_DataBlockSize_16b) || \
((SIZE) == SDIO_DataBlockSize_32b) || \
((SIZE) == SDIO_DataBlockSize_64b) || \
((SIZE) == SDIO_DataBlockSize_128b) || \
((SIZE) == SDIO_DataBlockSize_256b) || \
((SIZE) == SDIO_DataBlockSize_512b) || \
((SIZE) == SDIO_DataBlockSize_1024b) || \
((SIZE) == SDIO_DataBlockSize_2048b) || \
((SIZE) == SDIO_DataBlockSize_4096b) || \
((SIZE) == SDIO_DataBlockSize_8192b) || \
((SIZE) == SDIO_DataBlockSize_16384b))
/* SDIO Transfer Direction ---------------------------------------------------*/
#define SDIO_TransferDir_ToCard ((u32)0x00000000)
#define SDIO_TransferDir_ToSDIO ((u32)0x00000002)
#define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \
((DIR) == SDIO_TransferDir_ToSDIO))
/* SDIO Transfer Type --------------------------------------------------------*/
#define SDIO_TransferMode_Block ((u32)0x00000000)
#define SDIO_TransferMode_Stream ((u32)0x00000004)
#define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \
((MODE) == SDIO_TransferMode_Block))
/* SDIO DPSM State -----------------------------------------------------------*/
#define SDIO_DPSM_Disable ((u32)0x00000000)
#define SDIO_DPSM_Enable ((u32)0x00000001)
#define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable))
/* SDIO Flags ----------------------------------------------------------------*/
#define SDIO_FLAG_CCRCFAIL ((u32)0x00000001)
#define SDIO_FLAG_DCRCFAIL ((u32)0x00000002)
#define SDIO_FLAG_CTIMEOUT ((u32)0x00000004)
#define SDIO_FLAG_DTIMEOUT ((u32)0x00000008)
#define SDIO_FLAG_TXUNDERR ((u32)0x00000010)
#define SDIO_FLAG_RXOVERR ((u32)0x00000020)
#define SDIO_FLAG_CMDREND ((u32)0x00000040)
#define SDIO_FLAG_CMDSENT ((u32)0x00000080)
#define SDIO_FLAG_DATAEND ((u32)0x00000100)
#define SDIO_FLAG_STBITERR ((u32)0x00000200)
#define SDIO_FLAG_DBCKEND ((u32)0x00000400)
#define SDIO_FLAG_CMDACT ((u32)0x00000800)
#define SDIO_FLAG_TXACT ((u32)0x00001000)
#define SDIO_FLAG_RXACT ((u32)0x00002000)
#define SDIO_FLAG_TXFIFOHE ((u32)0x00004000)
#define SDIO_FLAG_RXFIFOHF ((u32)0x00008000)
#define SDIO_FLAG_TXFIFOF ((u32)0x00010000)
#define SDIO_FLAG_RXFIFOF ((u32)0x00020000)
#define SDIO_FLAG_TXFIFOE ((u32)0x00040000)
#define SDIO_FLAG_RXFIFOE ((u32)0x00080000)
#define SDIO_FLAG_TXDAVL ((u32)0x00100000)
#define SDIO_FLAG_RXDAVL ((u32)0x00200000)
#define SDIO_FLAG_SDIOIT ((u32)0x00400000)
#define SDIO_FLAG_CEATAEND ((u32)0x00800000)
#define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \
((FLAG) == SDIO_FLAG_DCRCFAIL) || \
((FLAG) == SDIO_FLAG_CTIMEOUT) || \
((FLAG) == SDIO_FLAG_DTIMEOUT) || \
((FLAG) == SDIO_FLAG_TXUNDERR) || \
((FLAG) == SDIO_FLAG_RXOVERR) || \
((FLAG) == SDIO_FLAG_CMDREND) || \
((FLAG) == SDIO_FLAG_CMDSENT) || \
((FLAG) == SDIO_FLAG_DATAEND) || \
((FLAG) == SDIO_FLAG_STBITERR) || \
((FLAG) == SDIO_FLAG_DBCKEND) || \
((FLAG) == SDIO_FLAG_CMDACT) || \
((FLAG) == SDIO_FLAG_TXACT) || \
((FLAG) == SDIO_FLAG_RXACT) || \
((FLAG) == SDIO_FLAG_TXFIFOHE) || \
((FLAG) == SDIO_FLAG_RXFIFOHF) || \
((FLAG) == SDIO_FLAG_TXFIFOF) || \
((FLAG) == SDIO_FLAG_RXFIFOF) || \
((FLAG) == SDIO_FLAG_TXFIFOE) || \
((FLAG) == SDIO_FLAG_RXFIFOE) || \
((FLAG) == SDIO_FLAG_TXDAVL) || \
((FLAG) == SDIO_FLAG_RXDAVL) || \
((FLAG) == SDIO_FLAG_SDIOIT) || \
((FLAG) == SDIO_FLAG_CEATAEND))
#define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (u32)0xFF3FF800) == 0x00) && ((FLAG) != (u32)0x00))
#define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \
((IT) == SDIO_IT_DCRCFAIL) || \
((IT) == SDIO_IT_CTIMEOUT) || \
((IT) == SDIO_IT_DTIMEOUT) || \
((IT) == SDIO_IT_TXUNDERR) || \
((IT) == SDIO_IT_RXOVERR) || \
((IT) == SDIO_IT_CMDREND) || \
((IT) == SDIO_IT_CMDSENT) || \
((IT) == SDIO_IT_DATAEND) || \
((IT) == SDIO_IT_STBITERR) || \
((IT) == SDIO_IT_DBCKEND) || \
((IT) == SDIO_IT_CMDACT) || \
((IT) == SDIO_IT_TXACT) || \
((IT) == SDIO_IT_RXACT) || \
((IT) == SDIO_IT_TXFIFOHE) || \
((IT) == SDIO_IT_RXFIFOHF) || \
((IT) == SDIO_IT_TXFIFOF) || \
((IT) == SDIO_IT_RXFIFOF) || \
((IT) == SDIO_IT_TXFIFOE) || \
((IT) == SDIO_IT_RXFIFOE) || \
((IT) == SDIO_IT_TXDAVL) || \
((IT) == SDIO_IT_RXDAVL) || \
((IT) == SDIO_IT_SDIOIT) || \
((IT) == SDIO_IT_CEATAEND))
#define IS_SDIO_CLEAR_IT(IT) ((((IT) & (u32)0xFF3FF800) == 0x00) && ((IT) != (u32)0x00))
/* SDIO Read Wait Mode -------------------------------------------------------*/
#define SDIO_ReadWaitMode_CLK ((u32)0x00000000)
#define SDIO_ReadWaitMode_DATA2 ((u32)0x00000001)
#define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \
((MODE) == SDIO_ReadWaitMode_DATA2))
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void SDIO_DeInit(void);
void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct);
void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct);
void SDIO_ClockCmd(FunctionalState NewState);
void SDIO_SetPowerState(u32 SDIO_PowerState);
u32 SDIO_GetPowerState(void);
void SDIO_ITConfig(u32 SDIO_IT, FunctionalState NewState);
void SDIO_DMACmd(FunctionalState NewState);
void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct);
void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct);
u8 SDIO_GetCommandResponse(void);
u32 SDIO_GetResponse(u32 SDIO_RESP);
void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
u32 SDIO_GetDataCounter(void);
u32 SDIO_ReadData(void);
void SDIO_WriteData(u32 Data);
u32 SDIO_GetFIFOCount(void);
void SDIO_StartSDIOReadWait(FunctionalState NewState);
void SDIO_StopSDIOReadWait(FunctionalState NewState);
void SDIO_SetSDIOReadWaitMode(u32 SDIO_ReadWaitMode);
void SDIO_SetSDIOOperation(FunctionalState NewState);
void SDIO_SendSDIOSuspendCmd(FunctionalState NewState);
void SDIO_CommandCompletionCmd(FunctionalState NewState);
void SDIO_CEATAITCmd(FunctionalState NewState);
void SDIO_SendCEATACmd(FunctionalState NewState);
FlagStatus SDIO_GetFlagStatus(u32 SDIO_FLAG);
void SDIO_ClearFlag(u32 SDIO_FLAG);
ITStatus SDIO_GetITStatus(u32 SDIO_IT);
void SDIO_ClearITPendingBit(u32 SDIO_IT);
#endif /* __STM32F10x_SDIO_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_spi.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* SPI firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_SPI_H
#define __STM32F10x_SPI_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* SPI Init structure definition */
typedef struct
{
u16 SPI_Direction;
u16 SPI_Mode;
u16 SPI_DataSize;
u16 SPI_CPOL;
u16 SPI_CPHA;
u16 SPI_NSS;
u16 SPI_BaudRatePrescaler;
u16 SPI_FirstBit;
u16 SPI_CRCPolynomial;
}SPI_InitTypeDef;
/* I2S Init structure definition */
typedef struct
{
u16 I2S_Mode;
u16 I2S_Standard;
u16 I2S_DataFormat;
u16 I2S_MCLKOutput;
u16 I2S_AudioFreq;
u16 I2S_CPOL;
}I2S_InitTypeDef;
/* Exported constants --------------------------------------------------------*/
#define IS_SPI_ALL_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == SPI1_BASE) || \
((*(u32*)&(PERIPH)) == SPI2_BASE) || \
((*(u32*)&(PERIPH)) == SPI3_BASE))
#define IS_SPI_23_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == SPI2_BASE) || \
((*(u32*)&(PERIPH)) == SPI3_BASE))
/* SPI data direction mode */
#define SPI_Direction_2Lines_FullDuplex ((u16)0x0000)
#define SPI_Direction_2Lines_RxOnly ((u16)0x0400)
#define SPI_Direction_1Line_Rx ((u16)0x8000)
#define SPI_Direction_1Line_Tx ((u16)0xC000)
#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
((MODE) == SPI_Direction_2Lines_RxOnly) || \
((MODE) == SPI_Direction_1Line_Rx) || \
((MODE) == SPI_Direction_1Line_Tx))
/* SPI master/slave mode */
#define SPI_Mode_Master ((u16)0x0104)
#define SPI_Mode_Slave ((u16)0x0000)
#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
((MODE) == SPI_Mode_Slave))
/* SPI data size */
#define SPI_DataSize_16b ((u16)0x0800)
#define SPI_DataSize_8b ((u16)0x0000)
#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
((DATASIZE) == SPI_DataSize_8b))
/* SPI Clock Polarity */
#define SPI_CPOL_Low ((u16)0x0000)
#define SPI_CPOL_High ((u16)0x0002)
#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
((CPOL) == SPI_CPOL_High))
/* SPI Clock Phase */
#define SPI_CPHA_1Edge ((u16)0x0000)
#define SPI_CPHA_2Edge ((u16)0x0001)
#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
((CPHA) == SPI_CPHA_2Edge))
/* SPI Slave Select management */
#define SPI_NSS_Soft ((u16)0x0200)
#define SPI_NSS_Hard ((u16)0x0000)
#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
((NSS) == SPI_NSS_Hard))
/* SPI BaudRate Prescaler */
#define SPI_BaudRatePrescaler_2 ((u16)0x0000)
#define SPI_BaudRatePrescaler_4 ((u16)0x0008)
#define SPI_BaudRatePrescaler_8 ((u16)0x0010)
#define SPI_BaudRatePrescaler_16 ((u16)0x0018)
#define SPI_BaudRatePrescaler_32 ((u16)0x0020)
#define SPI_BaudRatePrescaler_64 ((u16)0x0028)
#define SPI_BaudRatePrescaler_128 ((u16)0x0030)
#define SPI_BaudRatePrescaler_256 ((u16)0x0038)
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
((PRESCALER) == SPI_BaudRatePrescaler_4) || \
((PRESCALER) == SPI_BaudRatePrescaler_8) || \
((PRESCALER) == SPI_BaudRatePrescaler_16) || \
((PRESCALER) == SPI_BaudRatePrescaler_32) || \
((PRESCALER) == SPI_BaudRatePrescaler_64) || \
((PRESCALER) == SPI_BaudRatePrescaler_128) || \
((PRESCALER) == SPI_BaudRatePrescaler_256))
/* SPI MSB/LSB transmission */
#define SPI_FirstBit_MSB ((u16)0x0000)
#define SPI_FirstBit_LSB ((u16)0x0080)
#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
((BIT) == SPI_FirstBit_LSB))
/* I2S Mode */
#define I2S_Mode_SlaveTx ((u16)0x0000)
#define I2S_Mode_SlaveRx ((u16)0x0100)
#define I2S_Mode_MasterTx ((u16)0x0200)
#define I2S_Mode_MasterRx ((u16)0x0300)
#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
((MODE) == I2S_Mode_SlaveRx) || \
((MODE) == I2S_Mode_MasterTx) || \
((MODE) == I2S_Mode_MasterRx) )
/* I2S Standard */
#define I2S_Standard_Phillips ((u16)0x0000)
#define I2S_Standard_MSB ((u16)0x0010)
#define I2S_Standard_LSB ((u16)0x0020)
#define I2S_Standard_PCMShort ((u16)0x0030)
#define I2S_Standard_PCMLong ((u16)0x00B0)
#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
((STANDARD) == I2S_Standard_MSB) || \
((STANDARD) == I2S_Standard_LSB) || \
((STANDARD) == I2S_Standard_PCMShort) || \
((STANDARD) == I2S_Standard_PCMLong))
/* I2S Data Format */
#define I2S_DataFormat_16b ((u16)0x0000)
#define I2S_DataFormat_16bextended ((u16)0x0001)
#define I2S_DataFormat_24b ((u16)0x0003)
#define I2S_DataFormat_32b ((u16)0x0005)
#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
((FORMAT) == I2S_DataFormat_16bextended) || \
((FORMAT) == I2S_DataFormat_24b) || \
((FORMAT) == I2S_DataFormat_32b))
/* I2S MCLK Output */
#define I2S_MCLKOutput_Enable ((u16)0x0200)
#define I2S_MCLKOutput_Disable ((u16)0x0000)
#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
((OUTPUT) == I2S_MCLKOutput_Disable))
/* I2S Audio Frequency */
#define I2S_AudioFreq_48k ((u16)48000)
#define I2S_AudioFreq_44k ((u16)44100)
#define I2S_AudioFreq_22k ((u16)22050)
#define I2S_AudioFreq_16k ((u16)16000)
#define I2S_AudioFreq_8k ((u16)8000)
#define I2S_AudioFreq_Default ((u16)2)
#define IS_I2S_AUDIO_FREQ(FREQ) (((FREQ) == I2S_AudioFreq_48k) || \
((FREQ) == I2S_AudioFreq_44k) || \
((FREQ) == I2S_AudioFreq_22k) || \
((FREQ) == I2S_AudioFreq_16k) || \
((FREQ) == I2S_AudioFreq_8k) || \
((FREQ) == I2S_AudioFreq_Default))
/* I2S Clock Polarity */
#define I2S_CPOL_Low ((u16)0x0000)
#define I2S_CPOL_High ((u16)0x0008)
#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
((CPOL) == I2S_CPOL_High))
/* SPI_I2S DMA transfer requests */
#define SPI_I2S_DMAReq_Tx ((u16)0x0002)
#define SPI_I2S_DMAReq_Rx ((u16)0x0001)
#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (u16)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
/* SPI NSS internal software mangement */
#define SPI_NSSInternalSoft_Set ((u16)0x0100)
#define SPI_NSSInternalSoft_Reset ((u16)0xFEFF)
#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
((INTERNAL) == SPI_NSSInternalSoft_Reset))
/* SPI CRC Transmit/Receive */
#define SPI_CRC_Tx ((u8)0x00)
#define SPI_CRC_Rx ((u8)0x01)
#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
/* SPI direction transmit/receive */
#define SPI_Direction_Rx ((u16)0xBFFF)
#define SPI_Direction_Tx ((u16)0x4000)
#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
((DIRECTION) == SPI_Direction_Tx))
/* SPI_I2S interrupts definition */
#define SPI_I2S_IT_TXE ((u8)0x71)
#define SPI_I2S_IT_RXNE ((u8)0x60)
#define SPI_I2S_IT_ERR ((u8)0x50)
#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
((IT) == SPI_I2S_IT_RXNE) || \
((IT) == SPI_I2S_IT_ERR))
#define SPI_I2S_IT_OVR ((u8)0x56)
#define SPI_IT_MODF ((u8)0x55)
#define SPI_IT_CRCERR ((u8)0x54)
#define I2S_IT_UDR ((u8)0x53)
#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
/* SPI_I2S flags definition */
#define SPI_I2S_FLAG_RXNE ((u16)0x0001)
#define SPI_I2S_FLAG_TXE ((u16)0x0002)
#define I2S_FLAG_CHSIDE ((u16)0x0004)
#define I2S_FLAG_UDR ((u16)0x0008)
#define SPI_FLAG_CRCERR ((u16)0x0010)
#define SPI_FLAG_MODF ((u16)0x0020)
#define SPI_I2S_FLAG_OVR ((u16)0x0040)
#define SPI_I2S_FLAG_BSY ((u16)0x0080)
#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
/* SPI CRC polynomial --------------------------------------------------------*/
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, u8 SPI_I2S_IT, FunctionalState NewState);
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, u16 SPI_I2S_DMAReq, FunctionalState NewState);
void SPI_I2S_SendData(SPI_TypeDef* SPIx, u16 Data);
u16 SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, u16 SPI_NSSInternalSoft);
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, u16 SPI_DataSize);
void SPI_TransmitCRC(SPI_TypeDef* SPIx);
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
u16 SPI_GetCRC(SPI_TypeDef* SPIx, u8 SPI_CRC);
u16 SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, u16 SPI_Direction);
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, u16 SPI_I2S_FLAG);
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, u16 SPI_I2S_FLAG);
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, u8 SPI_I2S_IT);
void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, u8 SPI_I2S_IT);
#endif /*__STM32F10x_SPI_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_systick.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* SysTick firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_SYSTICK_H
#define __STM32F10x_SYSTICK_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* SysTick clock source */
#define SysTick_CLKSource_HCLK_Div8 ((u32)0xFFFFFFFB)
#define SysTick_CLKSource_HCLK ((u32)0x00000004)
#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
((SOURCE) == SysTick_CLKSource_HCLK_Div8))
/* SysTick counter state */
#define SysTick_Counter_Disable ((u32)0xFFFFFFFE)
#define SysTick_Counter_Enable ((u32)0x00000001)
#define SysTick_Counter_Clear ((u32)0x00000000)
#define IS_SYSTICK_COUNTER(COUNTER) (((COUNTER) == SysTick_Counter_Disable) || \
((COUNTER) == SysTick_Counter_Enable) || \
((COUNTER) == SysTick_Counter_Clear))
/* SysTick Flag */
#define SysTick_FLAG_COUNT ((u32)0x00000010)
#define SysTick_FLAG_SKEW ((u32)0x0000001E)
#define SysTick_FLAG_NOREF ((u32)0x0000001F)
#define IS_SYSTICK_FLAG(FLAG) (((FLAG) == SysTick_FLAG_COUNT) || \
((FLAG) == SysTick_FLAG_SKEW) || \
((FLAG) == SysTick_FLAG_NOREF))
#define IS_SYSTICK_RELOAD(RELOAD) (((RELOAD) > 0) && ((RELOAD) <= 0xFFFFFF))
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void SysTick_CLKSourceConfig(u32 SysTick_CLKSource);
void SysTick_SetReload(u32 Reload);
void SysTick_CounterCmd(u32 SysTick_Counter);
void SysTick_ITConfig(FunctionalState NewState);
u32 SysTick_GetCounter(void);
FlagStatus SysTick_GetFlagStatus(u8 SysTick_FLAG);
#endif /* __STM32F10x_SYSTICK_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_tim.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* TIM firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_TIM_H
#define __STM32F10x_TIM_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* TIM Time Base Init structure definition */
typedef struct
{
u16 TIM_Prescaler;
u16 TIM_CounterMode;
u16 TIM_Period;
u16 TIM_ClockDivision;
u8 TIM_RepetitionCounter;
} TIM_TimeBaseInitTypeDef;
/* TIM Output Compare Init structure definition */
typedef struct
{
u16 TIM_OCMode;
u16 TIM_OutputState;
u16 TIM_OutputNState;
u16 TIM_Pulse;
u16 TIM_OCPolarity;
u16 TIM_OCNPolarity;
u16 TIM_OCIdleState;
u16 TIM_OCNIdleState;
} TIM_OCInitTypeDef;
/* TIM Input Capture Init structure definition */
typedef struct
{
u16 TIM_Channel;
u16 TIM_ICPolarity;
u16 TIM_ICSelection;
u16 TIM_ICPrescaler;
u16 TIM_ICFilter;
} TIM_ICInitTypeDef;
/* BDTR structure definition */
typedef struct
{
u16 TIM_OSSRState;
u16 TIM_OSSIState;
u16 TIM_LOCKLevel;
u16 TIM_DeadTime;
u16 TIM_Break;
u16 TIM_BreakPolarity;
u16 TIM_AutomaticOutput;
} TIM_BDTRInitTypeDef;
/* Exported constants --------------------------------------------------------*/
#define IS_TIM_ALL_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == TIM1_BASE) || \
((*(u32*)&(PERIPH)) == TIM2_BASE) || \
((*(u32*)&(PERIPH)) == TIM3_BASE) || \
((*(u32*)&(PERIPH)) == TIM4_BASE) || \
((*(u32*)&(PERIPH)) == TIM5_BASE) || \
((*(u32*)&(PERIPH)) == TIM6_BASE) || \
((*(u32*)&(PERIPH)) == TIM7_BASE) || \
((*(u32*)&(PERIPH)) == TIM8_BASE))
#define IS_TIM_18_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == TIM1_BASE) || \
((*(u32*)&(PERIPH)) == TIM8_BASE))
#define IS_TIM_123458_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == TIM1_BASE) || \
((*(u32*)&(PERIPH)) == TIM2_BASE) || \
((*(u32*)&(PERIPH)) == TIM3_BASE) || \
((*(u32*)&(PERIPH)) == TIM4_BASE) || \
((*(u32*)&(PERIPH)) == TIM5_BASE) || \
((*(u32*)&(PERIPH)) == TIM8_BASE))
/* TIM Output Compare and PWM modes -----------------------------------------*/
#define TIM_OCMode_Timing ((u16)0x0000)
#define TIM_OCMode_Active ((u16)0x0010)
#define TIM_OCMode_Inactive ((u16)0x0020)
#define TIM_OCMode_Toggle ((u16)0x0030)
#define TIM_OCMode_PWM1 ((u16)0x0060)
#define TIM_OCMode_PWM2 ((u16)0x0070)
#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \
((MODE) == TIM_OCMode_Active) || \
((MODE) == TIM_OCMode_Inactive) || \
((MODE) == TIM_OCMode_Toggle)|| \
((MODE) == TIM_OCMode_PWM1) || \
((MODE) == TIM_OCMode_PWM2))
#define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
((MODE) == TIM_OCMode_Active) || \
((MODE) == TIM_OCMode_Inactive) || \
((MODE) == TIM_OCMode_Toggle)|| \
((MODE) == TIM_OCMode_PWM1) || \
((MODE) == TIM_OCMode_PWM2) || \
((MODE) == TIM_ForcedAction_Active) || \
((MODE) == TIM_ForcedAction_InActive))
/* TIM One Pulse Mode -------------------------------------------------------*/
#define TIM_OPMode_Single ((u16)0x0008)
#define TIM_OPMode_Repetitive ((u16)0x0000)
#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
((MODE) == TIM_OPMode_Repetitive))
/* TIM Channel -------------------------------------------------------------*/
#define TIM_Channel_1 ((u16)0x0000)
#define TIM_Channel_2 ((u16)0x0004)
#define TIM_Channel_3 ((u16)0x0008)
#define TIM_Channel_4 ((u16)0x000C)
#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
((CHANNEL) == TIM_Channel_2) || \
((CHANNEL) == TIM_Channel_3) || \
((CHANNEL) == TIM_Channel_4))
#define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
((CHANNEL) == TIM_Channel_2))
#define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
((CHANNEL) == TIM_Channel_2) || \
((CHANNEL) == TIM_Channel_3))
/* TIM Clock Division CKD --------------------------------------------------*/
#define TIM_CKD_DIV1 ((u16)0x0000)
#define TIM_CKD_DIV2 ((u16)0x0100)
#define TIM_CKD_DIV4 ((u16)0x0200)
#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
((DIV) == TIM_CKD_DIV2) || \
((DIV) == TIM_CKD_DIV4))
/* TIM Counter Mode --------------------------------------------------------*/
#define TIM_CounterMode_Up ((u16)0x0000)
#define TIM_CounterMode_Down ((u16)0x0010)
#define TIM_CounterMode_CenterAligned1 ((u16)0x0020)
#define TIM_CounterMode_CenterAligned2 ((u16)0x0040)
#define TIM_CounterMode_CenterAligned3 ((u16)0x0060)
#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \
((MODE) == TIM_CounterMode_Down) || \
((MODE) == TIM_CounterMode_CenterAligned1) || \
((MODE) == TIM_CounterMode_CenterAligned2) || \
((MODE) == TIM_CounterMode_CenterAligned3))
/* TIM Output Compare Polarity ---------------------------------------------*/
#define TIM_OCPolarity_High ((u16)0x0000)
#define TIM_OCPolarity_Low ((u16)0x0002)
#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
((POLARITY) == TIM_OCPolarity_Low))
/* TIM Output Compare N Polarity -------------------------------------------*/
#define TIM_OCNPolarity_High ((u16)0x0000)
#define TIM_OCNPolarity_Low ((u16)0x0008)
#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \
((POLARITY) == TIM_OCNPolarity_Low))
/* TIM Output Compare states -----------------------------------------------*/
#define TIM_OutputState_Disable ((u16)0x0000)
#define TIM_OutputState_Enable ((u16)0x0001)
#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \
((STATE) == TIM_OutputState_Enable))
/* TIM Output Compare N States ---------------------------------------------*/
#define TIM_OutputNState_Disable ((u16)0x0000)
#define TIM_OutputNState_Enable ((u16)0x0004)
#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \
((STATE) == TIM_OutputNState_Enable))
/* TIM Capture Compare States -----------------------------------------------*/
#define TIM_CCx_Enable ((u16)0x0001)
#define TIM_CCx_Disable ((u16)0x0000)
#define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \
((CCX) == TIM_CCx_Disable))
/* TIM Capture Compare N States --------------------------------------------*/
#define TIM_CCxN_Enable ((u16)0x0004)
#define TIM_CCxN_Disable ((u16)0x0000)
#define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \
((CCXN) == TIM_CCxN_Disable))
/* Break Input enable/disable -----------------------------------------------*/
#define TIM_Break_Enable ((u16)0x1000)
#define TIM_Break_Disable ((u16)0x0000)
#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \
((STATE) == TIM_Break_Disable))
/* Break Polarity -----------------------------------------------------------*/
#define TIM_BreakPolarity_Low ((u16)0x0000)
#define TIM_BreakPolarity_High ((u16)0x2000)
#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \
((POLARITY) == TIM_BreakPolarity_High))
/* TIM AOE Bit Set/Reset ---------------------------------------------------*/
#define TIM_AutomaticOutput_Enable ((u16)0x4000)
#define TIM_AutomaticOutput_Disable ((u16)0x0000)
#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \
((STATE) == TIM_AutomaticOutput_Disable))
/* Lock levels --------------------------------------------------------------*/
#define TIM_LOCKLevel_OFF ((u16)0x0000)
#define TIM_LOCKLevel_1 ((u16)0x0100)
#define TIM_LOCKLevel_2 ((u16)0x0200)
#define TIM_LOCKLevel_3 ((u16)0x0300)
#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \
((LEVEL) == TIM_LOCKLevel_1) || \
((LEVEL) == TIM_LOCKLevel_2) || \
((LEVEL) == TIM_LOCKLevel_3))
/* OSSI: Off-State Selection for Idle mode states ---------------------------*/
#define TIM_OSSIState_Enable ((u16)0x0400)
#define TIM_OSSIState_Disable ((u16)0x0000)
#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \
((STATE) == TIM_OSSIState_Disable))
/* OSSR: Off-State Selection for Run mode states ----------------------------*/
#define TIM_OSSRState_Enable ((u16)0x0800)
#define TIM_OSSRState_Disable ((u16)0x0000)
#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \
((STATE) == TIM_OSSRState_Disable))
/* TIM Output Compare Idle State -------------------------------------------*/
#define TIM_OCIdleState_Set ((u16)0x0100)
#define TIM_OCIdleState_Reset ((u16)0x0000)
#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \
((STATE) == TIM_OCIdleState_Reset))
/* TIM Output Compare N Idle State -----------------------------------------*/
#define TIM_OCNIdleState_Set ((u16)0x0200)
#define TIM_OCNIdleState_Reset ((u16)0x0000)
#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \
((STATE) == TIM_OCNIdleState_Reset))
/* TIM Input Capture Polarity ----------------------------------------------*/
#define TIM_ICPolarity_Rising ((u16)0x0000)
#define TIM_ICPolarity_Falling ((u16)0x0002)
#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
((POLARITY) == TIM_ICPolarity_Falling))
/* TIM Input Capture Selection ---------------------------------------------*/
#define TIM_ICSelection_DirectTI ((u16)0x0001)
#define TIM_ICSelection_IndirectTI ((u16)0x0002)
#define TIM_ICSelection_TRC ((u16)0x0003)
#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \
((SELECTION) == TIM_ICSelection_IndirectTI) || \
((SELECTION) == TIM_ICSelection_TRC))
/* TIM Input Capture Prescaler ---------------------------------------------*/
#define TIM_ICPSC_DIV1 ((u16)0x0000)
#define TIM_ICPSC_DIV2 ((u16)0x0004)
#define TIM_ICPSC_DIV4 ((u16)0x0008)
#define TIM_ICPSC_DIV8 ((u16)0x000C)
#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \
((PRESCALER) == TIM_ICPSC_DIV2) || \
((PRESCALER) == TIM_ICPSC_DIV4) || \
((PRESCALER) == TIM_ICPSC_DIV8))
/* TIM interrupt sources ---------------------------------------------------*/
#define TIM_IT_Update ((u16)0x0001)
#define TIM_IT_CC1 ((u16)0x0002)
#define TIM_IT_CC2 ((u16)0x0004)
#define TIM_IT_CC3 ((u16)0x0008)
#define TIM_IT_CC4 ((u16)0x0010)
#define TIM_IT_COM ((u16)0x0020)
#define TIM_IT_Trigger ((u16)0x0040)
#define TIM_IT_Break ((u16)0x0080)
#define IS_TIM_IT(IT) ((((IT) & (u16)0xFF00) == 0x0000) && ((IT) != 0x0000))
#define IS_TIM_PERIPH_IT(PERIPH, TIM_IT) ((((((*(u32*)&(PERIPH)) == TIM2_BASE) || (((*(u32*)&(PERIPH)) == TIM3_BASE))||\
(((*(u32*)&(PERIPH)) == TIM4_BASE)) || (((*(u32*)&(PERIPH)) == TIM5_BASE))))&& \
(((TIM_IT) & (u16)0xFFA0) == 0x0000) && ((TIM_IT) != 0x0000)) ||\
(((((*(u32*)&(PERIPH)) == TIM1_BASE) || (((*(u32*)&(PERIPH)) == TIM8_BASE))))&& \
(((TIM_IT) & (u16)0xFF00) == 0x0000) && ((TIM_IT) != 0x0000)) ||\
(((((*(u32*)&(PERIPH)) == TIM6_BASE) || (((*(u32*)&(PERIPH)) == TIM7_BASE))))&& \
(((TIM_IT) & (u16)0xFFFE) == 0x0000) && ((TIM_IT) != 0x0000)))
#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \
((IT) == TIM_IT_CC1) || \
((IT) == TIM_IT_CC2) || \
((IT) == TIM_IT_CC3) || \
((IT) == TIM_IT_CC4) || \
((IT) == TIM_IT_COM) || \
((IT) == TIM_IT_Trigger) || \
((IT) == TIM_IT_Break))
/* TIM DMA Base address ----------------------------------------------------*/
#define TIM_DMABase_CR1 ((u16)0x0000)
#define TIM_DMABase_CR2 ((u16)0x0001)
#define TIM_DMABase_SMCR ((u16)0x0002)
#define TIM_DMABase_DIER ((u16)0x0003)
#define TIM_DMABase_SR ((u16)0x0004)
#define TIM_DMABase_EGR ((u16)0x0005)
#define TIM_DMABase_CCMR1 ((u16)0x0006)
#define TIM_DMABase_CCMR2 ((u16)0x0007)
#define TIM_DMABase_CCER ((u16)0x0008)
#define TIM_DMABase_CNT ((u16)0x0009)
#define TIM_DMABase_PSC ((u16)0x000A)
#define TIM_DMABase_ARR ((u16)0x000B)
#define TIM_DMABase_RCR ((u16)0x000C)
#define TIM_DMABase_CCR1 ((u16)0x000D)
#define TIM_DMABase_CCR2 ((u16)0x000E)
#define TIM_DMABase_CCR3 ((u16)0x000F)
#define TIM_DMABase_CCR4 ((u16)0x0010)
#define TIM_DMABase_BDTR ((u16)0x0011)
#define TIM_DMABase_DCR ((u16)0x0012)
#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
((BASE) == TIM_DMABase_CR2) || \
((BASE) == TIM_DMABase_SMCR) || \
((BASE) == TIM_DMABase_DIER) || \
((BASE) == TIM_DMABase_SR) || \
((BASE) == TIM_DMABase_EGR) || \
((BASE) == TIM_DMABase_CCMR1) || \
((BASE) == TIM_DMABase_CCMR2) || \
((BASE) == TIM_DMABase_CCER) || \
((BASE) == TIM_DMABase_CNT) || \
((BASE) == TIM_DMABase_PSC) || \
((BASE) == TIM_DMABase_ARR) || \
((BASE) == TIM_DMABase_RCR) || \
((BASE) == TIM_DMABase_CCR1) || \
((BASE) == TIM_DMABase_CCR2) || \
((BASE) == TIM_DMABase_CCR3) || \
((BASE) == TIM_DMABase_CCR4) || \
((BASE) == TIM_DMABase_BDTR) || \
((BASE) == TIM_DMABase_DCR))
/* TIM DMA Burst Length ----------------------------------------------------*/
#define TIM_DMABurstLength_1Byte ((u16)0x0000)
#define TIM_DMABurstLength_2Bytes ((u16)0x0100)
#define TIM_DMABurstLength_3Bytes ((u16)0x0200)
#define TIM_DMABurstLength_4Bytes ((u16)0x0300)
#define TIM_DMABurstLength_5Bytes ((u16)0x0400)
#define TIM_DMABurstLength_6Bytes ((u16)0x0500)
#define TIM_DMABurstLength_7Bytes ((u16)0x0600)
#define TIM_DMABurstLength_8Bytes ((u16)0x0700)
#define TIM_DMABurstLength_9Bytes ((u16)0x0800)
#define TIM_DMABurstLength_10Bytes ((u16)0x0900)
#define TIM_DMABurstLength_11Bytes ((u16)0x0A00)
#define TIM_DMABurstLength_12Bytes ((u16)0x0B00)
#define TIM_DMABurstLength_13Bytes ((u16)0x0C00)
#define TIM_DMABurstLength_14Bytes ((u16)0x0D00)
#define TIM_DMABurstLength_15Bytes ((u16)0x0E00)
#define TIM_DMABurstLength_16Bytes ((u16)0x0F00)
#define TIM_DMABurstLength_17Bytes ((u16)0x1000)
#define TIM_DMABurstLength_18Bytes ((u16)0x1100)
#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Byte) || \
((LENGTH) == TIM_DMABurstLength_2Bytes) || \
((LENGTH) == TIM_DMABurstLength_3Bytes) || \
((LENGTH) == TIM_DMABurstLength_4Bytes) || \
((LENGTH) == TIM_DMABurstLength_5Bytes) || \
((LENGTH) == TIM_DMABurstLength_6Bytes) || \
((LENGTH) == TIM_DMABurstLength_7Bytes) || \
((LENGTH) == TIM_DMABurstLength_8Bytes) || \
((LENGTH) == TIM_DMABurstLength_9Bytes) || \
((LENGTH) == TIM_DMABurstLength_10Bytes) || \
((LENGTH) == TIM_DMABurstLength_11Bytes) || \
((LENGTH) == TIM_DMABurstLength_12Bytes) || \
((LENGTH) == TIM_DMABurstLength_13Bytes) || \
((LENGTH) == TIM_DMABurstLength_14Bytes) || \
((LENGTH) == TIM_DMABurstLength_15Bytes) || \
((LENGTH) == TIM_DMABurstLength_16Bytes) || \
((LENGTH) == TIM_DMABurstLength_17Bytes) || \
((LENGTH) == TIM_DMABurstLength_18Bytes))
/* TIM DMA sources ---------------------------------------------------------*/
#define TIM_DMA_Update ((u16)0x0100)
#define TIM_DMA_CC1 ((u16)0x0200)
#define TIM_DMA_CC2 ((u16)0x0400)
#define TIM_DMA_CC3 ((u16)0x0800)
#define TIM_DMA_CC4 ((u16)0x1000)
#define TIM_DMA_COM ((u16)0x2000)
#define TIM_DMA_Trigger ((u16)0x4000)
#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (u16)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))
#define IS_TIM_PERIPH_DMA(PERIPH, SOURCE) ((((((*(u32*)&(PERIPH)) == TIM2_BASE) || (((*(u32*)&(PERIPH)) == TIM3_BASE))||\
(((*(u32*)&(PERIPH)) == TIM4_BASE)) || (((*(u32*)&(PERIPH)) == TIM5_BASE))))&& \
(((SOURCE) & (u16)0xA0FF) == 0x0000) && ((SOURCE) != 0x0000)) ||\
(((((*(u32*)&(PERIPH)) == TIM1_BASE) || (((*(u32*)&(PERIPH)) == TIM8_BASE))))&& \
(((SOURCE) & (u16)0x80FF) == 0x0000) && ((SOURCE) != 0x0000)) ||\
(((((*(u32*)&(PERIPH)) == TIM6_BASE) || (((*(u32*)&(PERIPH)) == TIM7_BASE))))&& \
(((SOURCE) & (u16)0xFEFF) == 0x0000) && ((SOURCE) != 0x0000)))
/* TIM External Trigger Prescaler ------------------------------------------*/
#define TIM_ExtTRGPSC_OFF ((u16)0x0000)
#define TIM_ExtTRGPSC_DIV2 ((u16)0x1000)
#define TIM_ExtTRGPSC_DIV4 ((u16)0x2000)
#define TIM_ExtTRGPSC_DIV8 ((u16)0x3000)
#define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \
((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \
((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \
((PRESCALER) == TIM_ExtTRGPSC_DIV8))
/* TIM Internal Trigger Selection ------------------------------------------*/
#define TIM_TS_ITR0 ((u16)0x0000)
#define TIM_TS_ITR1 ((u16)0x0010)
#define TIM_TS_ITR2 ((u16)0x0020)
#define TIM_TS_ITR3 ((u16)0x0030)
#define TIM_TS_TI1F_ED ((u16)0x0040)
#define TIM_TS_TI1FP1 ((u16)0x0050)
#define TIM_TS_TI2FP2 ((u16)0x0060)
#define TIM_TS_ETRF ((u16)0x0070)
#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
((SELECTION) == TIM_TS_ITR1) || \
((SELECTION) == TIM_TS_ITR2) || \
((SELECTION) == TIM_TS_ITR3) || \
((SELECTION) == TIM_TS_TI1F_ED) || \
((SELECTION) == TIM_TS_TI1FP1) || \
((SELECTION) == TIM_TS_TI2FP2) || \
((SELECTION) == TIM_TS_ETRF))
#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
((SELECTION) == TIM_TS_ITR1) || \
((SELECTION) == TIM_TS_ITR2) || \
((SELECTION) == TIM_TS_ITR3))
/* TIM TIx External Clock Source -------------------------------------------*/
#define TIM_TIxExternalCLK1Source_TI1 ((u16)0x0050)
#define TIM_TIxExternalCLK1Source_TI2 ((u16)0x0060)
#define TIM_TIxExternalCLK1Source_TI1ED ((u16)0x0040)
#define IS_TIM_TIXCLK_SOURCE(SOURCE) (((SOURCE) == TIM_TIxExternalCLK1Source_TI1) || \
((SOURCE) == TIM_TIxExternalCLK1Source_TI2) || \
((SOURCE) == TIM_TIxExternalCLK1Source_TI1ED))
/* TIM External Trigger Polarity -------------------------------------------*/
#define TIM_ExtTRGPolarity_Inverted ((u16)0x8000)
#define TIM_ExtTRGPolarity_NonInverted ((u16)0x0000)
#define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \
((POLARITY) == TIM_ExtTRGPolarity_NonInverted))
/* TIM Prescaler Reload Mode -----------------------------------------------*/
#define TIM_PSCReloadMode_Update ((u16)0x0000)
#define TIM_PSCReloadMode_Immediate ((u16)0x0001)
#define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \
((RELOAD) == TIM_PSCReloadMode_Immediate))
/* TIM Forced Action -------------------------------------------------------*/
#define TIM_ForcedAction_Active ((u16)0x0050)
#define TIM_ForcedAction_InActive ((u16)0x0040)
#define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \
((ACTION) == TIM_ForcedAction_InActive))
/* TIM Encoder Mode --------------------------------------------------------*/
#define TIM_EncoderMode_TI1 ((u16)0x0001)
#define TIM_EncoderMode_TI2 ((u16)0x0002)
#define TIM_EncoderMode_TI12 ((u16)0x0003)
#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \
((MODE) == TIM_EncoderMode_TI2) || \
((MODE) == TIM_EncoderMode_TI12))
/* TIM Event Source --------------------------------------------------------*/
#define TIM_EventSource_Update ((u16)0x0001)
#define TIM_EventSource_CC1 ((u16)0x0002)
#define TIM_EventSource_CC2 ((u16)0x0004)
#define TIM_EventSource_CC3 ((u16)0x0008)
#define TIM_EventSource_CC4 ((u16)0x0010)
#define TIM_EventSource_COM ((u16)0x0020)
#define TIM_EventSource_Trigger ((u16)0x0040)
#define TIM_EventSource_Break ((u16)0x0080)
#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (u16)0xFF00) == 0x0000) && ((SOURCE) != 0x0000))
#define IS_TIM_PERIPH_EVENT(PERIPH, EVENT) ((((((*(u32*)&(PERIPH)) == TIM2_BASE) || (((*(u32*)&(PERIPH)) == TIM3_BASE))||\
(((*(u32*)&(PERIPH)) == TIM4_BASE)) || (((*(u32*)&(PERIPH)) == TIM5_BASE))))&& \
(((EVENT) & (u16)0xFFA0) == 0x0000) && ((EVENT) != 0x0000)) ||\
(((((*(u32*)&(PERIPH)) == TIM1_BASE) || (((*(u32*)&(PERIPH)) == TIM8_BASE))))&& \
(((EVENT) & (u16)0xFF00) == 0x0000) && ((EVENT) != 0x0000)) ||\
(((((*(u32*)&(PERIPH)) == TIM6_BASE) || (((*(u32*)&(PERIPH)) == TIM7_BASE))))&& \
(((EVENT) & (u16)0xFFFE) == 0x0000) && ((EVENT) != 0x0000)))
/* TIM Update Source --------------------------------------------------------*/
#define TIM_UpdateSource_Global ((u16)0x0000)
#define TIM_UpdateSource_Regular ((u16)0x0001)
#define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \
((SOURCE) == TIM_UpdateSource_Regular))
/* TIM Ouput Compare Preload State ------------------------------------------*/
#define TIM_OCPreload_Enable ((u16)0x0008)
#define TIM_OCPreload_Disable ((u16)0x0000)
#define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \
((STATE) == TIM_OCPreload_Disable))
/* TIM Ouput Compare Fast State ---------------------------------------------*/
#define TIM_OCFast_Enable ((u16)0x0004)
#define TIM_OCFast_Disable ((u16)0x0000)
#define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \
((STATE) == TIM_OCFast_Disable))
/* TIM Ouput Compare Clear State --------------------------------------------*/
#define TIM_OCClear_Enable ((u16)0x0080)
#define TIM_OCClear_Disable ((u16)0x0000)
#define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \
((STATE) == TIM_OCClear_Disable))
/* TIM Trigger Output Source ------------------------------------------------*/
#define TIM_TRGOSource_Reset ((u16)0x0000)
#define TIM_TRGOSource_Enable ((u16)0x0010)
#define TIM_TRGOSource_Update ((u16)0x0020)
#define TIM_TRGOSource_OC1 ((u16)0x0030)
#define TIM_TRGOSource_OC1Ref ((u16)0x0040)
#define TIM_TRGOSource_OC2Ref ((u16)0x0050)
#define TIM_TRGOSource_OC3Ref ((u16)0x0060)
#define TIM_TRGOSource_OC4Ref ((u16)0x0070)
#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \
((SOURCE) == TIM_TRGOSource_Enable) || \
((SOURCE) == TIM_TRGOSource_Update) || \
((SOURCE) == TIM_TRGOSource_OC1) || \
((SOURCE) == TIM_TRGOSource_OC1Ref) || \
((SOURCE) == TIM_TRGOSource_OC2Ref) || \
((SOURCE) == TIM_TRGOSource_OC3Ref) || \
((SOURCE) == TIM_TRGOSource_OC4Ref))
#define IS_TIM_PERIPH_TRGO(PERIPH, TRGO) (((((*(u32*)&(PERIPH)) == TIM2_BASE)||(((*(u32*)&(PERIPH)) == TIM1_BASE))||\
(((*(u32*)&(PERIPH)) == TIM3_BASE))||(((*(u32*)&(PERIPH)) == TIM4_BASE))|| \
(((*(u32*)&(PERIPH)) == TIM6_BASE))||(((*(u32*)&(PERIPH)) == TIM7_BASE))|| \
(((*(u32*)&(PERIPH)) == TIM5_BASE))||(((*(u32*)&(PERIPH)) == TIM8_BASE))) && \
((TRGO) == TIM_TRGOSource_Reset)) ||\
((((*(u32*)&(PERIPH)) == TIM2_BASE)||(((*(u32*)&(PERIPH)) == TIM1_BASE))||\
(((*(u32*)&(PERIPH)) == TIM6_BASE))||(((*(u32*)&(PERIPH)) == TIM7_BASE))|| \
(((*(u32*)&(PERIPH)) == TIM3_BASE))||(((*(u32*)&(PERIPH)) == TIM4_BASE))|| \
(((*(u32*)&(PERIPH)) == TIM5_BASE))||(((*(u32*)&(PERIPH)) == TIM8_BASE))) && \
((TRGO) == TIM_TRGOSource_Enable)) ||\
((((*(u32*)&(PERIPH)) == TIM2_BASE)||(((*(u32*)&(PERIPH)) == TIM1_BASE))||\
(((*(u32*)&(PERIPH)) == TIM6_BASE))||(((*(u32*)&(PERIPH)) == TIM7_BASE))|| \
(((*(u32*)&(PERIPH)) == TIM3_BASE))||(((*(u32*)&(PERIPH)) == TIM4_BASE))|| \
(((*(u32*)&(PERIPH)) == TIM5_BASE))||(((*(u32*)&(PERIPH)) == TIM8_BASE))) && \
((TRGO) == TIM_TRGOSource_Update)) ||\
((((*(u32*)&(PERIPH)) == TIM2_BASE)||(((*(u32*)&(PERIPH)) == TIM1_BASE))||\
(((*(u32*)&(PERIPH)) == TIM3_BASE))||(((*(u32*)&(PERIPH)) == TIM4_BASE))|| \
(((*(u32*)&(PERIPH)) == TIM5_BASE))||(((*(u32*)&(PERIPH)) == TIM8_BASE))) && \
((TRGO) == TIM_TRGOSource_OC1)) ||\
((((*(u32*)&(PERIPH)) == TIM2_BASE)||(((*(u32*)&(PERIPH)) == TIM1_BASE))||\
(((*(u32*)&(PERIPH)) == TIM3_BASE))||(((*(u32*)&(PERIPH)) == TIM4_BASE))|| \
(((*(u32*)&(PERIPH)) == TIM5_BASE))||(((*(u32*)&(PERIPH)) == TIM8_BASE))) && \
((TRGO) == TIM_TRGOSource_OC1Ref)) ||\
((((*(u32*)&(PERIPH)) == TIM2_BASE)||(((*(u32*)&(PERIPH)) == TIM1_BASE))||\
(((*(u32*)&(PERIPH)) == TIM3_BASE))||(((*(u32*)&(PERIPH)) == TIM4_BASE))|| \
(((*(u32*)&(PERIPH)) == TIM5_BASE))||(((*(u32*)&(PERIPH)) == TIM8_BASE))) && \
((TRGO) == TIM_TRGOSource_OC2Ref)) ||\
((((*(u32*)&(PERIPH)) == TIM2_BASE)||(((*(u32*)&(PERIPH)) == TIM1_BASE))||\
(((*(u32*)&(PERIPH)) == TIM3_BASE))||(((*(u32*)&(PERIPH)) == TIM4_BASE))|| \
(((*(u32*)&(PERIPH)) == TIM5_BASE))||(((*(u32*)&(PERIPH)) == TIM8_BASE))) && \
((TRGO) == TIM_TRGOSource_OC3Ref)) ||\
((((*(u32*)&(PERIPH)) == TIM2_BASE)||(((*(u32*)&(PERIPH)) == TIM1_BASE))||\
(((*(u32*)&(PERIPH)) == TIM3_BASE))||(((*(u32*)&(PERIPH)) == TIM4_BASE))|| \
(((*(u32*)&(PERIPH)) == TIM5_BASE))||(((*(u32*)&(PERIPH)) == TIM8_BASE))) && \
((TRGO) == TIM_TRGOSource_OC4Ref)))
/* TIM Slave Mode ----------------------------------------------------------*/
#define TIM_SlaveMode_Reset ((u16)0x0004)
#define TIM_SlaveMode_Gated ((u16)0x0005)
#define TIM_SlaveMode_Trigger ((u16)0x0006)
#define TIM_SlaveMode_External1 ((u16)0x0007)
#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \
((MODE) == TIM_SlaveMode_Gated) || \
((MODE) == TIM_SlaveMode_Trigger) || \
((MODE) == TIM_SlaveMode_External1))
/* TIM Master Slave Mode ---------------------------------------------------*/
#define TIM_MasterSlaveMode_Enable ((u16)0x0080)
#define TIM_MasterSlaveMode_Disable ((u16)0x0000)
#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \
((STATE) == TIM_MasterSlaveMode_Disable))
/* TIM Flags ---------------------------------------------------------------*/
#define TIM_FLAG_Update ((u16)0x0001)
#define TIM_FLAG_CC1 ((u16)0x0002)
#define TIM_FLAG_CC2 ((u16)0x0004)
#define TIM_FLAG_CC3 ((u16)0x0008)
#define TIM_FLAG_CC4 ((u16)0x0010)
#define TIM_FLAG_COM ((u16)0x0020)
#define TIM_FLAG_Trigger ((u16)0x0040)
#define TIM_FLAG_Break ((u16)0x0080)
#define TIM_FLAG_CC1OF ((u16)0x0200)
#define TIM_FLAG_CC2OF ((u16)0x0400)
#define TIM_FLAG_CC3OF ((u16)0x0800)
#define TIM_FLAG_CC4OF ((u16)0x1000)
#define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \
((FLAG) == TIM_FLAG_CC1) || \
((FLAG) == TIM_FLAG_CC2) || \
((FLAG) == TIM_FLAG_CC3) || \
((FLAG) == TIM_FLAG_CC4) || \
((FLAG) == TIM_FLAG_COM) || \
((FLAG) == TIM_FLAG_Trigger) || \
((FLAG) == TIM_FLAG_Break) || \
((FLAG) == TIM_FLAG_CC1OF) || \
((FLAG) == TIM_FLAG_CC2OF) || \
((FLAG) == TIM_FLAG_CC3OF) || \
((FLAG) == TIM_FLAG_CC4OF))
#define IS_TIM_CLEAR_FLAG(PERIPH, TIM_FLAG) ((((((*(u32*)&(PERIPH)) == TIM2_BASE) || (((*(u32*)&(PERIPH)) == TIM3_BASE))||\
(((*(u32*)&(PERIPH)) == TIM4_BASE)) || (((*(u32*)&(PERIPH)) == TIM5_BASE))))&& \
(((TIM_FLAG) & (u16)0xE1A0) == 0x0000) && ((TIM_FLAG) != 0x0000)) ||\
(((((*(u32*)&(PERIPH)) == TIM1_BASE) || (((*(u32*)&(PERIPH)) == TIM8_BASE))))&& \
(((TIM_FLAG) & (u16)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000)) ||\
(((((*(u32*)&(PERIPH)) == TIM6_BASE) || (((*(u32*)&(PERIPH)) == TIM7_BASE))))&& \
(((TIM_FLAG) & (u16)0xFFFE) == 0x0000) && ((TIM_FLAG) != 0x0000)))
#define IS_TIM_PERIPH_FLAG(PERIPH, TIM_FLAG) (((((*(u32*)&(PERIPH))==TIM2_BASE) || ((*(u32*)&(PERIPH)) == TIM3_BASE) ||\
((*(u32*)&(PERIPH)) == TIM4_BASE) || ((*(u32*)&(PERIPH))==TIM5_BASE) || \
((*(u32*)&(PERIPH))==TIM1_BASE) || ((*(u32*)&(PERIPH))==TIM8_BASE)) &&\
(((TIM_FLAG) == TIM_FLAG_CC1) || ((TIM_FLAG) == TIM_FLAG_CC2) ||\
((TIM_FLAG) == TIM_FLAG_CC3) || ((TIM_FLAG) == TIM_FLAG_CC4) || \
((TIM_FLAG) == TIM_FLAG_Trigger))) ||\
((((*(u32*)&(PERIPH))==TIM2_BASE) || ((*(u32*)&(PERIPH)) == TIM3_BASE) || \
((*(u32*)&(PERIPH)) == TIM4_BASE) || ((*(u32*)&(PERIPH))==TIM5_BASE) ||\
((*(u32*)&(PERIPH))==TIM1_BASE)|| ((*(u32*)&(PERIPH))==TIM8_BASE) || \
((*(u32*)&(PERIPH))==TIM7_BASE) || ((*(u32*)&(PERIPH))==TIM6_BASE)) && \
(((TIM_FLAG) == TIM_FLAG_Update))) ||\
((((*(u32*)&(PERIPH))==TIM1_BASE) || ((*(u32*)&(PERIPH)) == TIM8_BASE)) &&\
(((TIM_FLAG) == TIM_FLAG_COM) || ((TIM_FLAG) == TIM_FLAG_Break))) ||\
((((*(u32*)&(PERIPH))==TIM2_BASE) || ((*(u32*)&(PERIPH)) == TIM3_BASE) || \
((*(u32*)&(PERIPH)) == TIM4_BASE) || ((*(u32*)&(PERIPH))==TIM5_BASE) || \
((*(u32*)&(PERIPH))==TIM1_BASE) || ((*(u32*)&(PERIPH))==TIM8_BASE)) &&\
(((TIM_FLAG) == TIM_FLAG_CC1OF) || ((TIM_FLAG) == TIM_FLAG_CC2OF) ||\
((TIM_FLAG) == TIM_FLAG_CC3OF) || ((TIM_FLAG) == TIM_FLAG_CC4OF))))
/* TIM Input Capture Filer Value ---------------------------------------------*/
#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
/* TIM External Trigger Filter -----------------------------------------------*/
#define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF)
/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
void TIM_DeInit(TIM_TypeDef* TIMx);
void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct);
void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct);
void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct);
void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct);
void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState);
void TIM_ITConfig(TIM_TypeDef* TIMx, u16 TIM_IT, FunctionalState NewState);
void TIM_GenerateEvent(TIM_TypeDef* TIMx, u16 TIM_EventSource);
void TIM_DMAConfig(TIM_TypeDef* TIMx, u16 TIM_DMABase, u16 TIM_DMABurstLength);
void TIM_DMACmd(TIM_TypeDef* TIMx, u16 TIM_DMASource, FunctionalState NewState);
void TIM_InternalClockConfig(TIM_TypeDef* TIMx);
void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, u16 TIM_InputTriggerSource);
void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, u16 TIM_TIxExternalCLKSource,
u16 TIM_ICPolarity, u16 ICFilter);
void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, u16 TIM_ExtTRGPrescaler, u16 TIM_ExtTRGPolarity,
u16 ExtTRGFilter);
void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, u16 TIM_ExtTRGPrescaler,
u16 TIM_ExtTRGPolarity, u16 ExtTRGFilter);
void TIM_ETRConfig(TIM_TypeDef* TIMx, u16 TIM_ExtTRGPrescaler, u16 TIM_ExtTRGPolarity,
u16 ExtTRGFilter);
void TIM_PrescalerConfig(TIM_TypeDef* TIMx, u16 Prescaler, u16 TIM_PSCReloadMode);
void TIM_CounterModeConfig(TIM_TypeDef* TIMx, u16 TIM_CounterMode);
void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, u16 TIM_InputTriggerSource);
void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, u16 TIM_EncoderMode,
u16 TIM_IC1Polarity, u16 TIM_IC2Polarity);
void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction);
void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction);
void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction);
void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction);
void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState);
void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState);
void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState);
void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, u16 TIM_OCPreload);
void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, u16 TIM_OCPreload);
void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, u16 TIM_OCPreload);
void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, u16 TIM_OCPreload);
void TIM_OC1FastConfig(TIM_TypeDef* TIMx, u16 TIM_OCFast);
void TIM_OC2FastConfig(TIM_TypeDef* TIMx, u16 TIM_OCFast);
void TIM_OC3FastConfig(TIM_TypeDef* TIMx, u16 TIM_OCFast);
void TIM_OC4FastConfig(TIM_TypeDef* TIMx, u16 TIM_OCFast);
void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, u16 TIM_OCClear);
void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, u16 TIM_OCClear);
void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, u16 TIM_OCClear);
void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, u16 TIM_OCClear);
void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, u16 TIM_OCPolarity);
void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, u16 TIM_OCNPolarity);
void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, u16 TIM_OCPolarity);
void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, u16 TIM_OCNPolarity);
void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, u16 TIM_OCPolarity);
void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, u16 TIM_OCNPolarity);
void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, u16 TIM_OCPolarity);
void TIM_CCxCmd(TIM_TypeDef* TIMx, u16 TIM_Channel, u16 TIM_CCx);
void TIM_CCxNCmd(TIM_TypeDef* TIMx, u16 TIM_Channel, u16 TIM_CCxN);
void TIM_SelectOCxM(TIM_TypeDef* TIMx, u16 TIM_Channel, u16 TIM_OCMode);
void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, u16 TIM_UpdateSource);
void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState);
void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, u16 TIM_OPMode);
void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, u16 TIM_TRGOSource);
void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, u16 TIM_SlaveMode);
void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, u16 TIM_MasterSlaveMode);
void TIM_SetCounter(TIM_TypeDef* TIMx, u16 Counter);
void TIM_SetAutoreload(TIM_TypeDef* TIMx, u16 Autoreload);
void TIM_SetCompare1(TIM_TypeDef* TIMx, u16 Compare1);
void TIM_SetCompare2(TIM_TypeDef* TIMx, u16 Compare2);
void TIM_SetCompare3(TIM_TypeDef* TIMx, u16 Compare3);
void TIM_SetCompare4(TIM_TypeDef* TIMx, u16 Compare4);
void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, u16 TIM_ICPSC);
void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, u16 TIM_ICPSC);
void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, u16 TIM_ICPSC);
void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, u16 TIM_ICPSC);
void TIM_SetClockDivision(TIM_TypeDef* TIMx, u16 TIM_CKD);
u16 TIM_GetCapture1(TIM_TypeDef* TIMx);
u16 TIM_GetCapture2(TIM_TypeDef* TIMx);
u16 TIM_GetCapture3(TIM_TypeDef* TIMx);
u16 TIM_GetCapture4(TIM_TypeDef* TIMx);
u16 TIM_GetCounter(TIM_TypeDef* TIMx);
u16 TIM_GetPrescaler(TIM_TypeDef* TIMx);
FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, u16 TIM_FLAG);
void TIM_ClearFlag(TIM_TypeDef* TIMx, u16 TIM_FLAG);
ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, u16 TIM_IT);
void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, u16 TIM_IT);
#endif /*__STM32F10x_TIM_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_type.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the common data types used for the
* STM32F10x firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_TYPE_H
#define __STM32F10x_TYPE_H
/* Includes ------------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
typedef signed long s32;
typedef signed short s16;
typedef signed char s8;
typedef signed long const sc32; /* Read Only */
typedef signed short const sc16; /* Read Only */
typedef signed char const sc8; /* Read Only */
typedef volatile signed long vs32;
typedef volatile signed short vs16;
typedef volatile signed char vs8;
typedef volatile signed long const vsc32; /* Read Only */
typedef volatile signed short const vsc16; /* Read Only */
typedef volatile signed char const vsc8; /* Read Only */
typedef unsigned long u32;
typedef unsigned short u16;
typedef unsigned char u8;
typedef unsigned long const uc32; /* Read Only */
typedef unsigned short const uc16; /* Read Only */
typedef unsigned char const uc8; /* Read Only */
typedef volatile unsigned long vu32;
typedef volatile unsigned short vu16;
typedef volatile unsigned char vu8;
typedef volatile unsigned long const vuc32; /* Read Only */
typedef volatile unsigned short const vuc16; /* Read Only */
typedef volatile unsigned char const vuc8; /* Read Only */
typedef enum {FALSE = 0, TRUE = !FALSE} bool;
typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus;
typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;
#define U8_MAX ((u8)255)
#define S8_MAX ((s8)127)
#define S8_MIN ((s8)-128)
#define U16_MAX ((u16)65535u)
#define S16_MAX ((s16)32767)
#define S16_MIN ((s16)-32768)
#define U32_MAX ((u32)4294967295uL)
#define S32_MAX ((s32)2147483647)
#define S32_MIN ((s32)-2147483648)
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
#endif /* __STM32F10x_TYPE_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_usart.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* USART firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_USART_H
#define __STM32F10x_USART_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* USART Init Structure definition */
typedef struct
{
u32 USART_BaudRate;
u16 USART_WordLength;
u16 USART_StopBits;
u16 USART_Parity;
u16 USART_Mode;
u16 USART_HardwareFlowControl;
} USART_InitTypeDef;
/* USART Clock Init Structure definition */
typedef struct
{
u16 USART_Clock;
u16 USART_CPOL;
u16 USART_CPHA;
u16 USART_LastBit;
} USART_ClockInitTypeDef;
/* Exported constants --------------------------------------------------------*/
#define IS_USART_ALL_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == USART1_BASE) || \
((*(u32*)&(PERIPH)) == USART2_BASE) || \
((*(u32*)&(PERIPH)) == USART3_BASE) || \
((*(u32*)&(PERIPH)) == UART4_BASE) || \
((*(u32*)&(PERIPH)) == UART5_BASE))
#define IS_USART_123_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == USART1_BASE) || \
((*(u32*)&(PERIPH)) == USART2_BASE) || \
((*(u32*)&(PERIPH)) == USART3_BASE))
#define IS_USART_1234_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == USART1_BASE) || \
((*(u32*)&(PERIPH)) == USART2_BASE) || \
((*(u32*)&(PERIPH)) == USART3_BASE) || \
((*(u32*)&(PERIPH)) == UART4_BASE))
/* USART Word Length ---------------------------------------------------------*/
#define USART_WordLength_8b ((u16)0x0000)
#define USART_WordLength_9b ((u16)0x1000)
#define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \
((LENGTH) == USART_WordLength_9b))
/* USART Stop Bits -----------------------------------------------------------*/
#define USART_StopBits_1 ((u16)0x0000)
#define USART_StopBits_0_5 ((u16)0x1000)
#define USART_StopBits_2 ((u16)0x2000)
#define USART_StopBits_1_5 ((u16)0x3000)
#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \
((STOPBITS) == USART_StopBits_0_5) || \
((STOPBITS) == USART_StopBits_2) || \
((STOPBITS) == USART_StopBits_1_5))
/* USART Parity --------------------------------------------------------------*/
#define USART_Parity_No ((u16)0x0000)
#define USART_Parity_Even ((u16)0x0400)
#define USART_Parity_Odd ((u16)0x0600)
#define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \
((PARITY) == USART_Parity_Even) || \
((PARITY) == USART_Parity_Odd))
/* USART Mode ----------------------------------------------------------------*/
#define USART_Mode_Rx ((u16)0x0004)
#define USART_Mode_Tx ((u16)0x0008)
#define IS_USART_MODE(MODE) ((((MODE) & (u16)0xFFF3) == 0x00) && ((MODE) != (u16)0x00))
/* USART Hardware Flow Control -----------------------------------------------*/
#define USART_HardwareFlowControl_None ((u16)0x0000)
#define USART_HardwareFlowControl_RTS ((u16)0x0100)
#define USART_HardwareFlowControl_CTS ((u16)0x0200)
#define USART_HardwareFlowControl_RTS_CTS ((u16)0x0300)
#define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\
(((CONTROL) == USART_HardwareFlowControl_None) || \
((CONTROL) == USART_HardwareFlowControl_RTS) || \
((CONTROL) == USART_HardwareFlowControl_CTS) || \
((CONTROL) == USART_HardwareFlowControl_RTS_CTS))
#define IS_USART_PERIPH_HFC(PERIPH, HFC) ((((*(u32*)&(PERIPH)) != UART4_BASE) && \
((*(u32*)&(PERIPH)) != UART5_BASE)) \
|| ((HFC) == USART_HardwareFlowControl_None))
/* USART Clock ---------------------------------------------------------------*/
#define USART_Clock_Disable ((u16)0x0000)
#define USART_Clock_Enable ((u16)0x0800)
#define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \
((CLOCK) == USART_Clock_Enable))
/* USART Clock Polarity ------------------------------------------------------*/
#define USART_CPOL_Low ((u16)0x0000)
#define USART_CPOL_High ((u16)0x0400)
#define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High))
/* USART Clock Phase ---------------------------------------------------------*/
#define USART_CPHA_1Edge ((u16)0x0000)
#define USART_CPHA_2Edge ((u16)0x0200)
#define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge))
/* USART Last Bit ------------------------------------------------------------*/
#define USART_LastBit_Disable ((u16)0x0000)
#define USART_LastBit_Enable ((u16)0x0100)
#define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \
((LASTBIT) == USART_LastBit_Enable))
/* USART Interrupt definition ------------------------------------------------*/
#define USART_IT_PE ((u16)0x0028)
#define USART_IT_TXE ((u16)0x0727)
#define USART_IT_TC ((u16)0x0626)
#define USART_IT_RXNE ((u16)0x0525)
#define USART_IT_IDLE ((u16)0x0424)
#define USART_IT_LBD ((u16)0x0846)
#define USART_IT_CTS ((u16)0x096A)
#define USART_IT_ERR ((u16)0x0060)
#define USART_IT_ORE ((u16)0x0360)
#define USART_IT_NE ((u16)0x0260)
#define USART_IT_FE ((u16)0x0160)
#define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR))
#define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \
((IT) == USART_IT_NE) || ((IT) == USART_IT_FE))
#define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS))
#define IS_USART_PERIPH_IT(PERIPH, USART_IT) ((((*(u32*)&(PERIPH)) != UART4_BASE) && \
((*(u32*)&(PERIPH)) != UART5_BASE)) \
|| ((USART_IT) != USART_IT_CTS))
/* USART DMA Requests --------------------------------------------------------*/
#define USART_DMAReq_Tx ((u16)0x0080)
#define USART_DMAReq_Rx ((u16)0x0040)
#define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (u16)0xFF3F) == 0x00) && ((DMAREQ) != (u16)0x00))
/* USART WakeUp methods ------------------------------------------------------*/
#define USART_WakeUp_IdleLine ((u16)0x0000)
#define USART_WakeUp_AddressMark ((u16)0x0800)
#define IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \
((WAKEUP) == USART_WakeUp_AddressMark))
/* USART LIN Break Detection Length ------------------------------------------*/
#define USART_LINBreakDetectLength_10b ((u16)0x0000)
#define USART_LINBreakDetectLength_11b ((u16)0x0020)
#define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \
(((LENGTH) == USART_LINBreakDetectLength_10b) || \
((LENGTH) == USART_LINBreakDetectLength_11b))
/* USART IrDA Low Power ------------------------------------------------------*/
#define USART_IrDAMode_LowPower ((u16)0x0004)
#define USART_IrDAMode_Normal ((u16)0x0000)
#define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \
((MODE) == USART_IrDAMode_Normal))
/* USART Flags ---------------------------------------------------------------*/
#define USART_FLAG_CTS ((u16)0x0200)
#define USART_FLAG_LBD ((u16)0x0100)
#define USART_FLAG_TXE ((u16)0x0080)
#define USART_FLAG_TC ((u16)0x0040)
#define USART_FLAG_RXNE ((u16)0x0020)
#define USART_FLAG_IDLE ((u16)0x0010)
#define USART_FLAG_ORE ((u16)0x0008)
#define USART_FLAG_NE ((u16)0x0004)
#define USART_FLAG_FE ((u16)0x0002)
#define USART_FLAG_PE ((u16)0x0001)
#define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \
((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \
((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \
((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \
((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE))
#define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (u16)0xFC9F) == 0x00) && ((FLAG) != (u16)0x00))
#define IS_USART_PERIPH_FLAG(PERIPH, USART_FLAG) ((((*(u32*)&(PERIPH)) != UART4_BASE) &&\
((*(u32*)&(PERIPH)) != UART5_BASE)) \
|| ((USART_FLAG) != USART_FLAG_CTS))
#define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21))
#define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
#define IS_USART_DATA(DATA) ((DATA) <= 0x1FF)
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void USART_DeInit(USART_TypeDef* USARTx);
void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct);
void USART_StructInit(USART_InitTypeDef* USART_InitStruct);
void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct);
void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct);
void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
void USART_ITConfig(USART_TypeDef* USARTx, u16 USART_IT, FunctionalState NewState);
void USART_DMACmd(USART_TypeDef* USARTx, u16 USART_DMAReq, FunctionalState NewState);
void USART_SetAddress(USART_TypeDef* USARTx, u8 USART_Address);
void USART_WakeUpConfig(USART_TypeDef* USARTx, u16 USART_WakeUp);
void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState);
void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, u16 USART_LINBreakDetectLength);
void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState);
void USART_SendData(USART_TypeDef* USARTx, u16 Data);
u16 USART_ReceiveData(USART_TypeDef* USARTx);
void USART_SendBreak(USART_TypeDef* USARTx);
void USART_SetGuardTime(USART_TypeDef* USARTx, u8 USART_GuardTime);
void USART_SetPrescaler(USART_TypeDef* USARTx, u8 USART_Prescaler);
void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState);
void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState);
void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState);
void USART_IrDAConfig(USART_TypeDef* USARTx, u16 USART_IrDAMode);
void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState);
FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, u16 USART_FLAG);
void USART_ClearFlag(USART_TypeDef* USARTx, u16 USART_FLAG);
ITStatus USART_GetITStatus(USART_TypeDef* USARTx, u16 USART_IT);
void USART_ClearITPendingBit(USART_TypeDef* USARTx, u16 USART_IT);
#endif /* __STM32F10x_USART_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_wwdg.h
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file contains all the functions prototypes for the
* WWDG firmware library.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_WWDG_H
#define __STM32F10x_WWDG_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* WWDG Prescaler */
#define WWDG_Prescaler_1 ((u32)0x00000000)
#define WWDG_Prescaler_2 ((u32)0x00000080)
#define WWDG_Prescaler_4 ((u32)0x00000100)
#define WWDG_Prescaler_8 ((u32)0x00000180)
#define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
((PRESCALER) == WWDG_Prescaler_2) || \
((PRESCALER) == WWDG_Prescaler_4) || \
((PRESCALER) == WWDG_Prescaler_8))
#define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
#define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void WWDG_DeInit(void);
void WWDG_SetPrescaler(u32 WWDG_Prescaler);
void WWDG_SetWindowValue(u8 WindowValue);
void WWDG_EnableIT(void);
void WWDG_SetCounter(u8 Counter);
void WWDG_Enable(u8 Counter);
FlagStatus WWDG_GetFlagStatus(void);
void WWDG_ClearFlag(void);
#endif /* __STM32F10x_WWDG_H */
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_bkp.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the BKP firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_bkp.h"
#include "stm32f10x_rcc.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* ------------ BKP registers bit address in the alias region ----------- */
#define BKP_OFFSET (BKP_BASE - PERIPH_BASE)
/* --- CR Register ---*/
/* Alias word address of TPAL bit */
#define CR_OFFSET (BKP_OFFSET + 0x30)
#define TPAL_BitNumber 0x01
#define CR_TPAL_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPAL_BitNumber * 4))
/* Alias word address of TPE bit */
#define TPE_BitNumber 0x00
#define CR_TPE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPE_BitNumber * 4))
/* --- CSR Register ---*/
/* Alias word address of TPIE bit */
#define CSR_OFFSET (BKP_OFFSET + 0x34)
#define TPIE_BitNumber 0x02
#define CSR_TPIE_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TPIE_BitNumber * 4))
/* Alias word address of TIF bit */
#define TIF_BitNumber 0x09
#define CSR_TIF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TIF_BitNumber * 4))
/* Alias word address of TEF bit */
#define TEF_BitNumber 0x08
#define CSR_TEF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEF_BitNumber * 4))
/* ---------------------- BKP registers bit mask ------------------------ */
/* RTCCR register bit mask */
#define RTCCR_CAL_Mask ((u16)0xFF80)
#define RTCCR_Mask ((u16)0xFC7F)
/* CSR register bit mask */
#define CSR_CTE_Set ((u16)0x0001)
#define CSR_CTI_Set ((u16)0x0002)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : BKP_DeInit
* Description : Deinitializes the BKP peripheral registers to their default
* reset values.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void BKP_DeInit(void)
{
RCC_BackupResetCmd(ENABLE);
RCC_BackupResetCmd(DISABLE);
}
/*******************************************************************************
* Function Name : BKP_TamperPinLevelConfig
* Description : Configures the Tamper Pin active level.
* Input : - BKP_TamperPinLevel: specifies the Tamper Pin active level.
* This parameter can be one of the following values:
* - BKP_TamperPinLevel_High: Tamper pin active on high level
* - BKP_TamperPinLevel_Low: Tamper pin active on low level
* Output : None
* Return : None
*******************************************************************************/
void BKP_TamperPinLevelConfig(u16 BKP_TamperPinLevel)
{
/* Check the parameters */
assert_param(IS_BKP_TAMPER_PIN_LEVEL(BKP_TamperPinLevel));
*(vu32 *) CR_TPAL_BB = BKP_TamperPinLevel;
}
/*******************************************************************************
* Function Name : BKP_TamperPinCmd
* Description : Enables or disables the Tamper Pin activation.
* Input : - NewState: new state of the Tamper Pin activation.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void BKP_TamperPinCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) CR_TPE_BB = (u32)NewState;
}
/*******************************************************************************
* Function Name : BKP_ITConfig
* Description : Enables or disables the Tamper Pin Interrupt.
* Input : - NewState: new state of the Tamper Pin Interrupt.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void BKP_ITConfig(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) CSR_TPIE_BB = (u32)NewState;
}
/*******************************************************************************
* Function Name : BKP_RTCOutputConfig
* Description : Select the RTC output source to output on the Tamper pin.
* Input : - BKP_RTCOutputSource: specifies the RTC output source.
* This parameter can be one of the following values:
* - BKP_RTCOutputSource_None: no RTC output on the Tamper pin.
* - BKP_RTCOutputSource_CalibClock: output the RTC clock
* with frequency divided by 64 on the Tamper pin.
* - BKP_RTCOutputSource_Alarm: output the RTC Alarm pulse
* signal on the Tamper pin.
* - BKP_RTCOutputSource_Second: output the RTC Second pulse
* signal on the Tamper pin.
* Output : None
* Return : None
*******************************************************************************/
void BKP_RTCOutputConfig(u16 BKP_RTCOutputSource)
{
u16 tmpreg = 0;
/* Check the parameters */
assert_param(IS_BKP_RTC_OUTPUT_SOURCE(BKP_RTCOutputSource));
tmpreg = BKP->RTCCR;
/* Clear CCO, ASOE and ASOS bits */
tmpreg &= RTCCR_Mask;
/* Set CCO, ASOE and ASOS bits according to BKP_RTCOutputSource value */
tmpreg |= BKP_RTCOutputSource;
/* Store the new value */
BKP->RTCCR = tmpreg;
}
/*******************************************************************************
* Function Name : BKP_SetRTCCalibrationValue
* Description : Sets RTC Clock Calibration value.
* Input : - CalibrationValue: specifies the RTC Clock Calibration value.
* This parameter must be a number between 0 and 0x7F.
* Output : None
* Return : None
*******************************************************************************/
void BKP_SetRTCCalibrationValue(u8 CalibrationValue)
{
u16 tmpreg = 0;
/* Check the parameters */
assert_param(IS_BKP_CALIBRATION_VALUE(CalibrationValue));
tmpreg = BKP->RTCCR;
/* Clear CAL[6:0] bits */
tmpreg &= RTCCR_CAL_Mask;
/* Set CAL[6:0] bits according to CalibrationValue value */
tmpreg |= CalibrationValue;
/* Store the new value */
BKP->RTCCR = tmpreg;
}
/*******************************************************************************
* Function Name : BKP_WriteBackupRegister
* Description : Writes user data to the specified Data Backup Register.
* Input : - BKP_DR: specifies the Data Backup Register.
* This parameter can be BKP_DRx where x:[1, 42]
* - Data: data to write
* Output : None
* Return : None
*******************************************************************************/
void BKP_WriteBackupRegister(u16 BKP_DR, u16 Data)
{
/* Check the parameters */
assert_param(IS_BKP_DR(BKP_DR));
*(vu16 *) (BKP_BASE + BKP_DR) = Data;
}
/*******************************************************************************
* Function Name : BKP_ReadBackupRegister
* Description : Reads data from the specified Data Backup Register.
* Input : - BKP_DR: specifies the Data Backup Register.
* This parameter can be BKP_DRx where x:[1, 42]
* Output : None
* Return : The content of the specified Data Backup Register
*******************************************************************************/
u16 BKP_ReadBackupRegister(u16 BKP_DR)
{
/* Check the parameters */
assert_param(IS_BKP_DR(BKP_DR));
return (*(vu16 *) (BKP_BASE + BKP_DR));
}
/*******************************************************************************
* Function Name : BKP_GetFlagStatus
* Description : Checks whether the Tamper Pin Event flag is set or not.
* Input : None
* Output : None
* Return : The new state of the Tamper Pin Event flag (SET or RESET).
*******************************************************************************/
FlagStatus BKP_GetFlagStatus(void)
{
return (FlagStatus)(*(vu32 *) CSR_TEF_BB);
}
/*******************************************************************************
* Function Name : BKP_ClearFlag
* Description : Clears Tamper Pin Event pending flag.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void BKP_ClearFlag(void)
{
/* Set CTE bit to clear Tamper Pin Event flag */
BKP->CSR |= CSR_CTE_Set;
}
/*******************************************************************************
* Function Name : BKP_GetITStatus
* Description : Checks whether the Tamper Pin Interrupt has occurred or not.
* Input : None
* Output : None
* Return : The new state of the Tamper Pin Interrupt (SET or RESET).
*******************************************************************************/
ITStatus BKP_GetITStatus(void)
{
return (ITStatus)(*(vu32 *) CSR_TIF_BB);
}
/*******************************************************************************
* Function Name : BKP_ClearITPendingBit
* Description : Clears Tamper Pin Interrupt pending bit.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void BKP_ClearITPendingBit(void)
{
/* Set CTI bit to clear Tamper Pin Interrupt pending bit */
BKP->CSR |= CSR_CTI_Set;
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_can.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the CAN firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_can.h"
#include "stm32f10x_rcc.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* CAN Master Control Register bits */
#define MCR_INRQ ((u32)0x00000001) /* Initialization request */
#define MCR_SLEEP ((u32)0x00000002) /* Sleep mode request */
#define MCR_TXFP ((u32)0x00000004) /* Transmit FIFO priority */
#define MCR_RFLM ((u32)0x00000008) /* Receive FIFO locked mode */
#define MCR_NART ((u32)0x00000010) /* No automatic retransmission */
#define MCR_AWUM ((u32)0x00000020) /* Automatic wake up mode */
#define MCR_ABOM ((u32)0x00000040) /* Automatic bus-off management */
#define MCR_TTCM ((u32)0x00000080) /* time triggered communication */
/* CAN Master Status Register bits */
#define MSR_INAK ((u32)0x00000001) /* Initialization acknowledge */
#define MSR_WKUI ((u32)0x00000008) /* Wake-up interrupt */
#define MSR_SLAKI ((u32)0x00000010) /* Sleep acknowledge interrupt */
/* CAN Transmit Status Register bits */
#define TSR_RQCP0 ((u32)0x00000001) /* Request completed mailbox0 */
#define TSR_TXOK0 ((u32)0x00000002) /* Transmission OK of mailbox0 */
#define TSR_ABRQ0 ((u32)0x00000080) /* Abort request for mailbox0 */
#define TSR_RQCP1 ((u32)0x00000100) /* Request completed mailbox1 */
#define TSR_TXOK1 ((u32)0x00000200) /* Transmission OK of mailbox1 */
#define TSR_ABRQ1 ((u32)0x00008000) /* Abort request for mailbox1 */
#define TSR_RQCP2 ((u32)0x00010000) /* Request completed mailbox2 */
#define TSR_TXOK2 ((u32)0x00020000) /* Transmission OK of mailbox2 */
#define TSR_ABRQ2 ((u32)0x00800000) /* Abort request for mailbox2 */
#define TSR_TME0 ((u32)0x04000000) /* Transmit mailbox 0 empty */
#define TSR_TME1 ((u32)0x08000000) /* Transmit mailbox 1 empty */
#define TSR_TME2 ((u32)0x10000000) /* Transmit mailbox 2 empty */
/* CAN Receive FIFO 0 Register bits */
#define RF0R_FULL0 ((u32)0x00000008) /* FIFO 0 full */
#define RF0R_FOVR0 ((u32)0x00000010) /* FIFO 0 overrun */
#define RF0R_RFOM0 ((u32)0x00000020) /* Release FIFO 0 output mailbox */
/* CAN Receive FIFO 1 Register bits */
#define RF1R_FULL1 ((u32)0x00000008) /* FIFO 1 full */
#define RF1R_FOVR1 ((u32)0x00000010) /* FIFO 1 overrun */
#define RF1R_RFOM1 ((u32)0x00000020) /* Release FIFO 1 output mailbox */
/* CAN Error Status Register bits */
#define ESR_EWGF ((u32)0x00000001) /* Error warning flag */
#define ESR_EPVF ((u32)0x00000002) /* Error passive flag */
#define ESR_BOFF ((u32)0x00000004) /* Bus-off flag */
/* CAN Mailbox Transmit Request */
#define TMIDxR_TXRQ ((u32)0x00000001) /* Transmit mailbox request */
/* CAN Filter Master Register bits */
#define FMR_FINIT ((u32)0x00000001) /* Filter init mode */
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
static ITStatus CheckITStatus(u32 CAN_Reg, u32 It_Bit);
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : CAN_DeInit
* Description : Deinitializes the CAN peripheral registers to their default
* reset values.
* Input : None.
* Output : None.
* Return : None.
*******************************************************************************/
void CAN_DeInit(void)
{
/* Enable CAN reset state */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN, ENABLE);
/* Release CAN from reset state */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN, DISABLE);
}
/*******************************************************************************
* Function Name : CAN_Init
* Description : Initializes the CAN peripheral according to the specified
* parameters in the CAN_InitStruct.
* Input : CAN_InitStruct: pointer to a CAN_InitTypeDef structure that
contains the configuration information for the CAN peripheral.
* Output : None.
* Return : Constant indicates initialization succeed which will be
* CANINITFAILED or CANINITOK.
*******************************************************************************/
u8 CAN_Init(CAN_InitTypeDef* CAN_InitStruct)
{
u8 InitStatus = 0;
u16 WaitAck = 0;
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM));
assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM));
assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM));
assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART));
assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM));
assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP));
assert_param(IS_CAN_MODE(CAN_InitStruct->CAN_Mode));
assert_param(IS_CAN_SJW(CAN_InitStruct->CAN_SJW));
assert_param(IS_CAN_BS1(CAN_InitStruct->CAN_BS1));
assert_param(IS_CAN_BS2(CAN_InitStruct->CAN_BS2));
assert_param(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler));
/* Request initialisation */
CAN->MCR = MCR_INRQ;
/* ...and check acknowledged */
if ((CAN->MSR & MSR_INAK) == 0)
{
InitStatus = CANINITFAILED;
}
else
{
/* Set the time triggered communication mode */
if (CAN_InitStruct->CAN_TTCM == ENABLE)
{
CAN->MCR |= MCR_TTCM;
}
else
{
CAN->MCR &= ~MCR_TTCM;
}
/* Set the automatic bus-off management */
if (CAN_InitStruct->CAN_ABOM == ENABLE)
{
CAN->MCR |= MCR_ABOM;
}
else
{
CAN->MCR &= ~MCR_ABOM;
}
/* Set the automatic wake-up mode */
if (CAN_InitStruct->CAN_AWUM == ENABLE)
{
CAN->MCR |= MCR_AWUM;
}
else
{
CAN->MCR &= ~MCR_AWUM;
}
/* Set the no automatic retransmission */
if (CAN_InitStruct->CAN_NART == ENABLE)
{
CAN->MCR |= MCR_NART;
}
else
{
CAN->MCR &= ~MCR_NART;
}
/* Set the receive FIFO locked mode */
if (CAN_InitStruct->CAN_RFLM == ENABLE)
{
CAN->MCR |= MCR_RFLM;
}
else
{
CAN->MCR &= ~MCR_RFLM;
}
/* Set the transmit FIFO priority */
if (CAN_InitStruct->CAN_TXFP == ENABLE)
{
CAN->MCR |= MCR_TXFP;
}
else
{
CAN->MCR &= ~MCR_TXFP;
}
/* Set the bit timing register */
CAN->BTR = (u32)((u32)CAN_InitStruct->CAN_Mode << 30) | ((u32)CAN_InitStruct->CAN_SJW << 24) |
((u32)CAN_InitStruct->CAN_BS1 << 16) | ((u32)CAN_InitStruct->CAN_BS2 << 20) |
((u32)CAN_InitStruct->CAN_Prescaler - 1);
InitStatus = CANINITOK;
/* Request leave initialisation */
CAN->MCR &= ~MCR_INRQ;
/* Wait the acknowledge */
for(WaitAck = 0x400; WaitAck > 0x0; WaitAck--)
{
}
/* ...and check acknowledged */
if ((CAN->MSR & MSR_INAK) == MSR_INAK)
{
InitStatus = CANINITFAILED;
}
}
/* At this step, return the status of initialization */
return InitStatus;
}
/*******************************************************************************
* Function Name : CAN_FilterInit
* Description : Initializes the CAN peripheral according to the specified
* parameters in the CAN_FilterInitStruct.
* Input : CAN_FilterInitStruct: pointer to a CAN_FilterInitTypeDef
* structure that contains the configuration information.
* Output : None.
* Return : None.
*******************************************************************************/
void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct)
{
u16 FilterNumber_BitPos = 0;
/* Check the parameters */
assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber));
assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode));
assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale));
assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment));
assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation));
FilterNumber_BitPos =
(u16)(((u16)0x0001) << ((u16)CAN_FilterInitStruct->CAN_FilterNumber));
/* Initialisation mode for the filter */
CAN->FMR |= FMR_FINIT;
/* Filter Deactivation */
CAN->FA1R &= ~(u32)FilterNumber_BitPos;
/* Filter Scale */
if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit)
{
/* 16-bit scale for the filter */
CAN->FS1R &= ~(u32)FilterNumber_BitPos;
/* First 16-bit identifier and First 16-bit mask */
/* Or First 16-bit identifier and Second 16-bit identifier */
CAN->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 =
((u32)((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) |
((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterIdLow);
/* Second 16-bit identifier and Second 16-bit mask */
/* Or Third 16-bit identifier and Fourth 16-bit identifier */
CAN->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 =
((u32)((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterIdHigh);
}
if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit)
{
/* 32-bit scale for the filter */
CAN->FS1R |= FilterNumber_BitPos;
/* 32-bit identifier or First 32-bit identifier */
CAN->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 =
((u32)((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) |
((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterIdLow);
/* 32-bit mask or Second 32-bit identifier */
CAN->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 =
((u32)((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterMaskIdLow);
}
/* Filter Mode */
if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask)
{
/*Id/Mask mode for the filter*/
CAN->FM1R &= ~(u32)FilterNumber_BitPos;
}
else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
{
/*Identifier list mode for the filter*/
CAN->FM1R |= (u32)FilterNumber_BitPos;
}
/* Filter FIFO assignment */
if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_FilterFIFO0)
{
/* FIFO 0 assignation for the filter */
CAN->FFA1R &= ~(u32)FilterNumber_BitPos;
}
if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_FilterFIFO1)
{
/* FIFO 1 assignation for the filter */
CAN->FFA1R |= (u32)FilterNumber_BitPos;
}
/* Filter activation */
if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE)
{
CAN->FA1R |= FilterNumber_BitPos;
}
/* Leave the initialisation mode for the filter */
CAN->FMR &= ~FMR_FINIT;
}
/*******************************************************************************
* Function Name : CAN_StructInit
* Description : Fills each CAN_InitStruct member with its default value.
* Input : CAN_InitStruct: pointer to a CAN_InitTypeDef structure which
* will be initialized.
* Output : None.
* Return : None.
*******************************************************************************/
void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct)
{
/* Reset CAN init structure parameters values */
/* Initialize the time triggered communication mode */
CAN_InitStruct->CAN_TTCM = DISABLE;
/* Initialize the automatic bus-off management */
CAN_InitStruct->CAN_ABOM = DISABLE;
/* Initialize the automatic wake-up mode */
CAN_InitStruct->CAN_AWUM = DISABLE;
/* Initialize the no automatic retransmission */
CAN_InitStruct->CAN_NART = DISABLE;
/* Initialize the receive FIFO locked mode */
CAN_InitStruct->CAN_RFLM = DISABLE;
/* Initialize the transmit FIFO priority */
CAN_InitStruct->CAN_TXFP = DISABLE;
/* Initialize the CAN_Mode member */
CAN_InitStruct->CAN_Mode = CAN_Mode_Normal;
/* Initialize the CAN_SJW member */
CAN_InitStruct->CAN_SJW = CAN_SJW_1tq;
/* Initialize the CAN_BS1 member */
CAN_InitStruct->CAN_BS1 = CAN_BS1_4tq;
/* Initialize the CAN_BS2 member */
CAN_InitStruct->CAN_BS2 = CAN_BS2_3tq;
/* Initialize the CAN_Prescaler member */
CAN_InitStruct->CAN_Prescaler = 1;
}
/*******************************************************************************
* Function Name : CAN_ITConfig
* Description : Enables or disables the specified CAN interrupts.
* Input : - CAN_IT: specifies the CAN interrupt sources to be enabled or
* disabled.
* This parameter can be: CAN_IT_TME, CAN_IT_FMP0, CAN_IT_FF0,
* CAN_IT_FOV0, CAN_IT_FMP1, CAN_IT_FF1,
* CAN_IT_FOV1, CAN_IT_EWG, CAN_IT_EPV,
* CAN_IT_LEC, CAN_IT_ERR, CAN_IT_WKU or
* CAN_IT_SLK.
* - NewState: new state of the CAN interrupts.
* This parameter can be: ENABLE or DISABLE.
* Output : None.
* Return : None.
*******************************************************************************/
void CAN_ITConfig(u32 CAN_IT, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_CAN_ITConfig(CAN_IT));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected CAN interrupt */
CAN->IER |= CAN_IT;
}
else
{
/* Disable the selected CAN interrupt */
CAN->IER &= ~CAN_IT;
}
}
/*******************************************************************************
* Function Name : CAN_Transmit
* Description : Initiates the transmission of a message.
* Input : TxMessage: pointer to a structure which contains CAN Id, CAN
* DLC and CAN datas.
* Output : None.
* Return : The number of the mailbox that is used for transmission
* or CAN_NO_MB if there is no empty mailbox.
*******************************************************************************/
u8 CAN_Transmit(CanTxMsg* TxMessage)
{
u8 TransmitMailbox = 0;
/* Check the parameters */
assert_param(IS_CAN_STDID(TxMessage->StdId));
assert_param(IS_CAN_EXTID(TxMessage->StdId));
assert_param(IS_CAN_IDTYPE(TxMessage->IDE));
assert_param(IS_CAN_RTR(TxMessage->RTR));
assert_param(IS_CAN_DLC(TxMessage->DLC));
/* Select one empty transmit mailbox */
if ((CAN->TSR&TSR_TME0) == TSR_TME0)
{
TransmitMailbox = 0;
}
else if ((CAN->TSR&TSR_TME1) == TSR_TME1)
{
TransmitMailbox = 1;
}
else if ((CAN->TSR&TSR_TME2) == TSR_TME2)
{
TransmitMailbox = 2;
}
else
{
TransmitMailbox = CAN_NO_MB;
}
if (TransmitMailbox != CAN_NO_MB)
{
/* Set up the Id */
CAN->sTxMailBox[TransmitMailbox].TIR &= TMIDxR_TXRQ;
if (TxMessage->IDE == CAN_ID_STD)
{
TxMessage->StdId &= (u32)0x000007FF;
TxMessage->StdId = TxMessage->StdId << 21;
CAN->sTxMailBox[TransmitMailbox].TIR |= (TxMessage->StdId | TxMessage->IDE |
TxMessage->RTR);
}
else
{
TxMessage->ExtId &= (u32)0x1FFFFFFF;
TxMessage->ExtId <<= 3;
CAN->sTxMailBox[TransmitMailbox].TIR |= (TxMessage->ExtId | TxMessage->IDE |
TxMessage->RTR);
}
/* Set up the DLC */
TxMessage->DLC &= (u8)0x0000000F;
CAN->sTxMailBox[TransmitMailbox].TDTR &= (u32)0xFFFFFFF0;
CAN->sTxMailBox[TransmitMailbox].TDTR |= TxMessage->DLC;
/* Set up the data field */
CAN->sTxMailBox[TransmitMailbox].TDLR = (((u32)TxMessage->Data[3] << 24) |
((u32)TxMessage->Data[2] << 16) |
((u32)TxMessage->Data[1] << 8) |
((u32)TxMessage->Data[0]));
CAN->sTxMailBox[TransmitMailbox].TDHR = (((u32)TxMessage->Data[7] << 24) |
((u32)TxMessage->Data[6] << 16) |
((u32)TxMessage->Data[5] << 8) |
((u32)TxMessage->Data[4]));
/* Request transmission */
CAN->sTxMailBox[TransmitMailbox].TIR |= TMIDxR_TXRQ;
}
return TransmitMailbox;
}
/*******************************************************************************
* Function Name : CAN_TransmitStatus
* Description : Checks the transmission of a message.
* Input : TransmitMailbox: the number of the mailbox that is used for
* transmission.
* Output : None.
* Return : CANTXOK if the CAN driver transmits the message, CANTXFAILED
* in an other case.
*******************************************************************************/
u8 CAN_TransmitStatus(u8 TransmitMailbox)
{
/* RQCP, TXOK and TME bits */
u8 State = 0;
/* Check the parameters */
assert_param(IS_CAN_TRANSMITMAILBOX(TransmitMailbox));
switch (TransmitMailbox)
{
case (0): State |= (u8)((CAN->TSR & TSR_RQCP0) << 2);
State |= (u8)((CAN->TSR & TSR_TXOK0) >> 0);
State |= (u8)((CAN->TSR & TSR_TME0) >> 26);
break;
case (1): State |= (u8)((CAN->TSR & TSR_RQCP1) >> 6);
State |= (u8)((CAN->TSR & TSR_TXOK1) >> 8);
State |= (u8)((CAN->TSR & TSR_TME1) >> 27);
break;
case (2): State |= (u8)((CAN->TSR & TSR_RQCP2) >> 14);
State |= (u8)((CAN->TSR & TSR_TXOK2) >> 16);
State |= (u8)((CAN->TSR & TSR_TME2) >> 28);
break;
default:
State = CANTXFAILED;
break;
}
switch (State)
{
/* transmit pending */
case (0x0): State = CANTXPENDING;
break;
/* transmit failed */
case (0x5): State = CANTXFAILED;
break;
/* transmit succedeed */
case (0x7): State = CANTXOK;
break;
default:
State = CANTXFAILED;
break;
}
return State;
}
/*******************************************************************************
* Function Name : CAN_CancelTransmit
* Description : Cancels a transmit request.
* Input : Mailbox number.
* Output : None.
* Return : None.
*******************************************************************************/
void CAN_CancelTransmit(u8 Mailbox)
{
/* Check the parameters */
assert_param(IS_CAN_TRANSMITMAILBOX(Mailbox));
/* abort transmission */
switch (Mailbox)
{
case (0): CAN->TSR |= TSR_ABRQ0;
break;
case (1): CAN->TSR |= TSR_ABRQ1;
break;
case (2): CAN->TSR |= TSR_ABRQ2;
break;
default:
break;
}
}
/*******************************************************************************
* Function Name : CAN_FIFORelease
* Description : Releases a FIFO.
* Input : FIFONumber: FIFO to release, CAN_FIFO0 or CAN_FIFO1.
* Output : None.
* Return : None.
*******************************************************************************/
void CAN_FIFORelease(u8 FIFONumber)
{
/* Check the parameters */
assert_param(IS_CAN_FIFO(FIFONumber));
/* Release FIFO0 */
if (FIFONumber == CAN_FIFO0)
{
CAN->RF0R = RF0R_RFOM0;
}
/* Release FIFO1 */
else /* FIFONumber == CAN_FIFO1 */
{
CAN->RF1R = RF1R_RFOM1;
}
}
/*******************************************************************************
* Function Name : CAN_MessagePending
* Description : Returns the number of pending messages.
* Input : FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
* Output : None.
* Return : NbMessage which is the number of pending message.
*******************************************************************************/
u8 CAN_MessagePending(u8 FIFONumber)
{
u8 MessagePending=0;
/* Check the parameters */
assert_param(IS_CAN_FIFO(FIFONumber));
if (FIFONumber == CAN_FIFO0)
{
MessagePending = (u8)(CAN->RF0R&(u32)0x03);
}
else if (FIFONumber == CAN_FIFO1)
{
MessagePending = (u8)(CAN->RF1R&(u32)0x03);
}
else
{
MessagePending = 0;
}
return MessagePending;
}
/*******************************************************************************
* Function Name : CAN_Receive
* Description : Receives a message.
* Input : FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
* Output : RxMessage: pointer to a structure which contains CAN Id,
* CAN DLC, CAN datas and FMI number.
* Return : None.
*******************************************************************************/
void CAN_Receive(u8 FIFONumber, CanRxMsg* RxMessage)
{
/* Check the parameters */
assert_param(IS_CAN_FIFO(FIFONumber));
/* Get the Id */
RxMessage->IDE = (u8)0x04 & CAN->sFIFOMailBox[FIFONumber].RIR;
if (RxMessage->IDE == CAN_ID_STD)
{
RxMessage->StdId = (u32)0x000007FF & (CAN->sFIFOMailBox[FIFONumber].RIR >> 21);
}
else
{
RxMessage->ExtId = (u32)0x1FFFFFFF & (CAN->sFIFOMailBox[FIFONumber].RIR >> 3);
}
RxMessage->RTR = (u8)0x02 & CAN->sFIFOMailBox[FIFONumber].RIR;
/* Get the DLC */
RxMessage->DLC = (u8)0x0F & CAN->sFIFOMailBox[FIFONumber].RDTR;
/* Get the FMI */
RxMessage->FMI = (u8)0xFF & (CAN->sFIFOMailBox[FIFONumber].RDTR >> 8);
/* Get the data field */
RxMessage->Data[0] = (u8)0xFF & CAN->sFIFOMailBox[FIFONumber].RDLR;
RxMessage->Data[1] = (u8)0xFF & (CAN->sFIFOMailBox[FIFONumber].RDLR >> 8);
RxMessage->Data[2] = (u8)0xFF & (CAN->sFIFOMailBox[FIFONumber].RDLR >> 16);
RxMessage->Data[3] = (u8)0xFF & (CAN->sFIFOMailBox[FIFONumber].RDLR >> 24);
RxMessage->Data[4] = (u8)0xFF & CAN->sFIFOMailBox[FIFONumber].RDHR;
RxMessage->Data[5] = (u8)0xFF & (CAN->sFIFOMailBox[FIFONumber].RDHR >> 8);
RxMessage->Data[6] = (u8)0xFF & (CAN->sFIFOMailBox[FIFONumber].RDHR >> 16);
RxMessage->Data[7] = (u8)0xFF & (CAN->sFIFOMailBox[FIFONumber].RDHR >> 24);
/* Release the FIFO */
CAN_FIFORelease(FIFONumber);
}
/*******************************************************************************
* Function Name : CAN_Sleep
* Description : Enters the low power mode.
* Input : None.
* Output : None.
* Return : CANSLEEPOK if sleep entered, CANSLEEPFAILED in an other case.
*******************************************************************************/
u8 CAN_Sleep(void)
{
u8 SleepStatus = 0;
/* Sleep mode entering request */
CAN->MCR |= MCR_SLEEP;
SleepStatus = CANSLEEPOK;
/* Sleep mode status */
if ((CAN->MCR&MCR_SLEEP) == 0)
{
/* Sleep mode not entered */
SleepStatus = CANSLEEPFAILED;
}
/* At this step, sleep mode status */
return SleepStatus;
}
/*******************************************************************************
* Function Name : CAN_WakeUp
* Description : Wakes the CAN up.
* Input : None.
* Output : None.
* Return : CANWAKEUPOK if sleep mode left, CANWAKEUPFAILED in an other
* case.
*******************************************************************************/
u8 CAN_WakeUp(void)
{
u8 WakeUpStatus = 0;
/* Wake up request */
CAN->MCR &= ~MCR_SLEEP;
WakeUpStatus = CANWAKEUPFAILED;
/* Sleep mode status */
if ((CAN->MCR&MCR_SLEEP) == 0)
{
/* Sleep mode exited */
WakeUpStatus = CANWAKEUPOK;
}
/* At this step, sleep mode status */
return WakeUpStatus;
}
/*******************************************************************************
* Function Name : CAN_GetFlagStatus
* Description : Checks whether the specified CAN flag is set or not.
* Input : CAN_FLAG: specifies the flag to check.
* This parameter can be: CAN_FLAG_EWG, CAN_FLAG_EPV or
* CAN_FLAG_BOF.
* Output : None.
* Return : The new state of CAN_FLAG (SET or RESET).
*******************************************************************************/
FlagStatus CAN_GetFlagStatus(u32 CAN_FLAG)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_CAN_FLAG(CAN_FLAG));
/* Check the status of the specified CAN flag */
if ((CAN->ESR & CAN_FLAG) != (u32)RESET)
{
/* CAN_FLAG is set */
bitstatus = SET;
}
else
{
/* CAN_FLAG is reset */
bitstatus = RESET;
}
/* Return the CAN_FLAG status */
return bitstatus;
}
/*******************************************************************************
* Function Name : CAN_ClearFlag
* Description : Clears the CAN's pending flags.
* Input : CAN_FLAG: specifies the flag to clear.
* Output : None.
* Return : None.
*******************************************************************************/
void CAN_ClearFlag(u32 CAN_FLAG)
{
/* Check the parameters */
assert_param(IS_CAN_FLAG(CAN_FLAG));
/* Clear the selected CAN flags */
CAN->ESR &= ~CAN_FLAG;
}
/*******************************************************************************
* Function Name : CAN_GetITStatus
* Description : Checks whether the specified CAN interrupt has occurred or
* not.
* Input : CAN_IT: specifies the CAN interrupt source to check.
* This parameter can be: CAN_IT_RQCP0, CAN_IT_RQCP1, CAN_IT_RQCP2,
* CAN_IT_FF0, CAN_IT_FOV0, CAN_IT_FF1,
* CAN_IT_FOV1, CAN_IT_EWG, CAN_IT_EPV,
* CAN_IT_BOF, CAN_IT_WKU or CAN_IT_SLK.
* Output : None.
* Return : The new state of CAN_IT (SET or RESET).
*******************************************************************************/
ITStatus CAN_GetITStatus(u32 CAN_IT)
{
ITStatus pendingbitstatus = RESET;
/* Check the parameters */
assert_param(IS_CAN_ITStatus(CAN_IT));
switch (CAN_IT)
{
case CAN_IT_RQCP0:
pendingbitstatus = CheckITStatus(CAN->TSR, TSR_RQCP0);
break;
case CAN_IT_RQCP1:
pendingbitstatus = CheckITStatus(CAN->TSR, TSR_RQCP1);
break;
case CAN_IT_RQCP2:
pendingbitstatus = CheckITStatus(CAN->TSR, TSR_RQCP2);
break;
case CAN_IT_FF0:
pendingbitstatus = CheckITStatus(CAN->RF0R, RF0R_FULL0);
break;
case CAN_IT_FOV0:
pendingbitstatus = CheckITStatus(CAN->RF0R, RF0R_FOVR0);
break;
case CAN_IT_FF1:
pendingbitstatus = CheckITStatus(CAN->RF1R, RF1R_FULL1);
break;
case CAN_IT_FOV1:
pendingbitstatus = CheckITStatus(CAN->RF1R, RF1R_FOVR1);
break;
case CAN_IT_EWG:
pendingbitstatus = CheckITStatus(CAN->ESR, ESR_EWGF);
break;
case CAN_IT_EPV:
pendingbitstatus = CheckITStatus(CAN->ESR, ESR_EPVF);
break;
case CAN_IT_BOF:
pendingbitstatus = CheckITStatus(CAN->ESR, ESR_BOFF);
break;
case CAN_IT_SLK:
pendingbitstatus = CheckITStatus(CAN->MSR, MSR_SLAKI);
break;
case CAN_IT_WKU:
pendingbitstatus = CheckITStatus(CAN->MSR, MSR_WKUI);
break;
default :
pendingbitstatus = RESET;
break;
}
/* Return the CAN_IT status */
return pendingbitstatus;
}
/*******************************************************************************
* Function Name : CAN_ClearITPendingBit
* Description : Clears the CAN’s interrupt pending bits.
* Input : CAN_IT: specifies the interrupt pending bit to clear.
* Output : None.
* Return : None.
*******************************************************************************/
void CAN_ClearITPendingBit(u32 CAN_IT)
{
/* Check the parameters */
assert_param(IS_CAN_ITStatus(CAN_IT));
switch (CAN_IT)
{
case CAN_IT_RQCP0:
CAN->TSR = TSR_RQCP0; /* rc_w1*/
break;
case CAN_IT_RQCP1:
CAN->TSR = TSR_RQCP1; /* rc_w1*/
break;
case CAN_IT_RQCP2:
CAN->TSR = TSR_RQCP2; /* rc_w1*/
break;
case CAN_IT_FF0:
CAN->RF0R = RF0R_FULL0; /* rc_w1*/
break;
case CAN_IT_FOV0:
CAN->RF0R = RF0R_FOVR0; /* rc_w1*/
break;
case CAN_IT_FF1:
CAN->RF1R = RF1R_FULL1; /* rc_w1*/
break;
case CAN_IT_FOV1:
CAN->RF1R = RF1R_FOVR1; /* rc_w1*/
break;
case CAN_IT_EWG:
CAN->ESR &= ~ ESR_EWGF; /* rw */
break;
case CAN_IT_EPV:
CAN->ESR &= ~ ESR_EPVF; /* rw */
break;
case CAN_IT_BOF:
CAN->ESR &= ~ ESR_BOFF; /* rw */
break;
case CAN_IT_WKU:
CAN->MSR = MSR_WKUI; /* rc_w1*/
break;
case CAN_IT_SLK:
CAN->MSR = MSR_SLAKI; /* rc_w1*/
break;
default :
break;
}
}
/*******************************************************************************
* Function Name : CheckITStatus
* Description : Checks whether the CAN interrupt has occurred or not.
* Input : CAN_Reg: specifies the CAN interrupt register to check.
* It_Bit: specifies the interrupt source bit to check.
* Output : None.
* Return : The new state of the CAN Interrupt (SET or RESET).
*******************************************************************************/
static ITStatus CheckITStatus(u32 CAN_Reg, u32 It_Bit)
{
ITStatus pendingbitstatus = RESET;
if ((CAN_Reg & It_Bit) != (u32)RESET)
{
/* CAN_IT is set */
pendingbitstatus = SET;
}
else
{
/* CAN_IT is reset */
pendingbitstatus = RESET;
}
return pendingbitstatus;
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_crc.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the CRC firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_crc.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* CR register bit mask */
#define CR_RESET_Set ((u32)0x00000001)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : CRC_ResetDR
* Description : Resets the CRC Data register (DR).
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void CRC_ResetDR(void)
{
/* Reset CRC generator */
CRC->CR = CR_RESET_Set;
}
/*******************************************************************************
* Function Name : CRC_CalcCRC
* Description : Computes the 32-bit CRC of a given data word(32-bit).
* Input : - Data: data word(32-bit) to compute its CRC
* Output : None
* Return : 32-bit CRC
*******************************************************************************/
u32 CRC_CalcCRC(u32 Data)
{
CRC->DR = Data;
return (CRC->DR);
}
/*******************************************************************************
* Function Name : CRC_CalcBlockCRC
* Description : Computes the 32-bit CRC of a given buffer of data word(32-bit).
* Input : - pBuffer: pointer to the buffer containing the data to be
* computed
* - BufferLength: length of the buffer to be computed
* Output : None
* Return : 32-bit CRC
*******************************************************************************/
u32 CRC_CalcBlockCRC(u32 pBuffer[], u32 BufferLength)
{
u32 index = 0;
for(index = 0; index < BufferLength; index++)
{
CRC->DR = pBuffer[index];
}
return (CRC->DR);
}
/*******************************************************************************
* Function Name : CRC_GetCRC
* Description : Returns the current CRC value.
* Input : None
* Output : None
* Return : 32-bit CRC
*******************************************************************************/
u32 CRC_GetCRC(void)
{
return (CRC->DR);
}
/*******************************************************************************
* Function Name : CRC_SetIDRegister
* Description : Stores a 8-bit data in the Independent Data(ID) register.
* Input : - IDValue: 8-bit value to be stored in the ID register
* Output : None
* Return : None
*******************************************************************************/
void CRC_SetIDRegister(u8 IDValue)
{
CRC->IDR = IDValue;
}
/*******************************************************************************
* Function Name : CRC_GetIDRegister
* Description : Returns the 8-bit data stored in the Independent Data(ID) register
* Input : None
* Output : None
* Return : 8-bit value of the ID register
*******************************************************************************/
u8 CRC_GetIDRegister(void)
{
return (CRC->IDR);
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_dac.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the DAC firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_dac.h"
#include "stm32f10x_rcc.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* DAC EN mask */
#define CR_EN_Set ((u32)0x00000001)
/* DAC DMAEN mask */
#define CR_DMAEN_Set ((u32)0x00001000)
/* CR register Mask */
#define CR_CLEAR_Mask ((u32)0x00000FFE)
/* DAC SWTRIG mask */
#define SWTRIGR_SWTRIG_Set ((u32)0x00000001)
/* DAC Dual Channels SWTRIG masks */
#define DUAL_SWTRIG_Set ((u32)0x00000003)
#define DUAL_SWTRIG_Reset ((u32)0xFFFFFFFC)
/* DHR registers offsets */
#define DHR12R1_Offset ((u32)0x00000008)
#define DHR12R2_Offset ((u32)0x00000014)
#define DHR12RD_Offset ((u32)0x00000020)
/* DOR register offset */
#define DOR_Offset ((u32)0x0000002C)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : DAC_DeInit
* Description : Deinitializes the DAC peripheral registers to their default
* reset values.
* Input : None.
* Output : None
* Return : None
*******************************************************************************/
void DAC_DeInit(void)
{
/* Enable DAC reset state */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE);
/* Release DAC from reset state */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE);
}
/*******************************************************************************
* Function Name : DAC_Init
* Description : Initializes the DAC peripheral according to the specified
* parameters in the DAC_InitStruct.
* Input : - DAC_Channel: the selected DAC channel.
* This parameter can be one of the following values:
* - DAC_Channel_1: DAC Channel1 selected
* - DAC_Channel_2: DAC Channel2 selected
* - DAC_InitStruct: pointer to a DAC_InitTypeDef structure that
* contains the configuration information for the specified
* DAC channel.
* Output : None
* Return : None
*******************************************************************************/
void DAC_Init(u32 DAC_Channel, DAC_InitTypeDef* DAC_InitStruct)
{
u32 tmpreg1 = 0, tmpreg2 = 0;
/* Check the DAC parameters */
assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger));
assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration));
assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude));
assert_param(IS_DAC_OUTPUT_BUFFER_STATE(DAC_InitStruct->DAC_OutputBuffer));
/*---------------------------- DAC CR Configuration --------------------------*/
/* Get the DAC CR value */
tmpreg1 = DAC->CR;
/* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
tmpreg1 &= ~(CR_CLEAR_Mask << DAC_Channel);
/* Configure for the selected DAC channel: buffer output, trigger, wave genration,
mask/amplitude for wave genration */
/* Set TSELx and TENx bits according to DAC_Trigger value */
/* Set WAVEx bits according to DAC_WaveGeneration value */
/* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */
/* Set BOFFx bit according to DAC_OutputBuffer value */
tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration |
DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_OutputBuffer);
/* Calculate CR register value depending on DAC_Channel */
tmpreg1 |= tmpreg2 << DAC_Channel;
/* Write to DAC CR */
DAC->CR = tmpreg1;
}
/*******************************************************************************
* Function Name : DAC_StructInit
* Description : Fills each DAC_InitStruct member with its default value.
* Input : - DAC_InitStruct : pointer to a DAC_InitTypeDef structure
* which will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct)
{
/*--------------- Reset DAC init structure parameters values -----------------*/
/* Initialize the DAC_Trigger member */
DAC_InitStruct->DAC_Trigger = DAC_Trigger_None;
/* Initialize the DAC_WaveGeneration member */
DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None;
/* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */
DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
/* Initialize the DAC_OutputBuffer member */
DAC_InitStruct->DAC_OutputBuffer = DAC_OutputBuffer_Enable;
}
/*******************************************************************************
* Function Name : DAC_Cmd
* Description : Enables or disables the specified DAC channel.
* Input - DAC_Channel: the selected DAC channel.
* This parameter can be one of the following values:
* - DAC_Channel_1: DAC Channel1 selected
* - DAC_Channel_2: DAC Channel2 selected
* - NewState: new state of the DAC channel.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void DAC_Cmd(u32 DAC_Channel, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(DAC_Channel));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected DAC channel */
DAC->CR |= CR_EN_Set << DAC_Channel;
}
else
{
/* Disable the selected DAC channel */
DAC->CR &= ~(CR_EN_Set << DAC_Channel);
}
}
/*******************************************************************************
* Function Name : DAC_DMACmd
* Description : Enables or disables the specified DAC channel DMA request.
* Input - DAC_Channel: the selected DAC channel.
* This parameter can be one of the following values:
* - DAC_Channel_1: DAC Channel1 selected
* - DAC_Channel_2: DAC Channel2 selected
* - NewState: new state of the selected DAC channel DMA request.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void DAC_DMACmd(u32 DAC_Channel, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(DAC_Channel));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected DAC channel DMA request */
DAC->CR |= CR_DMAEN_Set << DAC_Channel;
}
else
{
/* Disable the selected DAC channel DMA request */
DAC->CR &= ~(CR_DMAEN_Set << DAC_Channel);
}
}
/*******************************************************************************
* Function Name : DAC_SoftwareTriggerCmd
* Description : Enables or disables the selected DAC channel software trigger.
* Input - DAC_Channel: the selected DAC channel.
* This parameter can be one of the following values:
* - DAC_Channel_1: DAC Channel1 selected
* - DAC_Channel_2: DAC Channel2 selected
* - NewState: new state of the selected DAC channel software trigger.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void DAC_SoftwareTriggerCmd(u32 DAC_Channel, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(DAC_Channel));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable software trigger for the selected DAC channel */
DAC->SWTRIGR |= SWTRIGR_SWTRIG_Set << (DAC_Channel >> 4);
}
else
{
/* Disable software trigger for the selected DAC channel */
DAC->SWTRIGR &= ~(SWTRIGR_SWTRIG_Set << (DAC_Channel >> 4));
}
}
/*******************************************************************************
* Function Name : DAC_DualSoftwareTriggerCmd
* Description : Enables or disables simultaneously the two DAC channels software
* triggers.
* Input - NewState: new state of the DAC channels software triggers.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void DAC_DualSoftwareTriggerCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable software trigger for both DAC channels */
DAC->SWTRIGR |= DUAL_SWTRIG_Set ;
}
else
{
/* Disable software trigger for both DAC channels */
DAC->SWTRIGR &= DUAL_SWTRIG_Reset;
}
}
/*******************************************************************************
* Function Name : DAC_WaveGenerationCmd
* Description : Enables or disables the selected DAC channel wave generation.
* Input - DAC_Channel: the selected DAC channel.
* This parameter can be one of the following values:
* - DAC_Channel_1: DAC Channel1 selected
* - DAC_Channel_2: DAC Channel2 selected
* - DAC_Wave: Specifies the wave type to enable or disable.
* This parameter can be one of the following values:
* - DAC_Wave_Noise: noise wave generation
* - DAC_Wave_Triangle: triangle wave generation
* - NewState: new state of the selected DAC channel wave generation.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void DAC_WaveGenerationCmd(u32 DAC_Channel, u32 DAC_Wave, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(DAC_Channel));
assert_param(IS_DAC_WAVE(DAC_Wave));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected wave generation for the selected DAC channel */
DAC->CR |= DAC_Wave << DAC_Channel;
}
else
{
/* Disable the selected wave generation for the selected DAC channel */
DAC->CR &= ~(DAC_Wave << DAC_Channel);
}
}
/*******************************************************************************
* Function Name : DAC_SetChannel1Data
* Description : Set the specified data holding register value for DAC channel1.
* Input : - DAC_Align: Specifies the data alignement for DAC channel1.
* This parameter can be one of the following values:
* - DAC_Align_8b_R: 8bit right data alignement selected
* - DAC_Align_12b_L: 12bit left data alignement selected
* - DAC_Align_12b_R: 12bit right data alignement selected
* - Data : Data to be loaded in the selected data holding
* register.
* Output : None
* Return : None
*******************************************************************************/
void DAC_SetChannel1Data(u32 DAC_Align, u16 Data)
{
/* Check the parameters */
assert_param(IS_DAC_ALIGN(DAC_Align));
assert_param(IS_DAC_DATA(Data));
/* Set the DAC channel1 selected data holding register */
*((vu32 *)(DAC_BASE + DHR12R1_Offset + DAC_Align)) = (u32)Data;
}
/*******************************************************************************
* Function Name : DAC_SetChannel2Data
* Description : Set the specified data holding register value for DAC channel2.
* Input : - DAC_Align: Specifies the data alignement for DAC channel2.
* This parameter can be one of the following values:
* - DAC_Align_8b_R: 8bit right data alignement selected
* - DAC_Align_12b_L: 12bit left data alignement selected
* - DAC_Align_12b_R: 12bit right data alignement selected
* - Data : Data to be loaded in the selected data holding
* register.
* Output : None
* Return : None
*******************************************************************************/
void DAC_SetChannel2Data(u32 DAC_Align, u16 Data)
{
/* Check the parameters */
assert_param(IS_DAC_ALIGN(DAC_Align));
assert_param(IS_DAC_DATA(Data));
/* Set the DAC channel2 selected data holding register */
*((vu32 *)(DAC_BASE + DHR12R2_Offset + DAC_Align)) = (u32)Data;
}
/*******************************************************************************
* Function Name : DAC_SetDualChannelData
* Description : Set the specified data holding register value for dual channel
* DAC.
* Input : - DAC_Align: Specifies the data alignement for dual channel DAC.
* This parameter can be one of the following values:
* - DAC_Align_8b_R: 8bit right data alignement selected
* - DAC_Align_12b_L: 12bit left data alignement selected
* - DAC_Align_12b_R: 12bit right data alignement selected
* - Data2: Data for DAC Channel2 to be loaded in the selected data
* holding register.
* - Data1: Data for DAC Channel1 to be loaded in the selected data
* holding register.
* Output : None
* Return : None
*******************************************************************************/
void DAC_SetDualChannelData(u32 DAC_Align, u16 Data2, u16 Data1)
{
u32 data = 0;
/* Check the parameters */
assert_param(IS_DAC_ALIGN(DAC_Align));
assert_param(IS_DAC_DATA(Data1));
assert_param(IS_DAC_DATA(Data2));
/* Calculate and set dual DAC data holding register value */
if (DAC_Align == DAC_Align_8b_R)
{
data = ((u32)Data2 << 8) | Data1;
}
else
{
data = ((u32)Data2 << 16) | Data1;
}
/* Set the dual DAC selected data holding register */
*((vu32 *)(DAC_BASE + DHR12RD_Offset + DAC_Align)) = data;
}
/*******************************************************************************
* Function Name : DAC_GetDataOutputValue
* Description : Returns the last data output value of the selected DAC cahnnel.
* Input - DAC_Channel: the selected DAC channel.
* This parameter can be one of the following values:
* - DAC_Channel_1: DAC Channel1 selected
* - DAC_Channel_2: DAC Channel2 selected
* Output : None
* Return : The selected DAC channel data output value.
*******************************************************************************/
u16 DAC_GetDataOutputValue(u32 DAC_Channel)
{
/* Check the parameters */
assert_param(IS_DAC_CHANNEL(DAC_Channel));
/* Returns the DAC channel data output register value */
return (u16) (*(vu32*)(DAC_BASE + DOR_Offset + ((u32)DAC_Channel >> 2)));
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_dbgmcu.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the DBGMCU firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_dbgmcu.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
#define IDCODE_DEVID_Mask ((u32)0x00000FFF)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : DBGMCU_GetREVID
* Description : Returns the device revision identifier.
* Input : None
* Output : None
* Return : Device revision identifier
*******************************************************************************/
u32 DBGMCU_GetREVID(void)
{
return(DBGMCU->IDCODE >> 16);
}
/*******************************************************************************
* Function Name : DBGMCU_GetDEVID
* Description : Returns the device identifier.
* Input : None
* Output : None
* Return : Device identifier
*******************************************************************************/
u32 DBGMCU_GetDEVID(void)
{
return(DBGMCU->IDCODE & IDCODE_DEVID_Mask);
}
/*******************************************************************************
* Function Name : DBGMCU_Config
* Description : Configures the specified peripheral and low power mode behavior
* when the MCU under Debug mode.
* Input : - DBGMCU_Periph: specifies the peripheral and low power mode.
* This parameter can be any combination of the following values:
* - DBGMCU_SLEEP: Keep debugger connection during SLEEP mode
* - DBGMCU_STOP: Keep debugger connection during STOP mode
* - DBGMCU_STANDBY: Keep debugger connection during STANDBY mode
* - DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted
* - DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted
* - DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted
* - DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted
* - DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted
* - DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted
* - DBGMCU_CAN_STOP: Debug CAN stopped when Core is halted
* - DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped
* when Core is halted
* - DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped
* when Core is halted
* - DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted
* - DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted
* - DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted
* - DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted
* - NewState: new state of the specified peripheral in Debug mode.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void DBGMCU_Config(u32 DBGMCU_Periph, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
DBGMCU->CR |= DBGMCU_Periph;
}
else
{
DBGMCU->CR &= ~DBGMCU_Periph;
}
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_dma.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the DMA firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_dma.h"
#include "stm32f10x_rcc.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* DMA ENABLE mask */
#define CCR_ENABLE_Set ((u32)0x00000001)
#define CCR_ENABLE_Reset ((u32)0xFFFFFFFE)
/* DMA1 Channelx interrupt pending bit masks */
#define DMA1_Channel1_IT_Mask ((u32)0x0000000F)
#define DMA1_Channel2_IT_Mask ((u32)0x000000F0)
#define DMA1_Channel3_IT_Mask ((u32)0x00000F00)
#define DMA1_Channel4_IT_Mask ((u32)0x0000F000)
#define DMA1_Channel5_IT_Mask ((u32)0x000F0000)
#define DMA1_Channel6_IT_Mask ((u32)0x00F00000)
#define DMA1_Channel7_IT_Mask ((u32)0x0F000000)
/* DMA2 Channelx interrupt pending bit masks */
#define DMA2_Channel1_IT_Mask ((u32)0x0000000F)
#define DMA2_Channel2_IT_Mask ((u32)0x000000F0)
#define DMA2_Channel3_IT_Mask ((u32)0x00000F00)
#define DMA2_Channel4_IT_Mask ((u32)0x0000F000)
#define DMA2_Channel5_IT_Mask ((u32)0x000F0000)
/* DMA2 FLAG mask */
#define FLAG_Mask ((u32)0x10000000)
/* DMA registers Masks */
#define CCR_CLEAR_Mask ((u32)0xFFFF800F)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : DMA_DeInit
* Description : Deinitializes the DMAy Channelx registers to their default reset
* values.
* Input : - DMAy_Channelx: where y can be 1 or 2 to select the DMA and
* x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the
* DMA Channel.
* Output : None
* Return : None
*******************************************************************************/
void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx)
{
/* Check the parameters */
assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
/* Disable the selected DMAy Channelx */
DMAy_Channelx->CCR &= CCR_ENABLE_Reset;
/* Reset DMAy Channelx control register */
DMAy_Channelx->CCR = 0;
/* Reset DMAy Channelx remaining bytes register */
DMAy_Channelx->CNDTR = 0;
/* Reset DMAy Channelx peripheral address register */
DMAy_Channelx->CPAR = 0;
/* Reset DMAy Channelx memory address register */
DMAy_Channelx->CMAR = 0;
switch (*(u32*)&DMAy_Channelx)
{
case DMA1_Channel1_BASE:
/* Reset interrupt pending bits for DMA1 Channel1 */
DMA1->IFCR |= DMA1_Channel1_IT_Mask;
break;
case DMA1_Channel2_BASE:
/* Reset interrupt pending bits for DMA1 Channel2 */
DMA1->IFCR |= DMA1_Channel2_IT_Mask;
break;
case DMA1_Channel3_BASE:
/* Reset interrupt pending bits for DMA1 Channel3 */
DMA1->IFCR |= DMA1_Channel3_IT_Mask;
break;
case DMA1_Channel4_BASE:
/* Reset interrupt pending bits for DMA1 Channel4 */
DMA1->IFCR |= DMA1_Channel4_IT_Mask;
break;
case DMA1_Channel5_BASE:
/* Reset interrupt pending bits for DMA1 Channel5 */
DMA1->IFCR |= DMA1_Channel5_IT_Mask;
break;
case DMA1_Channel6_BASE:
/* Reset interrupt pending bits for DMA1 Channel6 */
DMA1->IFCR |= DMA1_Channel6_IT_Mask;
break;
case DMA1_Channel7_BASE:
/* Reset interrupt pending bits for DMA1 Channel7 */
DMA1->IFCR |= DMA1_Channel7_IT_Mask;
break;
case DMA2_Channel1_BASE:
/* Reset interrupt pending bits for DMA2 Channel1 */
DMA2->IFCR |= DMA2_Channel1_IT_Mask;
break;
case DMA2_Channel2_BASE:
/* Reset interrupt pending bits for DMA2 Channel2 */
DMA2->IFCR |= DMA2_Channel2_IT_Mask;
break;
case DMA2_Channel3_BASE:
/* Reset interrupt pending bits for DMA2 Channel3 */
DMA2->IFCR |= DMA2_Channel3_IT_Mask;
break;
case DMA2_Channel4_BASE:
/* Reset interrupt pending bits for DMA2 Channel4 */
DMA2->IFCR |= DMA2_Channel4_IT_Mask;
break;
case DMA2_Channel5_BASE:
/* Reset interrupt pending bits for DMA2 Channel5 */
DMA2->IFCR |= DMA2_Channel5_IT_Mask;
break;
default:
break;
}
}
/*******************************************************************************
* Function Name : DMA_Init
* Description : Initializes the DMAy Channelx according to the specified
* parameters in the DMA_InitStruct.
* Input : - DMAy_Channelx: where y can be 1 or 2 to select the DMA and
* x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the
* DMA Channel.
* - DMA_InitStruct: pointer to a DMA_InitTypeDef structure that
* contains the configuration information for the specified
* DMA Channel.
* Output : None
* Return : None
******************************************************************************/
void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct)
{
u32 tmpreg = 0;
/* Check the parameters */
assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
assert_param(IS_DMA_DIR(DMA_InitStruct->DMA_DIR));
assert_param(IS_DMA_BUFFER_SIZE(DMA_InitStruct->DMA_BufferSize));
assert_param(IS_DMA_PERIPHERAL_INC_STATE(DMA_InitStruct->DMA_PeripheralInc));
assert_param(IS_DMA_MEMORY_INC_STATE(DMA_InitStruct->DMA_MemoryInc));
assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(DMA_InitStruct->DMA_PeripheralDataSize));
assert_param(IS_DMA_MEMORY_DATA_SIZE(DMA_InitStruct->DMA_MemoryDataSize));
assert_param(IS_DMA_MODE(DMA_InitStruct->DMA_Mode));
assert_param(IS_DMA_PRIORITY(DMA_InitStruct->DMA_Priority));
assert_param(IS_DMA_M2M_STATE(DMA_InitStruct->DMA_M2M));
/*--------------------------- DMAy Channelx CCR Configuration -----------------*/
/* Get the DMAy_Channelx CCR value */
tmpreg = DMAy_Channelx->CCR;
/* Clear MEM2MEM, PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */
tmpreg &= CCR_CLEAR_Mask;
/* Configure DMAy Channelx: data transfer, data size, priority level and mode */
/* Set DIR bit according to DMA_DIR value */
/* Set CIRC bit according to DMA_Mode value */
/* Set PINC bit according to DMA_PeripheralInc value */
/* Set MINC bit according to DMA_MemoryInc value */
/* Set PSIZE bits according to DMA_PeripheralDataSize value */
/* Set MSIZE bits according to DMA_MemoryDataSize value */
/* Set PL bits according to DMA_Priority value */
/* Set the MEM2MEM bit according to DMA_M2M value */
tmpreg |= DMA_InitStruct->DMA_DIR | DMA_InitStruct->DMA_Mode |
DMA_InitStruct->DMA_PeripheralInc | DMA_InitStruct->DMA_MemoryInc |
DMA_InitStruct->DMA_PeripheralDataSize | DMA_InitStruct->DMA_MemoryDataSize |
DMA_InitStruct->DMA_Priority | DMA_InitStruct->DMA_M2M;
/* Write to DMAy Channelx CCR */
DMAy_Channelx->CCR = tmpreg;
/*--------------------------- DMAy Channelx CNDTR Configuration ---------------*/
/* Write to DMAy Channelx CNDTR */
DMAy_Channelx->CNDTR = DMA_InitStruct->DMA_BufferSize;
/*--------------------------- DMAy Channelx CPAR Configuration ----------------*/
/* Write to DMAy Channelx CPAR */
DMAy_Channelx->CPAR = DMA_InitStruct->DMA_PeripheralBaseAddr;
/*--------------------------- DMAy Channelx CMAR Configuration ----------------*/
/* Write to DMAy Channelx CMAR */
DMAy_Channelx->CMAR = DMA_InitStruct->DMA_MemoryBaseAddr;
}
/*******************************************************************************
* Function Name : DMA_StructInit
* Description : Fills each DMA_InitStruct member with its default value.
* Input : - DMA_InitStruct : pointer to a DMA_InitTypeDef structure
* which will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct)
{
/*-------------- Reset DMA init structure parameters values ------------------*/
/* Initialize the DMA_PeripheralBaseAddr member */
DMA_InitStruct->DMA_PeripheralBaseAddr = 0;
/* Initialize the DMA_MemoryBaseAddr member */
DMA_InitStruct->DMA_MemoryBaseAddr = 0;
/* Initialize the DMA_DIR member */
DMA_InitStruct->DMA_DIR = DMA_DIR_PeripheralSRC;
/* Initialize the DMA_BufferSize member */
DMA_InitStruct->DMA_BufferSize = 0;
/* Initialize the DMA_PeripheralInc member */
DMA_InitStruct->DMA_PeripheralInc = DMA_PeripheralInc_Disable;
/* Initialize the DMA_MemoryInc member */
DMA_InitStruct->DMA_MemoryInc = DMA_MemoryInc_Disable;
/* Initialize the DMA_PeripheralDataSize member */
DMA_InitStruct->DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
/* Initialize the DMA_MemoryDataSize member */
DMA_InitStruct->DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
/* Initialize the DMA_Mode member */
DMA_InitStruct->DMA_Mode = DMA_Mode_Normal;
/* Initialize the DMA_Priority member */
DMA_InitStruct->DMA_Priority = DMA_Priority_Low;
/* Initialize the DMA_M2M member */
DMA_InitStruct->DMA_M2M = DMA_M2M_Disable;
}
/*******************************************************************************
* Function Name : DMA_Cmd
* Description : Enables or disables the specified DMAy Channelx.
* Input : - DMAy_Channelx: where y can be 1 or 2 to select the DMA and
* x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the
* DMA Channel.
* - NewState: new state of the DMAy Channelx.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected DMAy Channelx */
DMAy_Channelx->CCR |= CCR_ENABLE_Set;
}
else
{
/* Disable the selected DMAy Channelx */
DMAy_Channelx->CCR &= CCR_ENABLE_Reset;
}
}
/*******************************************************************************
* Function Name : DMA_ITConfig
* Description : Enables or disables the specified DMAy Channelx interrupts.
* Input : - DMAy_Channelx: where y can be 1 or 2 to select the DMA and
* x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the
* DMA Channel.
* - DMA_IT: specifies the DMA interrupts sources to be enabled
* or disabled.
* This parameter can be any combination of the following values:
* - DMA_IT_TC: Transfer complete interrupt mask
* - DMA_IT_HT: Half transfer interrupt mask
* - DMA_IT_TE: Transfer error interrupt mask
* - NewState: new state of the specified DMA interrupts.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, u32 DMA_IT, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
assert_param(IS_DMA_CONFIG_IT(DMA_IT));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected DMA interrupts */
DMAy_Channelx->CCR |= DMA_IT;
}
else
{
/* Disable the selected DMA interrupts */
DMAy_Channelx->CCR &= ~DMA_IT;
}
}
/*******************************************************************************
* Function Name : DMA_GetCurrDataCounter
* Description : Returns the number of remaining data units in the current
* DMAy Channelx transfer.
* Input : - DMAy_Channelx: where y can be 1 or 2 to select the DMA and
* x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the
* DMA Channel.
* Output : None
* Return : The number of remaining data units in the current DMAy Channelx
* transfer.
*******************************************************************************/
u16 DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx)
{
/* Check the parameters */
assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
/* Return the number of remaining data units for DMAy Channelx */
return ((u16)(DMAy_Channelx->CNDTR));
}
/*******************************************************************************
* Function Name : DMA_GetFlagStatus
* Description : Checks whether the specified DMAy Channelx flag is set or not.
* Input : - DMA_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* - DMA1_FLAG_GL1: DMA1 Channel1 global flag.
* - DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag.
* - DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag.
* - DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag.
* - DMA1_FLAG_GL2: DMA1 Channel2 global flag.
* - DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag.
* - DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag.
* - DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag.
* - DMA1_FLAG_GL3: DMA1 Channel3 global flag.
* - DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag.
* - DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag.
* - DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag.
* - DMA1_FLAG_GL4: DMA1 Channel4 global flag.
* - DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag.
* - DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag.
* - DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag.
* - DMA1_FLAG_GL5: DMA1 Channel5 global flag.
* - DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag.
* - DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag.
* - DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag.
* - DMA1_FLAG_GL6: DMA1 Channel6 global flag.
* - DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag.
* - DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag.
* - DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag.
* - DMA1_FLAG_GL7: DMA1 Channel7 global flag.
* - DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag.
* - DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag.
* - DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag.
* - DMA2_FLAG_GL1: DMA2 Channel1 global flag.
* - DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag.
* - DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag.
* - DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag.
* - DMA2_FLAG_GL2: DMA2 Channel2 global flag.
* - DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag.
* - DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag.
* - DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag.
* - DMA2_FLAG_GL3: DMA2 Channel3 global flag.
* - DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag.
* - DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag.
* - DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag.
* - DMA2_FLAG_GL4: DMA2 Channel4 global flag.
* - DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag.
* - DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag.
* - DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag.
* - DMA2_FLAG_GL5: DMA2 Channel5 global flag.
* - DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag.
* - DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag.
* - DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag.
* Output : None
* Return : The new state of DMA_FLAG (SET or RESET).
*******************************************************************************/
FlagStatus DMA_GetFlagStatus(u32 DMA_FLAG)
{
FlagStatus bitstatus = RESET;
u32 tmpreg = 0;
/* Check the parameters */
assert_param(IS_DMA_GET_FLAG(DMA_FLAG));
/* Calculate the used DMA */
if ((DMA_FLAG & FLAG_Mask) != (u32)RESET)
{
/* Get DMA2 ISR register value */
tmpreg = DMA2->ISR ;
}
else
{
/* Get DMA1 ISR register value */
tmpreg = DMA1->ISR ;
}
/* Check the status of the specified DMA flag */
if ((tmpreg & DMA_FLAG) != (u32)RESET)
{
/* DMA_FLAG is set */
bitstatus = SET;
}
else
{
/* DMA_FLAG is reset */
bitstatus = RESET;
}
/* Return the DMA_FLAG status */
return bitstatus;
}
/*******************************************************************************
* Function Name : DMA_ClearFlag
* Description : Clears the DMAy Channelx's pending flags.
* Input : - DMA_FLAG: specifies the flag to clear.
* This parameter can be any combination (for the same DMA) of
* the following values:
* - DMA1_FLAG_GL1: DMA1 Channel1 global flag.
* - DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag.
* - DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag.
* - DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag.
* - DMA1_FLAG_GL2: DMA1 Channel2 global flag.
* - DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag.
* - DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag.
* - DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag.
* - DMA1_FLAG_GL3: DMA1 Channel3 global flag.
* - DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag.
* - DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag.
* - DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag.
* - DMA1_FLAG_GL4: DMA1 Channel4 global flag.
* - DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag.
* - DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag.
* - DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag.
* - DMA1_FLAG_GL5: DMA1 Channel5 global flag.
* - DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag.
* - DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag.
* - DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag.
* - DMA1_FLAG_GL6: DMA1 Channel6 global flag.
* - DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag.
* - DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag.
* - DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag.
* - DMA1_FLAG_GL7: DMA1 Channel7 global flag.
* - DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag.
* - DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag.
* - DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag.
* - DMA2_FLAG_GL1: DMA2 Channel1 global flag.
* - DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag.
* - DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag.
* - DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag.
* - DMA2_FLAG_GL2: DMA2 Channel2 global flag.
* - DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag.
* - DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag.
* - DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag.
* - DMA2_FLAG_GL3: DMA2 Channel3 global flag.
* - DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag.
* - DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag.
* - DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag.
* - DMA2_FLAG_GL4: DMA2 Channel4 global flag.
* - DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag.
* - DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag.
* - DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag.
* - DMA2_FLAG_GL5: DMA2 Channel5 global flag.
* - DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag.
* - DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag.
* - DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag.
* Output : None
* Return : None
*******************************************************************************/
void DMA_ClearFlag(u32 DMA_FLAG)
{
/* Check the parameters */
assert_param(IS_DMA_CLEAR_FLAG(DMA_FLAG));
/* Calculate the used DMA */
if ((DMA_FLAG & FLAG_Mask) != (u32)RESET)
{
/* Clear the selected DMA flags */
DMA2->IFCR = DMA_FLAG;
}
else
{
/* Clear the selected DMA flags */
DMA1->IFCR = DMA_FLAG;
}
}
/*******************************************************************************
* Function Name : DMA_GetITStatus
* Description : Checks whether the specified DMAy Channelx interrupt has
* occurred or not.
* Input : - DMA_IT: specifies the DMA interrupt source to check.
* This parameter can be one of the following values:
* - DMA1_IT_GL1: DMA1 Channel1 global interrupt.
* - DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt.
* - DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt.
* - DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt.
* - DMA1_IT_GL2: DMA1 Channel2 global interrupt.
* - DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt.
* - DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt.
* - DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt.
* - DMA1_IT_GL3: DMA1 Channel3 global interrupt.
* - DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt.
* - DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt.
* - DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt.
* - DMA1_IT_GL4: DMA1 Channel4 global interrupt.
* - DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt.
* - DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt.
* - DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt.
* - DMA1_IT_GL5: DMA1 Channel5 global interrupt.
* - DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt.
* - DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt.
* - DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt.
* - DMA1_IT_GL6: DMA1 Channel6 global interrupt.
* - DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt.
* - DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt.
* - DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt.
* - DMA1_IT_GL7: DMA1 Channel7 global interrupt.
* - DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt.
* - DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt.
* - DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt.
* - DMA2_IT_GL1: DMA2 Channel1 global interrupt.
* - DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt.
* - DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt.
* - DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt.
* - DMA2_IT_GL2: DMA2 Channel2 global interrupt.
* - DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt.
* - DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt.
* - DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt.
* - DMA2_IT_GL3: DMA2 Channel3 global interrupt.
* - DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt.
* - DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt.
* - DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt.
* - DMA2_IT_GL4: DMA2 Channel4 global interrupt.
* - DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt.
* - DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt.
* - DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt.
* - DMA2_IT_GL5: DMA2 Channel5 global interrupt.
* - DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt.
* - DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt.
* - DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt.
* Output : None
* Return : The new state of DMA_IT (SET or RESET).
*******************************************************************************/
ITStatus DMA_GetITStatus(u32 DMA_IT)
{
ITStatus bitstatus = RESET;
u32 tmpreg = 0;
/* Check the parameters */
assert_param(IS_DMA_GET_IT(DMA_IT));
/* Calculate the used DMA */
if ((DMA_IT & FLAG_Mask) != (u32)RESET)
{
/* Get DMA2 ISR register value */
tmpreg = DMA2->ISR ;
}
else
{
/* Get DMA1 ISR register value */
tmpreg = DMA1->ISR ;
}
/* Check the status of the specified DMA interrupt */
if ((tmpreg & DMA_IT) != (u32)RESET)
{
/* DMA_IT is set */
bitstatus = SET;
}
else
{
/* DMA_IT is reset */
bitstatus = RESET;
}
/* Return the DMA_IT status */
return bitstatus;
}
/*******************************************************************************
* Function Name : DMA_ClearITPendingBit
* Description : Clears the DMAy Channelx’s interrupt pending bits.
* Input : - DMA_IT: specifies the DMA interrupt pending bit to clear.
* This parameter can be any combination (for the same DMA) of
* the following values:
* - DMA1_IT_GL1: DMA1 Channel1 global interrupt.
* - DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt.
* - DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt.
* - DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt.
* - DMA1_IT_GL2: DMA1 Channel2 global interrupt.
* - DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt.
* - DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt.
* - DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt.
* - DMA1_IT_GL3: DMA1 Channel3 global interrupt.
* - DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt.
* - DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt.
* - DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt.
* - DMA1_IT_GL4: DMA1 Channel4 global interrupt.
* - DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt.
* - DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt.
* - DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt.
* - DMA1_IT_GL5: DMA1 Channel5 global interrupt.
* - DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt.
* - DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt.
* - DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt.
* - DMA1_IT_GL6: DMA1 Channel6 global interrupt.
* - DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt.
* - DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt.
* - DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt.
* - DMA1_IT_GL7: DMA1 Channel7 global interrupt.
* - DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt.
* - DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt.
* - DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt.
* - DMA2_IT_GL1: DMA2 Channel1 global interrupt.
* - DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt.
* - DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt.
* - DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt.
* - DMA2_IT_GL2: DMA2 Channel2 global interrupt.
* - DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt.
* - DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt.
* - DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt.
* - DMA2_IT_GL3: DMA2 Channel3 global interrupt.
* - DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt.
* - DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt.
* - DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt.
* - DMA2_IT_GL4: DMA2 Channel4 global interrupt.
* - DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt.
* - DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt.
* - DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt.
* - DMA2_IT_GL5: DMA2 Channel5 global interrupt.
* - DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt.
* - DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt.
* - DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt.
* Output : None
* Return : None
*******************************************************************************/
void DMA_ClearITPendingBit(u32 DMA_IT)
{
/* Check the parameters */
assert_param(IS_DMA_CLEAR_IT(DMA_IT));
/* Calculate the used DMA */
if ((DMA_IT & FLAG_Mask) != (u32)RESET)
{
/* Clear the selected DMA interrupt pending bits */
DMA2->IFCR = DMA_IT;
}
else
{
/* Clear the selected DMA interrupt pending bits */
DMA1->IFCR = DMA_IT;
}
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_exti.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the EXTI firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_exti.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
#define EXTI_LineNone ((u32)0x00000) /* No interrupt selected */
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : EXTI_DeInit
* Description : Deinitializes the EXTI peripheral registers to their default
* reset values.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void EXTI_DeInit(void)
{
EXTI->IMR = 0x00000000;
EXTI->EMR = 0x00000000;
EXTI->RTSR = 0x00000000;
EXTI->FTSR = 0x00000000;
EXTI->PR = 0x0007FFFF;
}
/*******************************************************************************
* Function Name : EXTI_Init
* Description : Initializes the EXTI peripheral according to the specified
* parameters in the EXTI_InitStruct.
* Input : - EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure
* that contains the configuration information for the EXTI
* peripheral.
* Output : None
* Return : None
*******************************************************************************/
void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct)
{
/* Check the parameters */
assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode));
assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger));
assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line));
assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd));
if (EXTI_InitStruct->EXTI_LineCmd != DISABLE)
{
/* Clear EXTI line configuration */
EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line;
EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line;
*(vu32 *)(EXTI_BASE + (u32)EXTI_InitStruct->EXTI_Mode)|= EXTI_InitStruct->EXTI_Line;
/* Clear Rising Falling edge configuration */
EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line;
EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line;
/* Select the trigger for the selected external interrupts */
if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling)
{
/* Rising Falling edge */
EXTI->RTSR |= EXTI_InitStruct->EXTI_Line;
EXTI->FTSR |= EXTI_InitStruct->EXTI_Line;
}
else
{
*(vu32 *)(EXTI_BASE + (u32)EXTI_InitStruct->EXTI_Trigger)|= EXTI_InitStruct->EXTI_Line;
}
}
else
{
/* Disable the selected external lines */
*(vu32 *)(EXTI_BASE + (u32)EXTI_InitStruct->EXTI_Mode)&= ~EXTI_InitStruct->EXTI_Line;
}
}
/*******************************************************************************
* Function Name : EXTI_StructInit
* Description : Fills each EXTI_InitStruct member with its reset value.
* Input : - EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure
* which will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct)
{
EXTI_InitStruct->EXTI_Line = EXTI_LineNone;
EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling;
EXTI_InitStruct->EXTI_LineCmd = DISABLE;
}
/*******************************************************************************
* Function Name : EXTI_GenerateSWInterrupt
* Description : Generates a Software interrupt.
* Input : - EXTI_Line: specifies the EXTI lines to be enabled or
* disabled.
* This parameter can be any combination of EXTI_Linex where
* x can be (0..18).
* Output : None
* Return : None
*******************************************************************************/
void EXTI_GenerateSWInterrupt(u32 EXTI_Line)
{
/* Check the parameters */
assert_param(IS_EXTI_LINE(EXTI_Line));
EXTI->SWIER |= EXTI_Line;
}
/*******************************************************************************
* Function Name : EXTI_GetFlagStatus
* Description : Checks whether the specified EXTI line flag is set or not.
* Input : - EXTI_Line: specifies the EXTI line flag to check.
* This parameter can be:
* - EXTI_Linex: External interrupt line x where x(0..18)
* Output : None
* Return : The new state of EXTI_Line (SET or RESET).
*******************************************************************************/
FlagStatus EXTI_GetFlagStatus(u32 EXTI_Line)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_GET_EXTI_LINE(EXTI_Line));
if ((EXTI->PR & EXTI_Line) != (u32)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*******************************************************************************
* Function Name : EXTI_ClearFlag
* Description : Clears the EXTI’s line pending flags.
* Input : - EXTI_Line: specifies the EXTI lines flags to clear.
* This parameter can be any combination of EXTI_Linex where
* x can be (0..18).
* Output : None
* Return : None
*******************************************************************************/
void EXTI_ClearFlag(u32 EXTI_Line)
{
/* Check the parameters */
assert_param(IS_EXTI_LINE(EXTI_Line));
EXTI->PR = EXTI_Line;
}
/*******************************************************************************
* Function Name : EXTI_GetITStatus
* Description : Checks whether the specified EXTI line is asserted or not.
* Input : - EXTI_Line: specifies the EXTI line to check.
* This parameter can be:
* - EXTI_Linex: External interrupt line x where x(0..18)
* Output : None
* Return : The new state of EXTI_Line (SET or RESET).
*******************************************************************************/
ITStatus EXTI_GetITStatus(u32 EXTI_Line)
{
ITStatus bitstatus = RESET;
u32 enablestatus = 0;
/* Check the parameters */
assert_param(IS_GET_EXTI_LINE(EXTI_Line));
enablestatus = EXTI->IMR & EXTI_Line;
if (((EXTI->PR & EXTI_Line) != (u32)RESET) && (enablestatus != (u32)RESET))
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*******************************************************************************
* Function Name : EXTI_ClearITPendingBit
* Description : Clears the EXTI’s line pending bits.
* Input : - EXTI_Line: specifies the EXTI lines to clear.
* This parameter can be any combination of EXTI_Linex where
* x can be (0..18).
* Output : None
* Return : None
*******************************************************************************/
void EXTI_ClearITPendingBit(u32 EXTI_Line)
{
/* Check the parameters */
assert_param(IS_EXTI_LINE(EXTI_Line));
EXTI->PR = EXTI_Line;
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
* File Name : stm32f10x_flash.c
* Author : MCD Application Team
* Version : V2.0.3Patch1
* Date : 04/06/2009
* Description : This file provides all the FLASH firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_flash.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Flash Access Control Register bits */
#define ACR_LATENCY_Mask ((u32)0x00000038)
#define ACR_HLFCYA_Mask ((u32)0xFFFFFFF7)
#define ACR_PRFTBE_Mask ((u32)0xFFFFFFEF)
#ifdef _FLASH_PROG
/* Flash Access Control Register bits */
#define ACR_PRFTBS_Mask ((u32)0x00000020)
/* Flash Control Register bits */
#define CR_PG_Set ((u32)0x00000001)
#define CR_PG_Reset ((u32)0x00001FFE)
#define CR_PER_Set ((u32)0x00000002)
#define CR_PER_Reset ((u32)0x00001FFD)
#define CR_MER_Set ((u32)0x00000004)
#define CR_MER_Reset ((u32)0x00001FFB)
#define CR_OPTPG_Set ((u32)0x00000010)
#define CR_OPTPG_Reset ((u32)0x00001FEF)
#define CR_OPTER_Set ((u32)0x00000020)
#define CR_OPTER_Reset ((u32)0x00001FDF)
#define CR_STRT_Set ((u32)0x00000040)
#define CR_LOCK_Set ((u32)0x00000080)
/* FLASH Mask */
#define RDPRT_Mask ((u32)0x00000002)
#define WRP0_Mask ((u32)0x000000FF)
#define WRP1_Mask ((u32)0x0000FF00)
#define WRP2_Mask ((u32)0x00FF0000)
#define WRP3_Mask ((u32)0xFF000000)
/* FLASH Keys */
#define RDP_Key ((u16)0x00A5)
#define FLASH_KEY1 ((u32)0x45670123)
#define FLASH_KEY2 ((u32)0xCDEF89AB)
/* Delay definition */
#define EraseTimeout ((u32)0x00000FFF)
#define ProgramTimeout ((u32)0x0000000F)
#endif
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
#ifdef _FLASH_PROG
static void delay(void);
#endif
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : FLASH_SetLatency
* Description : Sets the code latency value.
* Input : - FLASH_Latency: specifies the FLASH Latency value.
* This parameter can be one of the following values:
* - FLASH_Latency_0: FLASH Zero Latency cycle
* - FLASH_Latency_1: FLASH One Latency cycle
* - FLASH_Latency_2: FLASH Two Latency cycles
* Output : None
* Return : None
*******************************************************************************/
void FLASH_SetLatency(u32 FLASH_Latency)
{
u32 tmpreg = 0;
/* Check the parameters */
assert_param(IS_FLASH_LATENCY(FLASH_Latency));
/* Read the ACR register */
tmpreg = FLASH->ACR;
/* Sets the Latency value */
tmpreg &= ACR_LATENCY_Mask;
tmpreg |= FLASH_Latency;
/* Write the ACR register */
FLASH->ACR = tmpreg;
}
/*******************************************************************************
* Function Name : FLASH_HalfCycleAccessCmd
* Description : Enables or disables the Half cycle flash access.
* Input : - FLASH_HalfCycle: specifies the FLASH Half cycle Access mode.
* This parameter can be one of the following values:
* - FLASH_HalfCycleAccess_Enable: FLASH Half Cycle Enable
* - FLASH_HalfCycleAccess_Disable: FLASH Half Cycle Disable
* Output : None
* Return : None
*******************************************************************************/
void FLASH_HalfCycleAccessCmd(u32 FLASH_HalfCycleAccess)
{
/* Check the parameters */
assert_param(IS_FLASH_HALFCYCLEACCESS_STATE(FLASH_HalfCycleAccess));
/* Enable or disable the Half cycle access */
FLASH->ACR &= ACR_HLFCYA_Mask;
FLASH->ACR |= FLASH_HalfCycleAccess;
}
/*******************************************************************************
* Function Name : FLASH_PrefetchBufferCmd
* Description : Enables or disables the Prefetch Buffer.
* Input : - FLASH_PrefetchBuffer: specifies the Prefetch buffer status.
* This parameter can be one of the following values:
* - FLASH_PrefetchBuffer_Enable: FLASH Prefetch Buffer Enable
* - FLASH_PrefetchBuffer_Disable: FLASH Prefetch Buffer Disable
* Output : None
* Return : None
*******************************************************************************/
void FLASH_PrefetchBufferCmd(u32 FLASH_PrefetchBuffer)
{
/* Check the parameters */
assert_param(IS_FLASH_PREFETCHBUFFER_STATE(FLASH_PrefetchBuffer));
/* Enable or disable the Prefetch Buffer */
FLASH->ACR &= ACR_PRFTBE_Mask;
FLASH->ACR |= FLASH_PrefetchBuffer;
}
#ifdef _FLASH_PROG
/*******************************************************************************
* Function Name : FLASH_Unlock
* Description : Unlocks the FLASH Program Erase Controller.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void FLASH_Unlock(void)
{
/* Authorize the FPEC Access */
FLASH->KEYR = FLASH_KEY1;
FLASH->KEYR = FLASH_KEY2;
}
/*******************************************************************************
* Function Name : FLASH_Lock
* Description : Locks the FLASH Program Erase Controller.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void FLASH_Lock(void)
{
/* Set the Lock Bit to lock the FPEC and the FCR */
FLASH->CR |= CR_LOCK_Set;
}
/*******************************************************************************
* Function Name : FLASH_ErasePage
* Description : Erases a specified FLASH page.
* Input : - Page_Address: The page address to be erased.
* Output : None
* Return : FLASH Status: The returned value can be: FLASH_BUSY,
* FLASH_ERROR_PG, FLASH_ERROR_WRP, FLASH_COMPLETE or
* FLASH_TIMEOUT.
*******************************************************************************/
FLASH_Status FLASH_ErasePage(u32 Page_Address)
{
FLASH_Status status = FLASH_COMPLETE;
/* Check the parameters */
assert_param(IS_FLASH_ADDRESS(Page_Address));
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(EraseTimeout);
if(status == FLASH_COMPLETE)
{
/* if the previous operation is completed, proceed to erase the page */
FLASH->CR|= CR_PER_Set;
FLASH->AR = Page_Address;
FLASH->CR|= CR_STRT_Set;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(EraseTimeout);
if(status != FLASH_BUSY)
{
/* if the erase operation is completed, disable the PER Bit */
FLASH->CR &= CR_PER_Reset;
}
}
/* Return the Erase Status */
return status;
}
/*******************************************************************************
* Function Name : FLASH_EraseAllPages
* Description : Erases all FLASH pages.
* Input : None
* Output : None
* Return : FLASH Status: The returned value can be: FLASH_BUSY,
* FLASH_ERROR_PG, FLASH_ERROR_WRP, FLASH_COMPLETE or
* FLASH_TIMEOUT.
*******************************************************************************/
FLASH_Status FLASH_EraseAllPages(void)
{
FLASH_Status status = FLASH_COMPLETE;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(EraseTimeout);
if(status == FLASH_COMPLETE)
{
/* if the previous operation is completed, proceed to erase all pages */
FLASH->CR |= CR_MER_Set;
FLASH->CR |= CR_STRT_Set;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(EraseTimeout);
if(status != FLASH_BUSY)
{
/* if the erase operation is completed, disable the MER Bit */
FLASH->CR &= CR_MER_Reset;
}
}
/* Return the Erase Status */
return status;
}
/*******************************************************************************
* Function Name : FLASH_EraseOptionBytes
* Description : Erases the FLASH option bytes.
* Input : None
* Output : None
* Return : FLASH Status: The returned value can be: FLASH_BUSY,
* FLASH_ERROR_PG, FLASH_ERROR_WRP, FLASH_COMPLETE or
* FLASH_TIMEOUT.
*******************************************************************************/
FLASH_Status FLASH_EraseOptionBytes(void)
{
FLASH_Status status = FLASH_COMPLETE;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(EraseTimeout);
if(status == FLASH_COMPLETE)
{
/* Authorize the small information block programming */
FLASH->OPTKEYR = FLASH_KEY1;
FLASH->OPTKEYR = FLASH_KEY2;
/* if the previous operation is completed, proceed to erase the option bytes */
FLASH->CR |= CR_OPTER_Set;
FLASH->CR |= CR_STRT_Set;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(EraseTimeout);
if(status == FLASH_COMPLETE)
{
/* if the erase operation is completed, disable the OPTER Bit */
FLASH->CR &= CR_OPTER_Reset;
/* Enable the Option Bytes Programming operation */
FLASH->CR |= CR_OPTPG_Set;
/* Enable the readout access */
OB->RDP= RDP_Key;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(ProgramTimeout);
if(status != FLASH_BUSY)
{
/* if the program operation is completed, disable the OPTPG Bit */
FLASH->CR &= CR_OPTPG_Reset;
}
}
else
{
if (status != FLASH_BUSY)
{
/* Disable the OPTPG Bit */
FLASH->CR &= CR_OPTPG_Reset;
}
}
}
/* Return the erase status */
return status;
}
/*******************************************************************************
* Function Name : FLASH_ProgramWord
* Description : Programs a word at a specified address.
* Input : - Address: specifies the address to be programmed.
* - Data: specifies the data to be programmed.
* Output : None
* Return : FLASH Status: The returned value can be: FLASH_BUSY,
* FLASH_ERROR_PG, FLASH_ERROR_WRP, FLASH_COMPLETE or
* FLASH_TIMEOUT.
*******************************************************************************/
FLASH_Status FLASH_ProgramWord(u32 Address, u32 Data)
{
FLASH_Status status = FLASH_COMPLETE;
/* Check the parameters */
assert_param(IS_FLASH_ADDRESS(Address));
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(ProgramTimeout);
if(status == FLASH_COMPLETE)
{
/* if the previous operation is completed, proceed to program the new first
half word */
FLASH->CR |= CR_PG_Set;
*(vu16*)Address = (u16)Data;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(ProgramTimeout);
if(status == FLASH_COMPLETE)
{
/* if the previous operation is completed, proceed to program the new second
half word */
*(vu16*)(Address + 2) = Data >> 16;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(ProgramTimeout);
if(status != FLASH_BUSY)
{
/* Disable the PG Bit */
FLASH->CR &= CR_PG_Reset;
}
}
else
{
if (status != FLASH_BUSY)
{
/* Disable the PG Bit */
FLASH->CR &= CR_PG_Reset;
}
}
}
/* Return the Program Status */
return status;
}
/*******************************************************************************
* Function Name : FLASH_ProgramHalfWord
* Description : Programs a half word at a specified address.
* Input : - Address: specifies the address to be programmed.
* - Data: specifies the data to be programmed.
* Output : None
* Return : FLASH Status: The returned value can be: FLASH_BUSY,
* FLASH_ERROR_PG, FLASH_ERROR_WRP, FLASH_COMPLETE or
* FLASH_TIMEOUT.
*******************************************************************************/
FLASH_Status FLASH_ProgramHalfWord(u32 Address, u16 Data)
{
FLASH_Status status = FLASH_COMPLETE;
/* Check the parameters */
assert_param(IS_FLASH_ADDRESS(Address));
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(ProgramTimeout);
if(status == FLASH_COMPLETE)
{
/* if the previous operation is completed, proceed to program the new data */
FLASH->CR |= CR_PG_Set;
*(vu16*)Address = Data;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(ProgramTimeout);
if(status != FLASH_BUSY)
{
/* if the program operation is completed, disable the PG Bit */
FLASH->CR &= CR_PG_Reset;
}
}
/* Return the Program Status */
return status;
}
/*******************************************************************************
* Function Name : FLASH_ProgramOptionByteData
* Description : Programs a half word at a specified Option Byte Data address.
* Input : - Address: specifies the address to be programmed.
* This parameter can be 0x1FFFF804 or 0x1FFFF806.
* - Data: specifies the data to be programmed.
* Output : None
* Return : FLASH Status: The returned value can be: FLASH_BUSY,
* FLASH_ERROR_PG, FLASH_ERROR_WRP, FLASH_COMPLETE or
* FLASH_TIMEOUT.
*******************************************************************************/
FLASH_Status FLASH_ProgramOptionByteData(u32 Address, u8 Data)
{
FLASH_Status status = FLASH_COMPLETE;
/* Check the parameters */
assert_param(IS_OB_DATA_ADDRESS(Address));
status = FLASH_WaitForLastOperation(ProgramTimeout);
if(status == FLASH_COMPLETE)
{
/* Authorize the small information block programming */
FLASH->OPTKEYR = FLASH_KEY1;
FLASH->OPTKEYR = FLASH_KEY2;
/* Enables the Option Bytes Programming operation */
FLASH->CR |= CR_OPTPG_Set;
*(vu16*)Address = Data;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(ProgramTimeout);
if(status != FLASH_BUSY)
{
/* if the program operation is completed, disable the OPTPG Bit */
FLASH->CR &= CR_OPTPG_Reset;
}
}
/* Return the Option Byte Data Program Status */
return status;
}
/*******************************************************************************
* Function Name : FLASH_EnableWriteProtection
* Description : Write protects the desired pages
* Input : - FLASH_Pages: specifies the address of the pages to be
* write protected. This parameter can be:
* - For STM32F10Xxx Medium-density devices (FLASH page size equal to 1 KB)
* - A value between FLASH_WRProt_Pages0to3 and
* FLASH_WRProt_Pages124to127
* - For STM32F10Xxx High-density devices (FLASH page size equal to 2 KB)
* - A value between FLASH_WRProt_Pages0to1 and
* FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to255
* - FLASH_WRProt_AllPages
* Output : None
* Return : FLASH Status: The returned value can be: FLASH_BUSY,
* FLASH_ERROR_PG, FLASH_ERROR_WRP, FLASH_COMPLETE or
* FLASH_TIMEOUT.
*******************************************************************************/
FLASH_Status FLASH_EnableWriteProtection(u32 FLASH_Pages)
{
u16 WRP0_Data = 0xFFFF, WRP1_Data = 0xFFFF, WRP2_Data = 0xFFFF, WRP3_Data = 0xFFFF;
FLASH_Status status = FLASH_COMPLETE;
/* Check the parameters */
assert_param(IS_FLASH_WRPROT_PAGE(FLASH_Pages));
FLASH_Pages = (u32)(~FLASH_Pages);
WRP0_Data = (vu16)(FLASH_Pages & WRP0_Mask);
WRP1_Data = (vu16)((FLASH_Pages & WRP1_Mask) >> 8);
WRP2_Data = (vu16)((FLASH_Pages & WRP2_Mask) >> 16);
WRP3_Data = (vu16)((FLASH_Pages & WRP3_Mask) >> 24);
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(ProgramTimeout);
if(status == FLASH_COMPLETE)
{
/* Authorizes the small information block programming */
FLASH->OPTKEYR = FLASH_KEY1;
FLASH->OPTKEYR = FLASH_KEY2;
FLASH->CR |= CR_OPTPG_Set;
if(WRP0_Data != 0xFF)
{
OB->WRP0 = WRP0_Data;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(ProgramTimeout);
}
if((status == FLASH_COMPLETE) && (WRP1_Data != 0xFF))
{
OB->WRP1 = WRP1_Data;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(ProgramTimeout);
}
if((status == FLASH_COMPLETE) && (WRP2_Data != 0xFF))
{
OB->WRP2 = WRP2_Data;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(ProgramTimeout);
}
if((status == FLASH_COMPLETE)&& (WRP3_Data != 0xFF))
{
OB->WRP3 = WRP3_Data;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(ProgramTimeout);
}
if(status != FLASH_BUSY)
{
/* if the program operation is completed, disable the OPTPG Bit */
FLASH->CR &= CR_OPTPG_Reset;
}
}
/* Return the write protection operation Status */
return status;
}
/*******************************************************************************
* Function Name : FLASH_ReadOutProtection
* Description : Enables or disables the read out protection.
* If the user has already programmed the other option bytes before
* calling this function, he must re-program them since this
* function erases all option bytes.
* Input : - Newstate: new state of the ReadOut Protection.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : FLASH Status: The returned value can be: FLASH_BUSY,
* FLASH_ERROR_PG, FLASH_ERROR_WRP, FLASH_COMPLETE or
* FLASH_TIMEOUT.
*******************************************************************************/
FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState)
{
FLASH_Status status = FLASH_COMPLETE;
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
status = FLASH_WaitForLastOperation(EraseTimeout);
if(status == FLASH_COMPLETE)
{
/* Authorizes the small information block programming */
FLASH->OPTKEYR = FLASH_KEY1;
FLASH->OPTKEYR = FLASH_KEY2;
FLASH->CR |= CR_OPTER_Set;
FLASH->CR |= CR_STRT_Set;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(EraseTimeout);
if(status == FLASH_COMPLETE)
{
/* if the erase operation is completed, disable the OPTER Bit */
FLASH->CR &= CR_OPTER_Reset;
/* Enable the Option Bytes Programming operation */
FLASH->CR |= CR_OPTPG_Set;
if(NewState != DISABLE)
{
OB->RDP = 0x00;
}
else
{
OB->RDP = RDP_Key;
}
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(EraseTimeout);
if(status != FLASH_BUSY)
{
/* if the program operation is completed, disable the OPTPG Bit */
FLASH->CR &= CR_OPTPG_Reset;
}
}
else
{
if(status != FLASH_BUSY)
{
/* Disable the OPTER Bit */
FLASH->CR &= CR_OPTER_Reset;
}
}
}
/* Return the protection operation Status */
return status;
}
/*******************************************************************************
* Function Name : FLASH_UserOptionByteConfig
* Description : Programs the FLASH User Option Byte: IWDG_SW / RST_STOP /
* RST_STDBY.
* Input : - OB_IWDG: Selects the IWDG mode
* This parameter can be one of the following values:
* - OB_IWDG_SW: Software IWDG selected
* - OB_IWDG_HW: Hardware IWDG selected
* - OB_STOP: Reset event when entering STOP mode.
* This parameter can be one of the following values:
* - OB_STOP_NoRST: No reset generated when entering in STOP
* - OB_STOP_RST: Reset generated when entering in STOP
* - OB_STDBY: Reset event when entering Standby mode.
* This parameter can be one of the following values:
* - OB_STDBY_NoRST: No reset generated when entering in STANDBY
* - OB_STDBY_RST: Reset generated when entering in STANDBY
* Output : None
* Return : FLASH Status: The returned value can be: FLASH_BUSY,
* FLASH_ERROR_PG, FLASH_ERROR_WRP, FLASH_COMPLETE or
* FLASH_TIMEOUT.
*******************************************************************************/
FLASH_Status FLASH_UserOptionByteConfig(u16 OB_IWDG, u16 OB_STOP, u16 OB_STDBY)
{
FLASH_Status status = FLASH_COMPLETE;
/* Check the parameters */
assert_param(IS_OB_IWDG_SOURCE(OB_IWDG));
assert_param(IS_OB_STOP_SOURCE(OB_STOP));
assert_param(IS_OB_STDBY_SOURCE(OB_STDBY));
/* Authorize the small information block programming */
FLASH->OPTKEYR = FLASH_KEY1;
FLASH->OPTKEYR = FLASH_KEY2;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(ProgramTimeout);
if(status == FLASH_COMPLETE)
{
/* Enable the Option Bytes Programming operation */
FLASH->CR |= CR_OPTPG_Set;
OB->USER = ( OB_IWDG | OB_STOP |OB_STDBY) | (u16)0xF8;
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(ProgramTimeout);
if(status != FLASH_BUSY)
{
/* if the program operation is completed, disable the OPTPG Bit */
FLASH->CR &= CR_OPTPG_Reset;
}
}
/* Return the Option Byte program Status */
return status;
}
/*******************************************************************************
* Function Name : FLASH_GetUserOptionByte
* Description : Returns the FLASH User Option Bytes values.
* Input : None
* Output : None
* Return : The FLASH User Option Bytes values:IWDG_SW(Bit0), RST_STOP(Bit1)
* and RST_STDBY(Bit2).
*******************************************************************************/
u32 FLASH_GetUserOptionByte(void)
{
/* Return the User Option Byte */
return (u32)(FLASH->OBR >> 2);
}
/*******************************************************************************
* Function Name : FLASH_GetWriteProtectionOptionByte
* Description : Returns the FLASH Write Protection Option Bytes Register value.
* Input : None
* Output : None
* Return : The FLASH Write Protection Option Bytes Register value
*******************************************************************************/
u32 FLASH_GetWriteProtectionOptionByte(void)
{
/* Return the Falsh write protection Register value */
return (u32)(FLASH->WRPR);
}
/*******************************************************************************
* Function Name : FLASH_GetReadOutProtectionStatus
* Description : Checks whether the FLASH Read Out Protection Status is set
* or not.
* Input : None
* Output : None
* Return : FLASH ReadOut Protection Status(SET or RESET)
*******************************************************************************/
FlagStatus FLASH_GetReadOutProtectionStatus(void)
{
FlagStatus readoutstatus = RESET;
if ((FLASH->OBR & RDPRT_Mask) != (u32)RESET)
{
readoutstatus = SET;
}
else
{
readoutstatus = RESET;
}
return readoutstatus;
}
/*******************************************************************************
* Function Name : FLASH_GetPrefetchBufferStatus
* Description : Checks whether the FLASH Prefetch Buffer status is set or not.
* Input : None
* Output : None
* Return : FLASH Prefetch Buffer Status (SET or RESET).
*******************************************************************************/
FlagStatus FLASH_GetPrefetchBufferStatus(void)
{
FlagStatus bitstatus = RESET;
if ((FLASH->ACR & ACR_PRFTBS_Mask) != (u32)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
/* Return the new state of FLASH Prefetch Buffer Status (SET or RESET) */
return bitstatus;
}
/*******************************************************************************
* Function Name : FLASH_ITConfig
* Description : Enables or disables the specified FLASH interrupts.
* Input : - FLASH_IT: specifies the FLASH interrupt sources to be
* enabled or disabled.
* This parameter can be any combination of the following values:
* - FLASH_IT_ERROR: FLASH Error Interrupt
* - FLASH_IT_EOP: FLASH end of operation Interrupt
* Output : None
* Return : None
*******************************************************************************/
void FLASH_ITConfig(u16 FLASH_IT, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FLASH_IT(FLASH_IT));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if(NewState != DISABLE)
{
/* Enable the interrupt sources */
FLASH->CR |= FLASH_IT;
}
else
{
/* Disable the interrupt sources */
FLASH->CR &= ~(u32)FLASH_IT;
}
}
/*******************************************************************************
* Function Name : FLASH_GetFlagStatus
* Description : Checks whether the specified FLASH flag is set or not.
* Input : - FLASH_FLAG: specifies the FLASH flag to check.
* This parameter can be one of the following values:
* - FLASH_FLAG_BSY: FLASH Busy flag
* - FLASH_FLAG_PGERR: FLASH Program error flag
* - FLASH_FLAG_WRPRTERR: FLASH Write protected error flag
* - FLASH_FLAG_EOP: FLASH End of Operation flag
* - FLASH_FLAG_OPTERR: FLASH Option Byte error flag
* Output : None
* Return : The new state of FLASH_FLAG (SET or RESET).
*******************************************************************************/
FlagStatus FLASH_GetFlagStatus(u16 FLASH_FLAG)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)) ;
if(FLASH_FLAG == FLASH_FLAG_OPTERR)
{
if((FLASH->OBR & FLASH_FLAG_OPTERR) != (u32)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
}
else
{
if((FLASH->SR & FLASH_FLAG) != (u32)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
}
/* Return the new state of FLASH_FLAG (SET or RESET) */
return bitstatus;
}
/*******************************************************************************
* Function Name : FLASH_ClearFlag
* Description : Clears the FLASH’s pending flags.
* Input : - FLASH_FLAG: specifies the FLASH flags to clear.
* This parameter can be any combination of the following values:
* - FLASH_FLAG_BSY: FLASH Busy flag
* - FLASH_FLAG_PGERR: FLASH Program error flag
* - FLASH_FLAG_WRPRTERR: FLASH Write protected error flag
* - FLASH_FLAG_EOP: FLASH End of Operation flag
* Output : None
* Return : None
*******************************************************************************/
void FLASH_ClearFlag(u16 FLASH_FLAG)
{
/* Check the parameters */
assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)) ;
/* Clear the flags */
FLASH->SR = FLASH_FLAG;
}
/*******************************************************************************
* Function Name : FLASH_GetStatus
* Description : Returns the FLASH Status.
* Input : None
* Output : None
* Return : FLASH Status: The returned value can be: FLASH_BUSY,
* FLASH_ERROR_PG, FLASH_ERROR_WRP or FLASH_COMPLETE
*******************************************************************************/
FLASH_Status FLASH_GetStatus(void)
{
FLASH_Status flashstatus = FLASH_COMPLETE;
if((FLASH->SR & FLASH_FLAG_BSY) == FLASH_FLAG_BSY)
{
flashstatus = FLASH_BUSY;
}
else
{
if(FLASH->SR & FLASH_FLAG_PGERR)
{
flashstatus = FLASH_ERROR_PG;
}
else
{
if(FLASH->SR & FLASH_FLAG_WRPRTERR)
{
flashstatus = FLASH_ERROR_WRP;
}
else
{
flashstatus = FLASH_COMPLETE;
}
}
}
/* Return the Flash Status */
return flashstatus;
}
/*******************************************************************************
* Function Name : FLASH_WaitForLastOperation
* Description : Waits for a Flash operation to complete or a TIMEOUT to occur.
* Input : - Timeout: FLASH progamming Timeout
* Output : None
* Return : FLASH Status: The returned value can be: FLASH_BUSY,
* FLASH_ERROR_PG, FLASH_ERROR_WRP, FLASH_COMPLETE or
* FLASH_TIMEOUT.
*******************************************************************************/
FLASH_Status FLASH_WaitForLastOperation(u32 Timeout)
{
FLASH_Status status = FLASH_COMPLETE;
/* Check for the Flash Status */
status = FLASH_GetStatus();
/* Wait for a Flash operation to complete or a TIMEOUT to occur */
while((status == FLASH_BUSY) && (Timeout != 0x00))
{
delay();
status = FLASH_GetStatus();
Timeout--;
}
if(Timeout == 0x00 )
{
status = FLASH_TIMEOUT;
}
/* Return the operation status */
return status;
}
/*******************************************************************************
* Function Name : delay
* Description : Inserts a time delay.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
static void delay(void)
{
vu32 i = 0;
for(i = 0xFF; i != 0; i--)
{
}
}
#endif
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
* File Name : stm32f10x_fsmc.c
* Author : MCD Application Team
* Version : V2.0.3Patch1
* Date : 04/06/2009
* Description : This file provides all the FSMC firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_fsmc.h"
#include "stm32f10x_rcc.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* --------------------- FSMC registers bit mask ---------------------------- */
/* FSMC BCRx Mask */
#define BCR_MBKEN_Set ((u32)0x00000001)
#define BCR_MBKEN_Reset ((u32)0x000FFFFE)
#define BCR_FACCEN_Set ((u32)0x00000040)
/* FSMC PCRx Mask */
#define PCR_PBKEN_Set ((u32)0x00000004)
#define PCR_PBKEN_Reset ((u32)0x000FFFFB)
#define PCR_ECCEN_Set ((u32)0x00000040)
#define PCR_ECCEN_Reset ((u32)0x000FFFBF)
#define PCR_MemoryType_NAND ((u32)0x00000008)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : FSMC_NORSRAMDeInit
* Description : Deinitializes the FSMC NOR/SRAM Banks registers to their default
* reset values.
* Input : - FSMC_Bank: specifies the FSMC Bank to be used
* This parameter can be one of the following values:
* - FSMC_Bank1_NORSRAM1: FSMC Bank1 NOR/SRAM1
* - FSMC_Bank1_NORSRAM2: FSMC Bank1 NOR/SRAM2
* - FSMC_Bank1_NORSRAM3: FSMC Bank1 NOR/SRAM3
* - FSMC_Bank1_NORSRAM4: FSMC Bank1 NOR/SRAM4
* Output : None
* Return : None
*******************************************************************************/
void FSMC_NORSRAMDeInit(u32 FSMC_Bank)
{
/* Check the parameter */
assert_param(IS_FSMC_NORSRAM_BANK(FSMC_Bank));
/* FSMC_Bank1_NORSRAM1 */
if(FSMC_Bank == FSMC_Bank1_NORSRAM1)
{
FSMC_Bank1->BTCR[FSMC_Bank] = 0x000030DB;
}
/* FSMC_Bank1_NORSRAM2, FSMC_Bank1_NORSRAM3 or FSMC_Bank1_NORSRAM4 */
else
{
FSMC_Bank1->BTCR[FSMC_Bank] = 0x000030D2;
}
FSMC_Bank1->BTCR[FSMC_Bank + 1] = 0x0FFFFFFF;
FSMC_Bank1E->BWTR[FSMC_Bank] = 0x0FFFFFFF;
}
/*******************************************************************************
* Function Name : FSMC_NANDDeInit
* Description : Deinitializes the FSMC NAND Banks registers to their default
* reset values.
* Input : - FSMC_Bank: specifies the FSMC Bank to be used
* This parameter can be one of the following values:
* - FSMC_Bank2_NAND: FSMC Bank2 NAND
* - FSMC_Bank3_NAND: FSMC Bank3 NAND
* Output : None
* Return : None
*******************************************************************************/
void FSMC_NANDDeInit(u32 FSMC_Bank)
{
/* Check the parameter */
assert_param(IS_FSMC_NAND_BANK(FSMC_Bank));
if(FSMC_Bank == FSMC_Bank2_NAND)
{
/* Set the FSMC_Bank2 registers to their reset values */
FSMC_Bank2->PCR2 = 0x00000018;
FSMC_Bank2->SR2 = 0x00000040;
FSMC_Bank2->PMEM2 = 0xFCFCFCFC;
FSMC_Bank2->PATT2 = 0xFCFCFCFC;
}
/* FSMC_Bank3_NAND */
else
{
/* Set the FSMC_Bank3 registers to their reset values */
FSMC_Bank3->PCR3 = 0x00000018;
FSMC_Bank3->SR3 = 0x00000040;
FSMC_Bank3->PMEM3 = 0xFCFCFCFC;
FSMC_Bank3->PATT3 = 0xFCFCFCFC;
}
}
/*******************************************************************************
* Function Name : FSMC_PCCARDDeInit
* Description : Deinitializes the FSMC PCCARD Bank registers to their default
* reset values.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void FSMC_PCCARDDeInit(void)
{
/* Set the FSMC_Bank4 registers to their reset values */
FSMC_Bank4->PCR4 = 0x00000018;
FSMC_Bank4->SR4 = 0x00000000;
FSMC_Bank4->PMEM4 = 0xFCFCFCFC;
FSMC_Bank4->PATT4 = 0xFCFCFCFC;
FSMC_Bank4->PIO4 = 0xFCFCFCFC;
}
/*******************************************************************************
* Function Name : FSMC_NORSRAMInit
* Description : Initializes the FSMC NOR/SRAM Banks according to the
* specified parameters in the FSMC_NORSRAMInitStruct.
* Input : - FSMC_NORSRAMInitStruct : pointer to a FSMC_NORSRAMInitTypeDef
* structure that contains the configuration information for
* the FSMC NOR/SRAM specified Banks.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct)
{
/* Check the parameters */
assert_param(IS_FSMC_NORSRAM_BANK(FSMC_NORSRAMInitStruct->FSMC_Bank));
assert_param(IS_FSMC_MUX(FSMC_NORSRAMInitStruct->FSMC_DataAddressMux));
assert_param(IS_FSMC_MEMORY(FSMC_NORSRAMInitStruct->FSMC_MemoryType));
assert_param(IS_FSMC_MEMORY_WIDTH(FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth));
assert_param(IS_FSMC_BURSTMODE(FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode));
assert_param(IS_FSMC_WAIT_POLARITY(FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity));
assert_param(IS_FSMC_WRAP_MODE(FSMC_NORSRAMInitStruct->FSMC_WrapMode));
assert_param(IS_FSMC_WAIT_SIGNAL_ACTIVE(FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive));
assert_param(IS_FSMC_WRITE_OPERATION(FSMC_NORSRAMInitStruct->FSMC_WriteOperation));
assert_param(IS_FSMC_WAITE_SIGNAL(FSMC_NORSRAMInitStruct->FSMC_WaitSignal));
assert_param(IS_FSMC_EXTENDED_MODE(FSMC_NORSRAMInitStruct->FSMC_ExtendedMode));
assert_param(IS_FSMC_WRITE_BURST(FSMC_NORSRAMInitStruct->FSMC_WriteBurst));
assert_param(IS_FSMC_ADDRESS_SETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime));
assert_param(IS_FSMC_ADDRESS_HOLD_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime));
assert_param(IS_FSMC_DATASETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime));
assert_param(IS_FSMC_TURNAROUND_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration));
assert_param(IS_FSMC_CLK_DIV(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision));
assert_param(IS_FSMC_DATA_LATENCY(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency));
assert_param(IS_FSMC_ACCESS_MODE(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode));
/* Bank1 NOR/SRAM control register configuration */
FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank] =
(u32)FSMC_NORSRAMInitStruct->FSMC_DataAddressMux |
FSMC_NORSRAMInitStruct->FSMC_MemoryType |
FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth |
FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode |
FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity |
FSMC_NORSRAMInitStruct->FSMC_WrapMode |
FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive |
FSMC_NORSRAMInitStruct->FSMC_WriteOperation |
FSMC_NORSRAMInitStruct->FSMC_WaitSignal |
FSMC_NORSRAMInitStruct->FSMC_ExtendedMode |
FSMC_NORSRAMInitStruct->FSMC_WriteBurst;
if(FSMC_NORSRAMInitStruct->FSMC_MemoryType == FSMC_MemoryType_NOR)
{
FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank] |= (u32)BCR_FACCEN_Set;
}
/* Bank1 NOR/SRAM timing register configuration */
FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank+1] =
(u32)FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime |
(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime << 4) |
(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime << 8) |
(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration << 16) |
(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision << 20) |
(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency << 24) |
FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode;
/* Bank1 NOR/SRAM timing register for write configuration, if extended mode is used */
if(FSMC_NORSRAMInitStruct->FSMC_ExtendedMode == FSMC_ExtendedMode_Enable)
{
assert_param(IS_FSMC_ADDRESS_SETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime));
assert_param(IS_FSMC_ADDRESS_HOLD_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime));
assert_param(IS_FSMC_DATASETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime));
assert_param(IS_FSMC_CLK_DIV(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision));
assert_param(IS_FSMC_DATA_LATENCY(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency));
assert_param(IS_FSMC_ACCESS_MODE(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode));
FSMC_Bank1E->BWTR[FSMC_NORSRAMInitStruct->FSMC_Bank] =
(u32)FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime |
(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime << 4 )|
(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime << 8) |
(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision << 20) |
(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency << 24) |
FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode;
}
else
{
FSMC_Bank1E->BWTR[FSMC_NORSRAMInitStruct->FSMC_Bank] = 0x0FFFFFFF;
}
}
/*******************************************************************************
* Function Name : FSMC_NANDInit
* Description : Initializes the FSMC NAND Banks according to the specified
* parameters in the FSMC_NANDInitStruct.
* Input : - FSMC_NANDInitStruct : pointer to a FSMC_NANDInitTypeDef
* structure that contains the configuration information for
* the FSMC NAND specified Banks.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct)
{
u32 tmppcr = 0x00000000, tmppmem = 0x00000000, tmppatt = 0x00000000;
/* Check the parameters */
assert_param( IS_FSMC_NAND_BANK(FSMC_NANDInitStruct->FSMC_Bank));
assert_param( IS_FSMC_WAIT_FEATURE(FSMC_NANDInitStruct->FSMC_Waitfeature));
assert_param( IS_FSMC_DATA_WIDTH(FSMC_NANDInitStruct->FSMC_MemoryDataWidth));
assert_param( IS_FSMC_ECC_STATE(FSMC_NANDInitStruct->FSMC_ECC));
assert_param( IS_FSMC_ECCPAGE_SIZE(FSMC_NANDInitStruct->FSMC_ECCPageSize));
assert_param( IS_FSMC_TCLR_TIME(FSMC_NANDInitStruct->FSMC_TCLRSetupTime));
assert_param( IS_FSMC_TAR_TIME(FSMC_NANDInitStruct->FSMC_TARSetupTime));
assert_param(IS_FSMC_SETUP_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime));
assert_param(IS_FSMC_WAIT_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime));
assert_param(IS_FSMC_HOLD_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime));
assert_param(IS_FSMC_HIZ_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime));
assert_param(IS_FSMC_SETUP_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime));
assert_param(IS_FSMC_WAIT_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime));
assert_param(IS_FSMC_HOLD_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime));
assert_param(IS_FSMC_HIZ_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime));
/* Set the tmppcr value according to FSMC_NANDInitStruct parameters */
tmppcr = (u32)FSMC_NANDInitStruct->FSMC_Waitfeature |
PCR_MemoryType_NAND |
FSMC_NANDInitStruct->FSMC_MemoryDataWidth |
FSMC_NANDInitStruct->FSMC_ECC |
FSMC_NANDInitStruct->FSMC_ECCPageSize |
(FSMC_NANDInitStruct->FSMC_TCLRSetupTime << 9 )|
(FSMC_NANDInitStruct->FSMC_TARSetupTime << 13);
/* Set tmppmem value according to FSMC_CommonSpaceTimingStructure parameters */
tmppmem = (u32)FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime |
(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime << 8) |
(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime << 16)|
(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime << 24);
/* Set tmppatt value according to FSMC_AttributeSpaceTimingStructure parameters */
tmppatt = (u32)FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime |
(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime << 8) |
(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime << 16)|
(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime << 24);
if(FSMC_NANDInitStruct->FSMC_Bank == FSMC_Bank2_NAND)
{
/* FSMC_Bank2_NAND registers configuration */
FSMC_Bank2->PCR2 = tmppcr;
FSMC_Bank2->PMEM2 = tmppmem;
FSMC_Bank2->PATT2 = tmppatt;
}
else
{
/* FSMC_Bank3_NAND registers configuration */
FSMC_Bank3->PCR3 = tmppcr;
FSMC_Bank3->PMEM3 = tmppmem;
FSMC_Bank3->PATT3 = tmppatt;
}
}
/*******************************************************************************
* Function Name : FSMC_PCCARDInit
* Description : Initializes the FSMC PCCARD Bank according to the specified
* parameters in the FSMC_PCCARDInitStruct.
* Input : - FSMC_PCCARDInitStruct : pointer to a FSMC_PCCARDInitTypeDef
* structure that contains the configuration information for
* the FSMC PCCARD Bank.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct)
{
/* Check the parameters */
assert_param(IS_FSMC_WAIT_FEATURE(FSMC_PCCARDInitStruct->FSMC_Waitfeature));
assert_param(IS_FSMC_TCLR_TIME(FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime));
assert_param(IS_FSMC_TAR_TIME(FSMC_PCCARDInitStruct->FSMC_TARSetupTime));
assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime));
assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime));
assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime));
assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime));
assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime));
assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime));
assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime));
assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime));
assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime));
assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime));
assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime));
assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime));
/* Set the PCR4 register value according to FSMC_PCCARDInitStruct parameters */
FSMC_Bank4->PCR4 = (u32)FSMC_PCCARDInitStruct->FSMC_Waitfeature |
FSMC_MemoryDataWidth_16b |
(FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime << 9) |
(FSMC_PCCARDInitStruct->FSMC_TARSetupTime << 13);
/* Set PMEM4 register value according to FSMC_CommonSpaceTimingStructure parameters */
FSMC_Bank4->PMEM4 = (u32)FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime |
(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime << 8) |
(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime << 16)|
(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime << 24);
/* Set PATT4 register value according to FSMC_AttributeSpaceTimingStructure parameters */
FSMC_Bank4->PATT4 = (u32)FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime |
(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime << 8) |
(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime << 16)|
(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime << 24);
/* Set PIO4 register value according to FSMC_IOSpaceTimingStructure parameters */
FSMC_Bank4->PIO4 = (u32)FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime |
(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime << 8) |
(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime << 16)|
(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime << 24);
}
/*******************************************************************************
* Function Name : FSMC_NORSRAMStructInit
* Description : Fills each FSMC_NORSRAMInitStruct member with its default value.
* Input : - FSMC_NORSRAMInitStruct: pointer to a FSMC_NORSRAMInitTypeDef
* structure which will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct)
{
/* Reset NOR/SRAM Init structure parameters values */
FSMC_NORSRAMInitStruct->FSMC_Bank = FSMC_Bank1_NORSRAM1;
FSMC_NORSRAMInitStruct->FSMC_DataAddressMux = FSMC_DataAddressMux_Enable;
FSMC_NORSRAMInitStruct->FSMC_MemoryType = FSMC_MemoryType_SRAM;
FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;
FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStruct->FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
FSMC_NORSRAMInitStruct->FSMC_WriteOperation = FSMC_WriteOperation_Enable;
FSMC_NORSRAMInitStruct->FSMC_WaitSignal = FSMC_WaitSignal_Enable;
FSMC_NORSRAMInitStruct->FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
FSMC_NORSRAMInitStruct->FSMC_WriteBurst = FSMC_WriteBurst_Disable;
FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime = 0xF;
FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime = 0xF;
FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime = 0xFF;
FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration = 0xF;
FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision = 0xF;
FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency = 0xF;
FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode = FSMC_AccessMode_A;
FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime = 0xF;
FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime = 0xF;
FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime = 0xFF;
FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_BusTurnAroundDuration = 0xF;
FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision = 0xF;
FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency = 0xF;
FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode = FSMC_AccessMode_A;
}
/*******************************************************************************
* Function Name : FSMC_NANDStructInit
* Description : Fills each FSMC_NANDInitStruct member with its default value.
* Input : - FSMC_NORSRAMInitStruct: pointer to a FSMC_NANDInitTypeDef
* structure which will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct)
{
/* Reset NAND Init structure parameters values */
FSMC_NANDInitStruct->FSMC_Bank = FSMC_Bank2_NAND;
FSMC_NANDInitStruct->FSMC_Waitfeature = FSMC_Waitfeature_Disable;
FSMC_NANDInitStruct->FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;
FSMC_NANDInitStruct->FSMC_ECC = FSMC_ECC_Disable;
FSMC_NANDInitStruct->FSMC_ECCPageSize = FSMC_ECCPageSize_256Bytes;
FSMC_NANDInitStruct->FSMC_TCLRSetupTime = 0x0;
FSMC_NANDInitStruct->FSMC_TARSetupTime = 0x0;
FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime = 0xFC;
FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC;
FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC;
FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC;
FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime = 0xFC;
FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC;
FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC;
FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC;
}
/*******************************************************************************
* Function Name : FSMC_PCCARDStructInit
* Description : Fills each FSMC_PCCARDInitStruct member with its default value.
* Input : - FSMC_PCCARDInitStruct: pointer to a FSMC_PCCARDInitTypeDef
* structure which will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct)
{
/* Reset PCCARD Init structure parameters values */
FSMC_PCCARDInitStruct->FSMC_Waitfeature = FSMC_Waitfeature_Disable;
FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime = 0x0;
FSMC_PCCARDInitStruct->FSMC_TARSetupTime = 0x0;
FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime = 0xFC;
FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC;
FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC;
FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC;
FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime = 0xFC;
FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC;
FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC;
FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC;
FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime = 0xFC;
FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC;
FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC;
FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC;
}
/*******************************************************************************
* Function Name : FSMC_NORSRAMCmd
* Description : Enables or disables the specified NOR/SRAM Memory Bank.
* Input : - FSMC_Bank: specifies the FSMC Bank to be used
* This parameter can be one of the following values:
* - FSMC_Bank1_NORSRAM1: FSMC Bank1 NOR/SRAM1
* - FSMC_Bank1_NORSRAM2: FSMC Bank1 NOR/SRAM2
* - FSMC_Bank1_NORSRAM3: FSMC Bank1 NOR/SRAM3
* - FSMC_Bank1_NORSRAM4: FSMC Bank1 NOR/SRAM4
* : - NewState: new state of the FSMC_Bank.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_NORSRAMCmd(u32 FSMC_Bank, FunctionalState NewState)
{
assert_param(IS_FSMC_NORSRAM_BANK(FSMC_Bank));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected NOR/SRAM Bank by setting the PBKEN bit in the BCRx register */
FSMC_Bank1->BTCR[FSMC_Bank] |= BCR_MBKEN_Set;
}
else
{
/* Disable the selected NOR/SRAM Bank by clearing the PBKEN bit in the BCRx register */
FSMC_Bank1->BTCR[FSMC_Bank] &= BCR_MBKEN_Reset;
}
}
/*******************************************************************************
* Function Name : FSMC_NANDCmd
* Description : Enables or disables the specified NAND Memory Bank.
* Input : - FSMC_Bank: specifies the FSMC Bank to be used
* This parameter can be one of the following values:
* - FSMC_Bank2_NAND: FSMC Bank2 NAND
* - FSMC_Bank3_NAND: FSMC Bank3 NAND
* : - NewState: new state of the FSMC_Bank.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_NANDCmd(u32 FSMC_Bank, FunctionalState NewState)
{
assert_param(IS_FSMC_NAND_BANK(FSMC_Bank));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected NAND Bank by setting the PBKEN bit in the PCRx register */
if(FSMC_Bank == FSMC_Bank2_NAND)
{
FSMC_Bank2->PCR2 |= PCR_PBKEN_Set;
}
else
{
FSMC_Bank3->PCR3 |= PCR_PBKEN_Set;
}
}
else
{
/* Disable the selected NAND Bank by clearing the PBKEN bit in the PCRx register */
if(FSMC_Bank == FSMC_Bank2_NAND)
{
FSMC_Bank2->PCR2 &= PCR_PBKEN_Reset;
}
else
{
FSMC_Bank3->PCR3 &= PCR_PBKEN_Reset;
}
}
}
/*******************************************************************************
* Function Name : FSMC_PCCARDCmd
* Description : Enables or disables the PCCARD Memory Bank.
* Input : - NewState: new state of the PCCARD Memory Bank.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_PCCARDCmd(FunctionalState NewState)
{
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the PCCARD Bank by setting the PBKEN bit in the PCR4 register */
FSMC_Bank4->PCR4 |= PCR_PBKEN_Set;
}
else
{
/* Disable the PCCARD Bank by clearing the PBKEN bit in the PCR4 register */
FSMC_Bank4->PCR4 &= PCR_PBKEN_Reset;
}
}
/*******************************************************************************
* Function Name : FSMC_NANDECCCmd
* Description : Enables or disables the FSMC NAND ECC feature.
* Input : - FSMC_Bank: specifies the FSMC Bank to be used
* This parameter can be one of the following values:
* - FSMC_Bank2_NAND: FSMC Bank2 NAND
* - FSMC_Bank3_NAND: FSMC Bank3 NAND
* : - NewState: new state of the FSMC NAND ECC feature.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_NANDECCCmd(u32 FSMC_Bank, FunctionalState NewState)
{
assert_param(IS_FSMC_NAND_BANK(FSMC_Bank));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected NAND Bank ECC function by setting the ECCEN bit in the PCRx register */
if(FSMC_Bank == FSMC_Bank2_NAND)
{
FSMC_Bank2->PCR2 |= PCR_ECCEN_Set;
}
else
{
FSMC_Bank3->PCR3 |= PCR_ECCEN_Set;
}
}
else
{
/* Disable the selected NAND Bank ECC function by clearing the ECCEN bit in the PCRx register */
if(FSMC_Bank == FSMC_Bank2_NAND)
{
FSMC_Bank2->PCR2 &= PCR_ECCEN_Reset;
}
else
{
FSMC_Bank3->PCR3 &= PCR_ECCEN_Reset;
}
}
}
/*******************************************************************************
* Function Name : FSMC_GetECC
* Description : Returns the error correction code register value.
* Input : - FSMC_Bank: specifies the FSMC Bank to be used
* This parameter can be one of the following values:
* - FSMC_Bank2_NAND: FSMC Bank2 NAND
* - FSMC_Bank3_NAND: FSMC Bank3 NAND
* Output : None
* Return : The Error Correction Code (ECC) value.
*******************************************************************************/
u32 FSMC_GetECC(u32 FSMC_Bank)
{
u32 eccval = 0x00000000;
if(FSMC_Bank == FSMC_Bank2_NAND)
{
/* Get the ECCR2 register value */
eccval = FSMC_Bank2->ECCR2;
}
else
{
/* Get the ECCR3 register value */
eccval = FSMC_Bank3->ECCR3;
}
/* Return the error correction code value */
return(eccval);
}
/*******************************************************************************
* Function Name : FSMC_ITConfig
* Description : Enables or disables the specified FSMC interrupts.
* Input : - FSMC_Bank: specifies the FSMC Bank to be used
* This parameter can be one of the following values:
* - FSMC_Bank2_NAND: FSMC Bank2 NAND
* - FSMC_Bank3_NAND: FSMC Bank3 NAND
* - FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD
* - FSMC_IT: specifies the FSMC interrupt sources to be
* enabled or disabled.
* This parameter can be any combination of the following values:
* - FSMC_IT_RisingEdge: Rising edge detection interrupt.
* - FSMC_IT_Level: Level edge detection interrupt.
* - FSMC_IT_FallingEdge: Falling edge detection interrupt.
* - NewState: new state of the specified FSMC interrupts.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_ITConfig(u32 FSMC_Bank, u32 FSMC_IT, FunctionalState NewState)
{
assert_param(IS_FSMC_IT_BANK(FSMC_Bank));
assert_param(IS_FSMC_IT(FSMC_IT));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected FSMC_Bank2 interrupts */
if(FSMC_Bank == FSMC_Bank2_NAND)
{
FSMC_Bank2->SR2 |= FSMC_IT;
}
/* Enable the selected FSMC_Bank3 interrupts */
else if (FSMC_Bank == FSMC_Bank3_NAND)
{
FSMC_Bank3->SR3 |= FSMC_IT;
}
/* Enable the selected FSMC_Bank4 interrupts */
else
{
FSMC_Bank4->SR4 |= FSMC_IT;
}
}
else
{
/* Disable the selected FSMC_Bank2 interrupts */
if(FSMC_Bank == FSMC_Bank2_NAND)
{
FSMC_Bank2->SR2 &= (u32)~FSMC_IT;
}
/* Disable the selected FSMC_Bank3 interrupts */
else if (FSMC_Bank == FSMC_Bank3_NAND)
{
FSMC_Bank3->SR3 &= (u32)~FSMC_IT;
}
/* Disable the selected FSMC_Bank4 interrupts */
else
{
FSMC_Bank4->SR4 &= (u32)~FSMC_IT;
}
}
}
/*******************************************************************************
* Function Name : FSMC_GetFlagStatus
* Description : Checks whether the specified FSMC flag is set or not.
* Input : - FSMC_Bank: specifies the FSMC Bank to be used
* This parameter can be one of the following values:
* - FSMC_Bank2_NAND: FSMC Bank2 NAND
* - FSMC_Bank3_NAND: FSMC Bank3 NAND
* - FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD
* - FSMC_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* - FSMC_FLAG_RisingEdge: Rising egde detection Flag.
* - FSMC_FLAG_Level: Level detection Flag.
* - FSMC_FLAG_FallingEdge: Falling egde detection Flag.
* - FSMC_FLAG_FEMPT: Fifo empty Flag.
* Output : None
* Return : The new state of FSMC_FLAG (SET or RESET).
*******************************************************************************/
FlagStatus FSMC_GetFlagStatus(u32 FSMC_Bank, u32 FSMC_FLAG)
{
FlagStatus bitstatus = RESET;
u32 tmpsr = 0x00000000;
/* Check the parameters */
assert_param(IS_FSMC_GETFLAG_BANK(FSMC_Bank));
assert_param(IS_FSMC_GET_FLAG(FSMC_FLAG));
if(FSMC_Bank == FSMC_Bank2_NAND)
{
tmpsr = FSMC_Bank2->SR2;
}
else if(FSMC_Bank == FSMC_Bank3_NAND)
{
tmpsr = FSMC_Bank3->SR3;
}
/* FSMC_Bank4_PCCARD*/
else
{
tmpsr = FSMC_Bank4->SR4;
}
/* Get the flag status */
if ((tmpsr & FSMC_FLAG) != (u16)RESET )
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
/* Return the flag status */
return bitstatus;
}
/*******************************************************************************
* Function Name : FSMC_ClearFlag
* Description : Clears the FSMC’s pending flags.
* Input : - FSMC_Bank: specifies the FSMC Bank to be used
* This parameter can be one of the following values:
* - FSMC_Bank2_NAND: FSMC Bank2 NAND
* - FSMC_Bank3_NAND: FSMC Bank3 NAND
* - FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD
* - FSMC_FLAG: specifies the flag to clear.
* This parameter can be any combination of the following values:
* - FSMC_FLAG_RisingEdge: Rising egde detection Flag.
* - FSMC_FLAG_Level: Level detection Flag.
* - FSMC_FLAG_FallingEdge: Falling egde detection Flag.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_ClearFlag(u32 FSMC_Bank, u32 FSMC_FLAG)
{
/* Check the parameters */
assert_param(IS_FSMC_GETFLAG_BANK(FSMC_Bank));
assert_param(IS_FSMC_CLEAR_FLAG(FSMC_FLAG)) ;
if(FSMC_Bank == FSMC_Bank2_NAND)
{
FSMC_Bank2->SR2 &= ~FSMC_FLAG;
}
else if(FSMC_Bank == FSMC_Bank3_NAND)
{
FSMC_Bank3->SR3 &= ~FSMC_FLAG;
}
/* FSMC_Bank4_PCCARD*/
else
{
FSMC_Bank4->SR4 &= ~FSMC_FLAG;
}
}
/*******************************************************************************
* Function Name : FSMC_GetITStatus
* Description : Checks whether the specified FSMC interrupt has occurred or not.
* Input : - FSMC_Bank: specifies the FSMC Bank to be used
* This parameter can be one of the following values:
* - FSMC_Bank2_NAND: FSMC Bank2 NAND
* - FSMC_Bank3_NAND: FSMC Bank3 NAND
* - FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD
* - FSMC_IT: specifies the FSMC interrupt source to check.
* This parameter can be one of the following values:
* - FSMC_IT_RisingEdge: Rising edge detection interrupt.
* - FSMC_IT_Level: Level edge detection interrupt.
* - FSMC_IT_FallingEdge: Falling edge detection interrupt.
* Output : None
* Return : The new state of FSMC_IT (SET or RESET).
*******************************************************************************/
ITStatus FSMC_GetITStatus(u32 FSMC_Bank, u32 FSMC_IT)
{
ITStatus bitstatus = RESET;
u32 tmpsr = 0x0, itstatus = 0x0, itenable = 0x0;
/* Check the parameters */
assert_param(IS_FSMC_IT_BANK(FSMC_Bank));
assert_param(IS_FSMC_GET_IT(FSMC_IT));
if(FSMC_Bank == FSMC_Bank2_NAND)
{
tmpsr = FSMC_Bank2->SR2;
}
else if(FSMC_Bank == FSMC_Bank3_NAND)
{
tmpsr = FSMC_Bank3->SR3;
}
/* FSMC_Bank4_PCCARD*/
else
{
tmpsr = FSMC_Bank4->SR4;
}
itstatus = tmpsr & FSMC_IT;
itenable = tmpsr & (FSMC_IT >> 3);
if ((itstatus != (u32)RESET) && (itenable != (u32)RESET))
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*******************************************************************************
* Function Name : FSMC_ClearITPendingBit
* Description : Clears the FSMC’s interrupt pending bits.
* Input : - FSMC_Bank: specifies the FSMC Bank to be used
* This parameter can be one of the following values:
* - FSMC_Bank2_NAND: FSMC Bank2 NAND
* - FSMC_Bank3_NAND: FSMC Bank3 NAND
* - FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD
* - FSMC_IT: specifies the interrupt pending bit to clear.
* This parameter can be any combination of the following values:
* - FSMC_IT_RisingEdge: Rising edge detection interrupt.
* - FSMC_IT_Level: Level edge detection interrupt.
* - FSMC_IT_FallingEdge: Falling edge detection interrupt.
* Output : None
* Return : None
*******************************************************************************/
void FSMC_ClearITPendingBit(u32 FSMC_Bank, u32 FSMC_IT)
{
/* Check the parameters */
assert_param(IS_FSMC_IT_BANK(FSMC_Bank));
assert_param(IS_FSMC_IT(FSMC_IT));
if(FSMC_Bank == FSMC_Bank2_NAND)
{
FSMC_Bank2->SR2 &= ~(FSMC_IT >> 3);
}
else if(FSMC_Bank == FSMC_Bank3_NAND)
{
FSMC_Bank3->SR3 &= ~(FSMC_IT >> 3);
}
/* FSMC_Bank4_PCCARD*/
else
{
FSMC_Bank4->SR4 &= ~(FSMC_IT >> 3);
}
}
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_gpio.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the GPIO firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_gpio.h"
#include "stm32f10x_rcc.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* ------------ RCC registers bit address in the alias region ----------- */
#define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
/* --- EVENTCR Register ---*/
/* Alias word address of EVOE bit */
#define EVCR_OFFSET (AFIO_OFFSET + 0x00)
#define EVOE_BitNumber ((u8)0x07)
#define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
#define EVCR_PORTPINCONFIG_MASK ((u16)0xFF80)
#define LSB_MASK ((u16)0xFFFF)
#define DBGAFR_POSITION_MASK ((u32)0x000F0000)
#define DBGAFR_SWJCFG_MASK ((u32)0xF0FFFFFF)
#define DBGAFR_LOCATION_MASK ((u32)0x00200000)
#define DBGAFR_NUMBITS_MASK ((u32)0x00100000)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : GPIO_DeInit
* Description : Deinitializes the GPIOx peripheral registers to their default
* reset values.
* Input : - GPIOx: where x can be (A..G) to select the GPIO peripheral.
* Output : None
* Return : None
*******************************************************************************/
void GPIO_DeInit(GPIO_TypeDef* GPIOx)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
switch (*(u32*)&GPIOx)
{
case GPIOA_BASE:
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
break;
case GPIOB_BASE:
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
break;
case GPIOC_BASE:
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
break;
case GPIOD_BASE:
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
break;
case GPIOE_BASE:
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
break;
case GPIOF_BASE:
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
break;
case GPIOG_BASE:
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
break;
default:
break;
}
}
/*******************************************************************************
* Function Name : GPIO_AFIODeInit
* Description : Deinitializes the Alternate Functions (remap, event control
* and EXTI configuration) registers to their default reset
* values.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void GPIO_AFIODeInit(void)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
}
/*******************************************************************************
* Function Name : GPIO_Init
* Description : Initializes the GPIOx peripheral according to the specified
* parameters in the GPIO_InitStruct.
* Input : - GPIOx: where x can be (A..G) to select the GPIO peripheral.
* - GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
* contains the configuration information for the specified GPIO
* peripheral.
* Output : None
* Return : None
*******************************************************************************/
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
{
u32 currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
u32 tmpreg = 0x00, pinmask = 0x00;
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
/*---------------------------- GPIO Mode Configuration -----------------------*/
currentmode = ((u32)GPIO_InitStruct->GPIO_Mode) & ((u32)0x0F);
if ((((u32)GPIO_InitStruct->GPIO_Mode) & ((u32)0x10)) != 0x00)
{
/* Check the parameters */
assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
/* Output mode */
currentmode |= (u32)GPIO_InitStruct->GPIO_Speed;
}
/*---------------------------- GPIO CRL Configuration ------------------------*/
/* Configure the eight low port pins */
if (((u32)GPIO_InitStruct->GPIO_Pin & ((u32)0x00FF)) != 0x00)
{
tmpreg = GPIOx->CRL;
for (pinpos = 0x00; pinpos < 0x08; pinpos++)
{
pos = ((u32)0x01) << pinpos;
/* Get the port pins position */
currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
if (currentpin == pos)
{
pos = pinpos << 2;
/* Clear the corresponding low control register bits */
pinmask = ((u32)0x0F) << pos;
tmpreg &= ~pinmask;
/* Write the mode configuration in the corresponding bits */
tmpreg |= (currentmode << pos);
/* Reset the corresponding ODR bit */
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
{
GPIOx->BRR = (((u32)0x01) << pinpos);
}
else
{
/* Set the corresponding ODR bit */
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
{
GPIOx->BSRR = (((u32)0x01) << pinpos);
}
}
}
}
GPIOx->CRL = tmpreg;
}
/*---------------------------- GPIO CRH Configuration ------------------------*/
/* Configure the eight high port pins */
if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
{
tmpreg = GPIOx->CRH;
for (pinpos = 0x00; pinpos < 0x08; pinpos++)
{
pos = (((u32)0x01) << (pinpos + 0x08));
/* Get the port pins position */
currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
if (currentpin == pos)
{
pos = pinpos << 2;
/* Clear the corresponding high control register bits */
pinmask = ((u32)0x0F) << pos;
tmpreg &= ~pinmask;
/* Write the mode configuration in the corresponding bits */
tmpreg |= (currentmode << pos);
/* Reset the corresponding ODR bit */
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
{
GPIOx->BRR = (((u32)0x01) << (pinpos + 0x08));
}
/* Set the corresponding ODR bit */
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
{
GPIOx->BSRR = (((u32)0x01) << (pinpos + 0x08));
}
}
}
GPIOx->CRH = tmpreg;
}
}
/*******************************************************************************
* Function Name : GPIO_StructInit
* Description : Fills each GPIO_InitStruct member with its default value.
* Input : - GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure
* which will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
{
/* Reset GPIO init structure parameters values */
GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
}
/*******************************************************************************
* Function Name : GPIO_ReadInputDataBit
* Description : Reads the specified input port pin.
* Input : - GPIOx: where x can be (A..G) to select the GPIO peripheral.
* : - GPIO_Pin: specifies the port bit to read.
* This parameter can be GPIO_Pin_x where x can be (0..15).
* Output : None
* Return : The input port pin value.
*******************************************************************************/
u8 GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, u16 GPIO_Pin)
{
u8 bitstatus = 0x00;
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
if ((GPIOx->IDR & GPIO_Pin) != (u32)Bit_RESET)
{
bitstatus = (u8)Bit_SET;
}
else
{
bitstatus = (u8)Bit_RESET;
}
return bitstatus;
}
/*******************************************************************************
* Function Name : GPIO_ReadInputData
* Description : Reads the specified GPIO input data port.
* Input : - GPIOx: where x can be (A..G) to select the GPIO peripheral.
* Output : None
* Return : GPIO input data port value.
*******************************************************************************/
u16 GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
return ((u16)GPIOx->IDR);
}
/*******************************************************************************
* Function Name : GPIO_ReadOutputDataBit
* Description : Reads the specified output data port bit.
* Input : - GPIOx: where x can be (A..G) to select the GPIO peripheral.
* : - GPIO_Pin: specifies the port bit to read.
* This parameter can be GPIO_Pin_x where x can be (0..15).
* Output : None
* Return : The output port pin value.
*******************************************************************************/
u8 GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, u16 GPIO_Pin)
{
u8 bitstatus = 0x00;
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
if ((GPIOx->ODR & GPIO_Pin) != (u32)Bit_RESET)
{
bitstatus = (u8)Bit_SET;
}
else
{
bitstatus = (u8)Bit_RESET;
}
return bitstatus;
}
/*******************************************************************************
* Function Name : GPIO_ReadOutputData
* Description : Reads the specified GPIO output data port.
* Input : - GPIOx: where x can be (A..G) to select the GPIO peripheral.
* Output : None
* Return : GPIO output data port value.
*******************************************************************************/
u16 GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
return ((u16)GPIOx->ODR);
}
/*******************************************************************************
* Function Name : GPIO_SetBits
* Description : Sets the selected data port bits.
* Input : - GPIOx: where x can be (A..G) to select the GPIO peripheral.
* - GPIO_Pin: specifies the port bits to be written.
* This parameter can be any combination of GPIO_Pin_x where
* x can be (0..15).
* Output : None
* Return : None
*******************************************************************************/
void GPIO_SetBits(GPIO_TypeDef* GPIOx, u16 GPIO_Pin)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Pin));
GPIOx->BSRR = GPIO_Pin;
}
/*******************************************************************************
* Function Name : GPIO_ResetBits
* Description : Clears the selected data port bits.
* Input : - GPIOx: where x can be (A..G) to select the GPIO peripheral.
* - GPIO_Pin: specifies the port bits to be written.
* This parameter can be any combination of GPIO_Pin_x where
* x can be (0..15).
* Output : None
* Return : None
*******************************************************************************/
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, u16 GPIO_Pin)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Pin));
GPIOx->BRR = GPIO_Pin;
}
/*******************************************************************************
* Function Name : GPIO_WriteBit
* Description : Sets or clears the selected data port bit.
* Input : - GPIOx: where x can be (A..G) to select the GPIO peripheral.
* - GPIO_Pin: specifies the port bit to be written.
* This parameter can be one of GPIO_Pin_x where x can be (0..15).
* - BitVal: specifies the value to be written to the selected bit.
* This parameter can be one of the BitAction enum values:
* - Bit_RESET: to clear the port pin
* - Bit_SET: to set the port pin
* Output : None
* Return : None
*******************************************************************************/
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, u16 GPIO_Pin, BitAction BitVal)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_BIT_ACTION(BitVal));
if (BitVal != Bit_RESET)
{
GPIOx->BSRR = GPIO_Pin;
}
else
{
GPIOx->BRR = GPIO_Pin;
}
}
/*******************************************************************************
* Function Name : GPIO_Write
* Description : Writes data to the specified GPIO data port.
* Input : - GPIOx: where x can be (A..G) to select the GPIO peripheral.
* - PortVal: specifies the value to be written to the port output
* data register.
* Output : None
* Return : None
*******************************************************************************/
void GPIO_Write(GPIO_TypeDef* GPIOx, u16 PortVal)
{
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
GPIOx->ODR = PortVal;
}
/*******************************************************************************
* Function Name : GPIO_PinLockConfig
* Description : Locks GPIO Pins configuration registers.
* Input : - GPIOx: where x can be (A..G) to select the GPIO peripheral.
* - GPIO_Pin: specifies the port bit to be written.
* This parameter can be any combination of GPIO_Pin_x where
* x can be (0..15).
* Output : None
* Return : None
*******************************************************************************/
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, u16 GPIO_Pin)
{
u32 tmp = 0x00010000;
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Pin));
tmp |= GPIO_Pin;
/* Set LCKK bit */
GPIOx->LCKR = tmp;
/* Reset LCKK bit */
GPIOx->LCKR = GPIO_Pin;
/* Set LCKK bit */
GPIOx->LCKR = tmp;
/* Read LCKK bit*/
tmp = GPIOx->LCKR;
/* Read LCKK bit*/
tmp = GPIOx->LCKR;
}
/*******************************************************************************
* Function Name : GPIO_EventOutputConfig
* Description : Selects the GPIO pin used as Event output.
* Input : - GPIO_PortSource: selects the GPIO port to be used as source
* for Event output.
* This parameter can be GPIO_PortSourceGPIOx where x can be
* (A..E).
* - GPIO_PinSource: specifies the pin for the Event output.
* This parameter can be GPIO_PinSourcex where x can be (0..15).
* Output : None
* Return : None
*******************************************************************************/
void GPIO_EventOutputConfig(u8 GPIO_PortSource, u8 GPIO_PinSource)
{
u32 tmpreg = 0x00;
/* Check the parameters */
assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
tmpreg = AFIO->EVCR;
/* Clear the PORT[6:4] and PIN[3:0] bits */
tmpreg &= EVCR_PORTPINCONFIG_MASK;
tmpreg |= (u32)GPIO_PortSource << 0x04;
tmpreg |= GPIO_PinSource;
AFIO->EVCR = tmpreg;
}
/*******************************************************************************
* Function Name : GPIO_EventOutputCmd
* Description : Enables or disables the Event Output.
* Input : - NewState: new state of the Event output.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void GPIO_EventOutputCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) EVCR_EVOE_BB = (u32)NewState;
}
/*******************************************************************************
* Function Name : GPIO_PinRemapConfig
* Description : Changes the mapping of the specified pin.
* Input : - GPIO_Remap: selects the pin to remap.
* This parameter can be one of the following values:
* - GPIO_Remap_SPI1
* - GPIO_Remap_I2C1
* - GPIO_Remap_USART1
* - GPIO_Remap_USART2
* - GPIO_PartialRemap_USART3
* - GPIO_FullRemap_USART3
* - GPIO_PartialRemap_TIM1
* - GPIO_FullRemap_TIM1
* - GPIO_PartialRemap1_TIM2
* - GPIO_PartialRemap2_TIM2
* - GPIO_FullRemap_TIM2
* - GPIO_PartialRemap_TIM3
* - GPIO_FullRemap_TIM3
* - GPIO_Remap_TIM4
* - GPIO_Remap1_CAN
* - GPIO_Remap2_CAN
* - GPIO_Remap_PD01
* - GPIO_Remap_TIM5CH4_LSI
* - GPIO_Remap_ADC1_ETRGINJ
* - GPIO_Remap_ADC1_ETRGREG
* - GPIO_Remap_ADC2_ETRGINJ
* - GPIO_Remap_ADC2_ETRGREG
* - GPIO_Remap_SWJ_NoJTRST
* - GPIO_Remap_SWJ_JTAGDisable
* - GPIO_Remap_SWJ_Disable
* - NewState: new state of the port pin remapping.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void GPIO_PinRemapConfig(u32 GPIO_Remap, FunctionalState NewState)
{
u32 tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
/* Check the parameters */
assert_param(IS_GPIO_REMAP(GPIO_Remap));
assert_param(IS_FUNCTIONAL_STATE(NewState));
tmpreg = AFIO->MAPR;
tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
tmp = GPIO_Remap & LSB_MASK;
if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
{
tmpreg &= DBGAFR_SWJCFG_MASK;
AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
}
else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
{
tmp1 = ((u32)0x03) << tmpmask;
tmpreg &= ~tmp1;
tmpreg |= ~DBGAFR_SWJCFG_MASK;
}
else
{
tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
tmpreg |= ~DBGAFR_SWJCFG_MASK;
}
if (NewState != DISABLE)
{
tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10));
}
AFIO->MAPR = tmpreg;
}
/*******************************************************************************
* Function Name : GPIO_EXTILineConfig
* Description : Selects the GPIO pin used as EXTI Line.
* Input : - GPIO_PortSource: selects the GPIO port to be used as
* source for EXTI lines.
* This parameter can be GPIO_PortSourceGPIOx where x can be
* (A..G).
* - GPIO_PinSource: specifies the EXTI line to be configured.
* This parameter can be GPIO_PinSourcex where x can be (0..15).
* Output : None
* Return : None
*******************************************************************************/
void GPIO_EXTILineConfig(u8 GPIO_PortSource, u8 GPIO_PinSource)
{
u32 tmp = 0x00;
/* Check the parameters */
assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
tmp = ((u32)0x0F) << (0x04 * (GPIO_PinSource & (u8)0x03));
AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((u32)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (u8)0x03)));
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_iwdg.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the IWDG firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_iwdg.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* ---------------------- IWDG registers bit mask ------------------------ */
/* KR register bit mask */
#define KR_KEY_Reload ((u16)0xAAAA)
#define KR_KEY_Enable ((u16)0xCCCC)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : IWDG_WriteAccessCmd
* Description : Enables or disables write access to IWDG_PR and IWDG_RLR
* registers.
* Input : - IWDG_WriteAccess: new state of write access to IWDG_PR and
* IWDG_RLR registers.
* This parameter can be one of the following values:
* - IWDG_WriteAccess_Enable: Enable write access to
* IWDG_PR and IWDG_RLR registers
* - IWDG_WriteAccess_Disable: Disable write access to
* IWDG_PR and IWDG_RLR registers
* Output : None
* Return : None
*******************************************************************************/
void IWDG_WriteAccessCmd(u16 IWDG_WriteAccess)
{
/* Check the parameters */
assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
IWDG->KR = IWDG_WriteAccess;
}
/*******************************************************************************
* Function Name : IWDG_SetPrescaler
* Description : Sets IWDG Prescaler value.
* Input : - IWDG_Prescaler: specifies the IWDG Prescaler value.
* This parameter can be one of the following values:
* - IWDG_Prescaler_4: IWDG prescaler set to 4
* - IWDG_Prescaler_8: IWDG prescaler set to 8
* - IWDG_Prescaler_16: IWDG prescaler set to 16
* - IWDG_Prescaler_32: IWDG prescaler set to 32
* - IWDG_Prescaler_64: IWDG prescaler set to 64
* - IWDG_Prescaler_128: IWDG prescaler set to 128
* - IWDG_Prescaler_256: IWDG prescaler set to 256
* Output : None
* Return : None
*******************************************************************************/
void IWDG_SetPrescaler(u8 IWDG_Prescaler)
{
/* Check the parameters */
assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
IWDG->PR = IWDG_Prescaler;
}
/*******************************************************************************
* Function Name : IWDG_SetReload
* Description : Sets IWDG Reload value.
* Input : - Reload: specifies the IWDG Reload value.
* This parameter must be a number between 0 and 0x0FFF.
* Output : None
* Return : None
*******************************************************************************/
void IWDG_SetReload(u16 Reload)
{
/* Check the parameters */
assert_param(IS_IWDG_RELOAD(Reload));
IWDG->RLR = Reload;
}
/*******************************************************************************
* Function Name : IWDG_ReloadCounter
* Description : Reloads IWDG counter with value defined in the reload register
* (write access to IWDG_PR and IWDG_RLR registers disabled).
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void IWDG_ReloadCounter(void)
{
IWDG->KR = KR_KEY_Reload;
}
/*******************************************************************************
* Function Name : IWDG_Enable
* Description : Enables IWDG (write access to IWDG_PR and IWDG_RLR registers
* disabled).
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void IWDG_Enable(void)
{
IWDG->KR = KR_KEY_Enable;
}
/*******************************************************************************
* Function Name : IWDG_GetFlagStatus
* Description : Checks whether the specified IWDG flag is set or not.
* Input : - IWDG_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* - IWDG_FLAG_PVU: Prescaler Value Update on going
* - IWDG_FLAG_RVU: Reload Value Update on going
* Output : None
* Return : The new state of IWDG_FLAG (SET or RESET).
*******************************************************************************/
FlagStatus IWDG_GetFlagStatus(u16 IWDG_FLAG)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_IWDG_FLAG(IWDG_FLAG));
if ((IWDG->SR & IWDG_FLAG) != (u32)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
/* Return the flag status */
return bitstatus;
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_lib.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all peripherals pointers initialization.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
#define EXT
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_lib.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
#ifdef DEBUG
/*******************************************************************************
* Function Name : debug
* Description : This function initialize peripherals pointers.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void debug(void)
{
/************************************* ADC ************************************/
#ifdef _ADC1
ADC1 = (ADC_TypeDef *) ADC1_BASE;
#endif /*_ADC1 */
#ifdef _ADC2
ADC2 = (ADC_TypeDef *) ADC2_BASE;
#endif /*_ADC2 */
#ifdef _ADC3
ADC3 = (ADC_TypeDef *) ADC3_BASE;
#endif /*_ADC3 */
/************************************* BKP ************************************/
#ifdef _BKP
BKP = (BKP_TypeDef *) BKP_BASE;
#endif /*_BKP */
/************************************* CAN ************************************/
#ifdef _CAN
CAN = (CAN_TypeDef *) CAN_BASE;
#endif /*_CAN */
/************************************* CRC ************************************/
#ifdef _CRC
CRC = (CRC_TypeDef *) CRC_BASE;
#endif /*_CRC */
/************************************* DAC ************************************/
#ifdef _DAC
DAC = (DAC_TypeDef *) DAC_BASE;
#endif /*_DAC */
/************************************* DBGMCU**********************************/
#ifdef _DBGMCU
DBGMCU = (DBGMCU_TypeDef *) DBGMCU_BASE;
#endif /*_DBGMCU */
/************************************* DMA ************************************/
#ifdef _DMA
DMA1 = (DMA_TypeDef *) DMA1_BASE;
DMA2 = (DMA_TypeDef *) DMA2_BASE;
#endif /*_DMA */
#ifdef _DMA1_Channel1
DMA1_Channel1 = (DMA_Channel_TypeDef *) DMA1_Channel1_BASE;
#endif /*_DMA1_Channel1 */
#ifdef _DMA1_Channel2
DMA1_Channel2 = (DMA_Channel_TypeDef *) DMA1_Channel2_BASE;
#endif /*_DMA1_Channel2 */
#ifdef _DMA1_Channel3
DMA1_Channel3 = (DMA_Channel_TypeDef *) DMA1_Channel3_BASE;
#endif /*_DMA1_Channel3 */
#ifdef _DMA1_Channel4
DMA1_Channel4 = (DMA_Channel_TypeDef *) DMA1_Channel4_BASE;
#endif /*_DMA1_Channel4 */
#ifdef _DMA1_Channel5
DMA1_Channel5 = (DMA_Channel_TypeDef *) DMA1_Channel5_BASE;
#endif /*_DMA1_Channel5 */
#ifdef _DMA1_Channel6
DMA1_Channel6 = (DMA_Channel_TypeDef *) DMA1_Channel6_BASE;
#endif /*_DMA1_Channel6 */
#ifdef _DMA1_Channel7
DMA1_Channel7 = (DMA_Channel_TypeDef *) DMA1_Channel7_BASE;
#endif /*_DMA1_Channel7 */
#ifdef _DMA2_Channel1
DMA2_Channel1 = (DMA_Channel_TypeDef *) DMA2_Channel1_BASE;
#endif /*_DMA2_Channel1 */
#ifdef _DMA2_Channel2
DMA2_Channel2 = (DMA_Channel_TypeDef *) DMA2_Channel2_BASE;
#endif /*_DMA2_Channel2 */
#ifdef _DMA2_Channel3
DMA2_Channel3 = (DMA_Channel_TypeDef *) DMA2_Channel3_BASE;
#endif /*_DMA2_Channel3 */
#ifdef _DMA2_Channel4
DMA2_Channel4 = (DMA_Channel_TypeDef *) DMA2_Channel4_BASE;
#endif /*_DMA2_Channel4 */
#ifdef _DMA2_Channel5
DMA2_Channel5 = (DMA_Channel_TypeDef *) DMA2_Channel5_BASE;
#endif /*_DMA2_Channel5 */
/************************************* EXTI ***********************************/
#ifdef _EXTI
EXTI = (EXTI_TypeDef *) EXTI_BASE;
#endif /*_EXTI */
/************************************* FLASH and Option Bytes *****************/
#ifdef _FLASH
FLASH = (FLASH_TypeDef *) FLASH_R_BASE;
OB = (OB_TypeDef *) OB_BASE;
#endif /*_FLASH */
/************************************* FSMC ***********************************/
#ifdef _FSMC
FSMC_Bank1 = (FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE;
FSMC_Bank1E = (FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE;
FSMC_Bank2 = (FSMC_Bank2_TypeDef *) FSMC_Bank2_R_BASE;
FSMC_Bank3 = (FSMC_Bank3_TypeDef *) FSMC_Bank3_R_BASE;
FSMC_Bank4 = (FSMC_Bank4_TypeDef *) FSMC_Bank4_R_BASE;
#endif /*_FSMC */
/************************************* GPIO ***********************************/
#ifdef _GPIOA
GPIOA = (GPIO_TypeDef *) GPIOA_BASE;
#endif /*_GPIOA */
#ifdef _GPIOB
GPIOB = (GPIO_TypeDef *) GPIOB_BASE;
#endif /*_GPIOB */
#ifdef _GPIOC
GPIOC = (GPIO_TypeDef *) GPIOC_BASE;
#endif /*_GPIOC */
#ifdef _GPIOD
GPIOD = (GPIO_TypeDef *) GPIOD_BASE;
#endif /*_GPIOD */
#ifdef _GPIOE
GPIOE = (GPIO_TypeDef *) GPIOE_BASE;
#endif /*_GPIOE */
#ifdef _GPIOF
GPIOF = (GPIO_TypeDef *) GPIOF_BASE;
#endif /*_GPIOF */
#ifdef _GPIOG
GPIOG = (GPIO_TypeDef *) GPIOG_BASE;
#endif /*_GPIOG */
#ifdef _AFIO
AFIO = (AFIO_TypeDef *) AFIO_BASE;
#endif /*_AFIO */
/************************************* I2C ************************************/
#ifdef _I2C1
I2C1 = (I2C_TypeDef *) I2C1_BASE;
#endif /*_I2C1 */
#ifdef _I2C2
I2C2 = (I2C_TypeDef *) I2C2_BASE;
#endif /*_I2C2 */
/************************************* IWDG ***********************************/
#ifdef _IWDG
IWDG = (IWDG_TypeDef *) IWDG_BASE;
#endif /*_IWDG */
/************************************* NVIC ***********************************/
#ifdef _NVIC
NVIC = (NVIC_TypeDef *) NVIC_BASE;
SCB = (SCB_TypeDef *) SCB_BASE;
#endif /*_NVIC */
/************************************* PWR ************************************/
#ifdef _PWR
PWR = (PWR_TypeDef *) PWR_BASE;
#endif /*_PWR */
/************************************* RCC ************************************/
#ifdef _RCC
RCC = (RCC_TypeDef *) RCC_BASE;
#endif /*_RCC */
/************************************* RTC ************************************/
#ifdef _RTC
RTC = (RTC_TypeDef *) RTC_BASE;
#endif /*_RTC */
/************************************* SDIO ***********************************/
#ifdef _SDIO
SDIO = (SDIO_TypeDef *) SDIO_BASE;
#endif /*_SDIO */
/************************************* SPI ************************************/
#ifdef _SPI1
SPI1 = (SPI_TypeDef *) SPI1_BASE;
#endif /*_SPI1 */
#ifdef _SPI2
SPI2 = (SPI_TypeDef *) SPI2_BASE;
#endif /*_SPI2 */
#ifdef _SPI3
SPI3 = (SPI_TypeDef *) SPI3_BASE;
#endif /*_SPI3 */
/************************************* SysTick ********************************/
#ifdef _SysTick
SysTick = (SysTick_TypeDef *) SysTick_BASE;
#endif /*_SysTick */
/************************************* TIM ************************************/
#ifdef _TIM1
TIM1 = (TIM_TypeDef *) TIM1_BASE;
#endif /*_TIM1 */
#ifdef _TIM2
TIM2 = (TIM_TypeDef *) TIM2_BASE;
#endif /*_TIM2 */
#ifdef _TIM3
TIM3 = (TIM_TypeDef *) TIM3_BASE;
#endif /*_TIM3 */
#ifdef _TIM4
TIM4 = (TIM_TypeDef *) TIM4_BASE;
#endif /*_TIM4 */
#ifdef _TIM5
TIM5 = (TIM_TypeDef *) TIM5_BASE;
#endif /*_TIM5 */
#ifdef _TIM6
TIM6 = (TIM_TypeDef *) TIM6_BASE;
#endif /*_TIM6 */
#ifdef _TIM7
TIM7 = (TIM_TypeDef *) TIM7_BASE;
#endif /*_TIM7 */
#ifdef _TIM8
TIM8 = (TIM_TypeDef *) TIM8_BASE;
#endif /*_TIM8 */
/************************************* USART **********************************/
#ifdef _USART1
USART1 = (USART_TypeDef *) USART1_BASE;
#endif /*_USART1 */
#ifdef _USART2
USART2 = (USART_TypeDef *) USART2_BASE;
#endif /*_USART2 */
#ifdef _USART3
USART3 = (USART_TypeDef *) USART3_BASE;
#endif /*_USART3 */
#ifdef _UART4
UART4 = (USART_TypeDef *) UART4_BASE;
#endif /*_UART4 */
#ifdef _UART5
UART5 = (USART_TypeDef *) UART5_BASE;
#endif /*_UART5 */
/************************************* WWDG ***********************************/
#ifdef _WWDG
WWDG = (WWDG_TypeDef *) WWDG_BASE;
#endif /*_WWDG */
}
#endif /* DEBUG*/
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_nvic.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the NVIC firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_nvic.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
#define AIRCR_VECTKEY_MASK ((u32)0x05FA0000)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : NVIC_DeInit
* Description : Deinitializes the NVIC peripheral registers to their default
* reset values.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void NVIC_DeInit(void)
{
u32 index = 0;
NVIC->ICER[0] = 0xFFFFFFFF;
NVIC->ICER[1] = 0x0FFFFFFF;
NVIC->ICPR[0] = 0xFFFFFFFF;
NVIC->ICPR[1] = 0x0FFFFFFF;
for(index = 0; index < 0x0F; index++)
{
NVIC->IPR[index] = 0x00000000;
}
}
/*******************************************************************************
* Function Name : NVIC_SCBDeInit
* Description : Deinitializes the SCB peripheral registers to their default
* reset values.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void NVIC_SCBDeInit(void)
{
u32 index = 0x00;
SCB->ICSR = 0x0A000000;
SCB->VTOR = 0x00000000;
SCB->AIRCR = AIRCR_VECTKEY_MASK;
SCB->SCR = 0x00000000;
SCB->CCR = 0x00000000;
for(index = 0; index < 0x03; index++)
{
SCB->SHPR[index] = 0;
}
SCB->SHCSR = 0x00000000;
SCB->CFSR = 0xFFFFFFFF;
SCB->HFSR = 0xFFFFFFFF;
SCB->DFSR = 0xFFFFFFFF;
}
/*******************************************************************************
* Function Name : NVIC_PriorityGroupConfig
* Description : Configures the priority grouping: pre-emption priority
* and subpriority.
* Input : - NVIC_PriorityGroup: specifies the priority grouping bits
* length. This parameter can be one of the following values:
* - NVIC_PriorityGroup_0: 0 bits for pre-emption priority
* 4 bits for subpriority
* - NVIC_PriorityGroup_1: 1 bits for pre-emption priority
* 3 bits for subpriority
* - NVIC_PriorityGroup_2: 2 bits for pre-emption priority
* 2 bits for subpriority
* - NVIC_PriorityGroup_3: 3 bits for pre-emption priority
* 1 bits for subpriority
* - NVIC_PriorityGroup_4: 4 bits for pre-emption priority
* 0 bits for subpriority
* Output : None
* Return : None
*******************************************************************************/
void NVIC_PriorityGroupConfig(u32 NVIC_PriorityGroup)
{
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
}
/*******************************************************************************
* Function Name : NVIC_Init
* Description : Initializes the NVIC peripheral according to the specified
* parameters in the NVIC_InitStruct.
* Input : - NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure
* that contains the configuration information for the
* specified NVIC peripheral.
* Output : None
* Return : None
*******************************************************************************/
void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
{
u32 tmppriority = 0x00, tmpreg = 0x00, tmpmask = 0x00;
u32 tmppre = 0, tmpsub = 0x0F;
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
assert_param(IS_NVIC_IRQ_CHANNEL(NVIC_InitStruct->NVIC_IRQChannel));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
{
/* Compute the Corresponding IRQ Priority --------------------------------*/
tmppriority = (0x700 - (SCB->AIRCR & (u32)0x700))>> 0x08;
tmppre = (0x4 - tmppriority);
tmpsub = tmpsub >> tmppriority;
tmppriority = (u32)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
tmppriority = tmppriority << 0x04;
tmppriority = ((u32)tmppriority) << ((NVIC_InitStruct->NVIC_IRQChannel & (u8)0x03) * 0x08);
tmpreg = NVIC->IPR[(NVIC_InitStruct->NVIC_IRQChannel >> 0x02)];
tmpmask = (u32)0xFF << ((NVIC_InitStruct->NVIC_IRQChannel & (u8)0x03) * 0x08);
tmpreg &= ~tmpmask;
tmppriority &= tmpmask;
tmpreg |= tmppriority;
NVIC->IPR[(NVIC_InitStruct->NVIC_IRQChannel >> 0x02)] = tmpreg;
/* Enable the Selected IRQ Channels --------------------------------------*/
NVIC->ISER[(NVIC_InitStruct->NVIC_IRQChannel >> 0x05)] =
(u32)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (u8)0x1F);
}
else
{
/* Disable the Selected IRQ Channels -------------------------------------*/
NVIC->ICER[(NVIC_InitStruct->NVIC_IRQChannel >> 0x05)] =
(u32)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (u8)0x1F);
}
}
/*******************************************************************************
* Function Name : NVIC_StructInit
* Description : Fills each NVIC_InitStruct member with its default value.
* Input : - NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure which
* will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void NVIC_StructInit(NVIC_InitTypeDef* NVIC_InitStruct)
{
/* NVIC_InitStruct members default value */
NVIC_InitStruct->NVIC_IRQChannel = 0x00;
NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority = 0x00;
NVIC_InitStruct->NVIC_IRQChannelSubPriority = 0x00;
NVIC_InitStruct->NVIC_IRQChannelCmd = DISABLE;
}
/*******************************************************************************
* Function Name : NVIC_SETPRIMASK
* Description : Enables the PRIMASK priority: Raises the execution priority to 0.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void NVIC_SETPRIMASK(void)
{
__SETPRIMASK();
}
/*******************************************************************************
* Function Name : NVIC_RESETPRIMASK
* Description : Disables the PRIMASK priority.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void NVIC_RESETPRIMASK(void)
{
__RESETPRIMASK();
}
/*******************************************************************************
* Function Name : NVIC_SETFAULTMASK
* Description : Enables the FAULTMASK priority: Raises the execution priority to -1.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void NVIC_SETFAULTMASK(void)
{
__SETFAULTMASK();
}
/*******************************************************************************
* Function Name : NVIC_RESETFAULTMASK
* Description : Disables the FAULTMASK priority.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void NVIC_RESETFAULTMASK(void)
{
__RESETFAULTMASK();
}
/*******************************************************************************
* Function Name : NVIC_BASEPRICONFIG
* Description : The execution priority can be changed from 15 (lowest
configurable priority) to 1. Writing a zero value will disable
* the mask of execution priority.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void NVIC_BASEPRICONFIG(u32 NewPriority)
{
/* Check the parameters */
assert_param(IS_NVIC_BASE_PRI(NewPriority));
__BASEPRICONFIG(NewPriority << 0x04);
}
/*******************************************************************************
* Function Name : NVIC_GetBASEPRI
* Description : Returns the BASEPRI mask value.
* Input : None
* Output : None
* Return : BASEPRI register value
*******************************************************************************/
u32 NVIC_GetBASEPRI(void)
{
return (__GetBASEPRI());
}
/*******************************************************************************
* Function Name : NVIC_GetCurrentPendingIRQChannel
* Description : Returns the current pending IRQ channel identifier.
* Input : None
* Output : None
* Return : Pending IRQ Channel Identifier.
*******************************************************************************/
u16 NVIC_GetCurrentPendingIRQChannel(void)
{
return ((u16)((SCB->ICSR & (u32)0x003FF000) >> 0x0C));
}
/*******************************************************************************
* Function Name : NVIC_GetIRQChannelPendingBitStatus
* Description : Checks whether the specified IRQ Channel pending bit is set
* or not.
* Input : - NVIC_IRQChannel: specifies the interrupt pending bit to check.
* Output : None
* Return : The new state of IRQ Channel pending bit(SET or RESET).
*******************************************************************************/
ITStatus NVIC_GetIRQChannelPendingBitStatus(u8 NVIC_IRQChannel)
{
ITStatus pendingirqstatus = RESET;
u32 tmp = 0x00;
/* Check the parameters */
assert_param(IS_NVIC_IRQ_CHANNEL(NVIC_IRQChannel));
tmp = ((u32)0x01 << (NVIC_IRQChannel & (u32)0x1F));
if (((NVIC->ISPR[(NVIC_IRQChannel >> 0x05)]) & tmp) == tmp)
{
pendingirqstatus = SET;
}
else
{
pendingirqstatus = RESET;
}
return pendingirqstatus;
}
/*******************************************************************************
* Function Name : NVIC_SetIRQChannelPendingBit
* Description : Sets the NVIC’s interrupt pending bit.
* Input : - NVIC_IRQChannel: specifies the interrupt pending bit to Set.
* Output : None
* Return : None
*******************************************************************************/
void NVIC_SetIRQChannelPendingBit(u8 NVIC_IRQChannel)
{
/* Check the parameters */
assert_param(IS_NVIC_IRQ_CHANNEL(NVIC_IRQChannel));
*(vu32*) 0xE000EF00 = (u32)NVIC_IRQChannel;
}
/*******************************************************************************
* Function Name : NVIC_ClearIRQChannelPendingBit
* Description : Clears the NVIC’s interrupt pending bit.
* Input : - NVIC_IRQChannel: specifies the interrupt pending bit to clear.
* Output : None
* Return : None
*******************************************************************************/
void NVIC_ClearIRQChannelPendingBit(u8 NVIC_IRQChannel)
{
/* Check the parameters */
assert_param(IS_NVIC_IRQ_CHANNEL(NVIC_IRQChannel));
NVIC->ICPR[(NVIC_IRQChannel >> 0x05)] = (u32)0x01 << (NVIC_IRQChannel & (u32)0x1F);
}
/*******************************************************************************
* Function Name : NVIC_GetCurrentActiveHandler
* Description : Returns the current active Handler (IRQ Channel and
* SystemHandler) identifier.
* Input : None
* Output : None
* Return : Active Handler Identifier.
*******************************************************************************/
u16 NVIC_GetCurrentActiveHandler(void)
{
return ((u16)(SCB->ICSR & (u32)0x3FF));
}
/*******************************************************************************
* Function Name : NVIC_GetIRQChannelActiveBitStatus
* Description : Checks whether the specified IRQ Channel active bit is set
* or not.
* Input : - NVIC_IRQChannel: specifies the interrupt active bit to check.
* Output : None
* Return : The new state of IRQ Channel active bit(SET or RESET).
*******************************************************************************/
ITStatus NVIC_GetIRQChannelActiveBitStatus(u8 NVIC_IRQChannel)
{
ITStatus activeirqstatus = RESET;
u32 tmp = 0x00;
/* Check the parameters */
assert_param(IS_NVIC_IRQ_CHANNEL(NVIC_IRQChannel));
tmp = ((u32)0x01 << (NVIC_IRQChannel & (u32)0x1F));
if (((NVIC->IABR[(NVIC_IRQChannel >> 0x05)]) & tmp) == tmp )
{
activeirqstatus = SET;
}
else
{
activeirqstatus = RESET;
}
return activeirqstatus;
}
/*******************************************************************************
* Function Name : NVIC_GetCPUID
* Description : Returns the ID number, the version number and the implementation
* details of the Cortex-M3 core.
* Input : None
* Output : None
* Return : CPU ID.
*******************************************************************************/
u32 NVIC_GetCPUID(void)
{
return (SCB->CPUID);
}
/*******************************************************************************
* Function Name : NVIC_SetVectorTable
* Description : Sets the vector table location and Offset.
* Input : - NVIC_VectTab: specifies if the vector table is in RAM or
* FLASH memory.
* This parameter can be one of the following values:
* - NVIC_VectTab_RAM
* - NVIC_VectTab_FLASH
* - Offset: Vector Table base offset field.
* This value must be a multiple of 0x100.
* Output : None
* Return : None
*******************************************************************************/
void NVIC_SetVectorTable(u32 NVIC_VectTab, u32 Offset)
{
/* Check the parameters */
assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
assert_param(IS_NVIC_OFFSET(Offset));
SCB->VTOR = NVIC_VectTab | (Offset & (u32)0x1FFFFF80);
}
/*******************************************************************************
* Function Name : NVIC_GenerateSystemReset
* Description : Generates a system reset.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void NVIC_GenerateSystemReset(void)
{
SCB->AIRCR = AIRCR_VECTKEY_MASK | (u32)0x04;
}
/*******************************************************************************
* Function Name : NVIC_GenerateCoreReset
* Description : Generates a Core (Core + NVIC) reset.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void NVIC_GenerateCoreReset(void)
{
SCB->AIRCR = AIRCR_VECTKEY_MASK | (u32)0x01;
}
/*******************************************************************************
* Function Name : NVIC_SystemLPConfig
* Description : Selects the condition for the system to enter low power mode.
* Input : - LowPowerMode: Specifies the new mode for the system to enter
* low power mode.
* This parameter can be one of the following values:
* - NVIC_LP_SEVONPEND
* - NVIC_LP_SLEEPDEEP
* - NVIC_LP_SLEEPONEXIT
* - NewState: new state of LP condition.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void NVIC_SystemLPConfig(u8 LowPowerMode, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_NVIC_LP(LowPowerMode));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
SCB->SCR |= LowPowerMode;
}
else
{
SCB->SCR &= (u32)(~(u32)LowPowerMode);
}
}
/*******************************************************************************
* Function Name : NVIC_SystemHandlerConfig
* Description : Enables or disables the specified System Handlers.
* Input : - SystemHandler: specifies the system handler to be enabled
* or disabled.
* This parameter can be one of the following values:
* - SystemHandler_MemoryManage
* - SystemHandler_BusFault
* - SystemHandler_UsageFault
* - NewState: new state of specified System Handlers.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void NVIC_SystemHandlerConfig(u32 SystemHandler, FunctionalState NewState)
{
u32 tmpreg = 0x00;
/* Check the parameters */
assert_param(IS_CONFIG_SYSTEM_HANDLER(SystemHandler));
assert_param(IS_FUNCTIONAL_STATE(NewState));
tmpreg = (u32)0x01 << (SystemHandler & (u32)0x1F);
if (NewState != DISABLE)
{
SCB->SHCSR |= tmpreg;
}
else
{
SCB->SHCSR &= ~tmpreg;
}
}
/*******************************************************************************
* Function Name : NVIC_SystemHandlerPriorityConfig
* Description : Configures the specified System Handlers priority.
* Input : - SystemHandler: specifies the system handler to be
* enabled or disabled.
* This parameter can be one of the following values:
* - SystemHandler_MemoryManage
* - SystemHandler_BusFault
* - SystemHandler_UsageFault
* - SystemHandler_SVCall
* - SystemHandler_DebugMonitor
* - SystemHandler_PSV
* - SystemHandler_SysTick
* - SystemHandlerPreemptionPriority: new priority group of the
* specified system handlers.
* - SystemHandlerSubPriority: new sub priority of the specified
* system handlers.
* Output : None
* Return : None
*******************************************************************************/
void NVIC_SystemHandlerPriorityConfig(u32 SystemHandler, u8 SystemHandlerPreemptionPriority,
u8 SystemHandlerSubPriority)
{
u32 tmp1 = 0x00, tmp2 = 0xFF, handlermask = 0x00;
u32 tmppriority = 0x00;
/* Check the parameters */
assert_param(IS_PRIORITY_SYSTEM_HANDLER(SystemHandler));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(SystemHandlerPreemptionPriority));
assert_param(IS_NVIC_SUB_PRIORITY(SystemHandlerSubPriority));
tmppriority = (0x700 - (SCB->AIRCR & (u32)0x700))>> 0x08;
tmp1 = (0x4 - tmppriority);
tmp2 = tmp2 >> tmppriority;
tmppriority = (u32)SystemHandlerPreemptionPriority << tmp1;
tmppriority |= SystemHandlerSubPriority & tmp2;
tmppriority = tmppriority << 0x04;
tmp1 = SystemHandler & (u32)0xC0;
tmp1 = tmp1 >> 0x06;
tmp2 = (SystemHandler >> 0x08) & (u32)0x03;
tmppriority = tmppriority << (tmp2 * 0x08);
handlermask = (u32)0xFF << (tmp2 * 0x08);
SCB->SHPR[tmp1] &= ~handlermask;
SCB->SHPR[tmp1] |= tmppriority;
}
/*******************************************************************************
* Function Name : NVIC_GetSystemHandlerPendingBitStatus
* Description : Checks whether the specified System handlers pending bit is
* set or not.
* Input : - SystemHandler: specifies the system handler pending bit to
* check.
* This parameter can be one of the following values:
* - SystemHandler_MemoryManage
* - SystemHandler_BusFault
* - SystemHandler_SVCall
* Output : None
* Return : The new state of System Handler pending bit(SET or RESET).
*******************************************************************************/
ITStatus NVIC_GetSystemHandlerPendingBitStatus(u32 SystemHandler)
{
ITStatus bitstatus = RESET;
u32 tmp = 0x00, tmppos = 0x00;
/* Check the parameters */
assert_param(IS_GET_PENDING_SYSTEM_HANDLER(SystemHandler));
tmppos = (SystemHandler >> 0x0A);
tmppos &= (u32)0x0F;
tmppos = (u32)0x01 << tmppos;
tmp = SCB->SHCSR & tmppos;
if (tmp == tmppos)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*******************************************************************************
* Function Name : NVIC_SetSystemHandlerPendingBit
* Description : Sets System Handler pending bit.
* Input : - SystemHandler: specifies the system handler pending bit
* to be set.
* This parameter can be one of the following values:
* - SystemHandler_NMI
* - SystemHandler_PSV
* - SystemHandler_SysTick
* Output : None
* Return : None
*******************************************************************************/
void NVIC_SetSystemHandlerPendingBit(u32 SystemHandler)
{
u32 tmp = 0x00;
/* Check the parameters */
assert_param(IS_SET_PENDING_SYSTEM_HANDLER(SystemHandler));
/* Get the System Handler pending bit position */
tmp = SystemHandler & (u32)0x1F;
/* Set the corresponding System Handler pending bit */
SCB->ICSR |= ((u32)0x01 << tmp);
}
/*******************************************************************************
* Function Name : NVIC_ClearSystemHandlerPendingBit
* Description : Clears System Handler pending bit.
* Input : - SystemHandler: specifies the system handler pending bit to
* be clear.
* This parameter can be one of the following values:
* - SystemHandler_PSV
* - SystemHandler_SysTick
* Output : None
* Return : None
*******************************************************************************/
void NVIC_ClearSystemHandlerPendingBit(u32 SystemHandler)
{
u32 tmp = 0x00;
/* Check the parameters */
assert_param(IS_CLEAR_SYSTEM_HANDLER(SystemHandler));
/* Get the System Handler pending bit position */
tmp = SystemHandler & (u32)0x1F;
/* Clear the corresponding System Handler pending bit */
SCB->ICSR |= ((u32)0x01 << (tmp - 0x01));
}
/*******************************************************************************
* Function Name : NVIC_GetSystemHandlerActiveBitStatus
* Description : Checks whether the specified System handlers active bit is
* set or not.
* Input : - SystemHandler: specifies the system handler active bit to
* check.
* This parameter can be one of the following values:
* - SystemHandler_MemoryManage
* - SystemHandler_BusFault
* - SystemHandler_UsageFault
* - SystemHandler_SVCall
* - SystemHandler_DebugMonitor
* - SystemHandler_PSV
* - SystemHandler_SysTick
* Output : None
* Return : The new state of System Handler active bit(SET or RESET).
*******************************************************************************/
ITStatus NVIC_GetSystemHandlerActiveBitStatus(u32 SystemHandler)
{
ITStatus bitstatus = RESET;
u32 tmp = 0x00, tmppos = 0x00;
/* Check the parameters */
assert_param(IS_GET_ACTIVE_SYSTEM_HANDLER(SystemHandler));
tmppos = (SystemHandler >> 0x0E) & (u32)0x0F;
tmppos = (u32)0x01 << tmppos;
tmp = SCB->SHCSR & tmppos;
if (tmp == tmppos)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*******************************************************************************
* Function Name : NVIC_GetFaultHandlerSources
* Description : Returns the system fault handlers sources.
* Input : - SystemHandler: specifies the system handler to get its fault
* sources.
* This parameter can be one of the following values:
* - SystemHandler_HardFault
* - SystemHandler_MemoryManage
* - SystemHandler_BusFault
* - SystemHandler_UsageFault
* - SystemHandler_DebugMonitor
* Output : None
* Return : Source of the fault handler.
*******************************************************************************/
u32 NVIC_GetFaultHandlerSources(u32 SystemHandler)
{
u32 faultsources = 0x00;
u32 tmpreg = 0x00, tmppos = 0x00;
/* Check the parameters */
assert_param(IS_FAULT_SOURCE_SYSTEM_HANDLER(SystemHandler));
tmpreg = (SystemHandler >> 0x12) & (u32)0x03;
tmppos = (SystemHandler >> 0x14) & (u32)0x03;
if (tmpreg == 0x00)
{
faultsources = SCB->HFSR;
}
else if (tmpreg == 0x01)
{
faultsources = SCB->CFSR >> (tmppos * 0x08);
if (tmppos != 0x02)
{
faultsources &= (u32)0x0F;
}
else
{
faultsources &= (u32)0xFF;
}
}
else
{
faultsources = SCB->DFSR;
}
return faultsources;
}
/*******************************************************************************
* Function Name : NVIC_GetFaultAddress
* Description : Returns the address of the location that generated a fault
* handler.
* Input : - SystemHandler: specifies the system handler to get its
* fault address.
* This parameter can be one of the following values:
* - SystemHandler_MemoryManage
* - SystemHandler_BusFault
* Output : None
* Return : Fault address.
*******************************************************************************/
u32 NVIC_GetFaultAddress(u32 SystemHandler)
{
u32 faultaddress = 0x00;
u32 tmp = 0x00;
/* Check the parameters */
assert_param(IS_FAULT_ADDRESS_SYSTEM_HANDLER(SystemHandler));
tmp = (SystemHandler >> 0x16) & (u32)0x01;
if (tmp == 0x00)
{
faultaddress = SCB->MMFAR;
}
else
{
faultaddress = SCB->BFAR;
}
return faultaddress;
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_pwr.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the PWR firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_pwr.h"
#include "stm32f10x_rcc.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* --------- PWR registers bit address in the alias region ---------- */
#define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
/* --- CR Register ---*/
/* Alias word address of DBP bit */
#define CR_OFFSET (PWR_OFFSET + 0x00)
#define DBP_BitNumber 0x08
#define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
/* Alias word address of PVDE bit */
#define PVDE_BitNumber 0x04
#define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
/* --- CSR Register ---*/
/* Alias word address of EWUP bit */
#define CSR_OFFSET (PWR_OFFSET + 0x04)
#define EWUP_BitNumber 0x08
#define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))
/* ------------------ PWR registers bit mask ------------------------ */
/* CR register bit mask */
#define CR_PDDS_Set ((u32)0x00000002)
#define CR_DS_Mask ((u32)0xFFFFFFFC)
#define CR_CWUF_Set ((u32)0x00000004)
#define CR_PLS_Mask ((u32)0xFFFFFF1F)
/* --------- Cortex System Control register bit mask ---------------- */
/* Cortex System Control register address */
#define SCB_SysCtrl ((u32)0xE000ED10)
/* SLEEPDEEP bit mask */
#define SysCtrl_SLEEPDEEP_Set ((u32)0x00000004)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : PWR_DeInit
* Description : Deinitializes the PWR peripheral registers to their default
* reset values.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void PWR_DeInit(void)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);
}
/*******************************************************************************
* Function Name : PWR_BackupAccessCmd
* Description : Enables or disables access to the RTC and backup registers.
* Input : - NewState: new state of the access to the RTC and backup
* registers. This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void PWR_BackupAccessCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) CR_DBP_BB = (u32)NewState;
}
/*******************************************************************************
* Function Name : PWR_PVDCmd
* Description : Enables or disables the Power Voltage Detector(PVD).
* Input : - NewState: new state of the PVD.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void PWR_PVDCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) CR_PVDE_BB = (u32)NewState;
}
/*******************************************************************************
* Function Name : PWR_PVDLevelConfig
* Description : Configures the voltage threshold detected by the Power Voltage
* Detector(PVD).
* Input : - PWR_PVDLevel: specifies the PVD detection level
* This parameter can be one of the following values:
* - PWR_PVDLevel_2V2: PVD detection level set to 2.2V
* - PWR_PVDLevel_2V3: PVD detection level set to 2.3V
* - PWR_PVDLevel_2V4: PVD detection level set to 2.4V
* - PWR_PVDLevel_2V5: PVD detection level set to 2.5V
* - PWR_PVDLevel_2V6: PVD detection level set to 2.6V
* - PWR_PVDLevel_2V7: PVD detection level set to 2.7V
* - PWR_PVDLevel_2V8: PVD detection level set to 2.8V
* - PWR_PVDLevel_2V9: PVD detection level set to 2.9V
* Output : None
* Return : None
*******************************************************************************/
void PWR_PVDLevelConfig(u32 PWR_PVDLevel)
{
u32 tmpreg = 0;
/* Check the parameters */
assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel));
tmpreg = PWR->CR;
/* Clear PLS[7:5] bits */
tmpreg &= CR_PLS_Mask;
/* Set PLS[7:5] bits according to PWR_PVDLevel value */
tmpreg |= PWR_PVDLevel;
/* Store the new value */
PWR->CR = tmpreg;
}
/*******************************************************************************
* Function Name : PWR_WakeUpPinCmd
* Description : Enables or disables the WakeUp Pin functionality.
* Input : - NewState: new state of the WakeUp Pin functionality.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void PWR_WakeUpPinCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) CSR_EWUP_BB = (u32)NewState;
}
/*******************************************************************************
* Function Name : PWR_EnterSTOPMode
* Description : Enters STOP mode.
* Input : - PWR_Regulator: specifies the regulator state in STOP mode.
* This parameter can be one of the following values:
* - PWR_Regulator_ON: STOP mode with regulator ON
* - PWR_Regulator_LowPower: STOP mode with
* regulator in low power mode
* - PWR_STOPEntry: specifies if STOP mode in entered with WFI or
* WFE instruction.
* This parameter can be one of the following values:
* - PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
* - PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
* Output : None
* Return : None
*******************************************************************************/
void PWR_EnterSTOPMode(u32 PWR_Regulator, u8 PWR_STOPEntry)
{
u32 tmpreg = 0;
/* Check the parameters */
assert_param(IS_PWR_REGULATOR(PWR_Regulator));
assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
/* Select the regulator state in STOP mode ---------------------------------*/
tmpreg = PWR->CR;
/* Clear PDDS and LPDS bits */
tmpreg &= CR_DS_Mask;
/* Set LPDS bit according to PWR_Regulator value */
tmpreg |= PWR_Regulator;
/* Store the new value */
PWR->CR = tmpreg;
/* Set SLEEPDEEP bit of Cortex System Control Register */
*(vu32 *) SCB_SysCtrl |= SysCtrl_SLEEPDEEP_Set;
/* Select STOP mode entry --------------------------------------------------*/
if(PWR_STOPEntry == PWR_STOPEntry_WFI)
{
/* Request Wait For Interrupt */
__WFI();
}
else
{
/* Request Wait For Event */
__WFE();
}
}
/*******************************************************************************
* Function Name : PWR_EnterSTANDBYMode
* Description : Enters STANDBY mode.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void PWR_EnterSTANDBYMode(void)
{
/* Clear Wake-up flag */
PWR->CR |= CR_CWUF_Set;
/* Select STANDBY mode */
PWR->CR |= CR_PDDS_Set;
/* Set SLEEPDEEP bit of Cortex System Control Register */
*(vu32 *) SCB_SysCtrl |= SysCtrl_SLEEPDEEP_Set;
/* Request Wait For Interrupt */
__WFI();
}
/*******************************************************************************
* Function Name : PWR_GetFlagStatus
* Description : Checks whether the specified PWR flag is set or not.
* Input : - PWR_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* - PWR_FLAG_WU: Wake Up flag
* - PWR_FLAG_SB: StandBy flag
* - PWR_FLAG_PVDO: PVD Output
* Output : None
* Return : The new state of PWR_FLAG (SET or RESET).
*******************************************************************************/
FlagStatus PWR_GetFlagStatus(u32 PWR_FLAG)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_PWR_GET_FLAG(PWR_FLAG));
if ((PWR->CSR & PWR_FLAG) != (u32)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
/* Return the flag status */
return bitstatus;
}
/*******************************************************************************
* Function Name : PWR_ClearFlag
* Description : Clears the PWR's pending flags.
* Input : - PWR_FLAG: specifies the flag to clear.
* This parameter can be one of the following values:
* - PWR_FLAG_WU: Wake Up flag
* - PWR_FLAG_SB: StandBy flag
* Output : None
* Return : None
*******************************************************************************/
void PWR_ClearFlag(u32 PWR_FLAG)
{
/* Check the parameters */
assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG));
PWR->CR |= PWR_FLAG << 2;
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_rtc.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the RTC firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_rtc.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
#define CRL_CNF_Set ((u16)0x0010) /* Configuration Flag Enable Mask */
#define CRL_CNF_Reset ((u16)0xFFEF) /* Configuration Flag Disable Mask */
#define RTC_LSB_Mask ((u32)0x0000FFFF) /* RTC LSB Mask */
#define PRLH_MSB_Mask ((u32)0x000F0000) /* RTC Prescaler MSB Mask */
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : RTC_ITConfig
* Description : Enables or disables the specified RTC interrupts.
* Input : - RTC_IT: specifies the RTC interrupts sources to be enabled
* or disabled.
* This parameter can be any combination of the following values:
* - RTC_IT_OW: Overflow interrupt
* - RTC_IT_ALR: Alarm interrupt
* - RTC_IT_SEC: Second interrupt
* - NewState: new state of the specified RTC interrupts.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void RTC_ITConfig(u16 RTC_IT, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_RTC_IT(RTC_IT));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
RTC->CRH |= RTC_IT;
}
else
{
RTC->CRH &= (u16)~RTC_IT;
}
}
/*******************************************************************************
* Function Name : RTC_EnterConfigMode
* Description : Enters the RTC configuration mode.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void RTC_EnterConfigMode(void)
{
/* Set the CNF flag to enter in the Configuration Mode */
RTC->CRL |= CRL_CNF_Set;
}
/*******************************************************************************
* Function Name : RTC_ExitConfigMode
* Description : Exits from the RTC configuration mode.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void RTC_ExitConfigMode(void)
{
/* Reset the CNF flag to exit from the Configuration Mode */
RTC->CRL &= CRL_CNF_Reset;
}
/*******************************************************************************
* Function Name : RTC_GetCounter
* Description : Gets the RTC counter value.
* Input : None
* Output : None
* Return : RTC counter value.
*******************************************************************************/
u32 RTC_GetCounter(void)
{
u16 tmp = 0;
tmp = RTC->CNTL;
return (((u32)RTC->CNTH << 16 ) | tmp) ;
}
/*******************************************************************************
* Function Name : RTC_SetCounter
* Description : Sets the RTC counter value.
* Input : - CounterValue: RTC counter new value.
* Output : None
* Return : None
*******************************************************************************/
void RTC_SetCounter(u32 CounterValue)
{
RTC_EnterConfigMode();
/* Set RTC COUNTER MSB word */
RTC->CNTH = CounterValue >> 16;
/* Set RTC COUNTER LSB word */
RTC->CNTL = (CounterValue & RTC_LSB_Mask);
RTC_ExitConfigMode();
}
/*******************************************************************************
* Function Name : RTC_SetPrescaler
* Description : Sets the RTC prescaler value.
* Input : - PrescalerValue: RTC prescaler new value.
* Output : None
* Return : None
*******************************************************************************/
void RTC_SetPrescaler(u32 PrescalerValue)
{
/* Check the parameters */
assert_param(IS_RTC_PRESCALER(PrescalerValue));
RTC_EnterConfigMode();
/* Set RTC PRESCALER MSB word */
RTC->PRLH = (PrescalerValue & PRLH_MSB_Mask) >> 16;
/* Set RTC PRESCALER LSB word */
RTC->PRLL = (PrescalerValue & RTC_LSB_Mask);
RTC_ExitConfigMode();
}
/*******************************************************************************
* Function Name : RTC_SetAlarm
* Description : Sets the RTC alarm value.
* Input : - AlarmValue: RTC alarm new value.
* Output : None
* Return : None
*******************************************************************************/
void RTC_SetAlarm(u32 AlarmValue)
{
RTC_EnterConfigMode();
/* Set the ALARM MSB word */
RTC->ALRH = AlarmValue >> 16;
/* Set the ALARM LSB word */
RTC->ALRL = (AlarmValue & RTC_LSB_Mask);
RTC_ExitConfigMode();
}
/*******************************************************************************
* Function Name : RTC_GetDivider
* Description : Gets the RTC divider value.
* Input : None
* Output : None
* Return : RTC Divider value.
*******************************************************************************/
u32 RTC_GetDivider(void)
{
u32 tmp = 0x00;
tmp = ((u32)RTC->DIVH & (u32)0x000F) << 16;
tmp |= RTC->DIVL;
return tmp;
}
/*******************************************************************************
* Function Name : RTC_WaitForLastTask
* Description : Waits until last write operation on RTC registers has finished.
* This function must be called before any write to RTC registers.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void RTC_WaitForLastTask(void)
{
/* Loop until RTOFF flag is set */
while ((RTC->CRL & RTC_FLAG_RTOFF) == (u16)RESET)
{
}
}
/*******************************************************************************
* Function Name : RTC_WaitForSynchro
* Description : Waits until the RTC registers (RTC_CNT, RTC_ALR and RTC_PRL)
* are synchronized with RTC APB clock.
* This function must be called before any read operation after
* an APB reset or an APB clock stop.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void RTC_WaitForSynchro(void)
{
/* Clear RSF flag */
RTC->CRL &= (u16)~RTC_FLAG_RSF;
/* Loop until RSF flag is set */
while ((RTC->CRL & RTC_FLAG_RSF) == (u16)RESET)
{
}
}
/*******************************************************************************
* Function Name : RTC_GetFlagStatus
* Description : Checks whether the specified RTC flag is set or not.
* Input : - RTC_FLAG: specifies the flag to check.
* This parameter can be one the following values:
* - RTC_FLAG_RTOFF: RTC Operation OFF flag
* - RTC_FLAG_RSF: Registers Synchronized flag
* - RTC_FLAG_OW: Overflow flag
* - RTC_FLAG_ALR: Alarm flag
* - RTC_FLAG_SEC: Second flag
* Output : None
* Return : The new state of RTC_FLAG (SET or RESET).
*******************************************************************************/
FlagStatus RTC_GetFlagStatus(u16 RTC_FLAG)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_RTC_GET_FLAG(RTC_FLAG));
if ((RTC->CRL & RTC_FLAG) != (u16)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*******************************************************************************
* Function Name : RTC_ClearFlag
* Description : Clears the RTC’s pending flags.
* Input : - RTC_FLAG: specifies the flag to clear.
* This parameter can be any combination of the following values:
* - RTC_FLAG_RSF: Registers Synchronized flag. This flag
* is cleared only after an APB reset or an APB Clock stop.
* - RTC_FLAG_OW: Overflow flag
* - RTC_FLAG_ALR: Alarm flag
* - RTC_FLAG_SEC: Second flag
* Output : None
* Return : None
*******************************************************************************/
void RTC_ClearFlag(u16 RTC_FLAG)
{
/* Check the parameters */
assert_param(IS_RTC_CLEAR_FLAG(RTC_FLAG));
/* Clear the coressponding RTC flag */
RTC->CRL &= (u16)~RTC_FLAG;
}
/*******************************************************************************
* Function Name : RTC_GetITStatus
* Description : Checks whether the specified RTC interrupt has occured or not.
* Input : - RTC_IT: specifies the RTC interrupts sources to check.
* This parameter can be one of the following values:
* - RTC_IT_OW: Overflow interrupt
* - RTC_IT_ALR: Alarm interrupt
* - RTC_IT_SEC: Second interrupt
* Output : None
* Return : The new state of the RTC_IT (SET or RESET).
*******************************************************************************/
ITStatus RTC_GetITStatus(u16 RTC_IT)
{
ITStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_RTC_GET_IT(RTC_IT));
bitstatus = (ITStatus)(RTC->CRL & RTC_IT);
if (((RTC->CRH & RTC_IT) != (u16)RESET) && (bitstatus != (u16)RESET))
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*******************************************************************************
* Function Name : RTC_ClearITPendingBit
* Description : Clears the RTC’s interrupt pending bits.
* Input : - RTC_IT: specifies the interrupt pending bit to clear.
* This parameter can be any combination of the following values:
* - RTC_IT_OW: Overflow interrupt
* - RTC_IT_ALR: Alarm interrupt
* - RTC_IT_SEC: Second interrupt
* Output : None
* Return : None
*******************************************************************************/
void RTC_ClearITPendingBit(u16 RTC_IT)
{
/* Check the parameters */
assert_param(IS_RTC_IT(RTC_IT));
/* Clear the coressponding RTC pending bit */
RTC->CRL &= (u16)~RTC_IT;
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_sdio.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the SDIO firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_sdio.h"
#include "stm32f10x_rcc.h"
/* Private typedef -----------------------------------------------------------*/
/* ------------ SDIO registers bit address in the alias region ----------- */
#define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
/* --- CLKCR Register ---*/
/* Alias word address of CLKEN bit */
#define CLKCR_OFFSET (SDIO_OFFSET + 0x04)
#define CLKEN_BitNumber 0x08
#define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32) + (CLKEN_BitNumber * 4))
/* --- CMD Register ---*/
/* Alias word address of SDIOSUSPEND bit */
#define CMD_OFFSET (SDIO_OFFSET + 0x0C)
#define SDIOSUSPEND_BitNumber 0x0B
#define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSUSPEND_BitNumber * 4))
/* Alias word address of ENCMDCOMPL bit */
#define ENCMDCOMPL_BitNumber 0x0C
#define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ENCMDCOMPL_BitNumber * 4))
/* Alias word address of NIEN bit */
#define NIEN_BitNumber 0x0D
#define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (NIEN_BitNumber * 4))
/* Alias word address of ATACMD bit */
#define ATACMD_BitNumber 0x0E
#define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BitNumber * 4))
/* --- DCTRL Register ---*/
/* Alias word address of DMAEN bit */
#define DCTRL_OFFSET (SDIO_OFFSET + 0x2C)
#define DMAEN_BitNumber 0x03
#define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BitNumber * 4))
/* Alias word address of RWSTART bit */
#define RWSTART_BitNumber 0x08
#define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BitNumber * 4))
/* Alias word address of RWSTOP bit */
#define RWSTOP_BitNumber 0x09
#define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BitNumber * 4))
/* Alias word address of RWMOD bit */
#define RWMOD_BitNumber 0x0A
#define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWMOD_BitNumber * 4))
/* Alias word address of SDIOEN bit */
#define SDIOEN_BitNumber 0x0B
#define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOEN_BitNumber * 4))
/* ---------------------- SDIO registers bit mask ------------------------ */
/* --- CLKCR Register ---*/
/* CLKCR register clear mask */
#define CLKCR_CLEAR_MASK ((u32)0xFFFF8100)
/* --- PWRCTRL Register ---*/
/* SDIO PWRCTRL Mask */
#define PWR_PWRCTRL_MASK ((u32)0xFFFFFFFC)
/* --- DCTRL Register ---*/
/* SDIO DCTRL Clear Mask */
#define DCTRL_CLEAR_MASK ((u32)0xFFFFFF08)
/* --- CMD Register ---*/
/* CMD Register clear mask */
#define CMD_CLEAR_MASK ((u32)0xFFFFF800)
/* SDIO RESP Registers Address */
#define SDIO_RESP_ADDR ((u32)(SDIO_BASE + 0x14))
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : SDIO_DeInit
* Description : Deinitializes the SDIO peripheral registers to their default
* reset values.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void SDIO_DeInit(void)
{
SDIO->POWER = 0x00000000;
SDIO->CLKCR = 0x00000000;
SDIO->ARG = 0x00000000;
SDIO->CMD = 0x00000000;
SDIO->DTIMER = 0x00000000;
SDIO->DLEN = 0x00000000;
SDIO->DCTRL = 0x00000000;
SDIO->ICR = 0x00C007FF;
SDIO->MASK = 0x00000000;
}
/*******************************************************************************
* Function Name : SDIO_Init
* Description : Initializes the SDIO peripheral according to the specified
* parameters in the SDIO_InitStruct.
* Input : SDIO_InitStruct : pointer to a SDIO_InitTypeDef structure
* that contains the configuration information for the SDIO
* peripheral.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct)
{
u32 tmpreg = 0;
/* Check the parameters */
assert_param(IS_SDIO_CLOCK_EDGE(SDIO_InitStruct->SDIO_ClockEdge));
assert_param(IS_SDIO_CLOCK_BYPASS(SDIO_InitStruct->SDIO_ClockBypass));
assert_param(IS_SDIO_CLOCK_POWER_SAVE(SDIO_InitStruct->SDIO_ClockPowerSave));
assert_param(IS_SDIO_BUS_WIDE(SDIO_InitStruct->SDIO_BusWide));
assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(SDIO_InitStruct->SDIO_HardwareFlowControl));
/*---------------------------- SDIO CLKCR Configuration ------------------------*/
/* Get the SDIO CLKCR value */
tmpreg = SDIO->CLKCR;
/* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */
tmpreg &= CLKCR_CLEAR_MASK;
/* Set CLKDIV bits according to SDIO_ClockDiv value */
/* Set PWRSAV bit according to SDIO_ClockPowerSave value */
/* Set BYPASS bit according to SDIO_ClockBypass value */
/* Set WIDBUS bits according to SDIO_BusWide value */
/* Set NEGEDGE bits according to SDIO_ClockEdge value */
/* Set HWFC_EN bits according to SDIO_HardwareFlowControl value */
tmpreg |= (SDIO_InitStruct->SDIO_ClockDiv | SDIO_InitStruct->SDIO_ClockPowerSave |
SDIO_InitStruct->SDIO_ClockBypass | SDIO_InitStruct->SDIO_BusWide |
SDIO_InitStruct->SDIO_ClockEdge | SDIO_InitStruct->SDIO_HardwareFlowControl);
/* Write to SDIO CLKCR */
SDIO->CLKCR = tmpreg;
}
/*******************************************************************************
* Function Name : SDIO_StructInit
* Description : Fills each SDIO_InitStruct member with its default value.
* Input : SDIO_InitStruct: pointer to an SDIO_InitTypeDef structure which
* will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct)
{
/* SDIO_InitStruct members default value */
SDIO_InitStruct->SDIO_ClockDiv = 0x00;
SDIO_InitStruct->SDIO_ClockEdge = SDIO_ClockEdge_Rising;
SDIO_InitStruct->SDIO_ClockBypass = SDIO_ClockBypass_Disable;
SDIO_InitStruct->SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable;
SDIO_InitStruct->SDIO_BusWide = SDIO_BusWide_1b;
SDIO_InitStruct->SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable;
}
/*******************************************************************************
* Function Name : SDIO_ClockCmd
* Description : Enables or disables the SDIO Clock.
* Input : NewState: new state of the SDIO Clock.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_ClockCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) CLKCR_CLKEN_BB = (u32)NewState;
}
/*******************************************************************************
* Function Name : SDIO_SetPowerState
* Description : Sets the power status of the controller.
* Input : SDIO_PowerState: new state of the Power state.
* This parameter can be one of the following values:
* - SDIO_PowerState_OFF
* - SDIO_PowerState_ON
* Output : None
* Return : None
*******************************************************************************/
void SDIO_SetPowerState(u32 SDIO_PowerState)
{
/* Check the parameters */
assert_param(IS_SDIO_POWER_STATE(SDIO_PowerState));
SDIO->POWER &= PWR_PWRCTRL_MASK;
SDIO->POWER |= SDIO_PowerState;
}
/*******************************************************************************
* Function Name : SDIO_GetPowerState
* Description : Gets the power status of the controller.
* Input : None
* Output : None
* Return : Power status of the controller. The returned value can
* be one of the following:
* - 0x00: Power OFF
* - 0x02: Power UP
* - 0x03: Power ON
*******************************************************************************/
u32 SDIO_GetPowerState(void)
{
return (SDIO->POWER & (~PWR_PWRCTRL_MASK));
}
/*******************************************************************************
* Function Name : SDIO_ITConfig
* Description : Enables or disables the SDIO interrupts.
* Input : - SDIO_IT: specifies the SDIO interrupt sources to be
* enabled or disabled.
* This parameter can be one or a combination of the following
* values:
* - SDIO_IT_CCRCFAIL: Command response received (CRC check
* failed) interrupt
* - SDIO_IT_DCRCFAIL: Data block sent/received (CRC check
* failed) interrupt
* - SDIO_IT_CTIMEOUT: Command response timeout interrupt
* - SDIO_IT_DTIMEOUT: Data timeout interrupt
* - SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
* - SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
* - SDIO_IT_CMDREND: Command response received (CRC check
* passed) interrupt
* - SDIO_IT_CMDSENT: Command sent (no response required)
* interrupt
* - SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is
* zero) interrupt
* - SDIO_IT_STBITERR: Start bit not detected on all data
* signals in wide bus mode interrupt
* - SDIO_IT_DBCKEND: Data block sent/received (CRC check
* passed) interrupt
* - SDIO_IT_CMDACT: Command transfer in progress interrupt
* - SDIO_IT_TXACT: Data transmit in progress interrupt
* - SDIO_IT_RXACT: Data receive in progress interrupt
* - SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
* - SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
* - SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
* - SDIO_IT_RXFIFOF: Receive FIFO full interrupt
* - SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
* - SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
* - SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
* - SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
* - SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
* - SDIO_IT_CEATAEND: CE-ATA command completion signal
* received for CMD61 interrupt
* - NewState: new state of the specified SDIO interrupts.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_ITConfig(u32 SDIO_IT, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_SDIO_IT(SDIO_IT));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the SDIO interrupts */
SDIO->MASK |= SDIO_IT;
}
else
{
/* Disable the SDIO interrupts */
SDIO->MASK &= ~SDIO_IT;
}
}
/*******************************************************************************
* Function Name : SDIO_DMACmd
* Description : Enables or disables the SDIO DMA request.
* Input : NewState: new state of the selected SDIO DMA request.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_DMACmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) DCTRL_DMAEN_BB = (u32)NewState;
}
/*******************************************************************************
* Function Name : SDIO_SendCommand
* Description : Initializes the SDIO Command according to the specified
* parameters in the SDIO_CmdInitStruct and send the command.
* Input : SDIO_CmdInitStruct : pointer to a SDIO_CmdInitTypeDef
* structure that contains the configuration information
* for the SDIO command.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct)
{
u32 tmpreg = 0;
/* Check the parameters */
assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->SDIO_CmdIndex));
assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->SDIO_Response));
assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->SDIO_Wait));
assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->SDIO_CPSM));
/*---------------------------- SDIO ARG Configuration ------------------------*/
/* Set the SDIO Argument value */
SDIO->ARG = SDIO_CmdInitStruct->SDIO_Argument;
/*---------------------------- SDIO CMD Configuration ------------------------*/
/* Get the SDIO CMD value */
tmpreg = SDIO->CMD;
/* Clear CMDINDEX, WAITRESP, WAITINT, WAITPEND, CPSMEN bits */
tmpreg &= CMD_CLEAR_MASK;
/* Set CMDINDEX bits according to SDIO_CmdIndex value */
/* Set WAITRESP bits according to SDIO_Response value */
/* Set WAITINT and WAITPEND bits according to SDIO_Wait value */
/* Set CPSMEN bits according to SDIO_CPSM value */
tmpreg |= (u32)SDIO_CmdInitStruct->SDIO_CmdIndex | SDIO_CmdInitStruct->SDIO_Response
| SDIO_CmdInitStruct->SDIO_Wait | SDIO_CmdInitStruct->SDIO_CPSM;
/* Write to SDIO CMD */
SDIO->CMD = tmpreg;
}
/*******************************************************************************
* Function Name : SDIO_CmdStructInit
* Description : Fills each SDIO_CmdInitStruct member with its default value.
* Input : SDIO_CmdInitStruct: pointer to an SDIO_CmdInitTypeDef
* structure which will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct)
{
/* SDIO_CmdInitStruct members default value */
SDIO_CmdInitStruct->SDIO_Argument = 0x00;
SDIO_CmdInitStruct->SDIO_CmdIndex = 0x00;
SDIO_CmdInitStruct->SDIO_Response = SDIO_Response_No;
SDIO_CmdInitStruct->SDIO_Wait = SDIO_Wait_No;
SDIO_CmdInitStruct->SDIO_CPSM = SDIO_CPSM_Disable;
}
/*******************************************************************************
* Function Name : SDIO_GetCommandResponse
* Description : Returns command index of last command for which response
* received.
* Input : None
* Output : None
* Return : Returns the command index of the last command response received.
*******************************************************************************/
u8 SDIO_GetCommandResponse(void)
{
return (u8)(SDIO->RESPCMD);
}
/*******************************************************************************
* Function Name : SDIO_GetResponse
* Description : Returns response received from the card for the last command.
* Input : - SDIO_RESP: Specifies the SDIO response register.
* This parameter can be one of the following values:
* - SDIO_RESP1: Response Register 1
* - SDIO_RESP2: Response Register 2
* - SDIO_RESP3: Response Register 3
* - SDIO_RESP4: Response Register 4
* Output : None
* Return : The Corresponding response register value.
*******************************************************************************/
u32 SDIO_GetResponse(u32 SDIO_RESP)
{
/* Check the parameters */
assert_param(IS_SDIO_RESP(SDIO_RESP));
return (*(vu32 *)(SDIO_RESP_ADDR + SDIO_RESP));
}
/*******************************************************************************
* Function Name : SDIO_DataConfig
* Description : Initializes the SDIO data path according to the specified
* parameters in the SDIO_DataInitStruct.
* Input : SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef
* structure that contains the configuration information
* for the SDIO command.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct)
{
u32 tmpreg = 0;
/* Check the parameters */
assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->SDIO_DataLength));
assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->SDIO_DataBlockSize));
assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->SDIO_TransferDir));
assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->SDIO_TransferMode));
assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->SDIO_DPSM));
/*---------------------------- SDIO DTIMER Configuration ---------------------*/
/* Set the SDIO Data TimeOut value */
SDIO->DTIMER = SDIO_DataInitStruct->SDIO_DataTimeOut;
/*---------------------------- SDIO DLEN Configuration -----------------------*/
/* Set the SDIO DataLength value */
SDIO->DLEN = SDIO_DataInitStruct->SDIO_DataLength;
/*---------------------------- SDIO DCTRL Configuration ----------------------*/
/* Get the SDIO DCTRL value */
tmpreg = SDIO->DCTRL;
/* Clear DEN, DTMODE, DTDIR and DBCKSIZE bits */
tmpreg &= DCTRL_CLEAR_MASK;
/* Set DEN bit according to SDIO_DPSM value */
/* Set DTMODE bit according to SDIO_TransferMode value */
/* Set DTDIR bit according to SDIO_TransferDir value */
/* Set DBCKSIZE bits according to SDIO_DataBlockSize value */
tmpreg |= (u32)SDIO_DataInitStruct->SDIO_DataBlockSize | SDIO_DataInitStruct->SDIO_TransferDir
| SDIO_DataInitStruct->SDIO_TransferMode | SDIO_DataInitStruct->SDIO_DPSM;
/* Write to SDIO DCTRL */
SDIO->DCTRL = tmpreg;
}
/*******************************************************************************
* Function Name : SDIO_DataStructInit
* Description : Fills each SDIO_DataInitStruct member with its default value.
* Input : SDIO_DataInitStruct: pointer to an SDIO_DataInitTypeDef
* structure which will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct)
{
/* SDIO_DataInitStruct members default value */
SDIO_DataInitStruct->SDIO_DataTimeOut = 0xFFFFFFFF;
SDIO_DataInitStruct->SDIO_DataLength = 0x00;
SDIO_DataInitStruct->SDIO_DataBlockSize = SDIO_DataBlockSize_1b;
SDIO_DataInitStruct->SDIO_TransferDir = SDIO_TransferDir_ToCard;
SDIO_DataInitStruct->SDIO_TransferMode = SDIO_TransferMode_Block;
SDIO_DataInitStruct->SDIO_DPSM = SDIO_DPSM_Disable;
}
/*******************************************************************************
* Function Name : SDIO_GetDataCounter
* Description : Returns number of remaining data bytes to be transferred.
* Input : None
* Output : None
* Return : Number of remaining data bytes to be transferred
*******************************************************************************/
u32 SDIO_GetDataCounter(void)
{
return SDIO->DCOUNT;
}
/*******************************************************************************
* Function Name : SDIO_ReadData
* Description : Read one data word from Rx FIFO.
* Input : None
* Output : None
* Return : Data received
*******************************************************************************/
u32 SDIO_ReadData(void)
{
return SDIO->FIFO;
}
/*******************************************************************************
* Function Name : SDIO_WriteData
* Description : Write one data word to Tx FIFO.
* Input : Data: 32-bit data word to write.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_WriteData(u32 Data)
{
SDIO->FIFO = Data;
}
/*******************************************************************************
* Function Name : SDIO_GetFIFOCount
* Description : Returns the number of words left to be written to or read
* from FIFO.
* Input : None
* Output : None
* Return : Remaining number of words.
*******************************************************************************/
u32 SDIO_GetFIFOCount(void)
{
return SDIO->FIFOCNT;
}
/*******************************************************************************
* Function Name : SDIO_StartSDIOReadWait
* Description : Starts the SD I/O Read Wait operation.
* Input : NewState: new state of the Start SDIO Read Wait operation.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_StartSDIOReadWait(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) DCTRL_RWSTART_BB = (u32) NewState;
}
/*******************************************************************************
* Function Name : SDIO_StopSDIOReadWait
* Description : Stops the SD I/O Read Wait operation.
* Input : NewState: new state of the Stop SDIO Read Wait operation.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_StopSDIOReadWait(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) DCTRL_RWSTOP_BB = (u32) NewState;
}
/*******************************************************************************
* Function Name : SDIO_SetSDIOReadWaitMode
* Description : Sets one of the two options of inserting read wait interval.
* Input : SDIOReadWaitMode: SD I/O Read Wait operation mode.
* This parametre can be:
* - SDIO_ReadWaitMode_CLK: Read Wait control by stopping SDIOCLK
* - SDIO_ReadWaitMode_DATA2: Read Wait control using SDIO_DATA2
* Output : None
* Return : None
*******************************************************************************/
void SDIO_SetSDIOReadWaitMode(u32 SDIO_ReadWaitMode)
{
/* Check the parameters */
assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
*(vu32 *) DCTRL_RWMOD_BB = SDIO_ReadWaitMode;
}
/*******************************************************************************
* Function Name : SDIO_SetSDIOOperation
* Description : Enables or disables the SD I/O Mode Operation.
* Input : NewState: new state of SDIO specific operation.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_SetSDIOOperation(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) DCTRL_SDIOEN_BB = (u32)NewState;
}
/*******************************************************************************
* Function Name : SDIO_SendSDIOSuspendCmd
* Description : Enables or disables the SD I/O Mode suspend command sending.
* Input : NewState: new state of the SD I/O Mode suspend command.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_SendSDIOSuspendCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) CMD_SDIOSUSPEND_BB = (u32)NewState;
}
/*******************************************************************************
* Function Name : SDIO_CommandCompletionCmd
* Description : Enables or disables the command completion signal.
* Input : NewState: new state of command completion signal.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_CommandCompletionCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) CMD_ENCMDCOMPL_BB = (u32)NewState;
}
/*******************************************************************************
* Function Name : SDIO_CEATAITCmd
* Description : Enables or disables the CE-ATA interrupt.
* Input : NewState: new state of CE-ATA interrupt.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_CEATAITCmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) CMD_NIEN_BB = (u32)((~((u32)NewState)) & ((u32)0x1));
}
/*******************************************************************************
* Function Name : SDIO_SendCEATACmd
* Description : Sends CE-ATA command (CMD61).
* Input : NewState: new state of CE-ATA command.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SDIO_SendCEATACmd(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
*(vu32 *) CMD_ATACMD_BB = (u32)NewState;
}
/*******************************************************************************
* Function Name : SDIO_GetFlagStatus
* Description : Checks whether the specified SDIO flag is set or not.
* Input : SDIO_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* - SDIO_FLAG_CCRCFAIL: Command response received (CRC check
* failed)
* - SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check
* failed)
* - SDIO_FLAG_CTIMEOUT: Command response timeout
* - SDIO_FLAG_DTIMEOUT: Data timeou
* - SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
* - SDIO_FLAG_RXOVERR: Received FIFO overrun error
* - SDIO_FLAG_CMDREND: Command response received (CRC check
* passed)
* - SDIO_FLAG_CMDSENT: Command sent (no response required)
* - SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is
* zero)
* - SDIO_FLAG_STBITERR: Start bit not detected on all data
* signals in wide bus mode
* - SDIO_FLAG_DBCKEND: Data block sent/received (CRC check
* passed)
* - SDIO_FLAG_CMDACT: Command transfer in progress
* - SDIO_FLAG_TXACT: Data transmit in progress
* - SDIO_FLAG_RXACT: Data receive in progress
* - SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
* - SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
* - SDIO_FLAG_TXFIFOF: Transmit FIFO full
* - SDIO_FLAG_RXFIFOF: Receive FIFO full
* - SDIO_FLAG_TXFIFOE: Transmit FIFO empty
* - SDIO_FLAG_RXFIFOE: Receive FIFO empty
* - SDIO_FLAG_TXDAVL: Data available in transmit FIFO
* - SDIO_FLAG_RXDAVL: Data available in receive FIFO
* - SDIO_FLAG_SDIOIT: SD I/O interrupt received
* - SDIO_FLAG_CEATAEND: CE-ATA command completion signal
* received for CMD61
* Output : None
* Return : The new state of SDIO_FLAG (SET or RESET).
*******************************************************************************/
FlagStatus SDIO_GetFlagStatus(u32 SDIO_FLAG)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_SDIO_FLAG(SDIO_FLAG));
if ((SDIO->STA & SDIO_FLAG) != (u32)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*******************************************************************************
* Function Name : SDIO_ClearFlag
* Description : Clears the SDIO's pending flags.
* Input : SDIO_FLAG: specifies the flag to clear.
* This parameter can be one or a combination of the following
* values:
* - SDIO_FLAG_CCRCFAIL: Command response received (CRC check
* failed)
* - SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check
* failed)
* - SDIO_FLAG_CTIMEOUT: Command response timeout
* - SDIO_FLAG_DTIMEOUT: Data timeou
* - SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
* - SDIO_FLAG_RXOVERR: Received FIFO overrun error
* - SDIO_FLAG_CMDREND: Command response received (CRC check
* passed)
* - SDIO_FLAG_CMDSENT: Command sent (no response required)
* - SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is
* zero)
* - SDIO_FLAG_STBITERR: Start bit not detected on all data
* signals in wide bus mode
* - SDIO_FLAG_DBCKEND: Data block sent/received (CRC check
* passed)
* - SDIO_FLAG_SDIOIT: SD I/O interrupt received
* - SDIO_FLAG_CEATAEND: CE-ATA command completion signal
* received for CMD61
* Output : None
* Return : None
*******************************************************************************/
void SDIO_ClearFlag(u32 SDIO_FLAG)
{
/* Check the parameters */
assert_param(IS_SDIO_CLEAR_FLAG(SDIO_FLAG));
SDIO->ICR = SDIO_FLAG;
}
/*******************************************************************************
* Function Name : SDIO_GetITStatus
* Description : Checks whether the specified SDIO interrupt has occurred or not.
* Input : SDIO_IT: specifies the SDIO interrupt source to check.
* This parameter can be one of the following values:
* - SDIO_IT_CCRCFAIL: Command response received (CRC check
* failed) interrupt
* - SDIO_IT_DCRCFAIL: Data block sent/received (CRC check
* failed) interrupt
* - SDIO_IT_CTIMEOUT: Command response timeout interrupt
* - SDIO_IT_DTIMEOUT: Data timeout interrupt
* - SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
* - SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
* - SDIO_IT_CMDREND: Command response received (CRC check
* passed) interrupt
* - SDIO_IT_CMDSENT: Command sent (no response required)
* interrupt
* - SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is
* zero) interrupt
* - SDIO_IT_STBITERR: Start bit not detected on all data
* signals in wide bus mode interrupt
* - SDIO_IT_DBCKEND: Data block sent/received (CRC check
* passed) interrupt
* - SDIO_IT_CMDACT: Command transfer in progress interrupt
* - SDIO_IT_TXACT: Data transmit in progress interrupt
* - SDIO_IT_RXACT: Data receive in progress interrupt
* - SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
* - SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
* - SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
* - SDIO_IT_RXFIFOF: Receive FIFO full interrupt
* - SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
* - SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
* - SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
* - SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
* - SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
* - SDIO_IT_CEATAEND: CE-ATA command completion signal
* received for CMD61 interrupt
* Output : None
* Return : The new state of SDIO_IT (SET or RESET).
*******************************************************************************/
ITStatus SDIO_GetITStatus(u32 SDIO_IT)
{
ITStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_SDIO_GET_IT(SDIO_IT));
if ((SDIO->STA & SDIO_IT) != (u32)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/*******************************************************************************
* Function Name : SDIO_ClearITPendingBit
* Description : Clears the SDIO’s interrupt pending bits.
* Input : SDIO_IT: specifies the interrupt pending bit to clear.
* This parameter can be one or a combination of the following
* values:
* - SDIO_IT_CCRCFAIL: Command response received (CRC check
* failed) interrupt
* - SDIO_IT_DCRCFAIL: Data block sent/received (CRC check
* failed) interrupt
* - SDIO_IT_CTIMEOUT: Command response timeout interrupt
* - SDIO_IT_DTIMEOUT: Data timeout interrupt
* - SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
* - SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
* - SDIO_IT_CMDREND: Command response received (CRC check
* passed) interrupt
* - SDIO_IT_CMDSENT: Command sent (no response required)
* interrupt
* - SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is
* zero) interrupt
* - SDIO_IT_STBITERR: Start bit not detected on all data
* signals in wide bus mode interrupt
* - SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
* - SDIO_IT_CEATAEND: CE-ATA command completion signal
* received for CMD61
* Output : None
* Return : None
*******************************************************************************/
void SDIO_ClearITPendingBit(u32 SDIO_IT)
{
/* Check the parameters */
assert_param(IS_SDIO_CLEAR_IT(SDIO_IT));
SDIO->ICR = SDIO_IT;
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_spi.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the SPI firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_spi.h"
#include "stm32f10x_rcc.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* SPI SPE mask */
#define CR1_SPE_Set ((u16)0x0040)
#define CR1_SPE_Reset ((u16)0xFFBF)
/* I2S I2SE mask */
#define I2SCFGR_I2SE_Set ((u16)0x0400)
#define I2SCFGR_I2SE_Reset ((u16)0xFBFF)
/* SPI CRCNext mask */
#define CR1_CRCNext_Set ((u16)0x1000)
/* SPI CRCEN mask */
#define CR1_CRCEN_Set ((u16)0x2000)
#define CR1_CRCEN_Reset ((u16)0xDFFF)
/* SPI SSOE mask */
#define CR2_SSOE_Set ((u16)0x0004)
#define CR2_SSOE_Reset ((u16)0xFFFB)
/* SPI registers Masks */
#define CR1_CLEAR_Mask ((u16)0x3040)
#define I2SCFGR_CLEAR_Mask ((u16)0xF040)
/* SPI or I2S mode selection masks */
#define SPI_Mode_Select ((u16)0xF7FF)
#define I2S_Mode_Select ((u16)0x0800)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : SPI_I2S_DeInit
* Description : Deinitializes the SPIx peripheral registers to their default
* reset values (Affects also the I2Ss).
* Input : - SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
* Output : None
* Return : None
*******************************************************************************/
void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
switch (*(u32*)&SPIx)
{
case SPI1_BASE:
/* Enable SPI1 reset state */
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
/* Release SPI1 from reset state */
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
break;
case SPI2_BASE:
/* Enable SPI2 reset state */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
/* Release SPI2 from reset state */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
break;
case SPI3_BASE:
/* Enable SPI3 reset state */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
/* Release SPI3 from reset state */
RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
break;
default:
break;
}
}
/*******************************************************************************
* Function Name : SPI_Init
* Description : Initializes the SPIx peripheral according to the specified
* parameters in the SPI_InitStruct.
* Input : - SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
* - SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
* contains the configuration information for the specified
* SPI peripheral.
* Output : None
* Return : None
******************************************************************************/
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
{
u16 tmpreg = 0;
/* check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
/* Check the SPI parameters */
assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
/*---------------------------- SPIx CR1 Configuration ------------------------*/
/* Get the SPIx CR1 value */
tmpreg = SPIx->CR1;
/* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
tmpreg &= CR1_CLEAR_Mask;
/* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
master/salve mode, CPOL and CPHA */
/* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
/* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
/* Set LSBFirst bit according to SPI_FirstBit value */
/* Set BR bits according to SPI_BaudRatePrescaler value */
/* Set CPOL bit according to SPI_CPOL value */
/* Set CPHA bit according to SPI_CPHA value */
tmpreg |= (u16)((u32)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
/* Write to SPIx CR1 */
SPIx->CR1 = tmpreg;
/* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
SPIx->I2SCFGR &= SPI_Mode_Select;
/*---------------------------- SPIx CRCPOLY Configuration --------------------*/
/* Write to SPIx CRCPOLY */
SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
}
/*******************************************************************************
* Function Name : I2S_Init
* Description : Initializes the SPIx peripheral according to the specified
* parameters in the I2S_InitStruct.
* Input : - SPIx: where x can be 2 or 3 to select the SPI peripheral
* (configured in I2S mode).
* - I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
* contains the configuration information for the specified
* SPI peripheral configured in I2S mode.
* Output : None
* Return : None
******************************************************************************/
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
{
u16 tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
u32 tmp = 0;
RCC_ClocksTypeDef RCC_Clocks;
/* Check the I2S parameters */
assert_param(IS_SPI_23_PERIPH(SPIx));
assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
/*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
/* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask;
SPIx->I2SPR = 0x0002;
/* Get the I2SCFGR register value */
tmpreg = SPIx->I2SCFGR;
/* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
{
i2sodd = (u16)0;
i2sdiv = (u16)2;
}
/* If the requested audio frequency is not the default, compute the prescaler */
else
{
/* Check the frame length (For the Prescaler computing) */
if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
{
/* Packet length is 16 bits */
packetlength = 1;
}
else
{
/* Packet length is 32 bits */
packetlength = 2;
}
/* Get System Clock frequency */
RCC_GetClocksFreq(&RCC_Clocks);
/* Compute the Real divider depending on the MCLK output state with a flaoting point */
if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
{
/* MCLK output is enabled */
tmp = (u16)(((10 * RCC_Clocks.SYSCLK_Frequency) / (256 * I2S_InitStruct->I2S_AudioFreq)) + 5);
}
else
{
/* MCLK output is disabled */
tmp = (u16)(((10 * RCC_Clocks.SYSCLK_Frequency) / (32 * packetlength * I2S_InitStruct->I2S_AudioFreq)) + 5);
}
/* Remove the flaoting point */
tmp = tmp/10;
/* Check the parity of the divider */
i2sodd = (u16)(tmp & (u16)0x0001);
/* Compute the i2sdiv prescaler */
i2sdiv = (u16)((tmp - i2sodd) / 2);
/* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
i2sodd = (u16) (i2sodd << 8);
}
/* Test if the divider is 1 or 0 */
if ((i2sdiv < 2) || (i2sdiv > 0xFF))
{
/* Set the default values */
i2sdiv = 2;
i2sodd = 0;
}
/* Write to SPIx I2SPR register the computed value */
SPIx->I2SPR = (u16)(i2sdiv | i2sodd | I2S_InitStruct->I2S_MCLKOutput);
/* Configure the I2S with the SPI_InitStruct values */
tmpreg |= (u16)(I2S_Mode_Select | I2S_InitStruct->I2S_Mode | \
I2S_InitStruct->I2S_Standard | I2S_InitStruct->I2S_DataFormat | \
I2S_InitStruct->I2S_CPOL);
/* Write to SPIx I2SCFGR */
SPIx->I2SCFGR = tmpreg;
}
/*******************************************************************************
* Function Name : SPI_StructInit
* Description : Fills each SPI_InitStruct member with its default value.
* Input : - SPI_InitStruct : pointer to a SPI_InitTypeDef structure
* which will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
{
/*--------------- Reset SPI init structure parameters values -----------------*/
/* Initialize the SPI_Direction member */
SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
/* initialize the SPI_Mode member */
SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
/* initialize the SPI_DataSize member */
SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
/* Initialize the SPI_CPOL member */
SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
/* Initialize the SPI_CPHA member */
SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
/* Initialize the SPI_NSS member */
SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
/* Initialize the SPI_BaudRatePrescaler member */
SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
/* Initialize the SPI_FirstBit member */
SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
/* Initialize the SPI_CRCPolynomial member */
SPI_InitStruct->SPI_CRCPolynomial = 7;
}
/*******************************************************************************
* Function Name : I2S_StructInit
* Description : Fills each I2S_InitStruct member with its default value.
* Input : - I2S_InitStruct : pointer to a I2S_InitTypeDef structure
* which will be initialized.
* Output : None
* Return : None
*******************************************************************************/
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
{
/*--------------- Reset I2S init structure parameters values -----------------*/
/* Initialize the I2S_Mode member */
I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
/* Initialize the I2S_Standard member */
I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
/* Initialize the I2S_DataFormat member */
I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
/* Initialize the I2S_MCLKOutput member */
I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
/* Initialize the I2S_AudioFreq member */
I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
/* Initialize the I2S_CPOL member */
I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
}
/*******************************************************************************
* Function Name : SPI_Cmd
* Description : Enables or disables the specified SPI peripheral.
* Input : - SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
* - NewState: new state of the SPIx peripheral.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected SPI peripheral */
SPIx->CR1 |= CR1_SPE_Set;
}
else
{
/* Disable the selected SPI peripheral */
SPIx->CR1 &= CR1_SPE_Reset;
}
}
/*******************************************************************************
* Function Name : I2S_Cmd
* Description : Enables or disables the specified SPI peripheral (in I2S mode).
* Input : - SPIx: where x can be 2 or 3 to select the SPI peripheral.
* - NewState: new state of the SPIx peripheral.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_SPI_23_PERIPH(SPIx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected SPI peripheral (in I2S mode) */
SPIx->I2SCFGR |= I2SCFGR_I2SE_Set;
}
else
{
/* Disable the selected SPI peripheral (in I2S mode) */
SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset;
}
}
/*******************************************************************************
* Function Name : SPI_I2S_ITConfig
* Description : Enables or disables the specified SPI/I2S interrupts.
* Input : - SPIx: where x can be :
* - 1, 2 or 3 in SPI mode
* - 2 or 3 in I2S mode
* - SPI_I2S_IT: specifies the SPI/I2S interrupt source to be
* enabled or disabled.
* This parameter can be one of the following values:
* - SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
* - SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
* - SPI_I2S_IT_ERR: Error interrupt mask
* - NewState: new state of the specified SPI/I2S interrupt.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, u8 SPI_I2S_IT, FunctionalState NewState)
{
u16 itpos = 0, itmask = 0 ;
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
/* Get the SPI/I2S IT index */
itpos = SPI_I2S_IT >> 4;
/* Set the IT mask */
itmask = (u16)((u16)1 << itpos);
if (NewState != DISABLE)
{
/* Enable the selected SPI/I2S interrupt */
SPIx->CR2 |= itmask;
}
else
{
/* Disable the selected SPI/I2S interrupt */
SPIx->CR2 &= (u16)~itmask;
}
}
/*******************************************************************************
* Function Name : SPI_I2S_DMACmd
* Description : Enables or disables the SPIx/I2Sx DMA interface.
* Input : - SPIx: where x can be :
* - 1, 2 or 3 in SPI mode
* - 2 or 3 in I2S mode
* - SPI_I2S_DMAReq: specifies the SPI/I2S DMA transfer request
* to be enabled or disabled.
* This parameter can be any combination of the following values:
* - SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
* - SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
* - NewState: new state of the selected SPI/I2S DMA transfer
* request.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, u16 SPI_I2S_DMAReq, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq));
if (NewState != DISABLE)
{
/* Enable the selected SPI/I2S DMA requests */
SPIx->CR2 |= SPI_I2S_DMAReq;
}
else
{
/* Disable the selected SPI/I2S DMA requests */
SPIx->CR2 &= (u16)~SPI_I2S_DMAReq;
}
}
/*******************************************************************************
* Function Name : SPI_I2S_SendData
* Description : Transmits a Data through the SPIx/I2Sx peripheral.
* Input : - SPIx: where x can be :
* - 1, 2 or 3 in SPI mode
* - 2 or 3 in I2S mode
* - Data : Data to be transmitted..
* Output : None
* Return : None
*******************************************************************************/
void SPI_I2S_SendData(SPI_TypeDef* SPIx, u16 Data)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
/* Write in the DR register the data to be sent */
SPIx->DR = Data;
}
/*******************************************************************************
* Function Name : SPI_I2S_ReceiveData
* Description : Returns the most recent received data by the SPIx/I2Sx peripheral.
* Input : - SPIx: where x can be :
* - 1, 2 or 3 in SPI mode
* - 2 or 3 in I2S mode
* Output : None
* Return : The value of the received data.
*******************************************************************************/
u16 SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
/* Return the data in the DR register */
return SPIx->DR;
}
/*******************************************************************************
* Function Name : SPI_NSSInternalSoftwareConfig
* Description : Configures internally by software the NSS pin for the selected
* SPI.
* Input : - SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
* - SPI_NSSInternalSoft: specifies the SPI NSS internal state.
* This parameter can be one of the following values:
* - SPI_NSSInternalSoft_Set: Set NSS pin internally
* - SPI_NSSInternalSoft_Reset: Reset NSS pin internally
* Output : None
* Return : None
*******************************************************************************/
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, u16 SPI_NSSInternalSoft)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
{
/* Set NSS pin internally by software */
SPIx->CR1 |= SPI_NSSInternalSoft_Set;
}
else
{
/* Reset NSS pin internally by software */
SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
}
}
/*******************************************************************************
* Function Name : SPI_SSOutputCmd
* Description : Enables or disables the SS output for the selected SPI.
* Input : - SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
* - NewState: new state of the SPIx SS output.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected SPI SS output */
SPIx->CR2 |= CR2_SSOE_Set;
}
else
{
/* Disable the selected SPI SS output */
SPIx->CR2 &= CR2_SSOE_Reset;
}
}
/*******************************************************************************
* Function Name : SPI_DataSizeConfig
* Description : Configures the data size for the selected SPI.
* Input : - SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
* - SPI_DataSize: specifies the SPI data size.
* This parameter can be one of the following values:
* - SPI_DataSize_16b: Set data frame format to 16bit
* - SPI_DataSize_8b: Set data frame format to 8bit
* Output : None
* Return : None
*******************************************************************************/
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, u16 SPI_DataSize)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_SPI_DATASIZE(SPI_DataSize));
/* Clear DFF bit */
SPIx->CR1 &= (u16)~SPI_DataSize_16b;
/* Set new DFF bit value */
SPIx->CR1 |= SPI_DataSize;
}
/*******************************************************************************
* Function Name : SPI_TransmitCRC
* Description : Transmit the SPIx CRC value.
* Input : - SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
* Output : None
* Return : None
*******************************************************************************/
void SPI_TransmitCRC(SPI_TypeDef* SPIx)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
/* Enable the selected SPI CRC transmission */
SPIx->CR1 |= CR1_CRCNext_Set;
}
/*******************************************************************************
* Function Name : SPI_CalculateCRC
* Description : Enables or disables the CRC value calculation of the
* transfered bytes.
* Input : - SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
* - NewState: new state of the SPIx CRC value calculation.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
/* Enable the selected SPI CRC calculation */
SPIx->CR1 |= CR1_CRCEN_Set;
}
else
{
/* Disable the selected SPI CRC calculation */
SPIx->CR1 &= CR1_CRCEN_Reset;
}
}
/*******************************************************************************
* Function Name : SPI_GetCRC
* Description : Returns the transmit or the receive CRC register value for
* the specified SPI.
* Input : - SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
* - SPI_CRC: specifies the CRC register to be read.
* This parameter can be one of the following values:
* - SPI_CRC_Tx: Selects Tx CRC register
* - SPI_CRC_Rx: Selects Rx CRC register
* Output : None
* Return : The selected CRC register value..
*******************************************************************************/
u16 SPI_GetCRC(SPI_TypeDef* SPIx, u8 SPI_CRC)
{
u16 crcreg = 0;
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_SPI_CRC(SPI_CRC));
if (SPI_CRC != SPI_CRC_Rx)
{
/* Get the Tx CRC register */
crcreg = SPIx->TXCRCR;
}
else
{
/* Get the Rx CRC register */
crcreg = SPIx->RXCRCR;
}
/* Return the selected CRC register */
return crcreg;
}
/*******************************************************************************
* Function Name : SPI_GetCRCPolynomial
* Description : Returns the CRC Polynomial register value for the specified SPI.
* Input : - SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
* Output : None
* Return : The CRC Polynomial register value.
*******************************************************************************/
u16 SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
/* Return the CRC polynomial register */
return SPIx->CRCPR;
}
/*******************************************************************************
* Function Name : SPI_BiDirectionalLineConfig
* Description : Selects the data transfer direction in bi-directional mode
* for the specified SPI.
* Input : - SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
* - SPI_Direction: specifies the data transfer direction in
* bi-directional mode.
* This parameter can be one of the following values:
* - SPI_Direction_Tx: Selects Tx transmission direction
* - SPI_Direction_Rx: Selects Rx receive direction
* Output : None
* Return : None
*******************************************************************************/
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, u16 SPI_Direction)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_SPI_DIRECTION(SPI_Direction));
if (SPI_Direction == SPI_Direction_Tx)
{
/* Set the Tx only mode */
SPIx->CR1 |= SPI_Direction_Tx;
}
else
{
/* Set the Rx only mode */
SPIx->CR1 &= SPI_Direction_Rx;
}
}
/*******************************************************************************
* Function Name : SPI_I2S_GetFlagStatus
* Description : Checks whether the specified SPI/I2S flag is set or not.
* Input : - SPIx: where x can be :
* - 1, 2 or 3 in SPI mode
* - 2 or 3 in I2S mode
* - SPI_I2S_FLAG: specifies the SPI/I2S flag to check.
* This parameter can be one of the following values:
* - SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
* - SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
* - SPI_I2S_FLAG_BSY: Busy flag.
* - SPI_I2S_FLAG_OVR: Overrun flag.
* - SPI_FLAG_MODF: Mode Fault flag.
* - SPI_FLAG_CRCERR: CRC Error flag.
* - I2S_FLAG_UDR: Underrun Error flag.
* - I2S_FLAG_CHSIDE: Channel Side flag.
* Output : None
* Return : The new state of SPI_I2S_FLAG (SET or RESET).
*******************************************************************************/
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, u16 SPI_I2S_FLAG)
{
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
/* Check the status of the specified SPI/I2S flag */
if ((SPIx->SR & SPI_I2S_FLAG) != (u16)RESET)
{
/* SPI_I2S_FLAG is set */
bitstatus = SET;
}
else
{
/* SPI_I2S_FLAG is reset */
bitstatus = RESET;
}
/* Return the SPI_I2S_FLAG status */
return bitstatus;
}
/*******************************************************************************
* Function Name : SPI_I2S_ClearFlag
* Description : Clears the SPIx CRC Error (CRCERR) flag.
* Input : - SPIx: where x can be :
* - 1, 2 or 3 in SPI mode
* - SPI_I2S_FLAG: specifies the SPI flag to clear.
* This function clears only CRCERR flag.
* Notes:
* - OVR (OverRun error) flag is cleared by software
* sequence: a read operation to SPI_DR register
* (SPI_I2S_ReceiveData()) followed by a read operation
* to SPI_SR register (SPI_I2S_GetFlagStatus()).
* - UDR (UnderRun error) flag is cleared by a read
* operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
* - MODF (Mode Fault) flag is cleared by software sequence:
* a read/write operation to SPI_SR register
* (SPI_I2S_GetFlagStatus()) followed by a write
* operation to SPI_CR1 register (SPI_Cmd() to enable
* the SPI).
* Output : None
* Return : None
*******************************************************************************/
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, u16 SPI_I2S_FLAG)
{
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG));
/* Clear the selected SPI CRC Error (CRCERR) flag */
SPIx->SR = (u16)~SPI_I2S_FLAG;
}
/*******************************************************************************
* Function Name : SPI_I2S_GetITStatus
* Description : Checks whether the specified SPI/I2S interrupt has occurred or not.
* Input : - SPIx: where x can be :
* - 1, 2 or 3 in SPI mode
* - 2 or 3 in I2S mode
* - SPI_I2S_IT: specifies the SPI/I2S interrupt source to check.
* This parameter can be one of the following values:
* - SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
* - SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
* - SPI_I2S_IT_OVR: Overrun interrupt.
* - SPI_IT_MODF: Mode Fault interrupt.
* - SPI_IT_CRCERR: CRC Error interrupt.
* - I2S_IT_UDR: Underrun Error interrupt.
* Output : None
* Return : The new state of SPI_I2S_IT (SET or RESET).
*******************************************************************************/
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, u8 SPI_I2S_IT)
{
ITStatus bitstatus = RESET;
u16 itpos = 0, itmask = 0, enablestatus = 0;
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
/* Get the SPI/I2S IT index */
itpos = (u16)((u16)0x01 << (SPI_I2S_IT & (u8)0x0F));
/* Get the SPI/I2S IT mask */
itmask = SPI_I2S_IT >> 4;
/* Set the IT mask */
itmask = (u16)((u16)0x01 << itmask);
/* Get the SPI_I2S_IT enable bit status */
enablestatus = (SPIx->CR2 & itmask) ;
/* Check the status of the specified SPI/I2S interrupt */
if (((SPIx->SR & itpos) != (u16)RESET) && enablestatus)
{
/* SPI_I2S_IT is set */
bitstatus = SET;
}
else
{
/* SPI_I2S_IT is reset */
bitstatus = RESET;
}
/* Return the SPI_I2S_IT status */
return bitstatus;
}
/*******************************************************************************
* Function Name : SPI_I2S_ClearITPendingBit
* Description : Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
* Input : - SPIx: where x can be :
* - 1, 2 or 3 in SPI mode
* - SPI_I2S_IT: specifies the SPI interrupt pending bit to clear.
* This function clears only CRCERR intetrrupt pending bit.
* Notes:
* - OVR (OverRun Error) interrupt pending bit is cleared
* by software sequence: a read operation to SPI_DR
* register (SPI_I2S_ReceiveData()) followed by a read
* operation to SPI_SR register (SPI_I2S_GetITStatus()).
* - UDR (UnderRun Error) interrupt pending bit is cleared
* by a read operation to SPI_SR register
* (SPI_I2S_GetITStatus()).
* - MODF (Mode Fault) interrupt pending bit is cleared by
* software sequence: a read/write operation to SPI_SR
* register (SPI_I2S_GetITStatus()) followed by a write
* operation to SPI_CR1 register (SPI_Cmd() to enable the
* SPI).
* Output : None
* Return : None
*******************************************************************************/
void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, u8 SPI_I2S_IT)
{
u16 itpos = 0;
/* Check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT));
/* Get the SPI IT index */
itpos = (u16)((u16)0x01 << (SPI_I2S_IT & (u8)0x0F));
/* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */
SPIx->SR = (u16)~itpos;
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_systick.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the SysTick firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_systick.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* ---------------------- SysTick registers bit mask -------------------- */
/* CTRL TICKINT Mask */
#define CTRL_TICKINT_Set ((u32)0x00000002)
#define CTRL_TICKINT_Reset ((u32)0xFFFFFFFD)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : SysTick_CLKSourceConfig
* Description : Configures the SysTick clock source.
* Input : - SysTick_CLKSource: specifies the SysTick clock source.
* This parameter can be one of the following values:
* - SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8
* selected as SysTick clock source.
* - SysTick_CLKSource_HCLK: AHB clock selected as
* SysTick clock source.
* Output : None
* Return : None
*******************************************************************************/
void SysTick_CLKSourceConfig(u32 SysTick_CLKSource)
{
/* Check the parameters */
assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
{
SysTick->CTRL |= SysTick_CLKSource_HCLK;
}
else
{
SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
}
}
/*******************************************************************************
* Function Name : SysTick_SetReload
* Description : Sets SysTick Reload value.
* Input : - Reload: SysTick Reload new value.
* This parameter must be a number between 1 and 0xFFFFFF.
* Output : None
* Return : None
*******************************************************************************/
void SysTick_SetReload(u32 Reload)
{
/* Check the parameters */
assert_param(IS_SYSTICK_RELOAD(Reload));
SysTick->LOAD = Reload;
}
/*******************************************************************************
* Function Name : SysTick_CounterCmd
* Description : Enables or disables the SysTick counter.
* Input : - SysTick_Counter: new state of the SysTick counter.
* This parameter can be one of the following values:
* - SysTick_Counter_Disable: Disable counter
* - SysTick_Counter_Enable: Enable counter
* - SysTick_Counter_Clear: Clear counter value to 0
* Output : None
* Return : None
*******************************************************************************/
void SysTick_CounterCmd(u32 SysTick_Counter)
{
/* Check the parameters */
assert_param(IS_SYSTICK_COUNTER(SysTick_Counter));
if (SysTick_Counter == SysTick_Counter_Enable)
{
SysTick->CTRL |= SysTick_Counter_Enable;
}
else if (SysTick_Counter == SysTick_Counter_Disable)
{
SysTick->CTRL &= SysTick_Counter_Disable;
}
else /* SysTick_Counter == SysTick_Counter_Clear */
{
SysTick->VAL = SysTick_Counter_Clear;
}
}
/*******************************************************************************
* Function Name : SysTick_ITConfig
* Description : Enables or disables the SysTick Interrupt.
* Input : - NewState: new state of the SysTick Interrupt.
* This parameter can be: ENABLE or DISABLE.
* Output : None
* Return : None
*******************************************************************************/
void SysTick_ITConfig(FunctionalState NewState)
{
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
SysTick->CTRL |= CTRL_TICKINT_Set;
}
else
{
SysTick->CTRL &= CTRL_TICKINT_Reset;
}
}
/*******************************************************************************
* Function Name : SysTick_GetCounter
* Description : Gets SysTick counter value.
* Input : None
* Output : None
* Return : SysTick current value
*******************************************************************************/
u32 SysTick_GetCounter(void)
{
return(SysTick->VAL);
}
/*******************************************************************************
* Function Name : SysTick_GetFlagStatus
* Description : Checks whether the specified SysTick flag is set or not.
* Input : - SysTick_FLAG: specifies the flag to check.
* This parameter can be one of the following values:
* - SysTick_FLAG_COUNT
* - SysTick_FLAG_SKEW
* - SysTick_FLAG_NOREF
* Output : None
* Return : None
*******************************************************************************/
FlagStatus SysTick_GetFlagStatus(u8 SysTick_FLAG)
{
u32 statusreg = 0, tmp = 0 ;
FlagStatus bitstatus = RESET;
/* Check the parameters */
assert_param(IS_SYSTICK_FLAG(SysTick_FLAG));
/* Get the SysTick register index */
tmp = SysTick_FLAG >> 3;
if (tmp == 2) /* The flag to check is in CTRL register */
{
statusreg = SysTick->CTRL;
}
else /* The flag to check is in CALIB register */
{
statusreg = SysTick->CALIB;
}
if ((statusreg & ((u32)1 << SysTick_FLAG)) != (u32)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
* File Name : stm32f10x_wwdg.c
* Author : MCD Application Team
* Version : V2.0.3
* Date : 09/22/2008
* Description : This file provides all the WWDG firmware functions.
********************************************************************************
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_wwdg.h"
#include "stm32f10x_rcc.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* ----------- WWDG registers bit address in the alias region ----------- */
#define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
/* Alias word address of EWI bit */
#define CFR_OFFSET (WWDG_OFFSET + 0x04)
#define EWI_BitNumber 0x09
#define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
/* --------------------- WWDG registers bit mask ------------------------ */
/* CR register bit mask */
#define CR_WDGA_Set ((u32)0x00000080)
/* CFR register bit mask */
#define CFR_WDGTB_Mask ((u32)0xFFFFFE7F)
#define CFR_W_Mask ((u32)0xFFFFFF80)
#define BIT_Mask ((u8)0x7F)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : WWDG_DeInit
* Description : Deinitializes the WWDG peripheral registers to their default
* reset values.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void WWDG_DeInit(void)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
}
/*******************************************************************************
* Function Name : WWDG_SetPrescaler
* Description : Sets the WWDG Prescaler.
* Input : - WWDG_Prescaler: specifies the WWDG Prescaler.
* This parameter can be one of the following values:
* - WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
* - WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
* - WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
* - WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
* Output : None
* Return : None
*******************************************************************************/
void WWDG_SetPrescaler(u32 WWDG_Prescaler)
{
u32 tmpreg = 0;
/* Check the parameters */
assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
/* Clear WDGTB[1:0] bits */
tmpreg = WWDG->CFR & CFR_WDGTB_Mask;
/* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
tmpreg |= WWDG_Prescaler;
/* Store the new value */
WWDG->CFR = tmpreg;
}
/*******************************************************************************
* Function Name : WWDG_SetWindowValue
* Description : Sets the WWDG window value.
* Input : - WindowValue: specifies the window value to be compared to
* the downcounter.
* This parameter value must be lower than 0x80.
* Output : None
* Return : None
*******************************************************************************/
void WWDG_SetWindowValue(u8 WindowValue)
{
u32 tmpreg = 0;
/* Check the parameters */
assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
/* Clear W[6:0] bits */
tmpreg = WWDG->CFR & CFR_W_Mask;
/* Set W[6:0] bits according to WindowValue value */
tmpreg |= WindowValue & BIT_Mask;
/* Store the new value */
WWDG->CFR = tmpreg;
}
/*******************************************************************************
* Function Name : WWDG_EnableIT
* Description : Enables the WWDG Early Wakeup interrupt(EWI).
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void WWDG_EnableIT(void)
{
*(vu32 *) CFR_EWI_BB = (u32)ENABLE;
}
/*******************************************************************************
* Function Name : WWDG_SetCounter
* Description : Sets the WWDG counter value.
* Input : - Counter: specifies the watchdog counter value.
* This parameter must be a number between 0x40 and 0x7F.
* Output : None
* Return : None
*******************************************************************************/
void WWDG_SetCounter(u8 Counter)
{
/* Check the parameters */
assert_param(IS_WWDG_COUNTER(Counter));
/* Write to T[6:0] bits to configure the counter value, no need to do
a read-modify-write; writing a 0 to WDGA bit does nothing */
WWDG->CR = Counter & BIT_Mask;
}
/*******************************************************************************
* Function Name : WWDG_Enable
* Description : Enables WWDG and load the counter value.
* - Counter: specifies the watchdog counter value.
* This parameter must be a number between 0x40 and 0x7F.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void WWDG_Enable(u8 Counter)
{
/* Check the parameters */
assert_param(IS_WWDG_COUNTER(Counter));
WWDG->CR = CR_WDGA_Set | Counter;
}
/*******************************************************************************
* Function Name : WWDG_GetFlagStatus
* Description : Checks whether the Early Wakeup interrupt flag is set or not.
* Input : None
* Output : None
* Return : The new state of the Early Wakeup interrupt flag (SET or RESET)
*******************************************************************************/
FlagStatus WWDG_GetFlagStatus(void)
{
return (FlagStatus)(WWDG->SR);
}
/*******************************************************************************
* Function Name : WWDG_ClearFlag
* Description : Clears Early Wakeup interrupt flag.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void WWDG_ClearFlag(void)
{
WWDG->SR = (u32)RESET;
}
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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#include <rtthread.h>
#include <dfs_posix.h>
#include <mp3/pub/mp3dec.h>
#include "dac.h"
static HMP3Decoder hMP3Decoder;
static MP3FrameInfo mp3FrameInfo;
static unsigned char *read_ptr;
static int bytes_left=0, bytes_leftBeforeDecoding=0, err, offset;
static int nFrames = 0;
static unsigned char *mp3buf;
static unsigned int mp3buf_size;
static unsigned char allocated = 0;
static void mp3_reset()
{
read_ptr = RT_NULL;
bytes_leftBeforeDecoding = bytes_left = 0;
nFrames = 0;
}
void mp3_init(rt_uint8_t *buffer, rt_uint32_t buffer_size)
{
mp3buf = buffer;
mp3buf_size = buffer_size;
mp3_reset();
}
void mp3_alloc()
{
if (!allocated) hMP3Decoder = MP3InitDecoder();
allocated = 1;
}
void mp3_free()
{
if (allocated) MP3FreeDecoder(hMP3Decoder);
allocated = 0;
}
int mp3_refill_inbuffer(int fd)
{
rt_uint16_t bytes_read;
int bytes_to_read;
// rt_kprintf("left: %d. refilling inbuffer...\n", bytes_left);
if (bytes_left > 0)
{
// after fseeking backwards the FAT has to be read from the beginning -> S L O W
// assert(f_lseek(mp3file, mp3file->fptr - bytes_leftBeforeDecoding) == FR_OK);
// better: move unused rest of buffer to the start
// no overlap as long as (1024 <= mp3buf_size/2), so no need to use memove
rt_memcpy(mp3buf, read_ptr, bytes_left);
}
bytes_to_read = mp3buf_size - bytes_left;
bytes_read = read(fd, (char *)mp3buf + bytes_left, bytes_to_read);
if (bytes_read == bytes_to_read)
{
read_ptr = mp3buf;
offset = 0;
bytes_left = mp3buf_size;
// rt_kprintf("ok. read: %d. left: %d\n", bytes_read, bytes_left);
return 0;
}
else
{
rt_kprintf("can't read more data");
return -1;
}
}
int mp3_process(int fd)
{
int writeable_buffer;
if (read_ptr == RT_NULL)
{
if(mp3_refill_inbuffer(fd) != 0)
return -1;
}
offset = MP3FindSyncWord(read_ptr, bytes_left);
if (offset < 0)
{
rt_kprintf("Error: MP3FindSyncWord returned <0");
if(mp3_refill_inbuffer(fd) != 0)
return -1;
}
read_ptr += offset;
bytes_left -= offset;
bytes_leftBeforeDecoding = bytes_left;
// check if this is really a valid frame
// (the decoder does not seem to calculate CRC, so make some plausibility checks)
if (MP3GetNextFrameInfo(hMP3Decoder, &mp3FrameInfo, read_ptr) == 0 &&
mp3FrameInfo.nChans == 2 &&
mp3FrameInfo.version == 0)
{
// rt_kprintf("Found a frame at offset %x\n", offset + read_ptr - mp3buf + mp3file->fptr);
}
else
{
rt_kprintf("this is no valid frame\n");
// advance data pointer
// TODO: handle bytes_left == 0
RT_ASSERT(bytes_left > 0);
bytes_left -= 1;
read_ptr += 1;
return 0;
}
if (bytes_left < 1024) {
if(mp3_refill_inbuffer(fd) != 0)
return -1;
}
// rt_kprintf("bytes_leftBeforeDecoding: %i\n", bytes_leftBeforeDecoding);
writeable_buffer = dac_get_writeable_buffer();
if (writeable_buffer == -1) {
return 0;
}
// rt_kprintf("wb %i\n", writeable_buffer);
err = MP3Decode(hMP3Decoder, &read_ptr, &bytes_left, dac_buffer[writeable_buffer], 0);
nFrames++;
if (err)
{
switch (err)
{
case ERR_MP3_INDATA_UNDERFLOW:
rt_kprintf("ERR_MP3_INDATA_UNDERFLOW");
bytes_left = 0;
if(mp3_refill_inbuffer(fd) != 0)
return -1;
break;
case ERR_MP3_MAINDATA_UNDERFLOW:
/* do nothing - next call to decode will provide more mainData */
rt_kprintf("ERR_MP3_MAINDATA_UNDERFLOW");
break;
default:
rt_kprintf("unknown error: %i\n", err);
// skip this frame
if (bytes_left > 0)
{
bytes_left --;
read_ptr ++;
}
else
{
// TODO
RT_ASSERT(0);
}
break;
}
dac_buffer_size[writeable_buffer] = 0;
}
else
{
/* no error */
MP3GetLastFrameInfo(hMP3Decoder, &mp3FrameInfo);
// rt_kprintf("Bitrate: %i\r\n", mp3FrameInfo.bitrate);
// rt_kprintf("%i samples\n", mp3FrameInfo.outputSamps);
dac_buffer_size[writeable_buffer] = mp3FrameInfo.outputSamps;
// rt_kprintf("%lu Hz, %i kbps\n", mp3FrameInfo.samprate, mp3FrameInfo.bitrate/1000);
if (dac_set_srate(mp3FrameInfo.samprate) != 0) {
rt_kprintf("unsupported sample rate: %lu\n", mp3FrameInfo.samprate);
return -1;
}
}
return 0;
}
#include <finsh.h>
void mp3(char* filename)
{
int fd;
rt_uint8_t *mp3_buffer;
list_date();
dac_init();
mp3_buffer = rt_malloc(2048);
mp3_init(mp3_buffer, 2048);
mp3_alloc();
fd = open(filename, O_RDONLY, 0);
if (fd >= 0)
{
while (mp3_process(fd) == 0);
close(fd);
}
list_date();
}
FINSH_FUNCTION_EXPORT(mp3, mp3 decode test)

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* mp3dec.c - platform-independent top level MP3 decoder API
**************************************************************************************/
#include "string.h" // J.Sz. 21/04/2006
// #include "hlxclib/string.h" /* for memmove, memcpy (can replace with different implementations if desired) */
#include "mp3common.h" /* includes mp3dec.h (public API) and internal, platform-independent API */
/**************************************************************************************
* Function: MP3InitDecoder
*
* Description: allocate memory for platform-specific data
* clear all the user-accessible fields
*
* Inputs: none
*
* Outputs: none
*
* Return: handle to mp3 decoder instance, 0 if malloc fails
**************************************************************************************/
HMP3Decoder MP3InitDecoder(void)
{
MP3DecInfo *mp3DecInfo;
mp3DecInfo = AllocateBuffers();
return (HMP3Decoder)mp3DecInfo;
}
/**************************************************************************************
* Function: MP3FreeDecoder
*
* Description: free platform-specific data allocated by InitMP3Decoder
* zero out the contents of MP3DecInfo struct
*
* Inputs: valid MP3 decoder instance pointer (HMP3Decoder)
*
* Outputs: none
*
* Return: none
**************************************************************************************/
void MP3FreeDecoder(HMP3Decoder hMP3Decoder)
{
MP3DecInfo *mp3DecInfo = (MP3DecInfo *)hMP3Decoder;
if (!mp3DecInfo)
return;
FreeBuffers(mp3DecInfo);
}
/**************************************************************************************
* Function: MP3FindSyncWord
*
* Description: locate the next byte-alinged sync word in the raw mp3 stream
*
* Inputs: buffer to search for sync word
* max number of bytes to search in buffer
*
* Outputs: none
*
* Return: offset to first sync word (bytes from start of buf)
* -1 if sync not found after searching nBytes
**************************************************************************************/
int MP3FindSyncWord(unsigned char *buf, int nBytes)
{
int i;
/* find byte-aligned syncword - need 12 (MPEG 1,2) or 11 (MPEG 2.5) matching bits */
for (i = 0; i < nBytes - 1; i++) {
if ( (buf[i+0] & SYNCWORDH) == SYNCWORDH && (buf[i+1] & SYNCWORDL) == SYNCWORDL )
return i;
}
return -1;
}
/**************************************************************************************
* Function: MP3FindFreeSync
*
* Description: figure out number of bytes between adjacent sync words in "free" mode
*
* Inputs: buffer to search for next sync word
* the 4-byte frame header starting at the current sync word
* max number of bytes to search in buffer
*
* Outputs: none
*
* Return: offset to next sync word, minus any pad byte (i.e. nSlots)
* -1 if sync not found after searching nBytes
*
* Notes: this checks that the first 22 bits of the next frame header are the
* same as the current frame header, but it's still not foolproof
* (could accidentally find a sequence in the bitstream which
* appears to match but is not actually the next frame header)
* this could be made more error-resilient by checking several frames
* in a row and verifying that nSlots is the same in each case
* since free mode requires CBR (see spec) we generally only call
* this function once (first frame) then store the result (nSlots)
* and just use it from then on
**************************************************************************************/
static int MP3FindFreeSync(unsigned char *buf, unsigned char firstFH[4], int nBytes)
{
int offset = 0;
unsigned char *bufPtr = buf;
/* loop until we either:
* - run out of nBytes (FindMP3SyncWord() returns -1)
* - find the next valid frame header (sync word, version, layer, CRC flag, bitrate, and sample rate
* in next header must match current header)
*/
while (1) {
offset = MP3FindSyncWord(bufPtr, nBytes);
bufPtr += offset;
if (offset < 0) {
return -1;
} else if ( (bufPtr[0] == firstFH[0]) && (bufPtr[1] == firstFH[1]) && ((bufPtr[2] & 0xfc) == (firstFH[2] & 0xfc)) ) {
/* want to return number of bytes per frame, NOT counting the padding byte, so subtract one if padFlag == 1 */
if ((firstFH[2] >> 1) & 0x01)
bufPtr--;
return bufPtr - buf;
}
bufPtr += 3;
nBytes -= (offset + 3);
};
// return -1; Removed KJ
}
/**************************************************************************************
* Function: MP3GetLastFrameInfo
*
* Description: get info about last MP3 frame decoded (number of sampled decoded,
* sample rate, bitrate, etc.)
*
* Inputs: valid MP3 decoder instance pointer (HMP3Decoder)
* pointer to MP3FrameInfo struct
*
* Outputs: filled-in MP3FrameInfo struct
*
* Return: none
*
* Notes: call this right after calling MP3Decode
**************************************************************************************/
void MP3GetLastFrameInfo(HMP3Decoder hMP3Decoder, MP3FrameInfo *mp3FrameInfo)
{
MP3DecInfo *mp3DecInfo = (MP3DecInfo *)hMP3Decoder;
if (!mp3DecInfo || mp3DecInfo->layer != 3) {
mp3FrameInfo->bitrate = 0;
mp3FrameInfo->nChans = 0;
mp3FrameInfo->samprate = 0;
mp3FrameInfo->bitsPerSample = 0;
mp3FrameInfo->outputSamps = 0;
mp3FrameInfo->layer = 0;
mp3FrameInfo->version = 0;
} else {
mp3FrameInfo->bitrate = mp3DecInfo->bitrate;
mp3FrameInfo->nChans = mp3DecInfo->nChans;
mp3FrameInfo->samprate = mp3DecInfo->samprate;
mp3FrameInfo->bitsPerSample = 16;
mp3FrameInfo->outputSamps = mp3DecInfo->nChans * (int)samplesPerFrameTab[mp3DecInfo->version][mp3DecInfo->layer - 1];
mp3FrameInfo->layer = mp3DecInfo->layer;
mp3FrameInfo->version = mp3DecInfo->version;
}
}
/**************************************************************************************
* Function: MP3GetNextFrameInfo
*
* Description: parse MP3 frame header
*
* Inputs: valid MP3 decoder instance pointer (HMP3Decoder)
* pointer to MP3FrameInfo struct
* pointer to buffer containing valid MP3 frame header (located using
* MP3FindSyncWord(), above)
*
* Outputs: filled-in MP3FrameInfo struct
*
* Return: error code, defined in mp3dec.h (0 means no error, < 0 means error)
**************************************************************************************/
int MP3GetNextFrameInfo(HMP3Decoder hMP3Decoder, MP3FrameInfo *mp3FrameInfo, unsigned char *buf)
{
MP3DecInfo *mp3DecInfo = (MP3DecInfo *)hMP3Decoder;
if (!mp3DecInfo)
return ERR_MP3_NULL_POINTER;
if (UnpackFrameHeader(mp3DecInfo, buf) == -1 || mp3DecInfo->layer != 3)
return ERR_MP3_INVALID_FRAMEHEADER;
MP3GetLastFrameInfo(mp3DecInfo, mp3FrameInfo);
return ERR_MP3_NONE;
}
/**************************************************************************************
* Function: MP3ClearBadFrame
*
* Description: zero out pcm buffer if error decoding MP3 frame
*
* Inputs: mp3DecInfo struct with correct frame size parameters filled in
* pointer pcm output buffer
*
* Outputs: zeroed out pcm buffer
*
* Return: none
**************************************************************************************/
static void MP3ClearBadFrame(MP3DecInfo *mp3DecInfo, short *outbuf)
{
int i;
if (!mp3DecInfo)
return;
for (i = 0; i < mp3DecInfo->nGrans * mp3DecInfo->nGranSamps * mp3DecInfo->nChans; i++)
outbuf[i] = 0;
}
/**************************************************************************************
* Function: MP3Decode
*
* Description: decode one frame of MP3 data
*
* Inputs: valid MP3 decoder instance pointer (HMP3Decoder)
* double pointer to buffer of MP3 data (containing headers + mainData)
* number of valid bytes remaining in inbuf
* pointer to outbuf, big enough to hold one frame of decoded PCM samples
* flag indicating whether MP3 data is normal MPEG format (useSize = 0)
* or reformatted as "self-contained" frames (useSize = 1)
*
* Outputs: PCM data in outbuf, interleaved LRLRLR... if stereo
* number of output samples = nGrans * nGranSamps * nChans
* updated inbuf pointer, updated bytesLeft
*
* Return: error code, defined in mp3dec.h (0 means no error, < 0 means error)
*
* Notes: switching useSize on and off between frames in the same stream
* is not supported (bit reservoir is not maintained if useSize on)
**************************************************************************************/
int MP3Decode(HMP3Decoder hMP3Decoder, unsigned char **inbuf, int *bytesLeft, short *outbuf, int useSize)
{
int offset, bitOffset, mainBits, gr, ch, fhBytes, siBytes, freeFrameBytes;
int prevBitOffset, sfBlockBits, huffBlockBits;
unsigned char *mainPtr;
MP3DecInfo *mp3DecInfo = (MP3DecInfo *)hMP3Decoder;
if (!mp3DecInfo)
return ERR_MP3_NULL_POINTER;
/* unpack frame header */
fhBytes = UnpackFrameHeader(mp3DecInfo, *inbuf);
if (fhBytes < 0)
return ERR_MP3_INVALID_FRAMEHEADER; /* don't clear outbuf since we don't know size (failed to parse header) */
*inbuf += fhBytes;
/* unpack side info */
siBytes = UnpackSideInfo(mp3DecInfo, *inbuf);
if (siBytes < 0) {
MP3ClearBadFrame(mp3DecInfo, outbuf);
return ERR_MP3_INVALID_SIDEINFO;
}
*inbuf += siBytes;
*bytesLeft -= (fhBytes + siBytes);
/* if free mode, need to calculate bitrate and nSlots manually, based on frame size */
if (mp3DecInfo->bitrate == 0 || mp3DecInfo->freeBitrateFlag) {
if (!mp3DecInfo->freeBitrateFlag) {
/* first time through, need to scan for next sync word and figure out frame size */
mp3DecInfo->freeBitrateFlag = 1;
mp3DecInfo->freeBitrateSlots = MP3FindFreeSync(*inbuf, *inbuf - fhBytes - siBytes, *bytesLeft);
if (mp3DecInfo->freeBitrateSlots < 0) {
MP3ClearBadFrame(mp3DecInfo, outbuf);
return ERR_MP3_FREE_BITRATE_SYNC;
}
freeFrameBytes = mp3DecInfo->freeBitrateSlots + fhBytes + siBytes;
mp3DecInfo->bitrate = (freeFrameBytes * mp3DecInfo->samprate * 8) / (mp3DecInfo->nGrans * mp3DecInfo->nGranSamps);
}
mp3DecInfo->nSlots = mp3DecInfo->freeBitrateSlots + CheckPadBit(mp3DecInfo); /* add pad byte, if required */
}
/* useSize != 0 means we're getting reformatted (RTP) packets (see RFC 3119)
* - calling function assembles "self-contained" MP3 frames by shifting any main_data
* from the bit reservoir (in previous frames) to AFTER the sync word and side info
* - calling function should set mainDataBegin to 0, and tell us exactly how large this
* frame is (in bytesLeft)
*/
if (useSize) {
mp3DecInfo->nSlots = *bytesLeft;
if (mp3DecInfo->mainDataBegin != 0 || mp3DecInfo->nSlots <= 0) {
/* error - non self-contained frame, or missing frame (size <= 0), could do loss concealment here */
MP3ClearBadFrame(mp3DecInfo, outbuf);
return ERR_MP3_INVALID_FRAMEHEADER;
}
/* can operate in-place on reformatted frames */
mp3DecInfo->mainDataBytes = mp3DecInfo->nSlots;
mainPtr = *inbuf;
*inbuf += mp3DecInfo->nSlots;
*bytesLeft -= (mp3DecInfo->nSlots);
} else {
/* out of data - assume last or truncated frame */
if (mp3DecInfo->nSlots > *bytesLeft) {
MP3ClearBadFrame(mp3DecInfo, outbuf);
return ERR_MP3_INDATA_UNDERFLOW;
}
/* fill main data buffer with enough new data for this frame */
if (mp3DecInfo->mainDataBytes >= mp3DecInfo->mainDataBegin) {
/* adequate "old" main data available (i.e. bit reservoir) */
memmove(mp3DecInfo->mainBuf, mp3DecInfo->mainBuf + mp3DecInfo->mainDataBytes - mp3DecInfo->mainDataBegin, mp3DecInfo->mainDataBegin);
memcpy(mp3DecInfo->mainBuf + mp3DecInfo->mainDataBegin, *inbuf, mp3DecInfo->nSlots);
mp3DecInfo->mainDataBytes = mp3DecInfo->mainDataBegin + mp3DecInfo->nSlots;
*inbuf += mp3DecInfo->nSlots;
*bytesLeft -= (mp3DecInfo->nSlots);
mainPtr = mp3DecInfo->mainBuf;
} else {
/* not enough data in bit reservoir from previous frames (perhaps starting in middle of file) */
memcpy(mp3DecInfo->mainBuf + mp3DecInfo->mainDataBytes, *inbuf, mp3DecInfo->nSlots);
mp3DecInfo->mainDataBytes += mp3DecInfo->nSlots;
*inbuf += mp3DecInfo->nSlots;
*bytesLeft -= (mp3DecInfo->nSlots);
MP3ClearBadFrame(mp3DecInfo, outbuf);
return ERR_MP3_MAINDATA_UNDERFLOW;
}
}
bitOffset = 0;
mainBits = mp3DecInfo->mainDataBytes * 8;
/* decode one complete frame */
for (gr = 0; gr < mp3DecInfo->nGrans; gr++) {
for (ch = 0; ch < mp3DecInfo->nChans; ch++) {
/* unpack scale factors and compute size of scale factor block */
prevBitOffset = bitOffset;
offset = UnpackScaleFactors(mp3DecInfo, mainPtr, &bitOffset, mainBits, gr, ch);
sfBlockBits = 8*offset - prevBitOffset + bitOffset;
huffBlockBits = mp3DecInfo->part23Length[gr][ch] - sfBlockBits;
mainPtr += offset;
mainBits -= sfBlockBits;
if (offset < 0 || mainBits < huffBlockBits) {
MP3ClearBadFrame(mp3DecInfo, outbuf);
return ERR_MP3_INVALID_SCALEFACT;
}
/* decode Huffman code words */
prevBitOffset = bitOffset;
offset = DecodeHuffman(mp3DecInfo, mainPtr, &bitOffset, huffBlockBits, gr, ch);
if (offset < 0) {
MP3ClearBadFrame(mp3DecInfo, outbuf);
return ERR_MP3_INVALID_HUFFCODES;
}
mainPtr += offset;
mainBits -= (8*offset - prevBitOffset + bitOffset);
}
/* dequantize coefficients, decode stereo, reorder short blocks */
if (Dequantize(mp3DecInfo, gr) < 0) {
MP3ClearBadFrame(mp3DecInfo, outbuf);
return ERR_MP3_INVALID_DEQUANTIZE;
}
/* alias reduction, inverse MDCT, overlap-add, frequency inversion */
for (ch = 0; ch < mp3DecInfo->nChans; ch++)
if (IMDCT(mp3DecInfo, gr, ch) < 0) {
MP3ClearBadFrame(mp3DecInfo, outbuf);
return ERR_MP3_INVALID_IMDCT;
}
/* subband transform - if stereo, interleaves pcm LRLRLR */
if (Subband(mp3DecInfo, outbuf + gr*mp3DecInfo->nGranSamps*mp3DecInfo->nChans) < 0) {
MP3ClearBadFrame(mp3DecInfo, outbuf);
return ERR_MP3_INVALID_SUBBAND;
}
}
return ERR_MP3_NONE;
}

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* mp3tabs.c - platform-independent tables for MP3 decoder (global, read-only)
**************************************************************************************/
#include "mp3common.h"
/* indexing = [version][samplerate index]
* sample rate of frame (Hz)
*/
const int samplerateTab[3][3] = {
{44100, 48000, 32000}, /* MPEG-1 */
{22050, 24000, 16000}, /* MPEG-2 */
{11025, 12000, 8000}, /* MPEG-2.5 */
};
/* indexing = [version][layer][bitrate index]
* bitrate (kbps) of frame
* - bitrate index == 0 is "free" mode (bitrate determined on the fly by
* counting bits between successive sync words)
*/
const short bitrateTab[3][3][15] = {
{
/* MPEG-1 */
{ 0, 32, 64, 96,128,160,192,224,256,288,320,352,384,416,448}, /* Layer 1 */
{ 0, 32, 48, 56, 64, 80, 96,112,128,160,192,224,256,320,384}, /* Layer 2 */
{ 0, 32, 40, 48, 56, 64, 80, 96,112,128,160,192,224,256,320}, /* Layer 3 */
},
{
/* MPEG-2 */
{ 0, 32, 48, 56, 64, 80, 96,112,128,144,160,176,192,224,256}, /* Layer 1 */
{ 0, 8, 16, 24, 32, 40, 48, 56, 64, 80, 96,112,128,144,160}, /* Layer 2 */
{ 0, 8, 16, 24, 32, 40, 48, 56, 64, 80, 96,112,128,144,160}, /* Layer 3 */
},
{
/* MPEG-2.5 */
{ 0, 32, 48, 56, 64, 80, 96,112,128,144,160,176,192,224,256}, /* Layer 1 */
{ 0, 8, 16, 24, 32, 40, 48, 56, 64, 80, 96,112,128,144,160}, /* Layer 2 */
{ 0, 8, 16, 24, 32, 40, 48, 56, 64, 80, 96,112,128,144,160}, /* Layer 3 */
},
};
/* indexing = [version][layer]
* number of samples in one frame (per channel)
*/
const short samplesPerFrameTab[3][3] = {
{384, 1152, 1152 }, /* MPEG1 */
{384, 1152, 576 }, /* MPEG2 */
{384, 1152, 576 }, /* MPEG2.5 */
};
/* layers 1, 2, 3 */
const short bitsPerSlotTab[3] = {32, 8, 8};
/* indexing = [version][mono/stereo]
* number of bytes in side info section of bitstream
*/
const short sideBytesTab[3][2] = {
{17, 32}, /* MPEG-1: mono, stereo */
{ 9, 17}, /* MPEG-2: mono, stereo */
{ 9, 17}, /* MPEG-2.5: mono, stereo */
};
/* indexing = [version][sampleRate][bitRate]
* for layer3, nSlots = floor(samps/frame * bitRate / sampleRate / 8)
* - add one pad slot if necessary
*/
const short slotTab[3][3][15] = {
{
/* MPEG-1 */
{ 0, 104, 130, 156, 182, 208, 261, 313, 365, 417, 522, 626, 731, 835,1044 }, /* 44 kHz */
{ 0, 96, 120, 144, 168, 192, 240, 288, 336, 384, 480, 576, 672, 768, 960 }, /* 48 kHz */
{ 0, 144, 180, 216, 252, 288, 360, 432, 504, 576, 720, 864,1008,1152,1440 }, /* 32 kHz */
},
{
/* MPEG-2 */
{ 0, 26, 52, 78, 104, 130, 156, 182, 208, 261, 313, 365, 417, 470, 522 }, /* 22 kHz */
{ 0, 24, 48, 72, 96, 120, 144, 168, 192, 240, 288, 336, 384, 432, 480 }, /* 24 kHz */
{ 0, 36, 72, 108, 144, 180, 216, 252, 288, 360, 432, 504, 576, 648, 720 }, /* 16 kHz */
},
{
/* MPEG-2.5 */
{ 0, 52, 104, 156, 208, 261, 313, 365, 417, 522, 626, 731, 835, 940,1044 }, /* 11 kHz */
{ 0, 48, 96, 144, 192, 240, 288, 336, 384, 480, 576, 672, 768, 864, 960 }, /* 12 kHz */
{ 0, 72, 144, 216, 288, 360, 432, 504, 576, 720, 864,1008,1152,1296,1440 }, /* 8 kHz */
},
};
/* indexing = [version][sampleRate][long (.l) or short (.s) block]
* sfBandTable[v][s].l[cb] = index of first bin in critical band cb (long blocks)
* sfBandTable[v][s].s[cb] = index of first bin in critical band cb (short blocks)
*/
const SFBandTable sfBandTable[3][3] = {
{
/* MPEG-1 (44, 48, 32 kHz) */
{
{ 0, 4, 8, 12, 16, 20, 24, 30, 36, 44, 52, 62, 74, 90,110,134,162,196,238,288,342,418,576 },
{ 0, 4, 8, 12, 16, 22, 30, 40, 52, 66, 84,106,136,192 }
},
{
{ 0, 4, 8, 12, 16, 20, 24, 30, 36, 42, 50, 60, 72, 88,106,128,156,190,230,276,330,384,576 },
{ 0, 4, 8, 12, 16, 22, 28, 38, 50, 64, 80,100,126,192 }
},
{
{ 0, 4, 8, 12, 16, 20, 24, 30, 36, 44, 54, 66, 82,102,126,156,194,240,296,364,448,550,576 },
{ 0, 4, 8, 12, 16, 22, 30, 42, 58, 78,104,138,180,192 }
}
},
{
/* MPEG-2 (22, 24, 16 kHz) */
{
{ 0, 6, 12, 18, 24, 30, 36, 44, 54, 66, 80, 96,116,140,168,200,238,284,336,396,464,522,576 },
{ 0, 4, 8, 12, 18, 24, 32, 42, 56, 74,100,132,174,192 }
},
{
{ 0, 6, 12, 18, 24, 30, 36, 44, 54, 66, 80, 96,114,136,162,194,232,278,332,394,464,540,576 },
{ 0, 4, 8, 12, 18, 26, 36, 48, 62, 80,104,136,180,192 }
},
{
{ 0, 6, 12, 18, 24, 30, 36, 44, 54, 66, 80, 96,116,140,168,200,238,284,336,396,464,522,576 },
{ 0, 4, 8, 12, 18, 26, 36, 48, 62, 80,104,134,174,192 }
},
},
{
/* MPEG-2.5 (11, 12, 8 kHz) */
{
{ 0, 6, 12, 18, 24, 30, 36, 44, 54, 66, 80, 96,116,140,168,200,238,284,336,396,464,522,576 },
{ 0, 4, 8, 12, 18, 26, 36, 48, 62, 80,104,134,174,192 }
},
{
{ 0, 6, 12, 18, 24, 30, 36, 44, 54, 66, 80, 96,116,140,168,200,238,284,336,396,464,522,576 },
{ 0, 4, 8, 12, 18, 26, 36, 48, 62, 80,104,134,174,192 }
},
{
{ 0, 12, 24, 36, 48, 60, 72, 88,108,132,160,192,232,280,336,400,476,566,568,570,572,574,576 },
{ 0, 8, 16, 24, 36, 52, 72, 96,124,160,162,164,166,192 }
},
},
};

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Copyright (c) 1995-2004 RealNetworks, Inc. All Rights Reserved.
The contents of this directory, and (except where otherwise
indicated) the directories included within this directory, are
subject to the current version of the RealNetworks Public Source
License (the "RPSL") available at RPSL.txt in this directory, unless
you have licensed the directory under the current version of the
RealNetworks Community Source License (the "RCSL") available at
RCSL.txt in this directory, in which case the RCSL will apply. You
may also obtain the license terms directly from RealNetworks. You
may not use the files in this directory except in compliance with the
RPSL or, if you have a valid RCSL with RealNetworks applicable to
this directory, the RCSL. Please see the applicable RPSL or RCSL for
the rights, obligations and limitations governing use of the contents
of the directory.
This directory is part of the Helix DNA Technology. RealNetworks is
the developer of the Original Code and owns the copyrights in the
portions it created.
This directory, and the directories included with this directory, are
distributed and made available on an 'AS IS' basis, WITHOUT WARRANTY
OF ANY KIND, EITHER EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY
DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
QUIET ENJOYMENT OR NON-INFRINGEMENT.
Technology Compatibility Kit Test Suite(s) Location:
http://www.helixcommunity.org/content/tck

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The RCSL is made up of a base agreement and a few Attachments.
For Research and Development use, you agree to the terms of the
RCSL R&D License (base RCSL and Attachments A, B, and C)
For Commercial Use (either distribution or internal commercial
deployment) of the Helix DNA with or without support for RealNetworks'
RealAudio and RealVideo Add-on Technology, you agree to the
terms of the same RCSL R&D license
and execute one or more additional Commercial Use License attachments
<see http://www.helixcommunity.org/content/rcsl-attachments>.
------------------------------------------------------------------------
REALNETWORKS COMMUNITY SOURCE LICENSE
Version 1.2 (Rev. Date: January 22, 2003).
RECITALS
Original Contributor has developed Specifications, Source Code
implementations and Executables of certain Technology; and
Original Contributor desires to license the Technology to a large
community to facilitate research, innovation and product development
while maintaining compatibility of such products with the Technology as
delivered by Original Contributor; and
Original Contributor desires to license certain Trademarks for the
purpose of branding products that are compatible with the relevant
Technology delivered by Original Contributor; and
You desire to license the Technology and possibly certain Trademarks
from Original Contributor on the terms and conditions specified in this
License.
In consideration for the mutual covenants contained herein, You and
Original Contributor agree as follows:
AGREEMENT
*1. Introduction.*
The RealNetworks Community Source License ("RCSL") and effective
attachments ("License") may include five distinct licenses:
i) Research Use license -- License plus Attachments A, B and C only.
ii) Commercial Use and Trademark License, which may be for Internal
Deployment Use or external distribution, or both -- License plus
Attachments A, B, C, and D.
iii) Technology Compatibility Kit (TCK) license -- Attachment C.
iv) Add-On Technology License (Executable) Commercial Use License
-Attachment F.
v) Add-On Technology Source Code Porting and Optimization
License-Attachment G.
The Research Use license is effective when You click and accept this
License. The TCK is effective when You click and accept this License,
unless otherwise specified in the TCK attachments. The Commercial Use
and Trademark, Add-On Technology License, and the Add-On Technology
Source Code Porting and Optimization licenses must each be signed by You
and Original Contributor to become effective. Once effective, these
licenses and the associated requirements and responsibilities are
cumulative. Capitalized terms used in this License are defined in the
Glossary.
*2. License Grants.*
2.1 Original Contributor Grant.
Subject to Your compliance with Sections 3, 8.10 and Attachment A of
this License, Original Contributor grants to You a worldwide,
royalty-free, non-exclusive license, to the extent of Original
Contributor's Intellectual Property Rights covering the Original Code,
Upgraded Code and Specifications, to do the following:
(a) Research Use License:
(i) use, reproduce and modify the Original Code, Upgraded Code and
Specifications to create Modifications and Reformatted Specifications
for Research Use by You;
(ii) publish and display Original Code, Upgraded Code and Specifications
with, or as part of Modifications, as permitted under Section 3.1(b) below;
(iii) reproduce and distribute copies of Original Code and Upgraded Code
to Licensees and students for Research Use by You;
(iv) compile, reproduce and distribute Original Code and Upgraded Code
in Executable form, and Reformatted Specifications to anyone for
Research Use by You.
(b) Other than the licenses expressly granted in this License, Original
Contributor retains all right, title, and interest in Original Code and
Upgraded Code and Specifications.
2.2 Your Grants.
(a) To Other Licensees. You hereby grant to each Licensee a license to
Your Error Corrections and Shared Modifications, of the same scope and
extent as Original Contributor's licenses under Section 2.1 a) above
relative to Research Use and Attachment D relative to Commercial Use.
(b) To Original Contributor. You hereby grant to Original Contributor a
worldwide, royalty-free, non-exclusive, perpetual and irrevocable
license, to the extent of Your Intellectual Property Rights covering
Your Error Corrections, Shared Modifications and Reformatted
Specifications, to use, reproduce, modify, display and distribute Your
Error Corrections, Shared Modifications and Reformatted Specifications,
in any form, including the right to sublicense such rights through
multiple tiers of distribution.
(c) Other than the licenses expressly granted in Sections 2.2(a) and (b)
above, and the restrictions set forth in Section 3.1(d)(iv) below, You
retain all right, title, and interest in Your Error Corrections, Shared
Modifications and Reformatted Specifications.
2.3 Contributor Modifications.
You may use, reproduce, modify, display and distribute Contributor Error
Corrections, Shared Modifications and Reformatted Specifications,
obtained by You under this License, to the same scope and extent as with
Original Code, Upgraded Code and Specifications.
2.4 Subcontracting.
You may deliver the Source Code of Covered Code to other Licensees
having at least a Research Use license, for the sole purpose of
furnishing development services to You in connection with Your rights
granted in this License. All such Licensees must execute appropriate
documents with respect to such work consistent with the terms of this
License, and acknowledging their work-made-for-hire status or assigning
exclusive right to the work product and associated Intellectual Property
Rights to You.
*3. Requirements and Responsibilities*.
3.1 Research Use License.
As a condition of exercising the rights granted under Section 2.1(a)
above, You agree to comply with the following:
(a) Your Contribution to the Community. All Error Corrections and Shared
Modifications which You create or contribute to are automatically
subject to the licenses granted under Section 2.2 above. You are
encouraged to license all of Your other Modifications under Section 2.2
as Shared Modifications, but are not required to do so. You agree to
notify Original Contributor of any errors in the Specification.
(b) Source Code Availability. You agree to provide all Your Error
Corrections to Original Contributor as soon as reasonably practicable
and, in any event, prior to Internal Deployment Use or Commercial Use,
if applicable. Original Contributor may, at its discretion, post Source
Code for Your Error Corrections and Shared Modifications on the
Community Webserver. You may also post Error Corrections and Shared
Modifications on a web-server of Your choice; provided, that You must
take reasonable precautions to ensure that only Licensees have access to
such Error Corrections and Shared Modifications. Such precautions shall
include, without limitation, a password protection scheme limited to
Licensees and a click-on, download certification of Licensee status
required of those attempting to download from the server. An example of
an acceptable certification is attached as Attachment A-2.
(c) Notices. All Error Corrections and Shared Modifications You create
or contribute to must include a file documenting the additions and
changes You made and the date of such additions and changes. You must
also include the notice set forth in Attachment A-1 in the file header.
If it is not possible to put the notice in a particular Source Code file
due to its structure, then You must include the notice in a location
(such as a relevant directory file), where a recipient would be most
likely to look for such a notice.
(d) Redistribution.
(i) Source. Covered Code may be distributed in Source Code form only to
another Licensee (except for students as provided below). You may not
offer or impose any terms on any Covered Code that alter the rights,
requirements, or responsibilities of such Licensee. You may distribute
Covered Code to students for use in connection with their course work
and research projects undertaken at accredited educational institutions.
Such students need not be Licensees, but must be given a copy of the
notice set forth in Attachment A-3 and such notice must also be included
in a file header or prominent location in the Source Code made available
to such students.
(ii) Executable. You may distribute Executable version(s) of Covered
Code to Licensees and other third parties only for the purpose of
evaluation and comment in connection with Research Use by You and under
a license of Your choice, but which limits use of such Executable
version(s) of Covered Code only to that purpose.
(iii) Modified Class, Interface and Package Naming. In connection with
Research Use by You only, You may use Original Contributor's class,
Interface and package names only to accurately reference or invoke the
Source Code files You modify. Original Contributor grants to You a
limited license to the extent necessary for such purposes.
(iv) You expressly agree that any distribution, in whole or in part, of
Modifications developed by You shall only be done pursuant to the terms
and conditions of this License.
(e) Extensions.
(i) Covered Code. You may not include any Source Code of Community Code
in any Extensions. You may include the compiled Header Files of
Community Code in an Extension provided that Your use of the Covered
Code, including Heading Files, complies with the Commercial Use License,
the TCK and all other terms of this License.
(ii) Publication. No later than the date on which You first distribute
such Extension for Commercial Use, You must publish to the industry, on
a non-confidential basis and free of all copyright restrictions with
respect to reproduction and use, an accurate and current specification
for any Extension. In addition, You must make available an appropriate
test suite, pursuant to the same rights as the specification,
sufficiently detailed to allow any third party reasonably skilled in the
technology to produce implementations of the Extension compatible with
the specification. Such test suites must be made available as soon as
reasonably practicable but, in no event, later than ninety (90) days
after Your first Commercial Use of the Extension. You must use
reasonable efforts to promptly clarify and correct the specification and
the test suite upon written request by Original Contributor.
(iii) Open. You agree to refrain from enforcing any Intellectual
Property Rights You may have covering any interface(s) of Your
Extension, which would prevent the implementation of such interface(s)
by Original Contributor or any Licensee. This obligation does not
prevent You from enforcing any Intellectual Property Right You have that
would otherwise be infringed by an implementation of Your Extension.
(iv) Interface Modifications and Naming. You may not modify or add to
the GUID space * * "xxxxxxxx-0901-11d1-8B06-00A024406D59" or any other
GUID space designated by Original Contributor. You may not modify any
Interface prefix provided with the Covered Code or any other prefix
designated by Original Contributor.* *
* *
(f) You agree that any Specifications provided to You by Original
Contributor are confidential and proprietary information of Original
Contributor. You must maintain the confidentiality of the Specifications
and may not disclose them to any third party without Original
Contributor's prior written consent. You may only use the Specifications
under the terms of this License and only for the purpose of implementing
the terms of this License with respect to Covered Code. You agree not
use, copy or distribute any such Specifications except as provided in
writing by Original Contributor.
3.2 Commercial Use License.
You may not make Commercial Use of any Covered Code unless You and
Original Contributor have executed a copy of the Commercial Use and
Trademark License attached as Attachment D.
*4. Versions of the License.*
4.1 License Versions.
Original Contributor may publish revised versions of the License from
time to time. Each version will be given a distinguishing version number.
4.2 Effect.
Once a particular version of Covered Code has been provided under a
version of the License, You may always continue to use such Covered Code
under the terms of that version of the License. You may also choose to
use such Covered Code under the terms of any subsequent version of the
License. No one other than Original Contributor has the right to
promulgate License versions.
4.3 Multiple-Licensed Code.
Original Contributor may designate portions of the Covered Code as
"Multiple-Licensed." "Multiple-Licensed" means that the Original
Contributor permits You to utilize those designated portions of the
Covered Code under Your choice of this License or the alternative
license(s), if any, specified by the Original Contributor in an
Attachment to this License.
*5. Disclaimer of Warranty.*
5.1 COVERED CODE PROVIDED AS IS.
COVERED CODE IS PROVIDED UNDER THIS LICENSE "AS IS," WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION,
WARRANTIES THAT THE COVERED CODE IS FREE OF DEFECTS, MERCHANTABLE, FIT
FOR A PARTICULAR PURPOSE OR NON-INFRINGING. YOU AGREE TO BEAR THE ENTIRE
RISK IN CONNECTION WITH YOUR USE AND DISTRIBUTION OF COVERED CODE UNDER
THIS LICENSE. THIS DISCLAIMER OF WARRANTY CONSTITUTES AN ESSENTIAL PART
OF THIS LICENSE. NO USE OF ANY COVERED CODE IS AUTHORIZED HEREUNDER
EXCEPT SUBJECT TO THIS DISCLAIMER.
5.2 Not Designed for High Risk Activities.
You acknowledge that Original Code, Upgraded Code and Specifications are
not designed or intended for use in high risk activities including, but
not limited to: (i) on-line control of aircraft, air traffic, aircraft
navigation or aircraft communications; or (ii) in the design,
construction, operation or maintenance of any nuclear facility. Original
Contributor disclaims any express or implied warranty of fitness for
such uses.
*6. Termination.*
6.1 By You.
You may terminate this Research Use license at anytime by providing
written notice to Original Contributor.
6.2 By Original Contributor.
This License and the rights granted hereunder will terminate:
(i) automatically if You fail to comply with the terms of this License
and fail to cure such breach within 30 days of receipt of written notice
of the breach;
(ii) immediately in the event of circumstances specified in Sections 7.1
and 8.4; or
(iii) at Original Contributor's discretion upon any action initiated by
You (including by cross-claim or counter claim) alleging that use or
distribution by Original Contributor or any Licensee, of Original Code,
Upgraded Code, Error Corrections, Shared Modifications or Specifications
infringe a patent owned or controlled by You.
6.3 Effective of Termination.
Upon termination, You agree to discontinue use of and destroy all copies
of Covered Code in Your possession. All sublicenses to the Covered Code
which You have properly granted shall survive any termination of this
License. Provisions that, by their nature, should remain in effect
beyond the termination of this License shall survive including, without
limitation, Sections 2.2, 3, 5, 7 and 8.
6.4 No Compensation.
Each party waives and releases the other from any claim to compensation
or indemnity for permitted or lawful termination of the business
relationship established by this License.
*7. Liability.*
7.1 Infringement. Should any of the Original Code, Upgraded Code, TCK or
Specifications ("Materials") become the subject of a claim of
infringement, Original Contributor may, at its sole option, (i) attempt
to procure the rights necessary for You to continue using the Materials,
(ii) modify the Materials so that they are no longer infringing, or
(iii) terminate Your right to use the Materials, immediately upon
written notice, and refund to You the amount, if any, having then
actually been paid by You to Original Contributor for the Original Code,
Upgraded Code and TCK, depreciated on a straight line, five year basis.
7.2 LIMITATION OF LIABILITY. TO THE FULL EXTENT ALLOWED BY APPLICABLE
LAW, ORIGINAL CONTRIBUTOR'S LIABILITY TO YOU FOR CLAIMS RELATING TO THIS
LICENSE, WHETHER FOR BREACH OR IN TORT, SHALL BE LIMITED TO ONE HUNDRED
PERCENT (100%) OF THE AMOUNT HAVING THEN ACTUALLY BEEN PAID BY YOU TO
ORIGINAL CONTRIBUTOR FOR ALL COPIES LICENSED HEREUNDER OF THE PARTICULAR
ITEMS GIVING RISE TO SUCH CLAIM, IF ANY, DURING THE TWELVE MONTHS
PRECEDING THE CLAIMED BREACH. IN NO EVENT WILL YOU (RELATIVE TO YOUR
SHARED MODIFICATIONS OR ERROR CORRECTIONS) OR ORIGINAL CONTRIBUTOR BE
LIABLE FOR ANY INDIRECT, PUNITIVE, SPECIAL, INCIDENTAL OR CONSEQUENTIAL
DAMAGES IN CONNECTION WITH OR RISING OUT OF THIS LICENSE (INCLUDING,
WITHOUT LIMITATION, LOSS OF PROFITS, USE, DATA, OR OTHER ECONOMIC
ADVANTAGE), HOWEVER IT ARISES AND ON ANY THEORY OF LIABILITY, WHETHER IN
AN ACTION FOR CONTRACT, STRICT LIABILITY OR TORT (INCLUDING NEGLIGENCE)
OR OTHERWISE, WHETHER OR NOT YOU OR ORIGINAL CONTRIBUTOR HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE AND NOTWITHSTANDING THE
FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY.
*8. Miscellaneous.*
8.1 Trademark.
You shall not use any Trademark unless You and Original Contributor
execute a copy of the Commercial Use and Trademark License Agreement
attached hereto as Attachment D. Except as expressly provided in the
License, You are granted no right, title or license to, or interest in,
any Trademarks. Whether or not You and Original Contributor enter into
the Trademark License, You agree not to (i) challenge Original
Contributor's ownership or use of Trademarks; (ii) attempt to register
any Trademarks, or any mark or logo substantially similar thereto; or
(iii) incorporate any Trademarks into Your own trademarks, product
names, service marks, company names, or domain names.
8.2 Integration.
This License represents the complete agreement concerning the subject
matter hereof.
8.3 Assignment.
Original Contributor may assign this License, and its rights and
obligations hereunder, in its sole discretion. You may assign the
Research Use portions of this License and the TCK license to a third
party upon prior written notice to Original Contributor (which may be
provided electronically via the Community Web-Server). You may not
assign the Commercial Use and Trademark license, the Add-On Technology
License, or the Add-On Technology Source Code Porting License, including
by way of merger (regardless of whether You are the surviving entity) or
acquisition, without Original Contributor's prior written consent.
8.4 Severability.
If any provision of this License is held to be unenforceable, such
provision shall be reformed only to the extent necessary to make it
enforceable. Notwithstanding the foregoing, if You are prohibited by law
from fully and specifically complying with Sections 2.2 or 3, this
License will immediately terminate and You must immediately discontinue
any use of Covered Code.
8.5 Governing Law.
This License shall be governed by the laws of the United States and the
State of Washington, as applied to contracts entered into and to be
performed in Washington between Washington residents. The application of
the United Nations Convention on Contracts for the International Sale of
Goods is expressly excluded. You agree that the state and federal courts
located in Seattle, Washington have exclusive jurisdiction over any
claim relating to the License, including contract and tort claims.
8.6 Dispute Resolution.
a) Arbitration. Any dispute arising out of or relating to this License
shall be finally settled by arbitration as set out herein, except that
either party may bring any action, in a court of competent jurisdiction
(which jurisdiction shall be exclusive), with respect to any dispute
relating to such party's Intellectual Property Rights or with respect to
Your compliance with the TCK license. Arbitration shall be administered:
(i) by the American Arbitration Association (AAA), (ii) in accordance
with the rules of the United Nations Commission on International Trade
Law (UNCITRAL) (the "Rules") in effect at the time of arbitration as
modified herein; and (iii) the arbitrator will apply the substantive
laws of Washington and the United States. Judgment upon the award
rendered by the arbitrator may be entered in any court having
jurisdiction to enforce such award.
b) Arbitration language, venue and damages. All arbitration proceedings
shall be conducted in English by a single arbitrator selected in
accordance with the Rules, who must be fluent in English and be either a
retired judge or practicing attorney having at least ten (10) years
litigation experience and be reasonably familiar with the technology
matters relative to the dispute. Unless otherwise agreed, arbitration
venue shall be in Seattle, Washington. The arbitrator may award monetary
damages only and nothing shall preclude either party from seeking
provisional or emergency relief from a court of competent jurisdiction.
The arbitrator shall have no authority to award damages in excess of
those permitted in this License and any such award in excess is void.
All awards will be payable in U.S. dollars and may include, for the
prevailing party (i) pre-judgment award interest, (ii) reasonable
attorneys' fees incurred in connection with the arbitration, and (iii)
reasonable costs and expenses incurred in enforcing the award. The
arbitrator will order each party to produce identified documents and
respond to no more than twenty-five single question interrogatories.
8.7 Construction.
Any law or regulation, which provides that the language of a contract
shall be construed against the drafter, shall not apply to this License.
8.8 U.S. Government End Users.
The Covered Code is a "commercial item," as that term is defined in 48
C.F.R. 2.101 (Oct. 1995), consisting of "commercial computer software"
and "commercial computer software documentation," as such terms are used
in 48 C.F.R. 12.212 (Sept. 1995). Consistent with 48 C.F.R. 12.212 and
48 C.F.R. 227.7202-1 through 227.7202-4 (June 1995), all U.S. Government
End Users acquire Covered Code with only those rights set forth herein.
You agree to pass this notice to our licensees.
8.9 Marketing Activities.
Licensee hereby grants Original Contributor a non-exclusive,
non-transferable, limited license to use the Licensee's company name and
logo ("Licensee Marks") in any presentations, press releases, or
marketing materials solely for the purpose of identifying Licensee as a
member of the Helix Community. Licensee shall provide samples of
Licensee Marks to Original Contributor upon request by Original
Contributor. Original Contributor acknowledges that the Licensee Marks
are the trademarks of Licensee. Original Contributor shall not use the
Licensee Marks in a way that may imply that Original Contributor is an
agency or branch of Licensee. Original Contributor understands and
agrees that the use of any Licensee Marks in connection with this
Agreement shall not create any right, title or interest, in, or to the
Licensee Marks or any Licensee trademarks and that all such use and
goodwill associated with any such trademarks will inure to the benefit
of Licensee. Further the Original Contributor will stop usage of the
Licensee Marks upon Licensee's request.
8.10 Press Announcements.
You may make press announcements or other public statements regarding
this License without the prior written consent of the Original
Contributor, if Your statement is limited to announcing the licensing of
the Covered Code or the availability of Your Product and its
compatibility with the Covered Code. All other public announcements
regarding this license require the prior written consent of the Original
Contributor. Consent requests are welcome at press@helixcommunity.org.
8.11 International Use.
a) Export/Import laws. Covered Code is subject to U.S. export control
laws and may be subject to export or import regulations in other
countries. Each party agrees to comply strictly with all such laws and
regulations and acknowledges their responsibility to obtain such
licenses to export, re-export, or import as may be required. You agree
to pass these obligations to Your licensees.
b) Intellectual Property Protection. Due to limited intellectual
property protection and enforcement in certain countries, You agree not
to redistribute the Original Code, Upgraded Code, TCK and Specifications
to any country on the list of restricted countries on the Community Web
Server.
8.12 Language.
This License is in the English language only, which language shall be
controlling in all respects, and all versions of this License in any
other language shall be for accommodation only and shall not be binding
on the parties to this License. All communications and notices made or
given pursuant to this License, and all documentation and support to be
provided, unless otherwise noted, shall be in the English language.
PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE
"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND
CONDITIONS OF THIS LICENSE WITH REALNETWORKS, INC. IF YOU ARE AGREEING
TO THIS LICENSE ON BEHALF OF A COMPANY, YOU REPRESENT THAT YOU ARE
AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. WHETHER YOU ARE ACTING
ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, YOU MUST BE OF MAJORITY
AGE AND BE OTHERWISE COMPETENT TO ENTER INTO CONTRACTS. IF YOU DO NOT
MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY OF THE TERMS AND
CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON TO EXIT.
GLOSSARY
1. *"Added Value"* means code which:
(i) has a principal purpose which is substantially different from that
of the stand-alone Technology;
(ii) represents a significant functional and value enhancement to the
Technology;
(iii) operates in conjunction with the Technology; and
(iv) is not marketed as a technology which replaces or substitutes for
the Technology
2. "*Applicable Patent Rights*" mean: (a) in the case where Original
Contributor is the grantor of rights, claims of patents that (i) are now
or hereafter acquired, owned by or assigned to Original Contributor and
(ii) are necessarily infringed by using or making the Original Code or
Upgraded Code, including Modifications provided by Original Contributor,
alone and not in combination with other software or hardware; and (b) in
the case where Licensee is the grantor of rights, claims of patents that
(i) are now or hereafter acquired, owned by or assigned to Licensee and
(ii) are infringed (directly or indirectly) by using or making
Licensee's Modifications or Error Corrections, taken alone or in
combination with Covered Code.
3. "*Application Programming Interfaces (APIs)"* means the interfaces,
associated header files, service provider interfaces, and protocols that
enable a device, application, Operating System, or other program to
obtain services from or make requests of (or provide services in
response to requests from) other programs, and to use, benefit from, or
rely on the resources, facilities, and capabilities of the relevant
programs using the APIs. APIs includes the technical documentation
describing the APIs, the Source Code constituting the API, and any
Header Files used with the APIs.
4. "*Commercial Use*" means any use (internal or external), copying,
sublicensing or distribution (internal or external), directly or
indirectly of Covered Code by You other than Your Research Use of
Covered Code within Your business or organization or in conjunction with
other Licensees with equivalent Research Use rights. Commercial Use
includes any use of the Covered Code for direct or indirect commercial
or strategic gain, advantage or other business purpose. Any Commercial
Use requires execution of Attachment D by You and Original Contributor.
5. "*Community Code*" means the Original Code, Upgraded Code, Error
Corrections, Shared Modifications, or any combination thereof.
6. "*Community Webserver(s)"* means the webservers designated by
Original Contributor for access to the Original Code, Upgraded Code, TCK
and Specifications and for posting Error Corrections and Shared
Modifications.
7. "*Compliant Covered Code*" means Covered Code that complies with the
requirements of the TCK.
8. "*Contributor*" means each Licensee that creates or contributes to
the creation of any Error Correction or Shared Modification.
9. "*Covered Code*" means the Original Code, Upgraded Code,
Modifications, or any combination thereof.
10. "*Error Correction*" means any change made to Community Code which
conforms to the Specification and corrects the adverse effect of a
failure of Community Code to perform any function set forth in or
required by the Specifications.
11. "*Executable*" means Covered Code that has been converted from
Source Code to the preferred form for execution by a computer or digital
processor (e.g. binary form).
12. "*Extension(s)"* means any additional Interfaces developed by or for
You which: (i) are designed for use with the Technology; (ii) constitute
an API for a library of computing functions or services; and (iii) are
disclosed or otherwise made available to third party software developers
for the purpose of developing software which invokes such additional
Interfaces. The foregoing shall not apply to software developed by Your
subcontractors to be exclusively used by You.
13. "*Header File(s)"* means that portion of the Source Code that
provides the names and types of member functions, data members, class
definitions, and interface definitions necessary to implement the APIs
for the Covered Code. Header Files include, files specifically
designated by Original Contributor as Header Files. Header Files do not
include the code necessary to implement the functionality underlying the
Interface.
14. *"Helix DNA Server Technology"* means the program(s) that implement
the Helix Universal Server streaming engine for the Technology as
defined in the Specification.
15. *"Helix DNA Client Technology"* means the Covered Code that
implements the RealOne Player engine as defined in the Specification.
16. *"Helix DNA Producer Technology"* means the Covered Code that
implements the Helix Producer engine as defined in the Specification.
17. *"Helix DNA Technology"* means the Helix DNA Server Technology, the
Helix DNA Client Technology, the Helix DNA Producer Technology and other
Helix technologies designated by Original Contributor.
18. "*Intellectual Property Rights*" means worldwide statutory and
common law rights associated solely with (i) Applicable Patent Rights;
(ii) works of authorship including copyrights, copyright applications,
copyright registrations and "moral rights"; (iii) the protection of
trade and industrial secrets and confidential information; and (iv)
divisions, continuations, renewals, and re-issuances of the foregoing
now existing or acquired in the future.
19. *"Interface*" means interfaces, functions, properties, class
definitions, APIs, Header Files, GUIDs, V-Tables, and/or protocols
allowing one piece of software, firmware or hardware to communicate or
interoperate with another piece of software, firmware or hardware.
20. "*Internal Deployment Use*" means use of Compliant Covered Code
(excluding Research Use) within Your business or organization only by
Your employees and/or agents on behalf of Your business or organization,
but not to provide services, including content distribution, to third
parties, subject to execution of Attachment D by You and Original
Contributor, if required.
21. "*Licensee*" means any party that has entered into and has in effect
a version of this License with Original Contributor.
22. "*MIME type*" means a description of what type of media or other
content is in a file, including by way of example but not limited to
'audio/x-pn-realaudio-plugin.'
23. "*Modification(s)"* means (i) any addition to, deletion from and/or
change to the substance and/or structure of the Covered Code, including
Interfaces; (ii) the combination of any Covered Code and any previous
Modifications; (iii) any new file or other representation of computer
program statements that contains any portion of Covered Code; and/or
(iv) any new Source Code implementing any portion of the Specifications.
24. "*MP3 Patents*" means any patents necessary to make, use or sell
technology implementing any portion of the specification developed by
the Moving Picture Experts Group known as MPEG-1 Audio Layer-3 or MP3,
including but not limited to all past and future versions, profiles,
extensions, parts and amendments relating to the MP3 specification.
25. "*MPEG-4 Patents*" means any patents necessary to make, use or sell
technology implementing any portion of the specification developed by
the Moving Pictures Experts Group known as MPEG-4, including but not
limited to all past and future versions, profiles, extensions, parts and
amendments relating to the MPEG-4 specification.
26. "*Original Code*" means the initial Source Code for the Technology
as described on the Community Web Server.
27. "*Original Contributor*" means RealNetworks, Inc., its affiliates
and its successors and assigns.
28. "*Original Contributor MIME Type*" means the MIME registry, browser
preferences, or local file/protocol associations invoking any Helix DNA
Client-based application, including the RealOne Player, for playback of
RealAudio, RealVideo, other RealMedia MIME types or datatypes (e.g.,
.ram, .rnx, .rpm, .ra, .rm, .rp, .rt, .rf, .prx, .mpe, .rmp, .rmj, .rav,
.rjs, .rmx, .rjt, .rms), and any other Original Contributor-specific or
proprietary MIME types that Original Contributor may introduce in the
future.
29. "*Personal Use*" means use of Covered Code by an individual solely
for his or her personal, private and non-commercial purposes. An
individual's use of Covered Code in his or her capacity as an officer,
employee, member, independent contractor or agent of a corporation,
business or organization (commercial or non-commercial) does not qualify
as Personal Use.
30. "*RealMedia File Format*" means the file format designed and
developed by RealNetworks for storing multimedia data and used to store
RealAudio and RealVideo encoded streams. Valid RealMedia File Format
extensions include: .rm, .rmj, .rmc, .rmvb, .rms.
31. "*RCSL Webpage*" means the RealNetworks Community Source License
webpage located at https://www.helixcommunity.org/content/rcsl or such
other URL that Original Contributor may designate from time to time.
32. "*Reformatted Specifications*" means any revision to the
Specifications which translates or reformats the Specifications (as for
example in connection with Your documentation) but which does not alter,
subset or superset * *the functional or operational aspects of the
Specifications.
33. "*Research Use*" means use and distribution of Covered Code only for
Your Personal Use, research or development use and expressly excludes
Internal Deployment Use and Commercial Use. Research Use also includes
use of Covered Code to teach individuals how to use Covered Code.
34. "*Shared Modifications*" means Modifications that You distribute or
use for a Commercial Use, in addition to any Modifications provided by
You, at Your option, pursuant to Section 2.2, or received by You from a
Contributor pursuant to Section 2.3.
35. "*Source Code*" means the preferred form of the Covered Code for
making modifications to it, including all modules it contains, plus any
associated interface definition files, scripts used to control
compilation and installation of an Executable, or source code
differential comparisons against either the Original Code or another
well known, available Covered Code of the Contributor's choice. The
Source Code can be in a compressed or archival form, provided the
appropriate decompression or de-archiving software is widely available
for no charge.
36. "*Specifications*" means the specifications for the Technology and
other documentation, as designated on the Community Web Server, as may
be revised by Original Contributor from time to time.
37. "*Trademarks*" means Original Contributor's trademarks and logos,
including, but not limited to, RealNetworks, RealAudio, RealVideo,
RealOne, RealSystem, SureStream, Helix, Helix DNA and other trademarks
whether now used or adopted in the future.
38. "*Technology*" means the technology described in Attachment B, and
Upgrades.
39. "*Technology Compatibility Kit"* or *"TCK*" means the test programs,
procedures, acceptance criteria and/or other requirements, designated by
Original Contributor for use in verifying compliance of Covered Code
with the Specifications, in conjunction with the Original Code and
Upgraded Code. Original Contributor may, in its sole discretion and from
time to time, revise a TCK to correct errors and/or omissions and in
connection with Upgrades.
40. "*Upgrade(s)"* means new versions of Technology designated
exclusively by Original Contributor as an "Upgrade" and released by
Original Contributor from time to time under the terms of the License.
41. "*Upgraded Code*" means the Source Code and/or Executables for
Upgrades, possibly including Modifications made by Contributors.
42. *"User's Guide"* means the users guide for the TCK which Original
Contributor makes available to You to provide direction in how to run
the TCK and properly interpret the results, as may be revised by
Original Contributor from time to time.
43. "*You(r)*" means an individual, or a legal entity acting by and
through an individual or individuals, exercising rights either under
this License or under a future version of this License issued pursuant
to Section 4.1. For legal entities, "You(r)" includes any entity that by
majority voting interest controls, is controlled by, or is under common
control with You.
44. "*Your Products*" means any (i) hardware products You distribute
integrating the Covered Code; (ii) any software products You distribute
with the Covered Code that utilize the APIs of the Covered Code; or
(iii) any services You provide using the Covered Code.
ATTACHMENT A
REQUIRED NOTICES
ATTACHMENT A-1
REQUIRED IN ALL CASES
Notice to be included in header file of all Error Corrections and Shared
Modifications:
Portions Copyright 1994-2003 © RealNetworks, Inc. All rights reserved.
The contents of this file, and the files included with this file, are
subject to the current version of RealNetworks Community Source License
Version 1.1 (the "License"). You may not use this file except in
compliance with the License executed by both You and RealNetworks. You
may obtain a copy of the License at *
https://www.helixcommunity.org/content/rcsl.* You may also obtain a copy
of the License by contacting RealNetworks directly. Please see the
License for the rights, obligations and limitations governing use of the
contents of the file.
This file is part of the Helix DNA technology. RealNetworks, Inc., is
the developer of the Original code and owns the copyrights in the
portions it created.
This file, and the files included with this file, are distributed on an
'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT
LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
Contributor(s):
_______________________________________________
Technology Compatibility Kit Test Suite(s) Location:
________________________________
ATTACHMENT A-2
SAMPLE LICENSEE CERTIFICATION
"By clicking the `Agree' button below, You certify that You are a
Licensee in good standing under the RealNetworks Community Source
License, ("License") and that Your access, use and distribution of code
and information You may obtain at this site is subject to the License.
If You are not a Licensee under the RealNetworks Community Source
License You agree not to download, copy or use the Helix DNA technology.
ATTACHMENT A-3
REQUIRED STUDENT NOTIFICATION
"This software and related documentation has been obtained by Your
educational institution subject to the RealNetworks Community Source
License. You have been provided access to the software and related
documentation for use only in connection with your course work and
research activities as a matriculated student of Your educational
institution. Any other use is expressly prohibited.
THIS SOFTWARE AND RELATED DOCUMENTATION CONTAINS PROPRIETARY MATERIAL OF
REALNETWORKS, INC, WHICH ARE PROTECTED BY VARIOUS INTELLECTUAL PROPERTY
RIGHTS.
You may not use this file except in compliance with the License. You may
obtain a copy of the License on the web at
https://www.helixcommunity.org/content/rcsl.
*
*
ATTACHMENT B
Description of Technology
Helix DNA, which consists of Helix DNA Client, Helix DNA Server and
Helix DNA Producer.
Description of "Technology"
Helix DNA Technology v1.0 as described on the Community Web Server.
ATTACHMENT C
TECHNOLOGY COMPATIBILITY KIT LICENSE
The following license is effective for the *Helix DNA* Technology
Compatibility Kit - as described on the Community Web Server. The
Technology Compatibility Kit(s) for the Technology specified in
Attachment B may be accessed at the Community Web Server.
1. TCK License.
1.1 Grants to use TCK
Subject to the terms and restrictions set forth below and the
RealNetworks Community Source License, and the Research Use license,
Original Contributor grants to You a worldwide, non-exclusive,
non-transferable license, to the extent of Original Contributor's
Intellectual Property Rights in the TCK (without the right to
sublicense), to use the TCK to develop and test Covered Code.
1.2 TCK Use Restrictions.
You are not authorized to create derivative works of the TCK or use the
TCK to test any implementation of the Specification that is not Covered
Code. You may not publish Your test results or make claims of
comparative compatibility with respect to other implementations of the
Specification. In consideration for the license grant in Section 1.1
above You agree not to develop Your own tests that are intended to
validate conformation with the Specification.
2. Test Results.
You agree to provide to Original Contributor or the third party test
facility if applicable, Your test results that demonstrate that Covered
Code is Compliant Covered Code and that Original Contributor may publish
or otherwise distribute such test results.
PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE
"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND
CONDITIONS OF THIS LICENSE WITH THE ORIGINAL CONTRIBUTOR, REALNETWORKS,
INC. IF YOU ARE AGREEING TO THIS LICENSE ON BEHALF OF A COMPANY, YOU
REPRESENT THAT YOU ARE AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE.
WHETHER YOU ARE ACTING ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY,
YOU MUST BE OF MAJORITY AGE AND BE OTHERWISE COMPETENT TO ENTER INTO
CONTRACTS. IF YOU DO NOT MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY
OF THE TERMS AND CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON
TO EXIT.
*ACCEPT / REJECT
*
*
*
*To agree to the R&D/academic terms of this license, please register
<https://www.helixcommunity.org/2002/intro/why-register> on the site --
you will then be given a chance to agree to the clickwrap RCSL
<https://reguseronly.helixcommunity.org/2002/clickwrap/rcsl-clickwrap>
R&D License
<https://reguseronly.helixcommunity.org/2002/clickwrap/rcsl-clickwrap>
and gain access to the RCSL-licensed source code. To build or deploy
commercial applications based on the RCSL, you will need to agree to the
Commercial Use license attachments
<https://www.helixcommunity.org/content/rcsl-attachments>*

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RealNetworks Public Source License Version 1.0
(Rev. Date October 28, 2002)
1. General Definitions. This License applies to any program or other work which
RealNetworks, Inc., or any other entity that elects to use this license,
("Licensor") makes publicly available and which contains a notice placed by
Licensor identifying such program or work as "Original Code" and stating that it
is subject to the terms of this RealNetworks Public Source License version 1.0
(or subsequent version thereof) ("License"). You are not required to accept this
License. However, nothing else grants You permission to use, copy, modify or
distribute the software or its derivative works. These actions are prohibited by
law if You do not accept this License. Therefore, by modifying, copying or
distributing the software (or any work based on the software), You indicate your
acceptance of this License to do so, and all its terms and conditions. In
addition, you agree to the terms of this License by clicking the Accept button
or downloading the software. As used in this License:
1.1 "Applicable Patent Rights" mean: (a) in the case where Licensor is the
grantor of rights, claims of patents that (i) are now or hereafter acquired,
owned by or assigned to Licensor and (ii) are necessarily infringed by using or
making the Original Code alone and not in combination with other software or
hardware; and (b) in the case where You are the grantor of rights, claims of
patents that (i) are now or hereafter acquired, owned by or assigned to You and
(ii) are infringed (directly or indirectly) by using or making Your
Modifications, taken alone or in combination with Original Code.
1.2 "Compatible Source License" means any one of the licenses listed on Exhibit
B or at https://www.helixcommunity.org/content/complicense or other licenses
specifically identified by Licensor in writing. Notwithstanding any term to the
contrary in any Compatible Source License, any code covered by any Compatible
Source License that is used with Covered Code must be made readily available in
Source Code format for royalty-free use under the terms of the Compatible Source
License or this License.
1.3 "Contributor" means any person or entity that creates or contributes to the
creation of Modifications.
1.4 "Covered Code" means the Original Code, Modifications, the combination of
Original Code and any Modifications, and/or any respective portions thereof.
1.5 "Deploy" means to use, sublicense or distribute Covered Code other than for
Your internal research and development (R&D) and/or Personal Use, and includes
without limitation, any and all internal use or distribution of Covered Code
within Your business or organization except for R&D use and/or Personal Use, as
well as direct or indirect sublicensing or distribution of Covered Code by You
to any third party in any form or manner.
1.6 "Derivative Work" means either the Covered Code or any derivative work under
United States copyright law, and including any work containing or including any
portion of the Covered Code or Modifications, either verbatim or with
modifications and/or translated into another language. Derivative Work also
includes any work which combines any portion of Covered Code or Modifications
with code not otherwise governed by the terms of this License.
1.7 "Externally Deploy" means to Deploy the Covered Code in any way that may be
accessed or used by anyone other than You, used to provide any services to
anyone other than You, or used in any way to deliver any content to anyone other
than You, whether the Covered Code is distributed to those parties, made
available as an application intended for use over a computer network, or used to
provide services or otherwise deliver content to anyone other than You.
1.8. "Interface" means interfaces, functions, properties, class definitions,
APIs, header files, GUIDs, V-Tables, and/or protocols allowing one piece of
software, firmware or hardware to communicate or interoperate with another piece
of software, firmware or hardware.
1.9 "Modifications" mean any addition to, deletion from, and/or change to, the
substance and/or structure of the Original Code, any previous Modifications, the
combination of Original Code and any previous Modifications, and/or any
respective portions thereof. When code is released as a series of files, a
Modification is: (a) any addition to or deletion from the contents of a file
containing Covered Code; and/or (b) any new file or other representation of
computer program statements that contains any part of Covered Code.
1.10 "Original Code" means (a) the Source Code of a program or other work as
originally made available by Licensor under this License, including the Source
Code of any updates or upgrades to such programs or works made available by
Licensor under this License, and that has been expressly identified by Licensor
as such in the header file(s) of such work; and (b) the object code compiled
from such Source Code and originally made available by Licensor under this
License.
1.11 "Personal Use" means use of Covered Code by an individual solely for his or
her personal, private and non-commercial purposes. An individual's use of
Covered Code in his or her capacity as an officer, employee, member, independent
contractor or agent of a corporation, business or organization (commercial or
non-commercial) does not qualify as Personal Use.
1.12 "Source Code" means the human readable form of a program or other work that
is suitable for making modifications to it, including all modules it contains,
plus any associated interface definition files, scripts used to control
compilation and installation of an executable (object code).
1.13 "You" or "Your" means an individual or a legal entity exercising rights
under this License. For legal entities, "You" or "Your" includes any entity
which controls, is controlled by, or is under common control with, You, where
"control" means (a) the power, direct or indirect, to cause the direction or
management of such entity, whether by contract or otherwise, or (b) ownership of
fifty percent (50%) or more of the outstanding shares or beneficial ownership of
such entity.
2. Permitted Uses; Conditions & Restrictions. Subject to the terms and
conditions of this License, Licensor hereby grants You, effective on the date
You accept this License (via downloading or using Covered Code or otherwise
indicating your acceptance of this License), a worldwide, royalty-free,
non-exclusive copyright license, to the extent of Licensor's copyrights cover
the Original Code, to do the following:
2.1 You may reproduce, display, perform, modify and Deploy Covered Code,
provided that in each instance:
(a) You must retain and reproduce in all copies of Original Code the copyright
and other proprietary notices and disclaimers of Licensor as they appear in the
Original Code, and keep intact all notices in the Original Code that refer to
this License;
(b) You must include a copy of this License with every copy of Source Code of
Covered Code and documentation You distribute, and You may not offer or impose
any terms on such Source Code that alter or restrict this License or the
recipients' rights hereunder, except as permitted under Section 6;
(c) You must duplicate, to the extent it does not already exist, the notice in
Exhibit A in each file of the Source Code of all Your Modifications, and cause
the modified files to carry prominent notices stating that You changed the files
and the date of any change;
(d) You must make Source Code of all Your Externally Deployed Modifications
publicly available under the terms of this License, including the license grants
set forth in Section 3 below, for as long as you Deploy the Covered Code or
twelve (12) months from the date of initial Deployment, whichever is longer. You
should preferably distribute the Source Code of Your Deployed Modifications
electronically (e.g. download from a web site); and
(e) if You Deploy Covered Code in object code, executable form only, You must
include a prominent notice, in the code itself as well as in related
documentation, stating that Source Code of the Covered Code is available under
the terms of this License with information on how and where to obtain such
Source Code. You must also include the Object Code Notice set forth in Exhibit A
in the "about" box or other appropriate place where other copyright notices are
placed, including any packaging materials.
2.2 You expressly acknowledge and agree that although Licensor and each
Contributor grants the licenses to their respective portions of the Covered Code
set forth herein, no assurances are provided by Licensor or any Contributor that
the Covered Code does not infringe the patent or other intellectual property
rights of any other entity. Licensor and each Contributor disclaim any liability
to You for claims brought by any other entity based on infringement of
intellectual property rights or otherwise. As a condition to exercising the
rights and licenses granted hereunder, You hereby assume sole responsibility to
secure any other intellectual property rights needed, if any. For example, if a
third party patent license is required to allow You to make, use, sell, import
or offer for sale the Covered Code, it is Your responsibility to acquire such
license(s).
2.3 Subject to the terms and conditions of this License, Licensor hereby grants
You, effective on the date You accept this License (via downloading or using
Covered Code or otherwise indicating your acceptance of this License), a
worldwide, royalty-free, perpetual, non-exclusive patent license under
Licensor's Applicable Patent Rights to make, use, sell, offer for sale and
import the Covered Code, provided that in each instance you comply with the
terms of this License.
3. Your Grants. In consideration of, and as a condition to, the licenses granted
to You under this License:
(a) You grant to Licensor and all third parties a non-exclusive, perpetual,
irrevocable, royalty free license under Your Applicable Patent Rights and other
intellectual property rights owned or controlled by You, to make, sell, offer
for sale, use, import, reproduce, display, perform, modify, distribute and
Deploy Your Modifications of the same scope and extent as Licensor's licenses
under Sections 2.1 and 2.2; and
(b) You grant to Licensor and its subsidiaries a non-exclusive, worldwide,
royalty-free, perpetual and irrevocable license, under Your Applicable Patent
Rights and other intellectual property rights owned or controlled by You, to
make, use, sell, offer for sale, import, reproduce, display, perform,
distribute, modify or have modified (for Licensor and/or its subsidiaries),
sublicense and distribute Your Modifications, in any form and for any purpose,
through multiple tiers of distribution.
(c) You agree not use any information derived from Your use and review of the
Covered Code, including but not limited to any algorithms or inventions that may
be contained in the Covered Code, for the purpose of asserting any of Your
patent rights, or assisting a third party to assert any of its patent rights,
against Licensor or any Contributor.
4. Derivative Works. You may create a Derivative Work by combining Covered Code
with other code not otherwise governed by the terms of this License and
distribute the Derivative Work as an integrated product. In each such instance,
You must make sure the requirements of this License are fulfilled for the
Covered Code or any portion thereof, including all Modifications.
4.1 You must cause any Derivative Work that you distribute, publish or
Externally Deploy, that in whole or in part contains or is derived from the
Covered Code or any part thereof, to be licensed as a whole at no charge to all
third parties under the terms of this License and no other license except as
provided in Section 4.2. You also must make Source Code available for the
Derivative Work under the same terms as Modifications, described in Sections 2
and 3, above.
4.2 Compatible Source Licenses. Software modules that have been independently
developed without any use of Covered Code and which contain no portion of the
Covered Code, Modifications or other Derivative Works, but are used or combined
in any way wtih the Covered Code or any Derivative Work to form a larger
Derivative Work, are exempt from the conditions described in Section 4.1 but
only to the extent that: the software module, including any software that is
linked to, integrated with, or part of the same applications as, the software
module by any method must be wholly subject to one of the Compatible Source
Licenses. Notwithstanding the foregoing, all Covered Code must be subject to the
terms of this License. Thus, the entire Derivative Work must be licensed under a
combination of the RPSL (for Covered Code) and a Compatible Source License for
any independently developed software modules within the Derivative Work. The
foregoing requirement applies even if the Compatible Source License would
ordinarily allow the software module to link with, or form larger works with,
other software that is not subject to the Compatible Source License. For
example, although the Mozilla Public License v1.1 allows Mozilla code to be
combined with proprietary software that is not subject to the MPL, if
MPL-licensed code is used with Covered Code the MPL-licensed code could not be
combined or linked with any code not governed by the MPL. The general intent of
this section 4.2 is to enable use of Covered Code with applications that are
wholly subject to an acceptable open source license. You are responsible for
determining whether your use of software with Covered Code is allowed under Your
license to such software.
4.3 Mere aggregation of another work not based on the Covered Code with the
Covered Code (or with a work based on the Covered Code) on a volume of a storage
or distribution medium does not bring the other work under the scope of this
License. If You deliver the Covered Code for combination and/or integration with
an application previously provided by You (for example, via automatic updating
technology), such combination and/or integration constitutes a Derivative Work
subject to the terms of this License.
5. Exclusions From License Grant. Nothing in this License shall be deemed to
grant any rights to trademarks, copyrights, patents, trade secrets or any other
intellectual property of Licensor or any Contributor except as expressly stated
herein. No right is granted to the trademarks of Licensor or any Contributor
even if such marks are included in the Covered Code. Nothing in this License
shall be interpreted to prohibit Licensor from licensing under different terms
from this License any code that Licensor otherwise would have a right to
license. Modifications, Derivative Works and/or any use or combination of
Covered Code with other technology provided by Licensor or third parties may
require additional patent licenses from Licensor which Licensor may grant in its
sole discretion. No patent license is granted separate from the Original Code or
combinations of the Original Code with other software or hardware.
5.1. Trademarks. This License does not grant any rights to use the trademarks or
trade names owned by Licensor ("Licensor Marks" defined in Exhibit C) or to any
trademark or trade name belonging to any Contributor. No Licensor Marks may be
used to endorse or promote products derived from the Original Code other than as
permitted by the Licensor Trademark Policy defined in Exhibit C.
6. Additional Terms. You may choose to offer, and to charge a fee for, warranty,
support, indemnity or liability obligations and/or other rights consistent with
the scope of the license granted herein ("Additional Terms") to one or more
recipients of Covered Code. However, You may do so only on Your own behalf and
as Your sole responsibility, and not on behalf of Licensor or any Contributor.
You must obtain the recipient's agreement that any such Additional Terms are
offered by You alone, and You hereby agree to indemnify, defend and hold
Licensor and every Contributor harmless for any liability incurred by or claims
asserted against Licensor or such Contributor by reason of any such Additional
Terms.
7. Versions of the License. Licensor may publish revised and/or new versions of
this License from time to time. Each version will be given a distinguishing
version number. Once Original Code has been published under a particular version
of this License, You may continue to use it under the terms of that version. You
may also choose to use such Original Code under the terms of any subsequent
version of this License published by Licensor. No one other than Licensor has
the right to modify the terms applicable to Covered Code created under this
License.
8. NO WARRANTY OR SUPPORT. The Covered Code may contain in whole or in part
pre-release, untested, or not fully tested works. The Covered Code may contain
errors that could cause failures or loss of data, and may be incomplete or
contain inaccuracies. You expressly acknowledge and agree that use of the
Covered Code, or any portion thereof, is at Your sole and entire risk. THE
COVERED CODE IS PROVIDED "AS IS" AND WITHOUT WARRANTY, UPGRADES OR SUPPORT OF
ANY KIND AND LICENSOR AND LICENSOR'S LICENSOR(S) (COLLECTIVELY REFERRED TO AS
"LICENSOR" FOR THE PURPOSES OF SECTIONS 8 AND 9) AND ALL CONTRIBUTORS EXPRESSLY
DISCLAIM ALL WARRANTIES AND/OR CONDITIONS, EXPRESS OR IMPLIED, INCLUDING, BUT
NOT LIMITED TO, THE IMPLIED WARRANTIES AND/OR CONDITIONS OF MERCHANTABILITY, OF
SATISFACTORY QUALITY, OF FITNESS FOR A PARTICULAR PURPOSE, OF ACCURACY, OF QUIET
ENJOYMENT, AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. LICENSOR AND EACH
CONTRIBUTOR DOES NOT WARRANT AGAINST INTERFERENCE WITH YOUR ENJOYMENT OF THE
COVERED CODE, THAT THE FUNCTIONS CONTAINED IN THE COVERED CODE WILL MEET YOUR
REQUIREMENTS, THAT THE OPERATION OF THE COVERED CODE WILL BE UNINTERRUPTED OR
ERROR-FREE, OR THAT DEFECTS IN THE COVERED CODE WILL BE CORRECTED. NO ORAL OR
WRITTEN DOCUMENTATION, INFORMATION OR ADVICE GIVEN BY LICENSOR, A LICENSOR
AUTHORIZED REPRESENTATIVE OR ANY CONTRIBUTOR SHALL CREATE A WARRANTY. You
acknowledge that the Covered Code is not intended for use in high risk
activities, including, but not limited to, the design, construction, operation
or maintenance of nuclear facilities, aircraft navigation, aircraft
communication systems, or air traffic control machines in which case the failure
of the Covered Code could lead to death, personal injury, or severe physical or
environmental damage. Licensor disclaims any express or implied warranty of
fitness for such uses.
9. LIMITATION OF LIABILITY. TO THE EXTENT NOT PROHIBITED BY LAW, IN NO EVENT
SHALL LICENSOR OR ANY CONTRIBUTOR BE LIABLE FOR ANY INCIDENTAL, SPECIAL,
INDIRECT OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR RELATING TO THIS LICENSE OR
YOUR USE OR INABILITY TO USE THE COVERED CODE, OR ANY PORTION THEREOF, WHETHER
UNDER A THEORY OF CONTRACT, WARRANTY, TORT (INCLUDING NEGLIGENCE OR STRICT
LIABILITY), PRODUCTS LIABILITY OR OTHERWISE, EVEN IF LICENSOR OR SUCH
CONTRIBUTOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES AND
NOTWITHSTANDING THE FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. SOME
JURISDICTIONS DO NOT ALLOW THE LIMITATION OF LIABILITY OF INCIDENTAL OR
CONSEQUENTIAL DAMAGES, SO THIS LIMITATION MAY NOT APPLY TO YOU. In no event
shall Licensor's total liability to You for all damages (other than as may be
required by applicable law) under this License exceed the amount of ten dollars
($10.00).
10. Ownership. Subject to the licenses granted under this License, each
Contributor retains all rights, title and interest in and to any Modifications
made by such Contributor. Licensor retains all rights, title and interest in and
to the Original Code and any Modifications made by or on behalf of Licensor
("Licensor Modifications"), and such Licensor Modifications will not be
automatically subject to this License. Licensor may, at its sole discretion,
choose to license such Licensor Modifications under this License, or on
different terms from those contained in this License or may choose not to
license them at all.
11. Termination.
11.1 Term and Termination. The term of this License is perpetual unless
terminated as provided below. This License and the rights granted hereunder will
terminate:
(a) automatically without notice from Licensor if You fail to comply with any
term(s) of this License and fail to cure such breach within 30 days of becoming
aware of such breach;
(b) immediately in the event of the circumstances described in Section 12.5(b);
or
(c) automatically without notice from Licensor if You, at any time during the
term of this License, commence an action for patent infringement against
Licensor (including by cross-claim or counter claim in a lawsuit);
(d) upon written notice from Licensor if You, at any time during the term of
this License, commence an action for patent infringement against any third party
alleging that the Covered Code itself (excluding combinations with other
software or hardware) infringes any patent (including by cross-claim or counter
claim in a lawsuit).
11.2 Effect of Termination. Upon termination, You agree to immediately stop any
further use, reproduction, modification, sublicensing and distribution of the
Covered Code and to destroy all copies of the Covered Code that are in your
possession or control. All sublicenses to the Covered Code which have been
properly granted prior to termination shall survive any termination of this
License. Provisions which, by their nature, should remain in effect beyond the
termination of this License shall survive, including but not limited to Sections
3, 5, 8, 9, 10, 11, 12.2 and 13. No party will be liable to any other for
compensation, indemnity or damages of any sort solely as a result of terminating
this License in accordance with its terms, and termination of this License will
be without prejudice to any other right or remedy of any party.
12. Miscellaneous.
12.1 Government End Users. The Covered Code is a "commercial item" as defined in
FAR 2.101. Government software and technical data rights in the Covered Code
include only those rights customarily provided to the public as defined in this
License. This customary commercial license in technical data and software is
provided in accordance with FAR 12.211 (Technical Data) and 12.212 (Computer
Software) and, for Department of Defense purchases, DFAR 252.227-7015 (Technical
Data -- Commercial Items) and 227.7202-3 (Rights in Commercial Computer Software
or Computer Software Documentation). Accordingly, all U.S. Government End Users
acquire Covered Code with only those rights set forth herein.
12.2 Relationship of Parties. This License will not be construed as creating an
agency, partnership, joint venture or any other form of legal association
between or among You, Licensor or any Contributor, and You will not represent to
the contrary, whether expressly, by implication, appearance or otherwise.
12.3 Independent Development. Nothing in this License will impair Licensor's
right to acquire, license, develop, have others develop for it, market and/or
distribute technology or products that perform the same or similar functions as,
or otherwise compete with, Modifications, Derivative Works, technology or
products that You may develop, produce, market or distribute.
12.4 Waiver; Construction. Failure by Licensor or any Contributor to enforce any
provision of this License will not be deemed a waiver of future enforcement of
that or any other provision. Any law or regulation which provides that the
language of a contract shall be construed against the drafter will not apply to
this License.
12.5 Severability. (a) If for any reason a court of competent jurisdiction finds
any provision of this License, or portion thereof, to be unenforceable, that
provision of the License will be enforced to the maximum extent permissible so
as to effect the economic benefits and intent of the parties, and the remainder
of this License will continue in full force and effect. (b) Notwithstanding the
foregoing, if applicable law prohibits or restricts You from fully and/or
specifically complying with Sections 2 and/or 3 or prevents the enforceability
of either of those Sections, this License will immediately terminate and You
must immediately discontinue any use of the Covered Code and destroy all copies
of it that are in your possession or control.
12.6 Dispute Resolution. Any litigation or other dispute resolution between You
and Licensor relating to this License shall take place in the Seattle,
Washington, and You and Licensor hereby consent to the personal jurisdiction of,
and venue in, the state and federal courts within that District with respect to
this License. The application of the United Nations Convention on Contracts for
the International Sale of Goods is expressly excluded.
12.7 Export/Import Laws. This software is subject to all export and import laws
and restrictions and regulations of the country in which you receive the Covered
Code and You are solely responsible for ensuring that You do not export,
re-export or import the Covered Code or any direct product thereof in violation
of any such restrictions, laws or regulations, or without all necessary
authorizations.
12.8 Entire Agreement; Governing Law. This License constitutes the entire
agreement between the parties with respect to the subject matter hereof. This
License shall be governed by the laws of the United States and the State of
Washington.
Where You are located in the province of Quebec, Canada, the following clause
applies: The parties hereby confirm that they have requested that this License
and all related documents be drafted in English. Les parties ont exig&eacute;
que le pr&eacute;sent contrat et tous les documents connexes soient
r&eacute;dig&eacute;s en anglais.
EXHIBIT A.
"Copyright &copy; 1995-2002
RealNetworks, Inc. and/or its licensors. All Rights Reserved.
The contents of this file, and the files included with this file, are subject to
the current version of the RealNetworks Public Source License Version 1.0 (the
"RPSL") available at https://www.helixcommunity.org/content/rpsl unless you have
licensed the file under the RealNetworks Community Source License Version 1.0
(the "RCSL") available at https://www.helixcommunity.org/content/rcsl, in which
case the RCSL will apply. You may also obtain the license terms directly from
RealNetworks. You may not use this file except in compliance with the RPSL or,
if you have a valid RCSL with RealNetworks applicable to this file, the RCSL.
Please see the applicable RPSL or RCSL for the rights, obligations and
limitations governing use of the contents of the file.
This file is part of the Helix DNA Technology. RealNetworks is the developer of
the Original code and owns the copyrights in the portions it created.
This file, and the files included with this file, is distributed and made
available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR
IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING
WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
Contributor(s): ____________________________________
Technology Compatibility Kit Test
Suite(s) Location (if licensed under the RCSL): ______________________________
Object Code Notice: Helix DNA Client technology included. Copyright (c)
RealNetworks, Inc., 1995-2002. All rights reserved.
EXHIBIT B
Compatible Source Licenses for the RealNetworks Public Source License. The
following list applies to the most recent version of the license as of October
25, 2002, unless otherwise indicated.
* Academic Free License
* Apache Software License
* Apple Public Source License
* Artistic license
* Attribution Assurance Licenses
* BSD license
* Common Public License (1)
* Eiffel Forum License
* GNU General Public License (GPL) (1)
* GNU Library or "Lesser" General Public License (LGPL) (1)
* IBM Public License
* Intel Open Source License
* Jabber Open Source License
* MIT license
* MITRE Collaborative Virtual Workspace License (CVW License)
* Motosoto License
* Mozilla Public License 1.0 (MPL)
* Mozilla Public License 1.1 (MPL)
* Nokia Open Source License
* Open Group Test Suite License
* Python Software Foundation License
* Ricoh Source Code Public License
* Sun Industry Standards Source License (SISSL)
* Sun Public License
* University of Illinois/NCSA Open Source License
* Vovida Software License v. 1.0
* W3C License
* X.Net License
* Zope Public License
* zlib/libpng license
(1) Note: because this license contains certain reciprocal licensing terms that
purport to extend to independently developed code, You may be prohibited under
the terms of this otherwise compatible license from using code licensed under
its terms with Covered Code because Covered Code may only be licensed under the
RealNetworks Public Source License. Any attempt to apply non RPSL license terms,
including without limitation the GPL, to Covered Code is expressly forbidden.
You are responsible for ensuring that Your use of Compatible Source Licensed
code does not violate either the RPSL or the Compatible Source License.
The latest version of this list can be found at:
https://www.helixcommunity.org/content/complicense
EXHIBIT C
RealNetworks' Trademark policy.
RealNetworks defines the following trademarks collectively as "Licensor
Trademarks": "RealNetworks", "RealPlayer", "RealJukebox", "RealSystem",
"RealAudio", "RealVideo", "RealOne Player", "RealMedia", "Helix" or any other
trademarks or trade names belonging to RealNetworks.
RealNetworks "Licensor Trademark Policy" forbids any use of Licensor Trademarks
except as permitted by and in strict compliance at all times with RealNetworks'
third party trademark usage guidelines which are posted at
http://www.realnetworks.com/info/helixlogo.html.

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* mp3common.h - implementation-independent API's, datatypes, and definitions
**************************************************************************************/
#ifndef _MP3COMMON_H
#define _MP3COMMON_H
#include "mp3dec.h"
#include "statname.h" /* do name-mangling for static linking */
#define MAX_SCFBD 4 /* max scalefactor bands per channel */
#define NGRANS_MPEG1 2
#define NGRANS_MPEG2 1
/* 11-bit syncword if MPEG 2.5 extensions are enabled */
#define SYNCWORDH 0xff
#define SYNCWORDL 0xe0
/* 12-bit syncword if MPEG 1,2 only are supported
* #define SYNCWORDH 0xff
* #define SYNCWORDL 0xf0
*/
typedef struct _MP3DecInfo {
/* pointers to platform-specific data structures */
void *FrameHeaderPS;
void *SideInfoPS;
void *ScaleFactorInfoPS;
void *HuffmanInfoPS;
void *DequantInfoPS;
void *IMDCTInfoPS;
void *SubbandInfoPS;
/* buffer which must be large enough to hold largest possible main_data section */
unsigned char mainBuf[MAINBUF_SIZE];
/* special info for "free" bitrate files */
int freeBitrateFlag;
int freeBitrateSlots;
/* user-accessible info */
int bitrate;
int nChans;
int samprate;
int nGrans; /* granules per frame */
int nGranSamps; /* samples per granule */
int nSlots;
int layer;
MPEGVersion version;
int mainDataBegin;
int mainDataBytes;
int part23Length[MAX_NGRAN][MAX_NCHAN];
} MP3DecInfo;
typedef struct _SFBandTable {
short l[23];
short s[14];
} SFBandTable;
/* decoder functions which must be implemented for each platform */
MP3DecInfo *AllocateBuffers(void);
void FreeBuffers(MP3DecInfo *mp3DecInfo);
int CheckPadBit(MP3DecInfo *mp3DecInfo);
int UnpackFrameHeader(MP3DecInfo *mp3DecInfo, unsigned char *buf);
int UnpackSideInfo(MP3DecInfo *mp3DecInfo, unsigned char *buf);
int DecodeHuffman(MP3DecInfo *mp3DecInfo, unsigned char *buf, int *bitOffset, int huffBlockBits, int gr, int ch);
int Dequantize(MP3DecInfo *mp3DecInfo, int gr);
int IMDCT(MP3DecInfo *mp3DecInfo, int gr, int ch);
int UnpackScaleFactors(MP3DecInfo *mp3DecInfo, unsigned char *buf, int *bitOffset, int bitsAvail, int gr, int ch);
int Subband(MP3DecInfo *mp3DecInfo, short *pcmBuf);
/* mp3tabs.c - global ROM tables */
extern const int samplerateTab[3][3];
extern const short bitrateTab[3][3][15];
extern const short samplesPerFrameTab[3][3];
extern const short bitsPerSlotTab[3];
extern const short sideBytesTab[3][2];
extern const short slotTab[3][3][15];
extern const SFBandTable sfBandTable[3][3];
#endif /* _MP3COMMON_H */

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* mp3dec.h - public C API for MP3 decoder
**************************************************************************************/
#ifndef _MP3DEC_H
#define _MP3DEC_H
// Must be moved KJ
//#define __GNUC__
#define ARM
#define ARM_ADS
#if defined(_WIN32) && !defined(_WIN32_WCE)
#
#elif defined(_WIN32) && defined(_WIN32_WCE) && defined(ARM)
#
#elif defined(_WIN32) && defined(WINCE_EMULATOR)
#
#elif defined(ARM_ADS)
#
#elif defined(_SYMBIAN) && defined(__WINS__) /* Symbian emulator for Ix86 */
#
#elif defined(__GNUC__) && defined(ARM)
#
#elif defined(__GNUC__) && defined(__i386__)
#
#elif defined(_OPENWAVE_SIMULATOR) || defined(_OPENWAVE_ARMULATOR)
#
#else
#error No platform defined. See valid options in mp3dec.h
#endif
#ifdef __cplusplus
extern "C" {
#endif
/* determining MAINBUF_SIZE:
* max mainDataBegin = (2^9 - 1) bytes (since 9-bit offset) = 511
* max nSlots (concatenated with mainDataBegin bytes from before) = 1440 - 9 - 4 + 1 = 1428
* 511 + 1428 = 1939, round up to 1940 (4-byte align)
*/
#define MAINBUF_SIZE 1940
#define MAX_NGRAN 2 /* max granules */
#define MAX_NCHAN 2 /* max channels */
#define MAX_NSAMP 576 /* max samples per channel, per granule */
/* map to 0,1,2 to make table indexing easier */
typedef enum {
MPEG1 = 0,
MPEG2 = 1,
MPEG25 = 2
} MPEGVersion;
typedef void *HMP3Decoder;
enum {
ERR_MP3_NONE = 0,
ERR_MP3_INDATA_UNDERFLOW = -1,
ERR_MP3_MAINDATA_UNDERFLOW = -2,
ERR_MP3_FREE_BITRATE_SYNC = -3,
ERR_MP3_OUT_OF_MEMORY = -4,
ERR_MP3_NULL_POINTER = -5,
ERR_MP3_INVALID_FRAMEHEADER = -6,
ERR_MP3_INVALID_SIDEINFO = -7,
ERR_MP3_INVALID_SCALEFACT = -8,
ERR_MP3_INVALID_HUFFCODES = -9,
ERR_MP3_INVALID_DEQUANTIZE = -10,
ERR_MP3_INVALID_IMDCT = -11,
ERR_MP3_INVALID_SUBBAND = -12,
ERR_UNKNOWN = -9999
};
typedef struct _MP3FrameInfo {
int bitrate;
int nChans;
int samprate;
int bitsPerSample;
int outputSamps;
int layer;
int version;
} MP3FrameInfo;
/* public API */
HMP3Decoder MP3InitDecoder(void);
void MP3FreeDecoder(HMP3Decoder hMP3Decoder);
int MP3Decode(HMP3Decoder hMP3Decoder, unsigned char **inbuf, int *bytesLeft, short *outbuf, int useSize);
void MP3GetLastFrameInfo(HMP3Decoder hMP3Decoder, MP3FrameInfo *mp3FrameInfo);
int MP3GetNextFrameInfo(HMP3Decoder hMP3Decoder, MP3FrameInfo *mp3FrameInfo, unsigned char *buf);
int MP3FindSyncWord(unsigned char *buf, int nBytes);
#ifdef __cplusplus
}
#endif
#endif /* _MP3DEC_H */

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* mp3dec.h - public C API for MP3 decoder
**************************************************************************************/
#ifndef _MP3DEC_H
#define _MP3DEC_H
#if defined(_WIN32) && !defined(_WIN32_WCE)
#
#elif defined(_WIN32) && defined(_WIN32_WCE) && defined(ARM)
#
#elif defined(_WIN32) && defined(WINCE_EMULATOR)
#
#elif defined(ARM_ADS)
#
#elif defined(_SYMBIAN) && defined(__WINS__) /* Symbian emulator for Ix86 */
#
#elif defined(__GNUC__) && defined(ARM)
#
#elif defined(__GNUC__) && defined(__i386__)
#
#elif defined(_OPENWAVE_SIMULATOR) || defined(_OPENWAVE_ARMULATOR)
#
#else
// J.Sz. 21/04/2006
#error No platform defined. See valid options in mp3dec.h
#endif
#ifdef __cplusplus
extern "C" {
#endif
/* determining MAINBUF_SIZE:
* max mainDataBegin = (2^9 - 1) bytes (since 9-bit offset) = 511
* max nSlots (concatenated with mainDataBegin bytes from before) = 1440 - 9 - 4 + 1 = 1428
* 511 + 1428 = 1939, round up to 1940 (4-byte align)
*/
#define MAINBUF_SIZE 1940
#define MAX_NGRAN 2 /* max granules */
#define MAX_NCHAN 2 /* max channels */
#define MAX_NSAMP 576 /* max samples per channel, per granule */
/* map to 0,1,2 to make table indexing easier */
typedef enum {
MPEG1 = 0,
MPEG2 = 1,
MPEG25 = 2
} MPEGVersion;
typedef void *HMP3Decoder;
enum {
ERR_MP3_NONE = 0,
ERR_MP3_INDATA_UNDERFLOW = -1,
ERR_MP3_MAINDATA_UNDERFLOW = -2,
ERR_MP3_FREE_BITRATE_SYNC = -3,
ERR_MP3_OUT_OF_MEMORY = -4,
ERR_MP3_NULL_POINTER = -5,
ERR_MP3_INVALID_FRAMEHEADER = -6,
ERR_MP3_INVALID_SIDEINFO = -7,
ERR_MP3_INVALID_SCALEFACT = -8,
ERR_MP3_INVALID_HUFFCODES = -9,
ERR_MP3_INVALID_DEQUANTIZE = -10,
ERR_MP3_INVALID_IMDCT = -11,
ERR_MP3_INVALID_SUBBAND = -12,
ERR_UNKNOWN = -9999
};
typedef struct _MP3FrameInfo {
int bitrate;
int nChans;
int samprate;
int bitsPerSample;
int outputSamps;
int layer;
int version;
} MP3FrameInfo;
/* public API */
HMP3Decoder MP3InitDecoder(void);
void MP3FreeDecoder(HMP3Decoder hMP3Decoder);
int MP3Decode(HMP3Decoder hMP3Decoder, unsigned char **inbuf, int *bytesLeft, short *outbuf, int useSize);
void MP3GetLastFrameInfo(HMP3Decoder hMP3Decoder, MP3FrameInfo *mp3FrameInfo);
int MP3GetNextFrameInfo(HMP3Decoder hMP3Decoder, MP3FrameInfo *mp3FrameInfo, unsigned char *buf);
int MP3FindSyncWord(unsigned char *buf, int nBytes);
#ifdef __cplusplus
}
#endif
#endif /* _MP3DEC_H */

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
#ifndef _MPADECOBJFIXPT_H_
#define _MPADECOBJFIXPT_H_
#include "mp3dec.h" /* public C API for new MP3 decoder */
class CMpaDecObj
{
public:
CMpaDecObj();
~CMpaDecObj();
///////////////////////////////////////////////////////////////////////////
// Function: Init_n
// Purpose: Initialize the mp3 decoder.
// Parameters: pSync a pointer to a syncword
// ulSize the size of the buffer pSync points to
// bUseSize this tells the decoder to use the input frame
// size on the decode instead of calculating
// the frame size. This is necessary when
// our formatted mp3 data (main_data_begin always
// equal to 0).
//
// Returns: returns 1 on success, 0 on failure
///////////////////////////////////////////////////////////////////////////
int Init_n(unsigned char *pSync,
unsigned long ulSize,
unsigned char bUseSize=0);
///////////////////////////////////////////////////////////////////////////
// Function: DecodeFrame_v
// Purpose: Decodes one mp3 frame
// Parameters: pSource pointer to an mp3 frame (at a syncword)
// pulSize size of the buffer pSource points to. It will
// contain the number of mp3 bytes decoded upon
// return.
// pPCM pointer to a buffer to decode into
// pulPCMSize size of the PCM buffer. It will contain the
// number of PCM bytes prodced upon return.
///////////////////////////////////////////////////////////////////////////
void DecodeFrame_v(unsigned char *pSource,
unsigned long *pulSize,
unsigned char *pPCM,
unsigned long *pulPCMSize);
// overloaded new version that returns error code in errCode
void DecodeFrame_v(unsigned char *pSource,
unsigned long *pulSize,
unsigned char *pPCM,
unsigned long *pulPCMSize,
int *errCode);
void GetPCMInfo_v(unsigned long &ulSampRate,
int &nChannels,
int &nBitsPerSample);
// return number of samples per frame, PER CHANNEL (renderer multiplies this result by nChannels)
int GetSamplesPerFrame_n();
void SetTrustPackets(unsigned char bTrust) { m_bTrustPackets = bTrust; }
private:
void * m_pDec; // generic void ptr
void * m_pDecL1; // not implemented (could use old Xing mpadecl1.cpp)
void * m_pDecL2; // not implemented (could use old Xing mpadecl2.cpp)
HMP3Decoder m_pDecL3;
MP3FrameInfo m_lastMP3FrameInfo;
unsigned char m_bUseFrameSize;
unsigned char m_bTrustPackets;
};
#endif /* _MPADECOBJFIXPT_H_ */

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* statname.h - name mangling macros for static linking
**************************************************************************************/
#ifndef _STATNAME_H
#define _STATNAME_H
/* define STAT_PREFIX to a unique name for static linking
* all the C functions and global variables will be mangled by the preprocessor
* e.g. void FFT(int *fftbuf) becomes void cook_FFT(int *fftbuf)
*/
#define STAT_PREFIX xmp3
#define STATCC1(x,y,z) STATCC2(x,y,z)
#define STATCC2(x,y,z) x##y##z
#ifdef STAT_PREFIX
#define STATNAME(func) STATCC1(STAT_PREFIX, _, func)
#else
#define STATNAME(func) func
#endif
/* these symbols are common to all implementations */
#define CheckPadBit STATNAME(CheckPadBit)
#define UnpackFrameHeader STATNAME(UnpackFrameHeader)
#define UnpackSideInfo STATNAME(UnpackSideInfo)
#define AllocateBuffers STATNAME(AllocateBuffers)
#define FreeBuffers STATNAME(FreeBuffers)
#define DecodeHuffman STATNAME(DecodeHuffman)
#define Dequantize STATNAME(Dequantize)
#define IMDCT STATNAME(IMDCT)
#define UnpackScaleFactors STATNAME(UnpackScaleFactors)
#define Subband STATNAME(Subband)
#define samplerateTab STATNAME(samplerateTab)
#define bitrateTab STATNAME(bitrateTab)
#define samplesPerFrameTab STATNAME(samplesPerFrameTab)
#define bitsPerSlotTab STATNAME(bitsPerSlotTab)
#define sideBytesTab STATNAME(sideBytesTab)
#define slotTab STATNAME(slotTab)
#define sfBandTable STATNAME(sfBandTable)
/* in your implementation's top-level include file (e.g. real\coder.h) you should
* add new #define sym STATNAME(sym) lines for all the
* additional global functions or variables which your
* implementation uses
*/
#endif /* _STATNAME_H */

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Copyright (c) 1995-2004 RealNetworks, Inc. All Rights Reserved.
The contents of this directory, and (except where otherwise
indicated) the directories included within this directory, are
subject to the current version of the RealNetworks Public Source
License (the "RPSL") available at RPSL.txt in this directory, unless
you have licensed the directory under the current version of the
RealNetworks Community Source License (the "RCSL") available at
RCSL.txt in this directory, in which case the RCSL will apply. You
may also obtain the license terms directly from RealNetworks. You
may not use the files in this directory except in compliance with the
RPSL or, if you have a valid RCSL with RealNetworks applicable to
this directory, the RCSL. Please see the applicable RPSL or RCSL for
the rights, obligations and limitations governing use of the contents
of the directory.
This directory is part of the Helix DNA Technology. RealNetworks is
the developer of the Original Code and owns the copyrights in the
portions it created.
This directory, and the directories included with this directory, are
distributed and made available on an 'AS IS' basis, WITHOUT WARRANTY
OF ANY KIND, EITHER EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY
DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
QUIET ENJOYMENT OR NON-INFRINGEMENT.
Technology Compatibility Kit Test Suite(s) Location:
http://www.helixcommunity.org/content/tck

948
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@ -0,0 +1,948 @@
The RCSL is made up of a base agreement and a few Attachments.
For Research and Development use, you agree to the terms of the
RCSL R&D License (base RCSL and Attachments A, B, and C)
For Commercial Use (either distribution or internal commercial
deployment) of the Helix DNA with or without support for RealNetworks'
RealAudio and RealVideo Add-on Technology, you agree to the
terms of the same RCSL R&D license
and execute one or more additional Commercial Use License attachments
<see http://www.helixcommunity.org/content/rcsl-attachments>.
------------------------------------------------------------------------
REALNETWORKS COMMUNITY SOURCE LICENSE
Version 1.2 (Rev. Date: January 22, 2003).
RECITALS
Original Contributor has developed Specifications, Source Code
implementations and Executables of certain Technology; and
Original Contributor desires to license the Technology to a large
community to facilitate research, innovation and product development
while maintaining compatibility of such products with the Technology as
delivered by Original Contributor; and
Original Contributor desires to license certain Trademarks for the
purpose of branding products that are compatible with the relevant
Technology delivered by Original Contributor; and
You desire to license the Technology and possibly certain Trademarks
from Original Contributor on the terms and conditions specified in this
License.
In consideration for the mutual covenants contained herein, You and
Original Contributor agree as follows:
AGREEMENT
*1. Introduction.*
The RealNetworks Community Source License ("RCSL") and effective
attachments ("License") may include five distinct licenses:
i) Research Use license -- License plus Attachments A, B and C only.
ii) Commercial Use and Trademark License, which may be for Internal
Deployment Use or external distribution, or both -- License plus
Attachments A, B, C, and D.
iii) Technology Compatibility Kit (TCK) license -- Attachment C.
iv) Add-On Technology License (Executable) Commercial Use License
-Attachment F.
v) Add-On Technology Source Code Porting and Optimization
License-Attachment G.
The Research Use license is effective when You click and accept this
License. The TCK is effective when You click and accept this License,
unless otherwise specified in the TCK attachments. The Commercial Use
and Trademark, Add-On Technology License, and the Add-On Technology
Source Code Porting and Optimization licenses must each be signed by You
and Original Contributor to become effective. Once effective, these
licenses and the associated requirements and responsibilities are
cumulative. Capitalized terms used in this License are defined in the
Glossary.
*2. License Grants.*
2.1 Original Contributor Grant.
Subject to Your compliance with Sections 3, 8.10 and Attachment A of
this License, Original Contributor grants to You a worldwide,
royalty-free, non-exclusive license, to the extent of Original
Contributor's Intellectual Property Rights covering the Original Code,
Upgraded Code and Specifications, to do the following:
(a) Research Use License:
(i) use, reproduce and modify the Original Code, Upgraded Code and
Specifications to create Modifications and Reformatted Specifications
for Research Use by You;
(ii) publish and display Original Code, Upgraded Code and Specifications
with, or as part of Modifications, as permitted under Section 3.1(b) below;
(iii) reproduce and distribute copies of Original Code and Upgraded Code
to Licensees and students for Research Use by You;
(iv) compile, reproduce and distribute Original Code and Upgraded Code
in Executable form, and Reformatted Specifications to anyone for
Research Use by You.
(b) Other than the licenses expressly granted in this License, Original
Contributor retains all right, title, and interest in Original Code and
Upgraded Code and Specifications.
2.2 Your Grants.
(a) To Other Licensees. You hereby grant to each Licensee a license to
Your Error Corrections and Shared Modifications, of the same scope and
extent as Original Contributor's licenses under Section 2.1 a) above
relative to Research Use and Attachment D relative to Commercial Use.
(b) To Original Contributor. You hereby grant to Original Contributor a
worldwide, royalty-free, non-exclusive, perpetual and irrevocable
license, to the extent of Your Intellectual Property Rights covering
Your Error Corrections, Shared Modifications and Reformatted
Specifications, to use, reproduce, modify, display and distribute Your
Error Corrections, Shared Modifications and Reformatted Specifications,
in any form, including the right to sublicense such rights through
multiple tiers of distribution.
(c) Other than the licenses expressly granted in Sections 2.2(a) and (b)
above, and the restrictions set forth in Section 3.1(d)(iv) below, You
retain all right, title, and interest in Your Error Corrections, Shared
Modifications and Reformatted Specifications.
2.3 Contributor Modifications.
You may use, reproduce, modify, display and distribute Contributor Error
Corrections, Shared Modifications and Reformatted Specifications,
obtained by You under this License, to the same scope and extent as with
Original Code, Upgraded Code and Specifications.
2.4 Subcontracting.
You may deliver the Source Code of Covered Code to other Licensees
having at least a Research Use license, for the sole purpose of
furnishing development services to You in connection with Your rights
granted in this License. All such Licensees must execute appropriate
documents with respect to such work consistent with the terms of this
License, and acknowledging their work-made-for-hire status or assigning
exclusive right to the work product and associated Intellectual Property
Rights to You.
*3. Requirements and Responsibilities*.
3.1 Research Use License.
As a condition of exercising the rights granted under Section 2.1(a)
above, You agree to comply with the following:
(a) Your Contribution to the Community. All Error Corrections and Shared
Modifications which You create or contribute to are automatically
subject to the licenses granted under Section 2.2 above. You are
encouraged to license all of Your other Modifications under Section 2.2
as Shared Modifications, but are not required to do so. You agree to
notify Original Contributor of any errors in the Specification.
(b) Source Code Availability. You agree to provide all Your Error
Corrections to Original Contributor as soon as reasonably practicable
and, in any event, prior to Internal Deployment Use or Commercial Use,
if applicable. Original Contributor may, at its discretion, post Source
Code for Your Error Corrections and Shared Modifications on the
Community Webserver. You may also post Error Corrections and Shared
Modifications on a web-server of Your choice; provided, that You must
take reasonable precautions to ensure that only Licensees have access to
such Error Corrections and Shared Modifications. Such precautions shall
include, without limitation, a password protection scheme limited to
Licensees and a click-on, download certification of Licensee status
required of those attempting to download from the server. An example of
an acceptable certification is attached as Attachment A-2.
(c) Notices. All Error Corrections and Shared Modifications You create
or contribute to must include a file documenting the additions and
changes You made and the date of such additions and changes. You must
also include the notice set forth in Attachment A-1 in the file header.
If it is not possible to put the notice in a particular Source Code file
due to its structure, then You must include the notice in a location
(such as a relevant directory file), where a recipient would be most
likely to look for such a notice.
(d) Redistribution.
(i) Source. Covered Code may be distributed in Source Code form only to
another Licensee (except for students as provided below). You may not
offer or impose any terms on any Covered Code that alter the rights,
requirements, or responsibilities of such Licensee. You may distribute
Covered Code to students for use in connection with their course work
and research projects undertaken at accredited educational institutions.
Such students need not be Licensees, but must be given a copy of the
notice set forth in Attachment A-3 and such notice must also be included
in a file header or prominent location in the Source Code made available
to such students.
(ii) Executable. You may distribute Executable version(s) of Covered
Code to Licensees and other third parties only for the purpose of
evaluation and comment in connection with Research Use by You and under
a license of Your choice, but which limits use of such Executable
version(s) of Covered Code only to that purpose.
(iii) Modified Class, Interface and Package Naming. In connection with
Research Use by You only, You may use Original Contributor's class,
Interface and package names only to accurately reference or invoke the
Source Code files You modify. Original Contributor grants to You a
limited license to the extent necessary for such purposes.
(iv) You expressly agree that any distribution, in whole or in part, of
Modifications developed by You shall only be done pursuant to the terms
and conditions of this License.
(e) Extensions.
(i) Covered Code. You may not include any Source Code of Community Code
in any Extensions. You may include the compiled Header Files of
Community Code in an Extension provided that Your use of the Covered
Code, including Heading Files, complies with the Commercial Use License,
the TCK and all other terms of this License.
(ii) Publication. No later than the date on which You first distribute
such Extension for Commercial Use, You must publish to the industry, on
a non-confidential basis and free of all copyright restrictions with
respect to reproduction and use, an accurate and current specification
for any Extension. In addition, You must make available an appropriate
test suite, pursuant to the same rights as the specification,
sufficiently detailed to allow any third party reasonably skilled in the
technology to produce implementations of the Extension compatible with
the specification. Such test suites must be made available as soon as
reasonably practicable but, in no event, later than ninety (90) days
after Your first Commercial Use of the Extension. You must use
reasonable efforts to promptly clarify and correct the specification and
the test suite upon written request by Original Contributor.
(iii) Open. You agree to refrain from enforcing any Intellectual
Property Rights You may have covering any interface(s) of Your
Extension, which would prevent the implementation of such interface(s)
by Original Contributor or any Licensee. This obligation does not
prevent You from enforcing any Intellectual Property Right You have that
would otherwise be infringed by an implementation of Your Extension.
(iv) Interface Modifications and Naming. You may not modify or add to
the GUID space * * "xxxxxxxx-0901-11d1-8B06-00A024406D59" or any other
GUID space designated by Original Contributor. You may not modify any
Interface prefix provided with the Covered Code or any other prefix
designated by Original Contributor.* *
* *
(f) You agree that any Specifications provided to You by Original
Contributor are confidential and proprietary information of Original
Contributor. You must maintain the confidentiality of the Specifications
and may not disclose them to any third party without Original
Contributor's prior written consent. You may only use the Specifications
under the terms of this License and only for the purpose of implementing
the terms of this License with respect to Covered Code. You agree not
use, copy or distribute any such Specifications except as provided in
writing by Original Contributor.
3.2 Commercial Use License.
You may not make Commercial Use of any Covered Code unless You and
Original Contributor have executed a copy of the Commercial Use and
Trademark License attached as Attachment D.
*4. Versions of the License.*
4.1 License Versions.
Original Contributor may publish revised versions of the License from
time to time. Each version will be given a distinguishing version number.
4.2 Effect.
Once a particular version of Covered Code has been provided under a
version of the License, You may always continue to use such Covered Code
under the terms of that version of the License. You may also choose to
use such Covered Code under the terms of any subsequent version of the
License. No one other than Original Contributor has the right to
promulgate License versions.
4.3 Multiple-Licensed Code.
Original Contributor may designate portions of the Covered Code as
"Multiple-Licensed." "Multiple-Licensed" means that the Original
Contributor permits You to utilize those designated portions of the
Covered Code under Your choice of this License or the alternative
license(s), if any, specified by the Original Contributor in an
Attachment to this License.
*5. Disclaimer of Warranty.*
5.1 COVERED CODE PROVIDED AS IS.
COVERED CODE IS PROVIDED UNDER THIS LICENSE "AS IS," WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION,
WARRANTIES THAT THE COVERED CODE IS FREE OF DEFECTS, MERCHANTABLE, FIT
FOR A PARTICULAR PURPOSE OR NON-INFRINGING. YOU AGREE TO BEAR THE ENTIRE
RISK IN CONNECTION WITH YOUR USE AND DISTRIBUTION OF COVERED CODE UNDER
THIS LICENSE. THIS DISCLAIMER OF WARRANTY CONSTITUTES AN ESSENTIAL PART
OF THIS LICENSE. NO USE OF ANY COVERED CODE IS AUTHORIZED HEREUNDER
EXCEPT SUBJECT TO THIS DISCLAIMER.
5.2 Not Designed for High Risk Activities.
You acknowledge that Original Code, Upgraded Code and Specifications are
not designed or intended for use in high risk activities including, but
not limited to: (i) on-line control of aircraft, air traffic, aircraft
navigation or aircraft communications; or (ii) in the design,
construction, operation or maintenance of any nuclear facility. Original
Contributor disclaims any express or implied warranty of fitness for
such uses.
*6. Termination.*
6.1 By You.
You may terminate this Research Use license at anytime by providing
written notice to Original Contributor.
6.2 By Original Contributor.
This License and the rights granted hereunder will terminate:
(i) automatically if You fail to comply with the terms of this License
and fail to cure such breach within 30 days of receipt of written notice
of the breach;
(ii) immediately in the event of circumstances specified in Sections 7.1
and 8.4; or
(iii) at Original Contributor's discretion upon any action initiated by
You (including by cross-claim or counter claim) alleging that use or
distribution by Original Contributor or any Licensee, of Original Code,
Upgraded Code, Error Corrections, Shared Modifications or Specifications
infringe a patent owned or controlled by You.
6.3 Effective of Termination.
Upon termination, You agree to discontinue use of and destroy all copies
of Covered Code in Your possession. All sublicenses to the Covered Code
which You have properly granted shall survive any termination of this
License. Provisions that, by their nature, should remain in effect
beyond the termination of this License shall survive including, without
limitation, Sections 2.2, 3, 5, 7 and 8.
6.4 No Compensation.
Each party waives and releases the other from any claim to compensation
or indemnity for permitted or lawful termination of the business
relationship established by this License.
*7. Liability.*
7.1 Infringement. Should any of the Original Code, Upgraded Code, TCK or
Specifications ("Materials") become the subject of a claim of
infringement, Original Contributor may, at its sole option, (i) attempt
to procure the rights necessary for You to continue using the Materials,
(ii) modify the Materials so that they are no longer infringing, or
(iii) terminate Your right to use the Materials, immediately upon
written notice, and refund to You the amount, if any, having then
actually been paid by You to Original Contributor for the Original Code,
Upgraded Code and TCK, depreciated on a straight line, five year basis.
7.2 LIMITATION OF LIABILITY. TO THE FULL EXTENT ALLOWED BY APPLICABLE
LAW, ORIGINAL CONTRIBUTOR'S LIABILITY TO YOU FOR CLAIMS RELATING TO THIS
LICENSE, WHETHER FOR BREACH OR IN TORT, SHALL BE LIMITED TO ONE HUNDRED
PERCENT (100%) OF THE AMOUNT HAVING THEN ACTUALLY BEEN PAID BY YOU TO
ORIGINAL CONTRIBUTOR FOR ALL COPIES LICENSED HEREUNDER OF THE PARTICULAR
ITEMS GIVING RISE TO SUCH CLAIM, IF ANY, DURING THE TWELVE MONTHS
PRECEDING THE CLAIMED BREACH. IN NO EVENT WILL YOU (RELATIVE TO YOUR
SHARED MODIFICATIONS OR ERROR CORRECTIONS) OR ORIGINAL CONTRIBUTOR BE
LIABLE FOR ANY INDIRECT, PUNITIVE, SPECIAL, INCIDENTAL OR CONSEQUENTIAL
DAMAGES IN CONNECTION WITH OR RISING OUT OF THIS LICENSE (INCLUDING,
WITHOUT LIMITATION, LOSS OF PROFITS, USE, DATA, OR OTHER ECONOMIC
ADVANTAGE), HOWEVER IT ARISES AND ON ANY THEORY OF LIABILITY, WHETHER IN
AN ACTION FOR CONTRACT, STRICT LIABILITY OR TORT (INCLUDING NEGLIGENCE)
OR OTHERWISE, WHETHER OR NOT YOU OR ORIGINAL CONTRIBUTOR HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE AND NOTWITHSTANDING THE
FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY.
*8. Miscellaneous.*
8.1 Trademark.
You shall not use any Trademark unless You and Original Contributor
execute a copy of the Commercial Use and Trademark License Agreement
attached hereto as Attachment D. Except as expressly provided in the
License, You are granted no right, title or license to, or interest in,
any Trademarks. Whether or not You and Original Contributor enter into
the Trademark License, You agree not to (i) challenge Original
Contributor's ownership or use of Trademarks; (ii) attempt to register
any Trademarks, or any mark or logo substantially similar thereto; or
(iii) incorporate any Trademarks into Your own trademarks, product
names, service marks, company names, or domain names.
8.2 Integration.
This License represents the complete agreement concerning the subject
matter hereof.
8.3 Assignment.
Original Contributor may assign this License, and its rights and
obligations hereunder, in its sole discretion. You may assign the
Research Use portions of this License and the TCK license to a third
party upon prior written notice to Original Contributor (which may be
provided electronically via the Community Web-Server). You may not
assign the Commercial Use and Trademark license, the Add-On Technology
License, or the Add-On Technology Source Code Porting License, including
by way of merger (regardless of whether You are the surviving entity) or
acquisition, without Original Contributor's prior written consent.
8.4 Severability.
If any provision of this License is held to be unenforceable, such
provision shall be reformed only to the extent necessary to make it
enforceable. Notwithstanding the foregoing, if You are prohibited by law
from fully and specifically complying with Sections 2.2 or 3, this
License will immediately terminate and You must immediately discontinue
any use of Covered Code.
8.5 Governing Law.
This License shall be governed by the laws of the United States and the
State of Washington, as applied to contracts entered into and to be
performed in Washington between Washington residents. The application of
the United Nations Convention on Contracts for the International Sale of
Goods is expressly excluded. You agree that the state and federal courts
located in Seattle, Washington have exclusive jurisdiction over any
claim relating to the License, including contract and tort claims.
8.6 Dispute Resolution.
a) Arbitration. Any dispute arising out of or relating to this License
shall be finally settled by arbitration as set out herein, except that
either party may bring any action, in a court of competent jurisdiction
(which jurisdiction shall be exclusive), with respect to any dispute
relating to such party's Intellectual Property Rights or with respect to
Your compliance with the TCK license. Arbitration shall be administered:
(i) by the American Arbitration Association (AAA), (ii) in accordance
with the rules of the United Nations Commission on International Trade
Law (UNCITRAL) (the "Rules") in effect at the time of arbitration as
modified herein; and (iii) the arbitrator will apply the substantive
laws of Washington and the United States. Judgment upon the award
rendered by the arbitrator may be entered in any court having
jurisdiction to enforce such award.
b) Arbitration language, venue and damages. All arbitration proceedings
shall be conducted in English by a single arbitrator selected in
accordance with the Rules, who must be fluent in English and be either a
retired judge or practicing attorney having at least ten (10) years
litigation experience and be reasonably familiar with the technology
matters relative to the dispute. Unless otherwise agreed, arbitration
venue shall be in Seattle, Washington. The arbitrator may award monetary
damages only and nothing shall preclude either party from seeking
provisional or emergency relief from a court of competent jurisdiction.
The arbitrator shall have no authority to award damages in excess of
those permitted in this License and any such award in excess is void.
All awards will be payable in U.S. dollars and may include, for the
prevailing party (i) pre-judgment award interest, (ii) reasonable
attorneys' fees incurred in connection with the arbitration, and (iii)
reasonable costs and expenses incurred in enforcing the award. The
arbitrator will order each party to produce identified documents and
respond to no more than twenty-five single question interrogatories.
8.7 Construction.
Any law or regulation, which provides that the language of a contract
shall be construed against the drafter, shall not apply to this License.
8.8 U.S. Government End Users.
The Covered Code is a "commercial item," as that term is defined in 48
C.F.R. 2.101 (Oct. 1995), consisting of "commercial computer software"
and "commercial computer software documentation," as such terms are used
in 48 C.F.R. 12.212 (Sept. 1995). Consistent with 48 C.F.R. 12.212 and
48 C.F.R. 227.7202-1 through 227.7202-4 (June 1995), all U.S. Government
End Users acquire Covered Code with only those rights set forth herein.
You agree to pass this notice to our licensees.
8.9 Marketing Activities.
Licensee hereby grants Original Contributor a non-exclusive,
non-transferable, limited license to use the Licensee's company name and
logo ("Licensee Marks") in any presentations, press releases, or
marketing materials solely for the purpose of identifying Licensee as a
member of the Helix Community. Licensee shall provide samples of
Licensee Marks to Original Contributor upon request by Original
Contributor. Original Contributor acknowledges that the Licensee Marks
are the trademarks of Licensee. Original Contributor shall not use the
Licensee Marks in a way that may imply that Original Contributor is an
agency or branch of Licensee. Original Contributor understands and
agrees that the use of any Licensee Marks in connection with this
Agreement shall not create any right, title or interest, in, or to the
Licensee Marks or any Licensee trademarks and that all such use and
goodwill associated with any such trademarks will inure to the benefit
of Licensee. Further the Original Contributor will stop usage of the
Licensee Marks upon Licensee's request.
8.10 Press Announcements.
You may make press announcements or other public statements regarding
this License without the prior written consent of the Original
Contributor, if Your statement is limited to announcing the licensing of
the Covered Code or the availability of Your Product and its
compatibility with the Covered Code. All other public announcements
regarding this license require the prior written consent of the Original
Contributor. Consent requests are welcome at press@helixcommunity.org.
8.11 International Use.
a) Export/Import laws. Covered Code is subject to U.S. export control
laws and may be subject to export or import regulations in other
countries. Each party agrees to comply strictly with all such laws and
regulations and acknowledges their responsibility to obtain such
licenses to export, re-export, or import as may be required. You agree
to pass these obligations to Your licensees.
b) Intellectual Property Protection. Due to limited intellectual
property protection and enforcement in certain countries, You agree not
to redistribute the Original Code, Upgraded Code, TCK and Specifications
to any country on the list of restricted countries on the Community Web
Server.
8.12 Language.
This License is in the English language only, which language shall be
controlling in all respects, and all versions of this License in any
other language shall be for accommodation only and shall not be binding
on the parties to this License. All communications and notices made or
given pursuant to this License, and all documentation and support to be
provided, unless otherwise noted, shall be in the English language.
PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE
"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND
CONDITIONS OF THIS LICENSE WITH REALNETWORKS, INC. IF YOU ARE AGREEING
TO THIS LICENSE ON BEHALF OF A COMPANY, YOU REPRESENT THAT YOU ARE
AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. WHETHER YOU ARE ACTING
ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, YOU MUST BE OF MAJORITY
AGE AND BE OTHERWISE COMPETENT TO ENTER INTO CONTRACTS. IF YOU DO NOT
MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY OF THE TERMS AND
CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON TO EXIT.
GLOSSARY
1. *"Added Value"* means code which:
(i) has a principal purpose which is substantially different from that
of the stand-alone Technology;
(ii) represents a significant functional and value enhancement to the
Technology;
(iii) operates in conjunction with the Technology; and
(iv) is not marketed as a technology which replaces or substitutes for
the Technology
2. "*Applicable Patent Rights*" mean: (a) in the case where Original
Contributor is the grantor of rights, claims of patents that (i) are now
or hereafter acquired, owned by or assigned to Original Contributor and
(ii) are necessarily infringed by using or making the Original Code or
Upgraded Code, including Modifications provided by Original Contributor,
alone and not in combination with other software or hardware; and (b) in
the case where Licensee is the grantor of rights, claims of patents that
(i) are now or hereafter acquired, owned by or assigned to Licensee and
(ii) are infringed (directly or indirectly) by using or making
Licensee's Modifications or Error Corrections, taken alone or in
combination with Covered Code.
3. "*Application Programming Interfaces (APIs)"* means the interfaces,
associated header files, service provider interfaces, and protocols that
enable a device, application, Operating System, or other program to
obtain services from or make requests of (or provide services in
response to requests from) other programs, and to use, benefit from, or
rely on the resources, facilities, and capabilities of the relevant
programs using the APIs. APIs includes the technical documentation
describing the APIs, the Source Code constituting the API, and any
Header Files used with the APIs.
4. "*Commercial Use*" means any use (internal or external), copying,
sublicensing or distribution (internal or external), directly or
indirectly of Covered Code by You other than Your Research Use of
Covered Code within Your business or organization or in conjunction with
other Licensees with equivalent Research Use rights. Commercial Use
includes any use of the Covered Code for direct or indirect commercial
or strategic gain, advantage or other business purpose. Any Commercial
Use requires execution of Attachment D by You and Original Contributor.
5. "*Community Code*" means the Original Code, Upgraded Code, Error
Corrections, Shared Modifications, or any combination thereof.
6. "*Community Webserver(s)"* means the webservers designated by
Original Contributor for access to the Original Code, Upgraded Code, TCK
and Specifications and for posting Error Corrections and Shared
Modifications.
7. "*Compliant Covered Code*" means Covered Code that complies with the
requirements of the TCK.
8. "*Contributor*" means each Licensee that creates or contributes to
the creation of any Error Correction or Shared Modification.
9. "*Covered Code*" means the Original Code, Upgraded Code,
Modifications, or any combination thereof.
10. "*Error Correction*" means any change made to Community Code which
conforms to the Specification and corrects the adverse effect of a
failure of Community Code to perform any function set forth in or
required by the Specifications.
11. "*Executable*" means Covered Code that has been converted from
Source Code to the preferred form for execution by a computer or digital
processor (e.g. binary form).
12. "*Extension(s)"* means any additional Interfaces developed by or for
You which: (i) are designed for use with the Technology; (ii) constitute
an API for a library of computing functions or services; and (iii) are
disclosed or otherwise made available to third party software developers
for the purpose of developing software which invokes such additional
Interfaces. The foregoing shall not apply to software developed by Your
subcontractors to be exclusively used by You.
13. "*Header File(s)"* means that portion of the Source Code that
provides the names and types of member functions, data members, class
definitions, and interface definitions necessary to implement the APIs
for the Covered Code. Header Files include, files specifically
designated by Original Contributor as Header Files. Header Files do not
include the code necessary to implement the functionality underlying the
Interface.
14. *"Helix DNA Server Technology"* means the program(s) that implement
the Helix Universal Server streaming engine for the Technology as
defined in the Specification.
15. *"Helix DNA Client Technology"* means the Covered Code that
implements the RealOne Player engine as defined in the Specification.
16. *"Helix DNA Producer Technology"* means the Covered Code that
implements the Helix Producer engine as defined in the Specification.
17. *"Helix DNA Technology"* means the Helix DNA Server Technology, the
Helix DNA Client Technology, the Helix DNA Producer Technology and other
Helix technologies designated by Original Contributor.
18. "*Intellectual Property Rights*" means worldwide statutory and
common law rights associated solely with (i) Applicable Patent Rights;
(ii) works of authorship including copyrights, copyright applications,
copyright registrations and "moral rights"; (iii) the protection of
trade and industrial secrets and confidential information; and (iv)
divisions, continuations, renewals, and re-issuances of the foregoing
now existing or acquired in the future.
19. *"Interface*" means interfaces, functions, properties, class
definitions, APIs, Header Files, GUIDs, V-Tables, and/or protocols
allowing one piece of software, firmware or hardware to communicate or
interoperate with another piece of software, firmware or hardware.
20. "*Internal Deployment Use*" means use of Compliant Covered Code
(excluding Research Use) within Your business or organization only by
Your employees and/or agents on behalf of Your business or organization,
but not to provide services, including content distribution, to third
parties, subject to execution of Attachment D by You and Original
Contributor, if required.
21. "*Licensee*" means any party that has entered into and has in effect
a version of this License with Original Contributor.
22. "*MIME type*" means a description of what type of media or other
content is in a file, including by way of example but not limited to
'audio/x-pn-realaudio-plugin.'
23. "*Modification(s)"* means (i) any addition to, deletion from and/or
change to the substance and/or structure of the Covered Code, including
Interfaces; (ii) the combination of any Covered Code and any previous
Modifications; (iii) any new file or other representation of computer
program statements that contains any portion of Covered Code; and/or
(iv) any new Source Code implementing any portion of the Specifications.
24. "*MP3 Patents*" means any patents necessary to make, use or sell
technology implementing any portion of the specification developed by
the Moving Picture Experts Group known as MPEG-1 Audio Layer-3 or MP3,
including but not limited to all past and future versions, profiles,
extensions, parts and amendments relating to the MP3 specification.
25. "*MPEG-4 Patents*" means any patents necessary to make, use or sell
technology implementing any portion of the specification developed by
the Moving Pictures Experts Group known as MPEG-4, including but not
limited to all past and future versions, profiles, extensions, parts and
amendments relating to the MPEG-4 specification.
26. "*Original Code*" means the initial Source Code for the Technology
as described on the Community Web Server.
27. "*Original Contributor*" means RealNetworks, Inc., its affiliates
and its successors and assigns.
28. "*Original Contributor MIME Type*" means the MIME registry, browser
preferences, or local file/protocol associations invoking any Helix DNA
Client-based application, including the RealOne Player, for playback of
RealAudio, RealVideo, other RealMedia MIME types or datatypes (e.g.,
.ram, .rnx, .rpm, .ra, .rm, .rp, .rt, .rf, .prx, .mpe, .rmp, .rmj, .rav,
.rjs, .rmx, .rjt, .rms), and any other Original Contributor-specific or
proprietary MIME types that Original Contributor may introduce in the
future.
29. "*Personal Use*" means use of Covered Code by an individual solely
for his or her personal, private and non-commercial purposes. An
individual's use of Covered Code in his or her capacity as an officer,
employee, member, independent contractor or agent of a corporation,
business or organization (commercial or non-commercial) does not qualify
as Personal Use.
30. "*RealMedia File Format*" means the file format designed and
developed by RealNetworks for storing multimedia data and used to store
RealAudio and RealVideo encoded streams. Valid RealMedia File Format
extensions include: .rm, .rmj, .rmc, .rmvb, .rms.
31. "*RCSL Webpage*" means the RealNetworks Community Source License
webpage located at https://www.helixcommunity.org/content/rcsl or such
other URL that Original Contributor may designate from time to time.
32. "*Reformatted Specifications*" means any revision to the
Specifications which translates or reformats the Specifications (as for
example in connection with Your documentation) but which does not alter,
subset or superset * *the functional or operational aspects of the
Specifications.
33. "*Research Use*" means use and distribution of Covered Code only for
Your Personal Use, research or development use and expressly excludes
Internal Deployment Use and Commercial Use. Research Use also includes
use of Covered Code to teach individuals how to use Covered Code.
34. "*Shared Modifications*" means Modifications that You distribute or
use for a Commercial Use, in addition to any Modifications provided by
You, at Your option, pursuant to Section 2.2, or received by You from a
Contributor pursuant to Section 2.3.
35. "*Source Code*" means the preferred form of the Covered Code for
making modifications to it, including all modules it contains, plus any
associated interface definition files, scripts used to control
compilation and installation of an Executable, or source code
differential comparisons against either the Original Code or another
well known, available Covered Code of the Contributor's choice. The
Source Code can be in a compressed or archival form, provided the
appropriate decompression or de-archiving software is widely available
for no charge.
36. "*Specifications*" means the specifications for the Technology and
other documentation, as designated on the Community Web Server, as may
be revised by Original Contributor from time to time.
37. "*Trademarks*" means Original Contributor's trademarks and logos,
including, but not limited to, RealNetworks, RealAudio, RealVideo,
RealOne, RealSystem, SureStream, Helix, Helix DNA and other trademarks
whether now used or adopted in the future.
38. "*Technology*" means the technology described in Attachment B, and
Upgrades.
39. "*Technology Compatibility Kit"* or *"TCK*" means the test programs,
procedures, acceptance criteria and/or other requirements, designated by
Original Contributor for use in verifying compliance of Covered Code
with the Specifications, in conjunction with the Original Code and
Upgraded Code. Original Contributor may, in its sole discretion and from
time to time, revise a TCK to correct errors and/or omissions and in
connection with Upgrades.
40. "*Upgrade(s)"* means new versions of Technology designated
exclusively by Original Contributor as an "Upgrade" and released by
Original Contributor from time to time under the terms of the License.
41. "*Upgraded Code*" means the Source Code and/or Executables for
Upgrades, possibly including Modifications made by Contributors.
42. *"User's Guide"* means the users guide for the TCK which Original
Contributor makes available to You to provide direction in how to run
the TCK and properly interpret the results, as may be revised by
Original Contributor from time to time.
43. "*You(r)*" means an individual, or a legal entity acting by and
through an individual or individuals, exercising rights either under
this License or under a future version of this License issued pursuant
to Section 4.1. For legal entities, "You(r)" includes any entity that by
majority voting interest controls, is controlled by, or is under common
control with You.
44. "*Your Products*" means any (i) hardware products You distribute
integrating the Covered Code; (ii) any software products You distribute
with the Covered Code that utilize the APIs of the Covered Code; or
(iii) any services You provide using the Covered Code.
ATTACHMENT A
REQUIRED NOTICES
ATTACHMENT A-1
REQUIRED IN ALL CASES
Notice to be included in header file of all Error Corrections and Shared
Modifications:
Portions Copyright 1994-2003 © RealNetworks, Inc. All rights reserved.
The contents of this file, and the files included with this file, are
subject to the current version of RealNetworks Community Source License
Version 1.1 (the "License"). You may not use this file except in
compliance with the License executed by both You and RealNetworks. You
may obtain a copy of the License at *
https://www.helixcommunity.org/content/rcsl.* You may also obtain a copy
of the License by contacting RealNetworks directly. Please see the
License for the rights, obligations and limitations governing use of the
contents of the file.
This file is part of the Helix DNA technology. RealNetworks, Inc., is
the developer of the Original code and owns the copyrights in the
portions it created.
This file, and the files included with this file, are distributed on an
'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT
LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
Contributor(s):
_______________________________________________
Technology Compatibility Kit Test Suite(s) Location:
________________________________
ATTACHMENT A-2
SAMPLE LICENSEE CERTIFICATION
"By clicking the `Agree' button below, You certify that You are a
Licensee in good standing under the RealNetworks Community Source
License, ("License") and that Your access, use and distribution of code
and information You may obtain at this site is subject to the License.
If You are not a Licensee under the RealNetworks Community Source
License You agree not to download, copy or use the Helix DNA technology.
ATTACHMENT A-3
REQUIRED STUDENT NOTIFICATION
"This software and related documentation has been obtained by Your
educational institution subject to the RealNetworks Community Source
License. You have been provided access to the software and related
documentation for use only in connection with your course work and
research activities as a matriculated student of Your educational
institution. Any other use is expressly prohibited.
THIS SOFTWARE AND RELATED DOCUMENTATION CONTAINS PROPRIETARY MATERIAL OF
REALNETWORKS, INC, WHICH ARE PROTECTED BY VARIOUS INTELLECTUAL PROPERTY
RIGHTS.
You may not use this file except in compliance with the License. You may
obtain a copy of the License on the web at
https://www.helixcommunity.org/content/rcsl.
*
*
ATTACHMENT B
Description of Technology
Helix DNA, which consists of Helix DNA Client, Helix DNA Server and
Helix DNA Producer.
Description of "Technology"
Helix DNA Technology v1.0 as described on the Community Web Server.
ATTACHMENT C
TECHNOLOGY COMPATIBILITY KIT LICENSE
The following license is effective for the *Helix DNA* Technology
Compatibility Kit - as described on the Community Web Server. The
Technology Compatibility Kit(s) for the Technology specified in
Attachment B may be accessed at the Community Web Server.
1. TCK License.
1.1 Grants to use TCK
Subject to the terms and restrictions set forth below and the
RealNetworks Community Source License, and the Research Use license,
Original Contributor grants to You a worldwide, non-exclusive,
non-transferable license, to the extent of Original Contributor's
Intellectual Property Rights in the TCK (without the right to
sublicense), to use the TCK to develop and test Covered Code.
1.2 TCK Use Restrictions.
You are not authorized to create derivative works of the TCK or use the
TCK to test any implementation of the Specification that is not Covered
Code. You may not publish Your test results or make claims of
comparative compatibility with respect to other implementations of the
Specification. In consideration for the license grant in Section 1.1
above You agree not to develop Your own tests that are intended to
validate conformation with the Specification.
2. Test Results.
You agree to provide to Original Contributor or the third party test
facility if applicable, Your test results that demonstrate that Covered
Code is Compliant Covered Code and that Original Contributor may publish
or otherwise distribute such test results.
PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE
"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND
CONDITIONS OF THIS LICENSE WITH THE ORIGINAL CONTRIBUTOR, REALNETWORKS,
INC. IF YOU ARE AGREEING TO THIS LICENSE ON BEHALF OF A COMPANY, YOU
REPRESENT THAT YOU ARE AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE.
WHETHER YOU ARE ACTING ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY,
YOU MUST BE OF MAJORITY AGE AND BE OTHERWISE COMPETENT TO ENTER INTO
CONTRACTS. IF YOU DO NOT MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY
OF THE TERMS AND CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON
TO EXIT.
*ACCEPT / REJECT
*
*
*
*To agree to the R&D/academic terms of this license, please register
<https://www.helixcommunity.org/2002/intro/why-register> on the site --
you will then be given a chance to agree to the clickwrap RCSL
<https://reguseronly.helixcommunity.org/2002/clickwrap/rcsl-clickwrap>
R&D License
<https://reguseronly.helixcommunity.org/2002/clickwrap/rcsl-clickwrap>
and gain access to the RCSL-licensed source code. To build or deploy
commercial applications based on the RCSL, you will need to agree to the
Commercial Use license attachments
<https://www.helixcommunity.org/content/rcsl-attachments>*

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RealNetworks Public Source License Version 1.0
(Rev. Date October 28, 2002)
1. General Definitions. This License applies to any program or other work which
RealNetworks, Inc., or any other entity that elects to use this license,
("Licensor") makes publicly available and which contains a notice placed by
Licensor identifying such program or work as "Original Code" and stating that it
is subject to the terms of this RealNetworks Public Source License version 1.0
(or subsequent version thereof) ("License"). You are not required to accept this
License. However, nothing else grants You permission to use, copy, modify or
distribute the software or its derivative works. These actions are prohibited by
law if You do not accept this License. Therefore, by modifying, copying or
distributing the software (or any work based on the software), You indicate your
acceptance of this License to do so, and all its terms and conditions. In
addition, you agree to the terms of this License by clicking the Accept button
or downloading the software. As used in this License:
1.1 "Applicable Patent Rights" mean: (a) in the case where Licensor is the
grantor of rights, claims of patents that (i) are now or hereafter acquired,
owned by or assigned to Licensor and (ii) are necessarily infringed by using or
making the Original Code alone and not in combination with other software or
hardware; and (b) in the case where You are the grantor of rights, claims of
patents that (i) are now or hereafter acquired, owned by or assigned to You and
(ii) are infringed (directly or indirectly) by using or making Your
Modifications, taken alone or in combination with Original Code.
1.2 "Compatible Source License" means any one of the licenses listed on Exhibit
B or at https://www.helixcommunity.org/content/complicense or other licenses
specifically identified by Licensor in writing. Notwithstanding any term to the
contrary in any Compatible Source License, any code covered by any Compatible
Source License that is used with Covered Code must be made readily available in
Source Code format for royalty-free use under the terms of the Compatible Source
License or this License.
1.3 "Contributor" means any person or entity that creates or contributes to the
creation of Modifications.
1.4 "Covered Code" means the Original Code, Modifications, the combination of
Original Code and any Modifications, and/or any respective portions thereof.
1.5 "Deploy" means to use, sublicense or distribute Covered Code other than for
Your internal research and development (R&D) and/or Personal Use, and includes
without limitation, any and all internal use or distribution of Covered Code
within Your business or organization except for R&D use and/or Personal Use, as
well as direct or indirect sublicensing or distribution of Covered Code by You
to any third party in any form or manner.
1.6 "Derivative Work" means either the Covered Code or any derivative work under
United States copyright law, and including any work containing or including any
portion of the Covered Code or Modifications, either verbatim or with
modifications and/or translated into another language. Derivative Work also
includes any work which combines any portion of Covered Code or Modifications
with code not otherwise governed by the terms of this License.
1.7 "Externally Deploy" means to Deploy the Covered Code in any way that may be
accessed or used by anyone other than You, used to provide any services to
anyone other than You, or used in any way to deliver any content to anyone other
than You, whether the Covered Code is distributed to those parties, made
available as an application intended for use over a computer network, or used to
provide services or otherwise deliver content to anyone other than You.
1.8. "Interface" means interfaces, functions, properties, class definitions,
APIs, header files, GUIDs, V-Tables, and/or protocols allowing one piece of
software, firmware or hardware to communicate or interoperate with another piece
of software, firmware or hardware.
1.9 "Modifications" mean any addition to, deletion from, and/or change to, the
substance and/or structure of the Original Code, any previous Modifications, the
combination of Original Code and any previous Modifications, and/or any
respective portions thereof. When code is released as a series of files, a
Modification is: (a) any addition to or deletion from the contents of a file
containing Covered Code; and/or (b) any new file or other representation of
computer program statements that contains any part of Covered Code.
1.10 "Original Code" means (a) the Source Code of a program or other work as
originally made available by Licensor under this License, including the Source
Code of any updates or upgrades to such programs or works made available by
Licensor under this License, and that has been expressly identified by Licensor
as such in the header file(s) of such work; and (b) the object code compiled
from such Source Code and originally made available by Licensor under this
License.
1.11 "Personal Use" means use of Covered Code by an individual solely for his or
her personal, private and non-commercial purposes. An individual's use of
Covered Code in his or her capacity as an officer, employee, member, independent
contractor or agent of a corporation, business or organization (commercial or
non-commercial) does not qualify as Personal Use.
1.12 "Source Code" means the human readable form of a program or other work that
is suitable for making modifications to it, including all modules it contains,
plus any associated interface definition files, scripts used to control
compilation and installation of an executable (object code).
1.13 "You" or "Your" means an individual or a legal entity exercising rights
under this License. For legal entities, "You" or "Your" includes any entity
which controls, is controlled by, or is under common control with, You, where
"control" means (a) the power, direct or indirect, to cause the direction or
management of such entity, whether by contract or otherwise, or (b) ownership of
fifty percent (50%) or more of the outstanding shares or beneficial ownership of
such entity.
2. Permitted Uses; Conditions & Restrictions. Subject to the terms and
conditions of this License, Licensor hereby grants You, effective on the date
You accept this License (via downloading or using Covered Code or otherwise
indicating your acceptance of this License), a worldwide, royalty-free,
non-exclusive copyright license, to the extent of Licensor's copyrights cover
the Original Code, to do the following:
2.1 You may reproduce, display, perform, modify and Deploy Covered Code,
provided that in each instance:
(a) You must retain and reproduce in all copies of Original Code the copyright
and other proprietary notices and disclaimers of Licensor as they appear in the
Original Code, and keep intact all notices in the Original Code that refer to
this License;
(b) You must include a copy of this License with every copy of Source Code of
Covered Code and documentation You distribute, and You may not offer or impose
any terms on such Source Code that alter or restrict this License or the
recipients' rights hereunder, except as permitted under Section 6;
(c) You must duplicate, to the extent it does not already exist, the notice in
Exhibit A in each file of the Source Code of all Your Modifications, and cause
the modified files to carry prominent notices stating that You changed the files
and the date of any change;
(d) You must make Source Code of all Your Externally Deployed Modifications
publicly available under the terms of this License, including the license grants
set forth in Section 3 below, for as long as you Deploy the Covered Code or
twelve (12) months from the date of initial Deployment, whichever is longer. You
should preferably distribute the Source Code of Your Deployed Modifications
electronically (e.g. download from a web site); and
(e) if You Deploy Covered Code in object code, executable form only, You must
include a prominent notice, in the code itself as well as in related
documentation, stating that Source Code of the Covered Code is available under
the terms of this License with information on how and where to obtain such
Source Code. You must also include the Object Code Notice set forth in Exhibit A
in the "about" box or other appropriate place where other copyright notices are
placed, including any packaging materials.
2.2 You expressly acknowledge and agree that although Licensor and each
Contributor grants the licenses to their respective portions of the Covered Code
set forth herein, no assurances are provided by Licensor or any Contributor that
the Covered Code does not infringe the patent or other intellectual property
rights of any other entity. Licensor and each Contributor disclaim any liability
to You for claims brought by any other entity based on infringement of
intellectual property rights or otherwise. As a condition to exercising the
rights and licenses granted hereunder, You hereby assume sole responsibility to
secure any other intellectual property rights needed, if any. For example, if a
third party patent license is required to allow You to make, use, sell, import
or offer for sale the Covered Code, it is Your responsibility to acquire such
license(s).
2.3 Subject to the terms and conditions of this License, Licensor hereby grants
You, effective on the date You accept this License (via downloading or using
Covered Code or otherwise indicating your acceptance of this License), a
worldwide, royalty-free, perpetual, non-exclusive patent license under
Licensor's Applicable Patent Rights to make, use, sell, offer for sale and
import the Covered Code, provided that in each instance you comply with the
terms of this License.
3. Your Grants. In consideration of, and as a condition to, the licenses granted
to You under this License:
(a) You grant to Licensor and all third parties a non-exclusive, perpetual,
irrevocable, royalty free license under Your Applicable Patent Rights and other
intellectual property rights owned or controlled by You, to make, sell, offer
for sale, use, import, reproduce, display, perform, modify, distribute and
Deploy Your Modifications of the same scope and extent as Licensor's licenses
under Sections 2.1 and 2.2; and
(b) You grant to Licensor and its subsidiaries a non-exclusive, worldwide,
royalty-free, perpetual and irrevocable license, under Your Applicable Patent
Rights and other intellectual property rights owned or controlled by You, to
make, use, sell, offer for sale, import, reproduce, display, perform,
distribute, modify or have modified (for Licensor and/or its subsidiaries),
sublicense and distribute Your Modifications, in any form and for any purpose,
through multiple tiers of distribution.
(c) You agree not use any information derived from Your use and review of the
Covered Code, including but not limited to any algorithms or inventions that may
be contained in the Covered Code, for the purpose of asserting any of Your
patent rights, or assisting a third party to assert any of its patent rights,
against Licensor or any Contributor.
4. Derivative Works. You may create a Derivative Work by combining Covered Code
with other code not otherwise governed by the terms of this License and
distribute the Derivative Work as an integrated product. In each such instance,
You must make sure the requirements of this License are fulfilled for the
Covered Code or any portion thereof, including all Modifications.
4.1 You must cause any Derivative Work that you distribute, publish or
Externally Deploy, that in whole or in part contains or is derived from the
Covered Code or any part thereof, to be licensed as a whole at no charge to all
third parties under the terms of this License and no other license except as
provided in Section 4.2. You also must make Source Code available for the
Derivative Work under the same terms as Modifications, described in Sections 2
and 3, above.
4.2 Compatible Source Licenses. Software modules that have been independently
developed without any use of Covered Code and which contain no portion of the
Covered Code, Modifications or other Derivative Works, but are used or combined
in any way wtih the Covered Code or any Derivative Work to form a larger
Derivative Work, are exempt from the conditions described in Section 4.1 but
only to the extent that: the software module, including any software that is
linked to, integrated with, or part of the same applications as, the software
module by any method must be wholly subject to one of the Compatible Source
Licenses. Notwithstanding the foregoing, all Covered Code must be subject to the
terms of this License. Thus, the entire Derivative Work must be licensed under a
combination of the RPSL (for Covered Code) and a Compatible Source License for
any independently developed software modules within the Derivative Work. The
foregoing requirement applies even if the Compatible Source License would
ordinarily allow the software module to link with, or form larger works with,
other software that is not subject to the Compatible Source License. For
example, although the Mozilla Public License v1.1 allows Mozilla code to be
combined with proprietary software that is not subject to the MPL, if
MPL-licensed code is used with Covered Code the MPL-licensed code could not be
combined or linked with any code not governed by the MPL. The general intent of
this section 4.2 is to enable use of Covered Code with applications that are
wholly subject to an acceptable open source license. You are responsible for
determining whether your use of software with Covered Code is allowed under Your
license to such software.
4.3 Mere aggregation of another work not based on the Covered Code with the
Covered Code (or with a work based on the Covered Code) on a volume of a storage
or distribution medium does not bring the other work under the scope of this
License. If You deliver the Covered Code for combination and/or integration with
an application previously provided by You (for example, via automatic updating
technology), such combination and/or integration constitutes a Derivative Work
subject to the terms of this License.
5. Exclusions From License Grant. Nothing in this License shall be deemed to
grant any rights to trademarks, copyrights, patents, trade secrets or any other
intellectual property of Licensor or any Contributor except as expressly stated
herein. No right is granted to the trademarks of Licensor or any Contributor
even if such marks are included in the Covered Code. Nothing in this License
shall be interpreted to prohibit Licensor from licensing under different terms
from this License any code that Licensor otherwise would have a right to
license. Modifications, Derivative Works and/or any use or combination of
Covered Code with other technology provided by Licensor or third parties may
require additional patent licenses from Licensor which Licensor may grant in its
sole discretion. No patent license is granted separate from the Original Code or
combinations of the Original Code with other software or hardware.
5.1. Trademarks. This License does not grant any rights to use the trademarks or
trade names owned by Licensor ("Licensor Marks" defined in Exhibit C) or to any
trademark or trade name belonging to any Contributor. No Licensor Marks may be
used to endorse or promote products derived from the Original Code other than as
permitted by the Licensor Trademark Policy defined in Exhibit C.
6. Additional Terms. You may choose to offer, and to charge a fee for, warranty,
support, indemnity or liability obligations and/or other rights consistent with
the scope of the license granted herein ("Additional Terms") to one or more
recipients of Covered Code. However, You may do so only on Your own behalf and
as Your sole responsibility, and not on behalf of Licensor or any Contributor.
You must obtain the recipient's agreement that any such Additional Terms are
offered by You alone, and You hereby agree to indemnify, defend and hold
Licensor and every Contributor harmless for any liability incurred by or claims
asserted against Licensor or such Contributor by reason of any such Additional
Terms.
7. Versions of the License. Licensor may publish revised and/or new versions of
this License from time to time. Each version will be given a distinguishing
version number. Once Original Code has been published under a particular version
of this License, You may continue to use it under the terms of that version. You
may also choose to use such Original Code under the terms of any subsequent
version of this License published by Licensor. No one other than Licensor has
the right to modify the terms applicable to Covered Code created under this
License.
8. NO WARRANTY OR SUPPORT. The Covered Code may contain in whole or in part
pre-release, untested, or not fully tested works. The Covered Code may contain
errors that could cause failures or loss of data, and may be incomplete or
contain inaccuracies. You expressly acknowledge and agree that use of the
Covered Code, or any portion thereof, is at Your sole and entire risk. THE
COVERED CODE IS PROVIDED "AS IS" AND WITHOUT WARRANTY, UPGRADES OR SUPPORT OF
ANY KIND AND LICENSOR AND LICENSOR'S LICENSOR(S) (COLLECTIVELY REFERRED TO AS
"LICENSOR" FOR THE PURPOSES OF SECTIONS 8 AND 9) AND ALL CONTRIBUTORS EXPRESSLY
DISCLAIM ALL WARRANTIES AND/OR CONDITIONS, EXPRESS OR IMPLIED, INCLUDING, BUT
NOT LIMITED TO, THE IMPLIED WARRANTIES AND/OR CONDITIONS OF MERCHANTABILITY, OF
SATISFACTORY QUALITY, OF FITNESS FOR A PARTICULAR PURPOSE, OF ACCURACY, OF QUIET
ENJOYMENT, AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. LICENSOR AND EACH
CONTRIBUTOR DOES NOT WARRANT AGAINST INTERFERENCE WITH YOUR ENJOYMENT OF THE
COVERED CODE, THAT THE FUNCTIONS CONTAINED IN THE COVERED CODE WILL MEET YOUR
REQUIREMENTS, THAT THE OPERATION OF THE COVERED CODE WILL BE UNINTERRUPTED OR
ERROR-FREE, OR THAT DEFECTS IN THE COVERED CODE WILL BE CORRECTED. NO ORAL OR
WRITTEN DOCUMENTATION, INFORMATION OR ADVICE GIVEN BY LICENSOR, A LICENSOR
AUTHORIZED REPRESENTATIVE OR ANY CONTRIBUTOR SHALL CREATE A WARRANTY. You
acknowledge that the Covered Code is not intended for use in high risk
activities, including, but not limited to, the design, construction, operation
or maintenance of nuclear facilities, aircraft navigation, aircraft
communication systems, or air traffic control machines in which case the failure
of the Covered Code could lead to death, personal injury, or severe physical or
environmental damage. Licensor disclaims any express or implied warranty of
fitness for such uses.
9. LIMITATION OF LIABILITY. TO THE EXTENT NOT PROHIBITED BY LAW, IN NO EVENT
SHALL LICENSOR OR ANY CONTRIBUTOR BE LIABLE FOR ANY INCIDENTAL, SPECIAL,
INDIRECT OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR RELATING TO THIS LICENSE OR
YOUR USE OR INABILITY TO USE THE COVERED CODE, OR ANY PORTION THEREOF, WHETHER
UNDER A THEORY OF CONTRACT, WARRANTY, TORT (INCLUDING NEGLIGENCE OR STRICT
LIABILITY), PRODUCTS LIABILITY OR OTHERWISE, EVEN IF LICENSOR OR SUCH
CONTRIBUTOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES AND
NOTWITHSTANDING THE FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. SOME
JURISDICTIONS DO NOT ALLOW THE LIMITATION OF LIABILITY OF INCIDENTAL OR
CONSEQUENTIAL DAMAGES, SO THIS LIMITATION MAY NOT APPLY TO YOU. In no event
shall Licensor's total liability to You for all damages (other than as may be
required by applicable law) under this License exceed the amount of ten dollars
($10.00).
10. Ownership. Subject to the licenses granted under this License, each
Contributor retains all rights, title and interest in and to any Modifications
made by such Contributor. Licensor retains all rights, title and interest in and
to the Original Code and any Modifications made by or on behalf of Licensor
("Licensor Modifications"), and such Licensor Modifications will not be
automatically subject to this License. Licensor may, at its sole discretion,
choose to license such Licensor Modifications under this License, or on
different terms from those contained in this License or may choose not to
license them at all.
11. Termination.
11.1 Term and Termination. The term of this License is perpetual unless
terminated as provided below. This License and the rights granted hereunder will
terminate:
(a) automatically without notice from Licensor if You fail to comply with any
term(s) of this License and fail to cure such breach within 30 days of becoming
aware of such breach;
(b) immediately in the event of the circumstances described in Section 12.5(b);
or
(c) automatically without notice from Licensor if You, at any time during the
term of this License, commence an action for patent infringement against
Licensor (including by cross-claim or counter claim in a lawsuit);
(d) upon written notice from Licensor if You, at any time during the term of
this License, commence an action for patent infringement against any third party
alleging that the Covered Code itself (excluding combinations with other
software or hardware) infringes any patent (including by cross-claim or counter
claim in a lawsuit).
11.2 Effect of Termination. Upon termination, You agree to immediately stop any
further use, reproduction, modification, sublicensing and distribution of the
Covered Code and to destroy all copies of the Covered Code that are in your
possession or control. All sublicenses to the Covered Code which have been
properly granted prior to termination shall survive any termination of this
License. Provisions which, by their nature, should remain in effect beyond the
termination of this License shall survive, including but not limited to Sections
3, 5, 8, 9, 10, 11, 12.2 and 13. No party will be liable to any other for
compensation, indemnity or damages of any sort solely as a result of terminating
this License in accordance with its terms, and termination of this License will
be without prejudice to any other right or remedy of any party.
12. Miscellaneous.
12.1 Government End Users. The Covered Code is a "commercial item" as defined in
FAR 2.101. Government software and technical data rights in the Covered Code
include only those rights customarily provided to the public as defined in this
License. This customary commercial license in technical data and software is
provided in accordance with FAR 12.211 (Technical Data) and 12.212 (Computer
Software) and, for Department of Defense purchases, DFAR 252.227-7015 (Technical
Data -- Commercial Items) and 227.7202-3 (Rights in Commercial Computer Software
or Computer Software Documentation). Accordingly, all U.S. Government End Users
acquire Covered Code with only those rights set forth herein.
12.2 Relationship of Parties. This License will not be construed as creating an
agency, partnership, joint venture or any other form of legal association
between or among You, Licensor or any Contributor, and You will not represent to
the contrary, whether expressly, by implication, appearance or otherwise.
12.3 Independent Development. Nothing in this License will impair Licensor's
right to acquire, license, develop, have others develop for it, market and/or
distribute technology or products that perform the same or similar functions as,
or otherwise compete with, Modifications, Derivative Works, technology or
products that You may develop, produce, market or distribute.
12.4 Waiver; Construction. Failure by Licensor or any Contributor to enforce any
provision of this License will not be deemed a waiver of future enforcement of
that or any other provision. Any law or regulation which provides that the
language of a contract shall be construed against the drafter will not apply to
this License.
12.5 Severability. (a) If for any reason a court of competent jurisdiction finds
any provision of this License, or portion thereof, to be unenforceable, that
provision of the License will be enforced to the maximum extent permissible so
as to effect the economic benefits and intent of the parties, and the remainder
of this License will continue in full force and effect. (b) Notwithstanding the
foregoing, if applicable law prohibits or restricts You from fully and/or
specifically complying with Sections 2 and/or 3 or prevents the enforceability
of either of those Sections, this License will immediately terminate and You
must immediately discontinue any use of the Covered Code and destroy all copies
of it that are in your possession or control.
12.6 Dispute Resolution. Any litigation or other dispute resolution between You
and Licensor relating to this License shall take place in the Seattle,
Washington, and You and Licensor hereby consent to the personal jurisdiction of,
and venue in, the state and federal courts within that District with respect to
this License. The application of the United Nations Convention on Contracts for
the International Sale of Goods is expressly excluded.
12.7 Export/Import Laws. This software is subject to all export and import laws
and restrictions and regulations of the country in which you receive the Covered
Code and You are solely responsible for ensuring that You do not export,
re-export or import the Covered Code or any direct product thereof in violation
of any such restrictions, laws or regulations, or without all necessary
authorizations.
12.8 Entire Agreement; Governing Law. This License constitutes the entire
agreement between the parties with respect to the subject matter hereof. This
License shall be governed by the laws of the United States and the State of
Washington.
Where You are located in the province of Quebec, Canada, the following clause
applies: The parties hereby confirm that they have requested that this License
and all related documents be drafted in English. Les parties ont exig&eacute;
que le pr&eacute;sent contrat et tous les documents connexes soient
r&eacute;dig&eacute;s en anglais.
EXHIBIT A.
"Copyright &copy; 1995-2002
RealNetworks, Inc. and/or its licensors. All Rights Reserved.
The contents of this file, and the files included with this file, are subject to
the current version of the RealNetworks Public Source License Version 1.0 (the
"RPSL") available at https://www.helixcommunity.org/content/rpsl unless you have
licensed the file under the RealNetworks Community Source License Version 1.0
(the "RCSL") available at https://www.helixcommunity.org/content/rcsl, in which
case the RCSL will apply. You may also obtain the license terms directly from
RealNetworks. You may not use this file except in compliance with the RPSL or,
if you have a valid RCSL with RealNetworks applicable to this file, the RCSL.
Please see the applicable RPSL or RCSL for the rights, obligations and
limitations governing use of the contents of the file.
This file is part of the Helix DNA Technology. RealNetworks is the developer of
the Original code and owns the copyrights in the portions it created.
This file, and the files included with this file, is distributed and made
available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR
IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING
WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
Contributor(s): ____________________________________
Technology Compatibility Kit Test
Suite(s) Location (if licensed under the RCSL): ______________________________
Object Code Notice: Helix DNA Client technology included. Copyright (c)
RealNetworks, Inc., 1995-2002. All rights reserved.
EXHIBIT B
Compatible Source Licenses for the RealNetworks Public Source License. The
following list applies to the most recent version of the license as of October
25, 2002, unless otherwise indicated.
* Academic Free License
* Apache Software License
* Apple Public Source License
* Artistic license
* Attribution Assurance Licenses
* BSD license
* Common Public License (1)
* Eiffel Forum License
* GNU General Public License (GPL) (1)
* GNU Library or "Lesser" General Public License (LGPL) (1)
* IBM Public License
* Intel Open Source License
* Jabber Open Source License
* MIT license
* MITRE Collaborative Virtual Workspace License (CVW License)
* Motosoto License
* Mozilla Public License 1.0 (MPL)
* Mozilla Public License 1.1 (MPL)
* Nokia Open Source License
* Open Group Test Suite License
* Python Software Foundation License
* Ricoh Source Code Public License
* Sun Industry Standards Source License (SISSL)
* Sun Public License
* University of Illinois/NCSA Open Source License
* Vovida Software License v. 1.0
* W3C License
* X.Net License
* Zope Public License
* zlib/libpng license
(1) Note: because this license contains certain reciprocal licensing terms that
purport to extend to independently developed code, You may be prohibited under
the terms of this otherwise compatible license from using code licensed under
its terms with Covered Code because Covered Code may only be licensed under the
RealNetworks Public Source License. Any attempt to apply non RPSL license terms,
including without limitation the GPL, to Covered Code is expressly forbidden.
You are responsible for ensuring that Your use of Compatible Source Licensed
code does not violate either the RPSL or the Compatible Source License.
The latest version of this list can be found at:
https://www.helixcommunity.org/content/complicense
EXHIBIT C
RealNetworks' Trademark policy.
RealNetworks defines the following trademarks collectively as "Licensor
Trademarks": "RealNetworks", "RealPlayer", "RealJukebox", "RealSystem",
"RealAudio", "RealVideo", "RealOne Player", "RealMedia", "Helix" or any other
trademarks or trade names belonging to RealNetworks.
RealNetworks "Licensor Trademark Policy" forbids any use of Licensor Trademarks
except as permitted by and in strict compliance at all times with RealNetworks'
third party trademark usage guidelines which are posted at
http://www.realnetworks.com/info/helixlogo.html.

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Copyright (c) 1995-2004 RealNetworks, Inc. All Rights Reserved.
The contents of this directory, and (except where otherwise
indicated) the directories included within this directory, are
subject to the current version of the RealNetworks Public Source
License (the "RPSL") available at RPSL.txt in this directory, unless
you have licensed the directory under the current version of the
RealNetworks Community Source License (the "RCSL") available at
RCSL.txt in this directory, in which case the RCSL will apply. You
may also obtain the license terms directly from RealNetworks. You
may not use the files in this directory except in compliance with the
RPSL or, if you have a valid RCSL with RealNetworks applicable to
this directory, the RCSL. Please see the applicable RPSL or RCSL for
the rights, obligations and limitations governing use of the contents
of the directory.
This directory is part of the Helix DNA Technology. RealNetworks is
the developer of the Original Code and owns the copyrights in the
portions it created.
This directory, and the directories included with this directory, are
distributed and made available on an 'AS IS' basis, WITHOUT WARRANTY
OF ANY KIND, EITHER EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY
DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
QUIET ENJOYMENT OR NON-INFRINGEMENT.
Technology Compatibility Kit Test Suite(s) Location:
http://www.helixcommunity.org/content/tck

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The RCSL is made up of a base agreement and a few Attachments.
For Research and Development use, you agree to the terms of the
RCSL R&D License (base RCSL and Attachments A, B, and C)
For Commercial Use (either distribution or internal commercial
deployment) of the Helix DNA with or without support for RealNetworks'
RealAudio and RealVideo Add-on Technology, you agree to the
terms of the same RCSL R&D license
and execute one or more additional Commercial Use License attachments
<see http://www.helixcommunity.org/content/rcsl-attachments>.
------------------------------------------------------------------------
REALNETWORKS COMMUNITY SOURCE LICENSE
Version 1.2 (Rev. Date: January 22, 2003).
RECITALS
Original Contributor has developed Specifications, Source Code
implementations and Executables of certain Technology; and
Original Contributor desires to license the Technology to a large
community to facilitate research, innovation and product development
while maintaining compatibility of such products with the Technology as
delivered by Original Contributor; and
Original Contributor desires to license certain Trademarks for the
purpose of branding products that are compatible with the relevant
Technology delivered by Original Contributor; and
You desire to license the Technology and possibly certain Trademarks
from Original Contributor on the terms and conditions specified in this
License.
In consideration for the mutual covenants contained herein, You and
Original Contributor agree as follows:
AGREEMENT
*1. Introduction.*
The RealNetworks Community Source License ("RCSL") and effective
attachments ("License") may include five distinct licenses:
i) Research Use license -- License plus Attachments A, B and C only.
ii) Commercial Use and Trademark License, which may be for Internal
Deployment Use or external distribution, or both -- License plus
Attachments A, B, C, and D.
iii) Technology Compatibility Kit (TCK) license -- Attachment C.
iv) Add-On Technology License (Executable) Commercial Use License
-Attachment F.
v) Add-On Technology Source Code Porting and Optimization
License-Attachment G.
The Research Use license is effective when You click and accept this
License. The TCK is effective when You click and accept this License,
unless otherwise specified in the TCK attachments. The Commercial Use
and Trademark, Add-On Technology License, and the Add-On Technology
Source Code Porting and Optimization licenses must each be signed by You
and Original Contributor to become effective. Once effective, these
licenses and the associated requirements and responsibilities are
cumulative. Capitalized terms used in this License are defined in the
Glossary.
*2. License Grants.*
2.1 Original Contributor Grant.
Subject to Your compliance with Sections 3, 8.10 and Attachment A of
this License, Original Contributor grants to You a worldwide,
royalty-free, non-exclusive license, to the extent of Original
Contributor's Intellectual Property Rights covering the Original Code,
Upgraded Code and Specifications, to do the following:
(a) Research Use License:
(i) use, reproduce and modify the Original Code, Upgraded Code and
Specifications to create Modifications and Reformatted Specifications
for Research Use by You;
(ii) publish and display Original Code, Upgraded Code and Specifications
with, or as part of Modifications, as permitted under Section 3.1(b) below;
(iii) reproduce and distribute copies of Original Code and Upgraded Code
to Licensees and students for Research Use by You;
(iv) compile, reproduce and distribute Original Code and Upgraded Code
in Executable form, and Reformatted Specifications to anyone for
Research Use by You.
(b) Other than the licenses expressly granted in this License, Original
Contributor retains all right, title, and interest in Original Code and
Upgraded Code and Specifications.
2.2 Your Grants.
(a) To Other Licensees. You hereby grant to each Licensee a license to
Your Error Corrections and Shared Modifications, of the same scope and
extent as Original Contributor's licenses under Section 2.1 a) above
relative to Research Use and Attachment D relative to Commercial Use.
(b) To Original Contributor. You hereby grant to Original Contributor a
worldwide, royalty-free, non-exclusive, perpetual and irrevocable
license, to the extent of Your Intellectual Property Rights covering
Your Error Corrections, Shared Modifications and Reformatted
Specifications, to use, reproduce, modify, display and distribute Your
Error Corrections, Shared Modifications and Reformatted Specifications,
in any form, including the right to sublicense such rights through
multiple tiers of distribution.
(c) Other than the licenses expressly granted in Sections 2.2(a) and (b)
above, and the restrictions set forth in Section 3.1(d)(iv) below, You
retain all right, title, and interest in Your Error Corrections, Shared
Modifications and Reformatted Specifications.
2.3 Contributor Modifications.
You may use, reproduce, modify, display and distribute Contributor Error
Corrections, Shared Modifications and Reformatted Specifications,
obtained by You under this License, to the same scope and extent as with
Original Code, Upgraded Code and Specifications.
2.4 Subcontracting.
You may deliver the Source Code of Covered Code to other Licensees
having at least a Research Use license, for the sole purpose of
furnishing development services to You in connection with Your rights
granted in this License. All such Licensees must execute appropriate
documents with respect to such work consistent with the terms of this
License, and acknowledging their work-made-for-hire status or assigning
exclusive right to the work product and associated Intellectual Property
Rights to You.
*3. Requirements and Responsibilities*.
3.1 Research Use License.
As a condition of exercising the rights granted under Section 2.1(a)
above, You agree to comply with the following:
(a) Your Contribution to the Community. All Error Corrections and Shared
Modifications which You create or contribute to are automatically
subject to the licenses granted under Section 2.2 above. You are
encouraged to license all of Your other Modifications under Section 2.2
as Shared Modifications, but are not required to do so. You agree to
notify Original Contributor of any errors in the Specification.
(b) Source Code Availability. You agree to provide all Your Error
Corrections to Original Contributor as soon as reasonably practicable
and, in any event, prior to Internal Deployment Use or Commercial Use,
if applicable. Original Contributor may, at its discretion, post Source
Code for Your Error Corrections and Shared Modifications on the
Community Webserver. You may also post Error Corrections and Shared
Modifications on a web-server of Your choice; provided, that You must
take reasonable precautions to ensure that only Licensees have access to
such Error Corrections and Shared Modifications. Such precautions shall
include, without limitation, a password protection scheme limited to
Licensees and a click-on, download certification of Licensee status
required of those attempting to download from the server. An example of
an acceptable certification is attached as Attachment A-2.
(c) Notices. All Error Corrections and Shared Modifications You create
or contribute to must include a file documenting the additions and
changes You made and the date of such additions and changes. You must
also include the notice set forth in Attachment A-1 in the file header.
If it is not possible to put the notice in a particular Source Code file
due to its structure, then You must include the notice in a location
(such as a relevant directory file), where a recipient would be most
likely to look for such a notice.
(d) Redistribution.
(i) Source. Covered Code may be distributed in Source Code form only to
another Licensee (except for students as provided below). You may not
offer or impose any terms on any Covered Code that alter the rights,
requirements, or responsibilities of such Licensee. You may distribute
Covered Code to students for use in connection with their course work
and research projects undertaken at accredited educational institutions.
Such students need not be Licensees, but must be given a copy of the
notice set forth in Attachment A-3 and such notice must also be included
in a file header or prominent location in the Source Code made available
to such students.
(ii) Executable. You may distribute Executable version(s) of Covered
Code to Licensees and other third parties only for the purpose of
evaluation and comment in connection with Research Use by You and under
a license of Your choice, but which limits use of such Executable
version(s) of Covered Code only to that purpose.
(iii) Modified Class, Interface and Package Naming. In connection with
Research Use by You only, You may use Original Contributor's class,
Interface and package names only to accurately reference or invoke the
Source Code files You modify. Original Contributor grants to You a
limited license to the extent necessary for such purposes.
(iv) You expressly agree that any distribution, in whole or in part, of
Modifications developed by You shall only be done pursuant to the terms
and conditions of this License.
(e) Extensions.
(i) Covered Code. You may not include any Source Code of Community Code
in any Extensions. You may include the compiled Header Files of
Community Code in an Extension provided that Your use of the Covered
Code, including Heading Files, complies with the Commercial Use License,
the TCK and all other terms of this License.
(ii) Publication. No later than the date on which You first distribute
such Extension for Commercial Use, You must publish to the industry, on
a non-confidential basis and free of all copyright restrictions with
respect to reproduction and use, an accurate and current specification
for any Extension. In addition, You must make available an appropriate
test suite, pursuant to the same rights as the specification,
sufficiently detailed to allow any third party reasonably skilled in the
technology to produce implementations of the Extension compatible with
the specification. Such test suites must be made available as soon as
reasonably practicable but, in no event, later than ninety (90) days
after Your first Commercial Use of the Extension. You must use
reasonable efforts to promptly clarify and correct the specification and
the test suite upon written request by Original Contributor.
(iii) Open. You agree to refrain from enforcing any Intellectual
Property Rights You may have covering any interface(s) of Your
Extension, which would prevent the implementation of such interface(s)
by Original Contributor or any Licensee. This obligation does not
prevent You from enforcing any Intellectual Property Right You have that
would otherwise be infringed by an implementation of Your Extension.
(iv) Interface Modifications and Naming. You may not modify or add to
the GUID space * * "xxxxxxxx-0901-11d1-8B06-00A024406D59" or any other
GUID space designated by Original Contributor. You may not modify any
Interface prefix provided with the Covered Code or any other prefix
designated by Original Contributor.* *
* *
(f) You agree that any Specifications provided to You by Original
Contributor are confidential and proprietary information of Original
Contributor. You must maintain the confidentiality of the Specifications
and may not disclose them to any third party without Original
Contributor's prior written consent. You may only use the Specifications
under the terms of this License and only for the purpose of implementing
the terms of this License with respect to Covered Code. You agree not
use, copy or distribute any such Specifications except as provided in
writing by Original Contributor.
3.2 Commercial Use License.
You may not make Commercial Use of any Covered Code unless You and
Original Contributor have executed a copy of the Commercial Use and
Trademark License attached as Attachment D.
*4. Versions of the License.*
4.1 License Versions.
Original Contributor may publish revised versions of the License from
time to time. Each version will be given a distinguishing version number.
4.2 Effect.
Once a particular version of Covered Code has been provided under a
version of the License, You may always continue to use such Covered Code
under the terms of that version of the License. You may also choose to
use such Covered Code under the terms of any subsequent version of the
License. No one other than Original Contributor has the right to
promulgate License versions.
4.3 Multiple-Licensed Code.
Original Contributor may designate portions of the Covered Code as
"Multiple-Licensed." "Multiple-Licensed" means that the Original
Contributor permits You to utilize those designated portions of the
Covered Code under Your choice of this License or the alternative
license(s), if any, specified by the Original Contributor in an
Attachment to this License.
*5. Disclaimer of Warranty.*
5.1 COVERED CODE PROVIDED AS IS.
COVERED CODE IS PROVIDED UNDER THIS LICENSE "AS IS," WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION,
WARRANTIES THAT THE COVERED CODE IS FREE OF DEFECTS, MERCHANTABLE, FIT
FOR A PARTICULAR PURPOSE OR NON-INFRINGING. YOU AGREE TO BEAR THE ENTIRE
RISK IN CONNECTION WITH YOUR USE AND DISTRIBUTION OF COVERED CODE UNDER
THIS LICENSE. THIS DISCLAIMER OF WARRANTY CONSTITUTES AN ESSENTIAL PART
OF THIS LICENSE. NO USE OF ANY COVERED CODE IS AUTHORIZED HEREUNDER
EXCEPT SUBJECT TO THIS DISCLAIMER.
5.2 Not Designed for High Risk Activities.
You acknowledge that Original Code, Upgraded Code and Specifications are
not designed or intended for use in high risk activities including, but
not limited to: (i) on-line control of aircraft, air traffic, aircraft
navigation or aircraft communications; or (ii) in the design,
construction, operation or maintenance of any nuclear facility. Original
Contributor disclaims any express or implied warranty of fitness for
such uses.
*6. Termination.*
6.1 By You.
You may terminate this Research Use license at anytime by providing
written notice to Original Contributor.
6.2 By Original Contributor.
This License and the rights granted hereunder will terminate:
(i) automatically if You fail to comply with the terms of this License
and fail to cure such breach within 30 days of receipt of written notice
of the breach;
(ii) immediately in the event of circumstances specified in Sections 7.1
and 8.4; or
(iii) at Original Contributor's discretion upon any action initiated by
You (including by cross-claim or counter claim) alleging that use or
distribution by Original Contributor or any Licensee, of Original Code,
Upgraded Code, Error Corrections, Shared Modifications or Specifications
infringe a patent owned or controlled by You.
6.3 Effective of Termination.
Upon termination, You agree to discontinue use of and destroy all copies
of Covered Code in Your possession. All sublicenses to the Covered Code
which You have properly granted shall survive any termination of this
License. Provisions that, by their nature, should remain in effect
beyond the termination of this License shall survive including, without
limitation, Sections 2.2, 3, 5, 7 and 8.
6.4 No Compensation.
Each party waives and releases the other from any claim to compensation
or indemnity for permitted or lawful termination of the business
relationship established by this License.
*7. Liability.*
7.1 Infringement. Should any of the Original Code, Upgraded Code, TCK or
Specifications ("Materials") become the subject of a claim of
infringement, Original Contributor may, at its sole option, (i) attempt
to procure the rights necessary for You to continue using the Materials,
(ii) modify the Materials so that they are no longer infringing, or
(iii) terminate Your right to use the Materials, immediately upon
written notice, and refund to You the amount, if any, having then
actually been paid by You to Original Contributor for the Original Code,
Upgraded Code and TCK, depreciated on a straight line, five year basis.
7.2 LIMITATION OF LIABILITY. TO THE FULL EXTENT ALLOWED BY APPLICABLE
LAW, ORIGINAL CONTRIBUTOR'S LIABILITY TO YOU FOR CLAIMS RELATING TO THIS
LICENSE, WHETHER FOR BREACH OR IN TORT, SHALL BE LIMITED TO ONE HUNDRED
PERCENT (100%) OF THE AMOUNT HAVING THEN ACTUALLY BEEN PAID BY YOU TO
ORIGINAL CONTRIBUTOR FOR ALL COPIES LICENSED HEREUNDER OF THE PARTICULAR
ITEMS GIVING RISE TO SUCH CLAIM, IF ANY, DURING THE TWELVE MONTHS
PRECEDING THE CLAIMED BREACH. IN NO EVENT WILL YOU (RELATIVE TO YOUR
SHARED MODIFICATIONS OR ERROR CORRECTIONS) OR ORIGINAL CONTRIBUTOR BE
LIABLE FOR ANY INDIRECT, PUNITIVE, SPECIAL, INCIDENTAL OR CONSEQUENTIAL
DAMAGES IN CONNECTION WITH OR RISING OUT OF THIS LICENSE (INCLUDING,
WITHOUT LIMITATION, LOSS OF PROFITS, USE, DATA, OR OTHER ECONOMIC
ADVANTAGE), HOWEVER IT ARISES AND ON ANY THEORY OF LIABILITY, WHETHER IN
AN ACTION FOR CONTRACT, STRICT LIABILITY OR TORT (INCLUDING NEGLIGENCE)
OR OTHERWISE, WHETHER OR NOT YOU OR ORIGINAL CONTRIBUTOR HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE AND NOTWITHSTANDING THE
FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY.
*8. Miscellaneous.*
8.1 Trademark.
You shall not use any Trademark unless You and Original Contributor
execute a copy of the Commercial Use and Trademark License Agreement
attached hereto as Attachment D. Except as expressly provided in the
License, You are granted no right, title or license to, or interest in,
any Trademarks. Whether or not You and Original Contributor enter into
the Trademark License, You agree not to (i) challenge Original
Contributor's ownership or use of Trademarks; (ii) attempt to register
any Trademarks, or any mark or logo substantially similar thereto; or
(iii) incorporate any Trademarks into Your own trademarks, product
names, service marks, company names, or domain names.
8.2 Integration.
This License represents the complete agreement concerning the subject
matter hereof.
8.3 Assignment.
Original Contributor may assign this License, and its rights and
obligations hereunder, in its sole discretion. You may assign the
Research Use portions of this License and the TCK license to a third
party upon prior written notice to Original Contributor (which may be
provided electronically via the Community Web-Server). You may not
assign the Commercial Use and Trademark license, the Add-On Technology
License, or the Add-On Technology Source Code Porting License, including
by way of merger (regardless of whether You are the surviving entity) or
acquisition, without Original Contributor's prior written consent.
8.4 Severability.
If any provision of this License is held to be unenforceable, such
provision shall be reformed only to the extent necessary to make it
enforceable. Notwithstanding the foregoing, if You are prohibited by law
from fully and specifically complying with Sections 2.2 or 3, this
License will immediately terminate and You must immediately discontinue
any use of Covered Code.
8.5 Governing Law.
This License shall be governed by the laws of the United States and the
State of Washington, as applied to contracts entered into and to be
performed in Washington between Washington residents. The application of
the United Nations Convention on Contracts for the International Sale of
Goods is expressly excluded. You agree that the state and federal courts
located in Seattle, Washington have exclusive jurisdiction over any
claim relating to the License, including contract and tort claims.
8.6 Dispute Resolution.
a) Arbitration. Any dispute arising out of or relating to this License
shall be finally settled by arbitration as set out herein, except that
either party may bring any action, in a court of competent jurisdiction
(which jurisdiction shall be exclusive), with respect to any dispute
relating to such party's Intellectual Property Rights or with respect to
Your compliance with the TCK license. Arbitration shall be administered:
(i) by the American Arbitration Association (AAA), (ii) in accordance
with the rules of the United Nations Commission on International Trade
Law (UNCITRAL) (the "Rules") in effect at the time of arbitration as
modified herein; and (iii) the arbitrator will apply the substantive
laws of Washington and the United States. Judgment upon the award
rendered by the arbitrator may be entered in any court having
jurisdiction to enforce such award.
b) Arbitration language, venue and damages. All arbitration proceedings
shall be conducted in English by a single arbitrator selected in
accordance with the Rules, who must be fluent in English and be either a
retired judge or practicing attorney having at least ten (10) years
litigation experience and be reasonably familiar with the technology
matters relative to the dispute. Unless otherwise agreed, arbitration
venue shall be in Seattle, Washington. The arbitrator may award monetary
damages only and nothing shall preclude either party from seeking
provisional or emergency relief from a court of competent jurisdiction.
The arbitrator shall have no authority to award damages in excess of
those permitted in this License and any such award in excess is void.
All awards will be payable in U.S. dollars and may include, for the
prevailing party (i) pre-judgment award interest, (ii) reasonable
attorneys' fees incurred in connection with the arbitration, and (iii)
reasonable costs and expenses incurred in enforcing the award. The
arbitrator will order each party to produce identified documents and
respond to no more than twenty-five single question interrogatories.
8.7 Construction.
Any law or regulation, which provides that the language of a contract
shall be construed against the drafter, shall not apply to this License.
8.8 U.S. Government End Users.
The Covered Code is a "commercial item," as that term is defined in 48
C.F.R. 2.101 (Oct. 1995), consisting of "commercial computer software"
and "commercial computer software documentation," as such terms are used
in 48 C.F.R. 12.212 (Sept. 1995). Consistent with 48 C.F.R. 12.212 and
48 C.F.R. 227.7202-1 through 227.7202-4 (June 1995), all U.S. Government
End Users acquire Covered Code with only those rights set forth herein.
You agree to pass this notice to our licensees.
8.9 Marketing Activities.
Licensee hereby grants Original Contributor a non-exclusive,
non-transferable, limited license to use the Licensee's company name and
logo ("Licensee Marks") in any presentations, press releases, or
marketing materials solely for the purpose of identifying Licensee as a
member of the Helix Community. Licensee shall provide samples of
Licensee Marks to Original Contributor upon request by Original
Contributor. Original Contributor acknowledges that the Licensee Marks
are the trademarks of Licensee. Original Contributor shall not use the
Licensee Marks in a way that may imply that Original Contributor is an
agency or branch of Licensee. Original Contributor understands and
agrees that the use of any Licensee Marks in connection with this
Agreement shall not create any right, title or interest, in, or to the
Licensee Marks or any Licensee trademarks and that all such use and
goodwill associated with any such trademarks will inure to the benefit
of Licensee. Further the Original Contributor will stop usage of the
Licensee Marks upon Licensee's request.
8.10 Press Announcements.
You may make press announcements or other public statements regarding
this License without the prior written consent of the Original
Contributor, if Your statement is limited to announcing the licensing of
the Covered Code or the availability of Your Product and its
compatibility with the Covered Code. All other public announcements
regarding this license require the prior written consent of the Original
Contributor. Consent requests are welcome at press@helixcommunity.org.
8.11 International Use.
a) Export/Import laws. Covered Code is subject to U.S. export control
laws and may be subject to export or import regulations in other
countries. Each party agrees to comply strictly with all such laws and
regulations and acknowledges their responsibility to obtain such
licenses to export, re-export, or import as may be required. You agree
to pass these obligations to Your licensees.
b) Intellectual Property Protection. Due to limited intellectual
property protection and enforcement in certain countries, You agree not
to redistribute the Original Code, Upgraded Code, TCK and Specifications
to any country on the list of restricted countries on the Community Web
Server.
8.12 Language.
This License is in the English language only, which language shall be
controlling in all respects, and all versions of this License in any
other language shall be for accommodation only and shall not be binding
on the parties to this License. All communications and notices made or
given pursuant to this License, and all documentation and support to be
provided, unless otherwise noted, shall be in the English language.
PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE
"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND
CONDITIONS OF THIS LICENSE WITH REALNETWORKS, INC. IF YOU ARE AGREEING
TO THIS LICENSE ON BEHALF OF A COMPANY, YOU REPRESENT THAT YOU ARE
AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. WHETHER YOU ARE ACTING
ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, YOU MUST BE OF MAJORITY
AGE AND BE OTHERWISE COMPETENT TO ENTER INTO CONTRACTS. IF YOU DO NOT
MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY OF THE TERMS AND
CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON TO EXIT.
GLOSSARY
1. *"Added Value"* means code which:
(i) has a principal purpose which is substantially different from that
of the stand-alone Technology;
(ii) represents a significant functional and value enhancement to the
Technology;
(iii) operates in conjunction with the Technology; and
(iv) is not marketed as a technology which replaces or substitutes for
the Technology
2. "*Applicable Patent Rights*" mean: (a) in the case where Original
Contributor is the grantor of rights, claims of patents that (i) are now
or hereafter acquired, owned by or assigned to Original Contributor and
(ii) are necessarily infringed by using or making the Original Code or
Upgraded Code, including Modifications provided by Original Contributor,
alone and not in combination with other software or hardware; and (b) in
the case where Licensee is the grantor of rights, claims of patents that
(i) are now or hereafter acquired, owned by or assigned to Licensee and
(ii) are infringed (directly or indirectly) by using or making
Licensee's Modifications or Error Corrections, taken alone or in
combination with Covered Code.
3. "*Application Programming Interfaces (APIs)"* means the interfaces,
associated header files, service provider interfaces, and protocols that
enable a device, application, Operating System, or other program to
obtain services from or make requests of (or provide services in
response to requests from) other programs, and to use, benefit from, or
rely on the resources, facilities, and capabilities of the relevant
programs using the APIs. APIs includes the technical documentation
describing the APIs, the Source Code constituting the API, and any
Header Files used with the APIs.
4. "*Commercial Use*" means any use (internal or external), copying,
sublicensing or distribution (internal or external), directly or
indirectly of Covered Code by You other than Your Research Use of
Covered Code within Your business or organization or in conjunction with
other Licensees with equivalent Research Use rights. Commercial Use
includes any use of the Covered Code for direct or indirect commercial
or strategic gain, advantage or other business purpose. Any Commercial
Use requires execution of Attachment D by You and Original Contributor.
5. "*Community Code*" means the Original Code, Upgraded Code, Error
Corrections, Shared Modifications, or any combination thereof.
6. "*Community Webserver(s)"* means the webservers designated by
Original Contributor for access to the Original Code, Upgraded Code, TCK
and Specifications and for posting Error Corrections and Shared
Modifications.
7. "*Compliant Covered Code*" means Covered Code that complies with the
requirements of the TCK.
8. "*Contributor*" means each Licensee that creates or contributes to
the creation of any Error Correction or Shared Modification.
9. "*Covered Code*" means the Original Code, Upgraded Code,
Modifications, or any combination thereof.
10. "*Error Correction*" means any change made to Community Code which
conforms to the Specification and corrects the adverse effect of a
failure of Community Code to perform any function set forth in or
required by the Specifications.
11. "*Executable*" means Covered Code that has been converted from
Source Code to the preferred form for execution by a computer or digital
processor (e.g. binary form).
12. "*Extension(s)"* means any additional Interfaces developed by or for
You which: (i) are designed for use with the Technology; (ii) constitute
an API for a library of computing functions or services; and (iii) are
disclosed or otherwise made available to third party software developers
for the purpose of developing software which invokes such additional
Interfaces. The foregoing shall not apply to software developed by Your
subcontractors to be exclusively used by You.
13. "*Header File(s)"* means that portion of the Source Code that
provides the names and types of member functions, data members, class
definitions, and interface definitions necessary to implement the APIs
for the Covered Code. Header Files include, files specifically
designated by Original Contributor as Header Files. Header Files do not
include the code necessary to implement the functionality underlying the
Interface.
14. *"Helix DNA Server Technology"* means the program(s) that implement
the Helix Universal Server streaming engine for the Technology as
defined in the Specification.
15. *"Helix DNA Client Technology"* means the Covered Code that
implements the RealOne Player engine as defined in the Specification.
16. *"Helix DNA Producer Technology"* means the Covered Code that
implements the Helix Producer engine as defined in the Specification.
17. *"Helix DNA Technology"* means the Helix DNA Server Technology, the
Helix DNA Client Technology, the Helix DNA Producer Technology and other
Helix technologies designated by Original Contributor.
18. "*Intellectual Property Rights*" means worldwide statutory and
common law rights associated solely with (i) Applicable Patent Rights;
(ii) works of authorship including copyrights, copyright applications,
copyright registrations and "moral rights"; (iii) the protection of
trade and industrial secrets and confidential information; and (iv)
divisions, continuations, renewals, and re-issuances of the foregoing
now existing or acquired in the future.
19. *"Interface*" means interfaces, functions, properties, class
definitions, APIs, Header Files, GUIDs, V-Tables, and/or protocols
allowing one piece of software, firmware or hardware to communicate or
interoperate with another piece of software, firmware or hardware.
20. "*Internal Deployment Use*" means use of Compliant Covered Code
(excluding Research Use) within Your business or organization only by
Your employees and/or agents on behalf of Your business or organization,
but not to provide services, including content distribution, to third
parties, subject to execution of Attachment D by You and Original
Contributor, if required.
21. "*Licensee*" means any party that has entered into and has in effect
a version of this License with Original Contributor.
22. "*MIME type*" means a description of what type of media or other
content is in a file, including by way of example but not limited to
'audio/x-pn-realaudio-plugin.'
23. "*Modification(s)"* means (i) any addition to, deletion from and/or
change to the substance and/or structure of the Covered Code, including
Interfaces; (ii) the combination of any Covered Code and any previous
Modifications; (iii) any new file or other representation of computer
program statements that contains any portion of Covered Code; and/or
(iv) any new Source Code implementing any portion of the Specifications.
24. "*MP3 Patents*" means any patents necessary to make, use or sell
technology implementing any portion of the specification developed by
the Moving Picture Experts Group known as MPEG-1 Audio Layer-3 or MP3,
including but not limited to all past and future versions, profiles,
extensions, parts and amendments relating to the MP3 specification.
25. "*MPEG-4 Patents*" means any patents necessary to make, use or sell
technology implementing any portion of the specification developed by
the Moving Pictures Experts Group known as MPEG-4, including but not
limited to all past and future versions, profiles, extensions, parts and
amendments relating to the MPEG-4 specification.
26. "*Original Code*" means the initial Source Code for the Technology
as described on the Community Web Server.
27. "*Original Contributor*" means RealNetworks, Inc., its affiliates
and its successors and assigns.
28. "*Original Contributor MIME Type*" means the MIME registry, browser
preferences, or local file/protocol associations invoking any Helix DNA
Client-based application, including the RealOne Player, for playback of
RealAudio, RealVideo, other RealMedia MIME types or datatypes (e.g.,
.ram, .rnx, .rpm, .ra, .rm, .rp, .rt, .rf, .prx, .mpe, .rmp, .rmj, .rav,
.rjs, .rmx, .rjt, .rms), and any other Original Contributor-specific or
proprietary MIME types that Original Contributor may introduce in the
future.
29. "*Personal Use*" means use of Covered Code by an individual solely
for his or her personal, private and non-commercial purposes. An
individual's use of Covered Code in his or her capacity as an officer,
employee, member, independent contractor or agent of a corporation,
business or organization (commercial or non-commercial) does not qualify
as Personal Use.
30. "*RealMedia File Format*" means the file format designed and
developed by RealNetworks for storing multimedia data and used to store
RealAudio and RealVideo encoded streams. Valid RealMedia File Format
extensions include: .rm, .rmj, .rmc, .rmvb, .rms.
31. "*RCSL Webpage*" means the RealNetworks Community Source License
webpage located at https://www.helixcommunity.org/content/rcsl or such
other URL that Original Contributor may designate from time to time.
32. "*Reformatted Specifications*" means any revision to the
Specifications which translates or reformats the Specifications (as for
example in connection with Your documentation) but which does not alter,
subset or superset * *the functional or operational aspects of the
Specifications.
33. "*Research Use*" means use and distribution of Covered Code only for
Your Personal Use, research or development use and expressly excludes
Internal Deployment Use and Commercial Use. Research Use also includes
use of Covered Code to teach individuals how to use Covered Code.
34. "*Shared Modifications*" means Modifications that You distribute or
use for a Commercial Use, in addition to any Modifications provided by
You, at Your option, pursuant to Section 2.2, or received by You from a
Contributor pursuant to Section 2.3.
35. "*Source Code*" means the preferred form of the Covered Code for
making modifications to it, including all modules it contains, plus any
associated interface definition files, scripts used to control
compilation and installation of an Executable, or source code
differential comparisons against either the Original Code or another
well known, available Covered Code of the Contributor's choice. The
Source Code can be in a compressed or archival form, provided the
appropriate decompression or de-archiving software is widely available
for no charge.
36. "*Specifications*" means the specifications for the Technology and
other documentation, as designated on the Community Web Server, as may
be revised by Original Contributor from time to time.
37. "*Trademarks*" means Original Contributor's trademarks and logos,
including, but not limited to, RealNetworks, RealAudio, RealVideo,
RealOne, RealSystem, SureStream, Helix, Helix DNA and other trademarks
whether now used or adopted in the future.
38. "*Technology*" means the technology described in Attachment B, and
Upgrades.
39. "*Technology Compatibility Kit"* or *"TCK*" means the test programs,
procedures, acceptance criteria and/or other requirements, designated by
Original Contributor for use in verifying compliance of Covered Code
with the Specifications, in conjunction with the Original Code and
Upgraded Code. Original Contributor may, in its sole discretion and from
time to time, revise a TCK to correct errors and/or omissions and in
connection with Upgrades.
40. "*Upgrade(s)"* means new versions of Technology designated
exclusively by Original Contributor as an "Upgrade" and released by
Original Contributor from time to time under the terms of the License.
41. "*Upgraded Code*" means the Source Code and/or Executables for
Upgrades, possibly including Modifications made by Contributors.
42. *"User's Guide"* means the users guide for the TCK which Original
Contributor makes available to You to provide direction in how to run
the TCK and properly interpret the results, as may be revised by
Original Contributor from time to time.
43. "*You(r)*" means an individual, or a legal entity acting by and
through an individual or individuals, exercising rights either under
this License or under a future version of this License issued pursuant
to Section 4.1. For legal entities, "You(r)" includes any entity that by
majority voting interest controls, is controlled by, or is under common
control with You.
44. "*Your Products*" means any (i) hardware products You distribute
integrating the Covered Code; (ii) any software products You distribute
with the Covered Code that utilize the APIs of the Covered Code; or
(iii) any services You provide using the Covered Code.
ATTACHMENT A
REQUIRED NOTICES
ATTACHMENT A-1
REQUIRED IN ALL CASES
Notice to be included in header file of all Error Corrections and Shared
Modifications:
Portions Copyright 1994-2003 © RealNetworks, Inc. All rights reserved.
The contents of this file, and the files included with this file, are
subject to the current version of RealNetworks Community Source License
Version 1.1 (the "License"). You may not use this file except in
compliance with the License executed by both You and RealNetworks. You
may obtain a copy of the License at *
https://www.helixcommunity.org/content/rcsl.* You may also obtain a copy
of the License by contacting RealNetworks directly. Please see the
License for the rights, obligations and limitations governing use of the
contents of the file.
This file is part of the Helix DNA technology. RealNetworks, Inc., is
the developer of the Original code and owns the copyrights in the
portions it created.
This file, and the files included with this file, are distributed on an
'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT
LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
Contributor(s):
_______________________________________________
Technology Compatibility Kit Test Suite(s) Location:
________________________________
ATTACHMENT A-2
SAMPLE LICENSEE CERTIFICATION
"By clicking the `Agree' button below, You certify that You are a
Licensee in good standing under the RealNetworks Community Source
License, ("License") and that Your access, use and distribution of code
and information You may obtain at this site is subject to the License.
If You are not a Licensee under the RealNetworks Community Source
License You agree not to download, copy or use the Helix DNA technology.
ATTACHMENT A-3
REQUIRED STUDENT NOTIFICATION
"This software and related documentation has been obtained by Your
educational institution subject to the RealNetworks Community Source
License. You have been provided access to the software and related
documentation for use only in connection with your course work and
research activities as a matriculated student of Your educational
institution. Any other use is expressly prohibited.
THIS SOFTWARE AND RELATED DOCUMENTATION CONTAINS PROPRIETARY MATERIAL OF
REALNETWORKS, INC, WHICH ARE PROTECTED BY VARIOUS INTELLECTUAL PROPERTY
RIGHTS.
You may not use this file except in compliance with the License. You may
obtain a copy of the License on the web at
https://www.helixcommunity.org/content/rcsl.
*
*
ATTACHMENT B
Description of Technology
Helix DNA, which consists of Helix DNA Client, Helix DNA Server and
Helix DNA Producer.
Description of "Technology"
Helix DNA Technology v1.0 as described on the Community Web Server.
ATTACHMENT C
TECHNOLOGY COMPATIBILITY KIT LICENSE
The following license is effective for the *Helix DNA* Technology
Compatibility Kit - as described on the Community Web Server. The
Technology Compatibility Kit(s) for the Technology specified in
Attachment B may be accessed at the Community Web Server.
1. TCK License.
1.1 Grants to use TCK
Subject to the terms and restrictions set forth below and the
RealNetworks Community Source License, and the Research Use license,
Original Contributor grants to You a worldwide, non-exclusive,
non-transferable license, to the extent of Original Contributor's
Intellectual Property Rights in the TCK (without the right to
sublicense), to use the TCK to develop and test Covered Code.
1.2 TCK Use Restrictions.
You are not authorized to create derivative works of the TCK or use the
TCK to test any implementation of the Specification that is not Covered
Code. You may not publish Your test results or make claims of
comparative compatibility with respect to other implementations of the
Specification. In consideration for the license grant in Section 1.1
above You agree not to develop Your own tests that are intended to
validate conformation with the Specification.
2. Test Results.
You agree to provide to Original Contributor or the third party test
facility if applicable, Your test results that demonstrate that Covered
Code is Compliant Covered Code and that Original Contributor may publish
or otherwise distribute such test results.
PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE
"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND
CONDITIONS OF THIS LICENSE WITH THE ORIGINAL CONTRIBUTOR, REALNETWORKS,
INC. IF YOU ARE AGREEING TO THIS LICENSE ON BEHALF OF A COMPANY, YOU
REPRESENT THAT YOU ARE AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE.
WHETHER YOU ARE ACTING ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY,
YOU MUST BE OF MAJORITY AGE AND BE OTHERWISE COMPETENT TO ENTER INTO
CONTRACTS. IF YOU DO NOT MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY
OF THE TERMS AND CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON
TO EXIT.
*ACCEPT / REJECT
*
*
*
*To agree to the R&D/academic terms of this license, please register
<https://www.helixcommunity.org/2002/intro/why-register> on the site --
you will then be given a chance to agree to the clickwrap RCSL
<https://reguseronly.helixcommunity.org/2002/clickwrap/rcsl-clickwrap>
R&D License
<https://reguseronly.helixcommunity.org/2002/clickwrap/rcsl-clickwrap>
and gain access to the RCSL-licensed source code. To build or deploy
commercial applications based on the RCSL, you will need to agree to the
Commercial Use license attachments
<https://www.helixcommunity.org/content/rcsl-attachments>*

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RealNetworks Public Source License Version 1.0
(Rev. Date October 28, 2002)
1. General Definitions. This License applies to any program or other work which
RealNetworks, Inc., or any other entity that elects to use this license,
("Licensor") makes publicly available and which contains a notice placed by
Licensor identifying such program or work as "Original Code" and stating that it
is subject to the terms of this RealNetworks Public Source License version 1.0
(or subsequent version thereof) ("License"). You are not required to accept this
License. However, nothing else grants You permission to use, copy, modify or
distribute the software or its derivative works. These actions are prohibited by
law if You do not accept this License. Therefore, by modifying, copying or
distributing the software (or any work based on the software), You indicate your
acceptance of this License to do so, and all its terms and conditions. In
addition, you agree to the terms of this License by clicking the Accept button
or downloading the software. As used in this License:
1.1 "Applicable Patent Rights" mean: (a) in the case where Licensor is the
grantor of rights, claims of patents that (i) are now or hereafter acquired,
owned by or assigned to Licensor and (ii) are necessarily infringed by using or
making the Original Code alone and not in combination with other software or
hardware; and (b) in the case where You are the grantor of rights, claims of
patents that (i) are now or hereafter acquired, owned by or assigned to You and
(ii) are infringed (directly or indirectly) by using or making Your
Modifications, taken alone or in combination with Original Code.
1.2 "Compatible Source License" means any one of the licenses listed on Exhibit
B or at https://www.helixcommunity.org/content/complicense or other licenses
specifically identified by Licensor in writing. Notwithstanding any term to the
contrary in any Compatible Source License, any code covered by any Compatible
Source License that is used with Covered Code must be made readily available in
Source Code format for royalty-free use under the terms of the Compatible Source
License or this License.
1.3 "Contributor" means any person or entity that creates or contributes to the
creation of Modifications.
1.4 "Covered Code" means the Original Code, Modifications, the combination of
Original Code and any Modifications, and/or any respective portions thereof.
1.5 "Deploy" means to use, sublicense or distribute Covered Code other than for
Your internal research and development (R&D) and/or Personal Use, and includes
without limitation, any and all internal use or distribution of Covered Code
within Your business or organization except for R&D use and/or Personal Use, as
well as direct or indirect sublicensing or distribution of Covered Code by You
to any third party in any form or manner.
1.6 "Derivative Work" means either the Covered Code or any derivative work under
United States copyright law, and including any work containing or including any
portion of the Covered Code or Modifications, either verbatim or with
modifications and/or translated into another language. Derivative Work also
includes any work which combines any portion of Covered Code or Modifications
with code not otherwise governed by the terms of this License.
1.7 "Externally Deploy" means to Deploy the Covered Code in any way that may be
accessed or used by anyone other than You, used to provide any services to
anyone other than You, or used in any way to deliver any content to anyone other
than You, whether the Covered Code is distributed to those parties, made
available as an application intended for use over a computer network, or used to
provide services or otherwise deliver content to anyone other than You.
1.8. "Interface" means interfaces, functions, properties, class definitions,
APIs, header files, GUIDs, V-Tables, and/or protocols allowing one piece of
software, firmware or hardware to communicate or interoperate with another piece
of software, firmware or hardware.
1.9 "Modifications" mean any addition to, deletion from, and/or change to, the
substance and/or structure of the Original Code, any previous Modifications, the
combination of Original Code and any previous Modifications, and/or any
respective portions thereof. When code is released as a series of files, a
Modification is: (a) any addition to or deletion from the contents of a file
containing Covered Code; and/or (b) any new file or other representation of
computer program statements that contains any part of Covered Code.
1.10 "Original Code" means (a) the Source Code of a program or other work as
originally made available by Licensor under this License, including the Source
Code of any updates or upgrades to such programs or works made available by
Licensor under this License, and that has been expressly identified by Licensor
as such in the header file(s) of such work; and (b) the object code compiled
from such Source Code and originally made available by Licensor under this
License.
1.11 "Personal Use" means use of Covered Code by an individual solely for his or
her personal, private and non-commercial purposes. An individual's use of
Covered Code in his or her capacity as an officer, employee, member, independent
contractor or agent of a corporation, business or organization (commercial or
non-commercial) does not qualify as Personal Use.
1.12 "Source Code" means the human readable form of a program or other work that
is suitable for making modifications to it, including all modules it contains,
plus any associated interface definition files, scripts used to control
compilation and installation of an executable (object code).
1.13 "You" or "Your" means an individual or a legal entity exercising rights
under this License. For legal entities, "You" or "Your" includes any entity
which controls, is controlled by, or is under common control with, You, where
"control" means (a) the power, direct or indirect, to cause the direction or
management of such entity, whether by contract or otherwise, or (b) ownership of
fifty percent (50%) or more of the outstanding shares or beneficial ownership of
such entity.
2. Permitted Uses; Conditions & Restrictions. Subject to the terms and
conditions of this License, Licensor hereby grants You, effective on the date
You accept this License (via downloading or using Covered Code or otherwise
indicating your acceptance of this License), a worldwide, royalty-free,
non-exclusive copyright license, to the extent of Licensor's copyrights cover
the Original Code, to do the following:
2.1 You may reproduce, display, perform, modify and Deploy Covered Code,
provided that in each instance:
(a) You must retain and reproduce in all copies of Original Code the copyright
and other proprietary notices and disclaimers of Licensor as they appear in the
Original Code, and keep intact all notices in the Original Code that refer to
this License;
(b) You must include a copy of this License with every copy of Source Code of
Covered Code and documentation You distribute, and You may not offer or impose
any terms on such Source Code that alter or restrict this License or the
recipients' rights hereunder, except as permitted under Section 6;
(c) You must duplicate, to the extent it does not already exist, the notice in
Exhibit A in each file of the Source Code of all Your Modifications, and cause
the modified files to carry prominent notices stating that You changed the files
and the date of any change;
(d) You must make Source Code of all Your Externally Deployed Modifications
publicly available under the terms of this License, including the license grants
set forth in Section 3 below, for as long as you Deploy the Covered Code or
twelve (12) months from the date of initial Deployment, whichever is longer. You
should preferably distribute the Source Code of Your Deployed Modifications
electronically (e.g. download from a web site); and
(e) if You Deploy Covered Code in object code, executable form only, You must
include a prominent notice, in the code itself as well as in related
documentation, stating that Source Code of the Covered Code is available under
the terms of this License with information on how and where to obtain such
Source Code. You must also include the Object Code Notice set forth in Exhibit A
in the "about" box or other appropriate place where other copyright notices are
placed, including any packaging materials.
2.2 You expressly acknowledge and agree that although Licensor and each
Contributor grants the licenses to their respective portions of the Covered Code
set forth herein, no assurances are provided by Licensor or any Contributor that
the Covered Code does not infringe the patent or other intellectual property
rights of any other entity. Licensor and each Contributor disclaim any liability
to You for claims brought by any other entity based on infringement of
intellectual property rights or otherwise. As a condition to exercising the
rights and licenses granted hereunder, You hereby assume sole responsibility to
secure any other intellectual property rights needed, if any. For example, if a
third party patent license is required to allow You to make, use, sell, import
or offer for sale the Covered Code, it is Your responsibility to acquire such
license(s).
2.3 Subject to the terms and conditions of this License, Licensor hereby grants
You, effective on the date You accept this License (via downloading or using
Covered Code or otherwise indicating your acceptance of this License), a
worldwide, royalty-free, perpetual, non-exclusive patent license under
Licensor's Applicable Patent Rights to make, use, sell, offer for sale and
import the Covered Code, provided that in each instance you comply with the
terms of this License.
3. Your Grants. In consideration of, and as a condition to, the licenses granted
to You under this License:
(a) You grant to Licensor and all third parties a non-exclusive, perpetual,
irrevocable, royalty free license under Your Applicable Patent Rights and other
intellectual property rights owned or controlled by You, to make, sell, offer
for sale, use, import, reproduce, display, perform, modify, distribute and
Deploy Your Modifications of the same scope and extent as Licensor's licenses
under Sections 2.1 and 2.2; and
(b) You grant to Licensor and its subsidiaries a non-exclusive, worldwide,
royalty-free, perpetual and irrevocable license, under Your Applicable Patent
Rights and other intellectual property rights owned or controlled by You, to
make, use, sell, offer for sale, import, reproduce, display, perform,
distribute, modify or have modified (for Licensor and/or its subsidiaries),
sublicense and distribute Your Modifications, in any form and for any purpose,
through multiple tiers of distribution.
(c) You agree not use any information derived from Your use and review of the
Covered Code, including but not limited to any algorithms or inventions that may
be contained in the Covered Code, for the purpose of asserting any of Your
patent rights, or assisting a third party to assert any of its patent rights,
against Licensor or any Contributor.
4. Derivative Works. You may create a Derivative Work by combining Covered Code
with other code not otherwise governed by the terms of this License and
distribute the Derivative Work as an integrated product. In each such instance,
You must make sure the requirements of this License are fulfilled for the
Covered Code or any portion thereof, including all Modifications.
4.1 You must cause any Derivative Work that you distribute, publish or
Externally Deploy, that in whole or in part contains or is derived from the
Covered Code or any part thereof, to be licensed as a whole at no charge to all
third parties under the terms of this License and no other license except as
provided in Section 4.2. You also must make Source Code available for the
Derivative Work under the same terms as Modifications, described in Sections 2
and 3, above.
4.2 Compatible Source Licenses. Software modules that have been independently
developed without any use of Covered Code and which contain no portion of the
Covered Code, Modifications or other Derivative Works, but are used or combined
in any way wtih the Covered Code or any Derivative Work to form a larger
Derivative Work, are exempt from the conditions described in Section 4.1 but
only to the extent that: the software module, including any software that is
linked to, integrated with, or part of the same applications as, the software
module by any method must be wholly subject to one of the Compatible Source
Licenses. Notwithstanding the foregoing, all Covered Code must be subject to the
terms of this License. Thus, the entire Derivative Work must be licensed under a
combination of the RPSL (for Covered Code) and a Compatible Source License for
any independently developed software modules within the Derivative Work. The
foregoing requirement applies even if the Compatible Source License would
ordinarily allow the software module to link with, or form larger works with,
other software that is not subject to the Compatible Source License. For
example, although the Mozilla Public License v1.1 allows Mozilla code to be
combined with proprietary software that is not subject to the MPL, if
MPL-licensed code is used with Covered Code the MPL-licensed code could not be
combined or linked with any code not governed by the MPL. The general intent of
this section 4.2 is to enable use of Covered Code with applications that are
wholly subject to an acceptable open source license. You are responsible for
determining whether your use of software with Covered Code is allowed under Your
license to such software.
4.3 Mere aggregation of another work not based on the Covered Code with the
Covered Code (or with a work based on the Covered Code) on a volume of a storage
or distribution medium does not bring the other work under the scope of this
License. If You deliver the Covered Code for combination and/or integration with
an application previously provided by You (for example, via automatic updating
technology), such combination and/or integration constitutes a Derivative Work
subject to the terms of this License.
5. Exclusions From License Grant. Nothing in this License shall be deemed to
grant any rights to trademarks, copyrights, patents, trade secrets or any other
intellectual property of Licensor or any Contributor except as expressly stated
herein. No right is granted to the trademarks of Licensor or any Contributor
even if such marks are included in the Covered Code. Nothing in this License
shall be interpreted to prohibit Licensor from licensing under different terms
from this License any code that Licensor otherwise would have a right to
license. Modifications, Derivative Works and/or any use or combination of
Covered Code with other technology provided by Licensor or third parties may
require additional patent licenses from Licensor which Licensor may grant in its
sole discretion. No patent license is granted separate from the Original Code or
combinations of the Original Code with other software or hardware.
5.1. Trademarks. This License does not grant any rights to use the trademarks or
trade names owned by Licensor ("Licensor Marks" defined in Exhibit C) or to any
trademark or trade name belonging to any Contributor. No Licensor Marks may be
used to endorse or promote products derived from the Original Code other than as
permitted by the Licensor Trademark Policy defined in Exhibit C.
6. Additional Terms. You may choose to offer, and to charge a fee for, warranty,
support, indemnity or liability obligations and/or other rights consistent with
the scope of the license granted herein ("Additional Terms") to one or more
recipients of Covered Code. However, You may do so only on Your own behalf and
as Your sole responsibility, and not on behalf of Licensor or any Contributor.
You must obtain the recipient's agreement that any such Additional Terms are
offered by You alone, and You hereby agree to indemnify, defend and hold
Licensor and every Contributor harmless for any liability incurred by or claims
asserted against Licensor or such Contributor by reason of any such Additional
Terms.
7. Versions of the License. Licensor may publish revised and/or new versions of
this License from time to time. Each version will be given a distinguishing
version number. Once Original Code has been published under a particular version
of this License, You may continue to use it under the terms of that version. You
may also choose to use such Original Code under the terms of any subsequent
version of this License published by Licensor. No one other than Licensor has
the right to modify the terms applicable to Covered Code created under this
License.
8. NO WARRANTY OR SUPPORT. The Covered Code may contain in whole or in part
pre-release, untested, or not fully tested works. The Covered Code may contain
errors that could cause failures or loss of data, and may be incomplete or
contain inaccuracies. You expressly acknowledge and agree that use of the
Covered Code, or any portion thereof, is at Your sole and entire risk. THE
COVERED CODE IS PROVIDED "AS IS" AND WITHOUT WARRANTY, UPGRADES OR SUPPORT OF
ANY KIND AND LICENSOR AND LICENSOR'S LICENSOR(S) (COLLECTIVELY REFERRED TO AS
"LICENSOR" FOR THE PURPOSES OF SECTIONS 8 AND 9) AND ALL CONTRIBUTORS EXPRESSLY
DISCLAIM ALL WARRANTIES AND/OR CONDITIONS, EXPRESS OR IMPLIED, INCLUDING, BUT
NOT LIMITED TO, THE IMPLIED WARRANTIES AND/OR CONDITIONS OF MERCHANTABILITY, OF
SATISFACTORY QUALITY, OF FITNESS FOR A PARTICULAR PURPOSE, OF ACCURACY, OF QUIET
ENJOYMENT, AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. LICENSOR AND EACH
CONTRIBUTOR DOES NOT WARRANT AGAINST INTERFERENCE WITH YOUR ENJOYMENT OF THE
COVERED CODE, THAT THE FUNCTIONS CONTAINED IN THE COVERED CODE WILL MEET YOUR
REQUIREMENTS, THAT THE OPERATION OF THE COVERED CODE WILL BE UNINTERRUPTED OR
ERROR-FREE, OR THAT DEFECTS IN THE COVERED CODE WILL BE CORRECTED. NO ORAL OR
WRITTEN DOCUMENTATION, INFORMATION OR ADVICE GIVEN BY LICENSOR, A LICENSOR
AUTHORIZED REPRESENTATIVE OR ANY CONTRIBUTOR SHALL CREATE A WARRANTY. You
acknowledge that the Covered Code is not intended for use in high risk
activities, including, but not limited to, the design, construction, operation
or maintenance of nuclear facilities, aircraft navigation, aircraft
communication systems, or air traffic control machines in which case the failure
of the Covered Code could lead to death, personal injury, or severe physical or
environmental damage. Licensor disclaims any express or implied warranty of
fitness for such uses.
9. LIMITATION OF LIABILITY. TO THE EXTENT NOT PROHIBITED BY LAW, IN NO EVENT
SHALL LICENSOR OR ANY CONTRIBUTOR BE LIABLE FOR ANY INCIDENTAL, SPECIAL,
INDIRECT OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR RELATING TO THIS LICENSE OR
YOUR USE OR INABILITY TO USE THE COVERED CODE, OR ANY PORTION THEREOF, WHETHER
UNDER A THEORY OF CONTRACT, WARRANTY, TORT (INCLUDING NEGLIGENCE OR STRICT
LIABILITY), PRODUCTS LIABILITY OR OTHERWISE, EVEN IF LICENSOR OR SUCH
CONTRIBUTOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES AND
NOTWITHSTANDING THE FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. SOME
JURISDICTIONS DO NOT ALLOW THE LIMITATION OF LIABILITY OF INCIDENTAL OR
CONSEQUENTIAL DAMAGES, SO THIS LIMITATION MAY NOT APPLY TO YOU. In no event
shall Licensor's total liability to You for all damages (other than as may be
required by applicable law) under this License exceed the amount of ten dollars
($10.00).
10. Ownership. Subject to the licenses granted under this License, each
Contributor retains all rights, title and interest in and to any Modifications
made by such Contributor. Licensor retains all rights, title and interest in and
to the Original Code and any Modifications made by or on behalf of Licensor
("Licensor Modifications"), and such Licensor Modifications will not be
automatically subject to this License. Licensor may, at its sole discretion,
choose to license such Licensor Modifications under this License, or on
different terms from those contained in this License or may choose not to
license them at all.
11. Termination.
11.1 Term and Termination. The term of this License is perpetual unless
terminated as provided below. This License and the rights granted hereunder will
terminate:
(a) automatically without notice from Licensor if You fail to comply with any
term(s) of this License and fail to cure such breach within 30 days of becoming
aware of such breach;
(b) immediately in the event of the circumstances described in Section 12.5(b);
or
(c) automatically without notice from Licensor if You, at any time during the
term of this License, commence an action for patent infringement against
Licensor (including by cross-claim or counter claim in a lawsuit);
(d) upon written notice from Licensor if You, at any time during the term of
this License, commence an action for patent infringement against any third party
alleging that the Covered Code itself (excluding combinations with other
software or hardware) infringes any patent (including by cross-claim or counter
claim in a lawsuit).
11.2 Effect of Termination. Upon termination, You agree to immediately stop any
further use, reproduction, modification, sublicensing and distribution of the
Covered Code and to destroy all copies of the Covered Code that are in your
possession or control. All sublicenses to the Covered Code which have been
properly granted prior to termination shall survive any termination of this
License. Provisions which, by their nature, should remain in effect beyond the
termination of this License shall survive, including but not limited to Sections
3, 5, 8, 9, 10, 11, 12.2 and 13. No party will be liable to any other for
compensation, indemnity or damages of any sort solely as a result of terminating
this License in accordance with its terms, and termination of this License will
be without prejudice to any other right or remedy of any party.
12. Miscellaneous.
12.1 Government End Users. The Covered Code is a "commercial item" as defined in
FAR 2.101. Government software and technical data rights in the Covered Code
include only those rights customarily provided to the public as defined in this
License. This customary commercial license in technical data and software is
provided in accordance with FAR 12.211 (Technical Data) and 12.212 (Computer
Software) and, for Department of Defense purchases, DFAR 252.227-7015 (Technical
Data -- Commercial Items) and 227.7202-3 (Rights in Commercial Computer Software
or Computer Software Documentation). Accordingly, all U.S. Government End Users
acquire Covered Code with only those rights set forth herein.
12.2 Relationship of Parties. This License will not be construed as creating an
agency, partnership, joint venture or any other form of legal association
between or among You, Licensor or any Contributor, and You will not represent to
the contrary, whether expressly, by implication, appearance or otherwise.
12.3 Independent Development. Nothing in this License will impair Licensor's
right to acquire, license, develop, have others develop for it, market and/or
distribute technology or products that perform the same or similar functions as,
or otherwise compete with, Modifications, Derivative Works, technology or
products that You may develop, produce, market or distribute.
12.4 Waiver; Construction. Failure by Licensor or any Contributor to enforce any
provision of this License will not be deemed a waiver of future enforcement of
that or any other provision. Any law or regulation which provides that the
language of a contract shall be construed against the drafter will not apply to
this License.
12.5 Severability. (a) If for any reason a court of competent jurisdiction finds
any provision of this License, or portion thereof, to be unenforceable, that
provision of the License will be enforced to the maximum extent permissible so
as to effect the economic benefits and intent of the parties, and the remainder
of this License will continue in full force and effect. (b) Notwithstanding the
foregoing, if applicable law prohibits or restricts You from fully and/or
specifically complying with Sections 2 and/or 3 or prevents the enforceability
of either of those Sections, this License will immediately terminate and You
must immediately discontinue any use of the Covered Code and destroy all copies
of it that are in your possession or control.
12.6 Dispute Resolution. Any litigation or other dispute resolution between You
and Licensor relating to this License shall take place in the Seattle,
Washington, and You and Licensor hereby consent to the personal jurisdiction of,
and venue in, the state and federal courts within that District with respect to
this License. The application of the United Nations Convention on Contracts for
the International Sale of Goods is expressly excluded.
12.7 Export/Import Laws. This software is subject to all export and import laws
and restrictions and regulations of the country in which you receive the Covered
Code and You are solely responsible for ensuring that You do not export,
re-export or import the Covered Code or any direct product thereof in violation
of any such restrictions, laws or regulations, or without all necessary
authorizations.
12.8 Entire Agreement; Governing Law. This License constitutes the entire
agreement between the parties with respect to the subject matter hereof. This
License shall be governed by the laws of the United States and the State of
Washington.
Where You are located in the province of Quebec, Canada, the following clause
applies: The parties hereby confirm that they have requested that this License
and all related documents be drafted in English. Les parties ont exig&eacute;
que le pr&eacute;sent contrat et tous les documents connexes soient
r&eacute;dig&eacute;s en anglais.
EXHIBIT A.
"Copyright &copy; 1995-2002
RealNetworks, Inc. and/or its licensors. All Rights Reserved.
The contents of this file, and the files included with this file, are subject to
the current version of the RealNetworks Public Source License Version 1.0 (the
"RPSL") available at https://www.helixcommunity.org/content/rpsl unless you have
licensed the file under the RealNetworks Community Source License Version 1.0
(the "RCSL") available at https://www.helixcommunity.org/content/rcsl, in which
case the RCSL will apply. You may also obtain the license terms directly from
RealNetworks. You may not use this file except in compliance with the RPSL or,
if you have a valid RCSL with RealNetworks applicable to this file, the RCSL.
Please see the applicable RPSL or RCSL for the rights, obligations and
limitations governing use of the contents of the file.
This file is part of the Helix DNA Technology. RealNetworks is the developer of
the Original code and owns the copyrights in the portions it created.
This file, and the files included with this file, is distributed and made
available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR
IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING
WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
Contributor(s): ____________________________________
Technology Compatibility Kit Test
Suite(s) Location (if licensed under the RCSL): ______________________________
Object Code Notice: Helix DNA Client technology included. Copyright (c)
RealNetworks, Inc., 1995-2002. All rights reserved.
EXHIBIT B
Compatible Source Licenses for the RealNetworks Public Source License. The
following list applies to the most recent version of the license as of October
25, 2002, unless otherwise indicated.
* Academic Free License
* Apache Software License
* Apple Public Source License
* Artistic license
* Attribution Assurance Licenses
* BSD license
* Common Public License (1)
* Eiffel Forum License
* GNU General Public License (GPL) (1)
* GNU Library or "Lesser" General Public License (LGPL) (1)
* IBM Public License
* Intel Open Source License
* Jabber Open Source License
* MIT license
* MITRE Collaborative Virtual Workspace License (CVW License)
* Motosoto License
* Mozilla Public License 1.0 (MPL)
* Mozilla Public License 1.1 (MPL)
* Nokia Open Source License
* Open Group Test Suite License
* Python Software Foundation License
* Ricoh Source Code Public License
* Sun Industry Standards Source License (SISSL)
* Sun Public License
* University of Illinois/NCSA Open Source License
* Vovida Software License v. 1.0
* W3C License
* X.Net License
* Zope Public License
* zlib/libpng license
(1) Note: because this license contains certain reciprocal licensing terms that
purport to extend to independently developed code, You may be prohibited under
the terms of this otherwise compatible license from using code licensed under
its terms with Covered Code because Covered Code may only be licensed under the
RealNetworks Public Source License. Any attempt to apply non RPSL license terms,
including without limitation the GPL, to Covered Code is expressly forbidden.
You are responsible for ensuring that Your use of Compatible Source Licensed
code does not violate either the RPSL or the Compatible Source License.
The latest version of this list can be found at:
https://www.helixcommunity.org/content/complicense
EXHIBIT C
RealNetworks' Trademark policy.
RealNetworks defines the following trademarks collectively as "Licensor
Trademarks": "RealNetworks", "RealPlayer", "RealJukebox", "RealSystem",
"RealAudio", "RealVideo", "RealOne Player", "RealMedia", "Helix" or any other
trademarks or trade names belonging to RealNetworks.
RealNetworks "Licensor Trademark Policy" forbids any use of Licensor Trademarks
except as permitted by and in strict compliance at all times with RealNetworks'
third party trademark usage guidelines which are posted at
http://www.realnetworks.com/info/helixlogo.html.

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;/* ***** BEGIN LICENSE BLOCK *****
; * Version: RCSL 1.0/RPSL 1.0
; *
; * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
; *
; * The contents of this file, and the files included with this file, are
; * subject to the current version of the RealNetworks Public Source License
; * Version 1.0 (the "RPSL") available at
; * http://www.helixcommunity.org/content/rpsl unless you have licensed
; * the file under the RealNetworks Community Source License Version 1.0
; * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
; * in which case the RCSL will apply. You may also obtain the license terms
; * directly from RealNetworks. You may not use this file except in
; * compliance with the RPSL or, if you have a valid RCSL with RealNetworks
; * applicable to this file, the RCSL. Please see the applicable RPSL or
; * RCSL for the rights, obligations and limitations governing use of the
; * contents of the file.
; *
; * This file is part of the Helix DNA Technology. RealNetworks is the
; * developer of the Original Code and owns the copyrights in the portions
; * it created.
; *
; * This file, and the files included with this file, is distributed and made
; * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
; * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
; * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
; * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
; *
; * Technology Compatibility Kit Test Suite(s) Location:
; * http://www.helixcommunity.org/content/tck
; *
; * Contributor(s):
; *
; * ***** END LICENSE BLOCK ***** */
AREA |.text|, CODE, READONLY
THUMB
REQUIRE8
PRESERVE8
; int xmp3_MULSHIFT32(int x, int y)
EXPORT xmp3_MULSHIFT32
EXPORT xmp3_FASTABS
;.cpu cortex-m3
;.fpu softvfp
;.syntax unified
;.thumb
;.text
; .global xmp3_MULSHIFT32
; .thumb_func
xmp3_MULSHIFT32 PROC
smull r2, r0, r1, r0
; mov pc, lr // KJ changed to BX for Cortex
BX lr
ENDP
;.global xmp3_FASTABS
;.thumb_func
xmp3_FASTABS PROC
mov r1, r0
mov r0, #0x0
eor r0, r1, r1, asr # 31
sub r0, r0, r1, asr # 31
bx lr
ENDP
END

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# *
# * Version: RCSL 1.0/RPSL 1.0
# *
# * Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
# *
# * The contents of this file, and the files included with this file, are
# * subject to the current version of the RealNetworks Public Source License
# * Version 1.0 (the "RPSL") available at
# * http://www.helixcommunity.org/content/rpsl unless you have licensed
# * the file under the RealNetworks Community Source License Version 1.0
# * (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
# * in which case the RCSL will apply. You may also obtain the license terms
# * directly from RealNetworks. You may not use this file except in
# * compliance with the RPSL or, if you have a valid RCSL with RealNetworks
# * applicable to this file, the RCSL. Please see the applicable RPSL or
# * RCSL for the rights, obligations and limitations governing use of the
# * contents of the file.
# *
# * This file is part of the Helix DNA Technology. RealNetworks is the
# * developer of the Original Code and owns the copyrights in the portions
# * it created.
# *
# * This file, and the files included with this file, is distributed and made
# * available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
# * EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
# * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
# * FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
# *
# * Technology Compatibility Kit Test Suite(s) Location:
# * http://www.helixcommunity.org/content/tck
# *
# * Contributor(s):
# *
# * ***** END LICENSE BLOCK ***** */
.GLOBAL xmp3_PolyphaseStereo
# * kj AREA |.text|, CODE, READONLY
PCM .req r0
VB1 .req r1
COEF .req r2
VLO .req r0 @ must push PCM ptr to stack during inner looop
VHI .req r3 @ temp variable
SUM1LL .req r4
SUM1LH .req r5
SUM2LL .req r6
SUM2LH .req r7
SUM1RL .req r8
SUM1RH .req r9
SUM2RL .req r10
SUM2RH .req r11
CF1 .req r12
CF2 .req r14
SIGN .req r12 @ used for clipping - after discarding CF1
MAXPOS .req r14 @ used for clipping - after discarding CF2
I .req r12 @ overlay loop counter with CF1, SIGN
GBLA RNDVAL
#RNDVAL SETA (1 << ((32 - 12) + (6 - 1)))
.set RNDVAL,(1 << ((32 - 12) + (6 - 1)))
# C64TOS - clip 64-bit accumulator to short (no rounding)
# xl, xh = value (lo 32, hi 32)
# input assumed to have 6 fraction bits
# sign = temp variable to use for sign
# maxPos = 0x00007fff (takes 2 instr. to generate - calculating
# once and using repeatedly saves if you do several CTOS in a row)
MACRO
C64TOS $xl, $xh, $sign, $maxPos
mov $xl, $xl, lsr #(20+6)
orr $xl, $xl, $xh, lsl #(12-6)
mov $sign, $xl, ASR #31
cmp $sign, $xl, ASR #15
eorne $xl, $sign, $maxPos
MEND @ C64TOS
# MC0S - process 2 taps, 1 sample per channel (sample 0)
# x = vb1 offset
MACRO
MC0S $x
ldr CF1, [COEF], #4
ldr CF2, [COEF], #4
ldr VLO, [VB1, #(4*($x))]
ldr VHI, [VB1, #(4*(23 - $x))]
smlal SUM1LL, SUM1LH, VLO, CF1
ldr VLO, [VB1, #(4*(32 + $x))]
rsb CF2, CF2, #0
smlal SUM1LL, SUM1LH, VHI, CF2
ldr VHI, [VB1, #(4*(32 + 23 - $x))]
smlal SUM1RL, SUM1RH, VLO, CF1
smlal SUM1RL, SUM1RH, VHI, CF2
MEND @ MC0S
# MC1S - process 2 taps, 1 sample per channel (sample 16)
# x = vb1 offset
MACRO
MC1S $x
ldr CF1, [COEF], #4
ldr VLO, [VB1, #(4*($x))]
ldr VHI, [VB1, #(4*(32 + $x))]
smlal SUM1LL, SUM1LH, VLO, CF1
smlal SUM1RL, SUM1RH, VHI, CF1
MEND @ MC1S
# MC2S - process 2 taps, 2 samples per channel
# x = vb1 offset
MACRO
MC2S $x
# load data as far as possible in advance of using it
ldr CF1, [COEF], #4
ldr CF2, [COEF], #4
ldr VLO, [VB1, #(4*($x))]
ldr VHI, [VB1, #(4*(23 - $x))]
smlal SUM1LL, SUM1LH, VLO, CF1
smlal SUM2LL, SUM2LH, VLO, CF2
rsb CF2, CF2, #0
smlal SUM2LL, SUM2LH, VHI, CF1
smlal SUM1LL, SUM1LH, VHI, CF2
ldr VHI, [VB1, #(4*(32 + 23 - $x))]
ldr VLO, [VB1, #(4*(32 + $x))]
smlal SUM1RL, SUM1RH, VHI, CF2
smlal SUM2RL, SUM2RH, VHI, CF1
rsb CF2, CF2, #0
smlal SUM1RL, SUM1RH, VLO, CF1
smlal SUM2RL, SUM2RH, VLO, CF2
MEND @ MC2S
# void PolyphaseStereo(short *pcm, int *vbuf, const int *coefBase)
xmp3_PolyphaseStereo FUNCTION
EXPORT xmp3_PolyphaseStereo
stmfd sp!, {r4-r11, r14} @ Push to stack
# clear out stack space for 2 local variables (4 bytes each)
sub sp, sp, #8
str PCM, [sp, #4] @ sp[1] = pcm pointer
# special case, output sample 0
mov SUM1LL, #RNDVAL @ load rndVal (low 32)
mov SUM1RL, #RNDVAL @ load rndVal (low 32)
mov SUM1LH, #0
mov SUM1RH, #0
MC0S 0
MC0S 1
MC0S 2
MC0S 3
MC0S 4
MC0S 5
MC0S 6
MC0S 7
ldr PCM, [sp, #4] @ load pcm pointer
mov MAXPOS, #0x7f00
orr MAXPOS, MAXPOS, #0xff
C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS
C64TOS SUM1RL, SUM1RH, SIGN, MAXPOS
strh SUM1LL, [PCM, #(2*0)]
strh SUM1RL, [PCM, #(2*1)]
# special case, output sample 16
add COEF, COEF, #(4*(256-16)) @ coef = coefBase + 256 (was coefBase + 16 after MC0S block)
add VB1, VB1, #(4*1024) @ vb1 = vbuf + 64*16
mov SUM1LL, #RNDVAL @ load rndVal (low 32)
mov SUM1RL, #RNDVAL @ load rndVal (low 32)
mov SUM1LH, #0
mov SUM1RH, #0
MC1S 0
MC1S 1
MC1S 2
MC1S 3
MC1S 4
MC1S 5
MC1S 6
MC1S 7
ldr PCM, [sp, #4] @ load pcm pointer
mov MAXPOS, #0x7f00
orr MAXPOS, MAXPOS, #0xff
C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS
C64TOS SUM1RL, SUM1RH, SIGN, MAXPOS
strh SUM1LL, [PCM, #(2*(2*16+0))]
strh SUM1RL, [PCM, #(2*(2*16+1))]
# main convolution loop: sum1L = samples 1, 2, 3, ... 15 sum2L = samples 31, 30, ... 17
sub COEF, COEF, #(4*(264-16)) @ coef = coefBase + 16 (was coefBase + 264 after MC1S block)
sub VB1, VB1, #(4*(1024-64)) @ vb1 = vbuf + 64 (was vbuf + 64*16 after MC1S block)
mov I, #15 @ loop counter, count down
add PCM, PCM, #(2*2) @ pcm+=2
LoopPS
str I, [sp, #0] @ sp[0] = i (loop counter)
str PCM, [sp, #4] @ sp[1] = pcm (pointer to pcm buffer)
mov SUM1LL, #RNDVAL @ load rndVal (low 32)
mov SUM1RL, #RNDVAL @ load rndVal (low 32)
mov SUM2LL, #RNDVAL @ load rndVal (low 32)
mov SUM2RL, #RNDVAL @ load rndVal (low 32)
mov SUM1LH, #0
mov SUM1RH, #0
mov SUM2LH, #0
mov SUM2RH, #0
MC2S 0
MC2S 1
MC2S 2
MC2S 3
MC2S 4
MC2S 5
MC2S 6
MC2S 7
add VB1, VB1, #(4*64) @ vb1 += 64
ldr PCM, [sp, #4] @ load pcm pointer
mov MAXPOS, #0x7f00
orr MAXPOS, MAXPOS, #0xff
#C64TOS $xl, $xh, $sign, $maxPos
# mov SUM1LL, SUM1LL, lsr #(20+6)
# orr SUM1LL, SUM1LL, SUM1LH, lsl #(12-6)
# mov SIGN, SUM1LL, ASR #31
# cmp SIGN, SUM1LL, ASR #15
# eorne SUM1LL,SIGN, MAXPOS
C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS
C64TOS SUM1RL, SUM1RH, SIGN, MAXPOS
C64TOS SUM2LL, SUM2LH, SIGN, MAXPOS
C64TOS SUM2RL, SUM2RH, SIGN, MAXPOS
ldr I, [sp, #0] @ load loop counter
add CF2, PCM, I, lsl #3 @ CF2 = PCM + 4*i (short offset)
strh SUM2LL, [CF2], #2 @ *(pcm + 2*2*i + 0)
strh SUM2RL, [CF2], #2 @ *(pcm + 2*2*i + 1)
strh SUM1LL, [PCM], #2 @ *(pcm + 0)
strh SUM1RL, [PCM], #2 @ *(pcm + 1)
subs I, I, #1
bne LoopPS
# restore stack pointer
add sp, sp, #8
ldmfd sp!, {r4-r11, pc}
ENDFUNC
## MONO PROCESSING
# MC0M - process 2 taps, 1 sample (sample 0)
# x = vb1 offset
MACRO
MC0M $x
ldr CF1, [COEF], #4
ldr CF2, [COEF], #4
ldr VLO, [VB1, #(4*($x))]
ldr VHI, [VB1, #(4*(23 - $x))]
rsb CF2, CF2, #0
smlal SUM1LL, SUM1LH, VLO, CF1
smlal SUM1LL, SUM1LH, VHI, CF2
MEND @ MC0M
# MC1M - process 2 taps, 1 sample (sample 16)
# x = vb1 offset
MACRO
MC1M $x
ldr CF1, [COEF], #4
ldr VLO, [VB1, #(4*($x))]
smlal SUM1LL, SUM1LH, VLO, CF1
MEND @ MC1M
# MC2M - process 2 taps, 2 samples
# x = vb1 offset
MACRO
MC2M $x
# load data as far as possible in advance of using it
ldr CF1, [COEF], #4
ldr CF2, [COEF], #4
ldr VLO, [VB1, #(4*($x))]
ldr VHI, [VB1, #(4*(23 - $x))]
smlal SUM1LL, SUM1LH, VLO, CF1
smlal SUM2LL, SUM2LH, VLO, CF2
rsb CF2, CF2, #0
smlal SUM1LL, SUM1LH, VHI, CF2
smlal SUM2LL, SUM2LH, VHI, CF1
MEND @ MC2M
# void PolyphaseMono(short *pcm, int *vbuf, const int *coefBase)
xmp3_PolyphaseMono FUNCTION
EXPORT xmp3_PolyphaseMono
stmfd sp!, {r4-r11, r14}
# clear out stack space for 4 local variables (4 bytes each)
sub sp, sp, #8
str PCM, [sp, #4] @ sp[1] = pcm pointer
# special case, output sample 0
mov SUM1LL, #RNDVAL @ load rndVal (low 32)
mov SUM1LH, #0
MC0M 0
MC0M 1
MC0M 2
MC0M 3
MC0M 4
MC0M 5
MC0M 6
MC0M 7
ldr PCM, [sp, #4] @ load pcm pointer
mov MAXPOS, #0x7f00
orr MAXPOS, MAXPOS, #0xff
C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS
strh SUM1LL, [PCM, #(2*0)]
# special case, output sample 16
add COEF, COEF, #(4*(256-16)) @ coef = coefBase + 256 (was coefBase + 16 after MC0M block)
add VB1, VB1, #(4*1024) @ vb1 = vbuf + 64*16
mov SUM1LL, #RNDVAL @ load rndVal (low 32)
mov SUM1LH, #0
MC1M 0
MC1M 1
MC1M 2
MC1M 3
MC1M 4
MC1M 5
MC1M 6
MC1M 7
ldr PCM, [sp, #4] @ load pcm pointer
mov MAXPOS, #0x7f00
orr MAXPOS, MAXPOS, #0xff
C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS
strh SUM1LL, [PCM, #(2*16)]
# main convolution loop: sum1L = samples 1, 2, 3, ... 15 sum2L = samples 31, 30, ... 17
sub COEF, COEF, #(4*(264-16)) @ coef = coefBase + 16 (was coefBase + 264 after MC1M block)
sub VB1, VB1, #(4*(1024-64)) @ vb1 = vbuf + 64 (was vbuf + 64*16 after MC1M block)
mov I, #15 @ loop counter, count down
add PCM, PCM, #(2) @ pcm++
LoopPM
str I, [sp, #0] @ sp[0] = i (loop counter)
str PCM, [sp, #4] @ sp[1] = pcm (pointer to pcm buffer)
mov SUM1LL, #RNDVAL @ load rndVal (low 32)
mov SUM2LL, #RNDVAL @ load rndVal (low 32)
mov SUM1LH, #0
mov SUM2LH, #0
MC2M 0
MC2M 1
MC2M 2
MC2M 3
MC2M 4
MC2M 5
MC2M 6
MC2M 7
add VB1, VB1, #(4*64) @ vb1 += 64
ldr PCM, [sp, #4] @ load pcm pointer
mov MAXPOS, #0x7f00
orr MAXPOS, MAXPOS, #0xff
C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS
C64TOS SUM2LL, SUM2LH, SIGN, MAXPOS
ldr I, [sp, #0] @ load loop counter
add CF2, PCM, I, lsl #2 @ CF2 = PCM + 2*i (short offset)
strh SUM2LL, [CF2], #2 @ *(pcm + 2*i + 0)
strh SUM1LL, [PCM], #2 @ *(pcm + 0) # pcm++
subs I, I, #1
bne LoopPM
# restore stack pointer
add sp, sp, #8
ldmfd sp!, {r4-r11, pc}
ENDFUNC
.END

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AREA |.text|, CODE, READONLY, ALIGN=2
THUMB
REQUIRE8
PRESERVE8
PCM RN r0
VB1 RN r1
COEF RN r2
VLO RN r0
VHI RN r3
SUM1LL RN r4
SUM1LH RN r5
SUM2LL RN r6
SUM2LH RN r7
SUM1RL RN r8
SUM1RH RN r9
SUM2RL RN r10
SUM2RH RN r11
CF1 RN r12
CF2 RN r14
SIGN RN r12
MAXPOS RN r14
I RN r12
GBLA RNDVAL
RNDVAL SETA (1 << ((32 - 12) + (6 - 1)))
; C64TOS - clip 64-bit accumulator to short (no rounding)
; xl, xh = value (lo 32, hi 32)
; input assumed to have 6 fraction bits
; sign = temp variable to use for sign
; maxPos = 0x00007fff (takes 2 instr. to generate - calculating
; once and using repeatedly saves if you do several CTOS in a row) */
MACRO
C64TOS $xl, $xh, $sign, $maxPos
mov $xl, $xl, lsr #(20+6)
orr $xl, $xl, $xh, lsl #(12-6)
mov $sign, $xl, ASR #31
cmp $sign, $xl, ASR #15
it ne
eorne $xl, $sign, $maxPos
MEND ; C64TOS
; MC0S - process 2 taps, 1 sample per channel (sample 0) */
; x = vb1 offset */
MACRO
MC0S $x
ldr CF1, [COEF], #4
ldr CF2, [COEF], #4
ldr VLO, [VB1, #(4*($x))]
ldr VHI, [VB1, #(4*(23 - $x))]
smlal SUM1LL, SUM1LH, VLO, CF1
ldr VLO, [VB1, #(4*(32 + $x))]
rsb CF2, CF2, #0
smlal SUM1LL, SUM1LH, VHI, CF2
ldr VHI, [VB1, #(4*(32 + 23 - $x))]
smlal SUM1RL, SUM1RH, VLO, CF1
smlal SUM1RL, SUM1RH, VHI, CF2
MEND ; MCOS
; MC1S - process 2 taps, 1 sample per channel (sample 16)
; x = vb1 offset
MACRO
MC1S $x
ldr CF1, [COEF], #4
ldr VLO, [VB1, #(4*($x))]
ldr VHI, [VB1, #(4*(32 + $x))]
smlal SUM1LL, SUM1LH, VLO, CF1
smlal SUM1RL, SUM1RH, VHI, CF1
MEND ; MC1S
; MC2S - process 2 taps, 2 samples per channel
; x = vb1 offset
MACRO
MC2S $x
; load data as far as possible in advance of using it
ldr CF1, [COEF], #4
ldr CF2, [COEF], #4
ldr VLO, [VB1, #(4*($x))]
ldr VHI, [VB1, #(4*(23 - $x))]
smlal SUM1LL, SUM1LH, VLO, CF1
smlal SUM2LL, SUM2LH, VLO, CF2
rsb CF2, CF2, #0
smlal SUM2LL, SUM2LH, VHI, CF1
smlal SUM1LL, SUM1LH, VHI, CF2
ldr VHI, [VB1, #(4*(32 + 23 - $x))]
ldr VLO, [VB1, #(4*(32 + $x))]
smlal SUM1RL, SUM1RH, VHI, CF2
smlal SUM2RL, SUM2RH, VHI, CF1
rsb CF2, CF2, #0
smlal SUM1RL, SUM1RH, VLO, CF1
smlal SUM2RL, SUM2RH, VLO, CF2
MEND ; MC2S
; void PolyphaseStereo(short *pcm, int *vbuf, const int *coefBase)
xmp3_PolyphaseStereo PROC
EXPORT xmp3_PolyphaseStereo
stmfd sp!, {r4-r11, r14}
; clear out stack space for 2 local variables (4 bytes each)
sub sp, sp, #8
str PCM , [sp, #4] ; sp[1] = pcm pointer
; special case, output sample 0
mov SUM1LL, #RNDVAL ; load rndVal (low 32)
mov SUM1RL, #RNDVAL ; load rndVal (low 32)
mov SUM1LH, #0
mov SUM1RH, #0
MC0S 0
MC0S 1
MC0S 2
MC0S 3
MC0S 4
MC0S 5
MC0S 6
MC0S 7
ldr PCM, [sp, #4] ; load pcm pointer
mov MAXPOS, #0x7f00
orr MAXPOS, MAXPOS, #0xff
C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS
C64TOS SUM1RL, SUM1RH, SIGN, MAXPOS
strh SUM1LL, [PCM, #(2*0)]
strh SUM1RL, [PCM, #(2*1)]
; special case, output sample 16
add COEF, COEF, #(4*(256-16)) ; coef = coefBase + 256 (was coefBase + 16 after MC0S block)
add VB1, VB1, #(4*1024) ; vb1 = vbuf + 64*16
mov SUM1LL, #RNDVAL ; load rndVal (low 32)
mov SUM1RL, #RNDVAL ; load rndVal (low 32)
mov SUM1LH, #0
mov SUM1RH, #0
MC1S 0
MC1S 1
MC1S 2
MC1S 3
MC1S 4
MC1S 5
MC1S 6
MC1S 7
ldr PCM, [sp, #4] ; load pcm pointer
mov MAXPOS, #0x7f00
orr MAXPOS, MAXPOS, #0xff
C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS
C64TOS SUM1RL, SUM1RH, SIGN, MAXPOS
strh SUM1LL, [PCM, #(2*(2*16+0))]
strh SUM1RL, [PCM, #(2*(2*16+1))]
; main convolution loop: sum1L = samples 1, 2, 3, ... 15 sum2L = samples 31, 30, ... 17
sub COEF, COEF, #(4*(264-16)) ; coef = coefBase + 16 (was coefBase + 264 after MC1S block)
sub VB1, VB1, #(4*(1024-64)) ; vb1 = vbuf + 64 (was vbuf + 64*16 after MC1S block)
mov I, #15 ; loop counter, count down
add PCM, PCM, #(2*2) ; pcm+=2
LoopPS
str I, [sp, #0] ; sp[0] = i (loop counter)
str PCM, [sp, #4] ; sp[1] = pcm (pointer to pcm buffer)
mov SUM1LL, #RNDVAL ; load rndVal (low 32)
mov SUM1RL, #RNDVAL ; load rndVal (low 32)
mov SUM2LL, #RNDVAL ; load rndVal (low 32)
mov SUM2RL, #RNDVAL ; load rndVal (low 32)
mov SUM1LH, #0
mov SUM1RH, #0
mov SUM2LH, #0
mov SUM2RH, #0
MC2S 0
MC2S 1
MC2S 2
MC2S 3
MC2S 4
MC2S 5
MC2S 6
MC2S 7
add VB1, VB1, #(4*64) ; vb1 += 64
ldr PCM, [sp, #4] ; load pcm pointer
mov MAXPOS, #0x7f00
orr MAXPOS, MAXPOS, #0xff
C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS
C64TOS SUM1RL, SUM1RH, SIGN, MAXPOS
C64TOS SUM2LL, SUM2LH, SIGN, MAXPOS
C64TOS SUM2RL, SUM2RH, SIGN, MAXPOS
ldr I, [sp, #0] ; load loop counter
add CF2, PCM, I, lsl #3 ; CF2 = PCM + 4*i (short offset)
strh SUM2LL, [CF2], #2 ; *(pcm + 2*2*i + 0)
strh SUM2RL, [CF2], #2 ; *(pcm + 2*2*i + 1)
strh SUM1LL, [PCM], #2 ; *(pcm + 0)
strh SUM1RL, [PCM], #2 ; *(pcm + 1)
subs I, I, #1
bne LoopPS
; restore stack pointer
add sp, sp, #8
ldmfd sp!, {r4-r11, pc}
ENDP
; MONO PROCESSING
; MC0M - process 2 taps, 1 sample (sample 0)
; x = vb1 offset
MACRO
MC0M $x
ldr CF1, [COEF], #4
ldr CF2, [COEF], #4
ldr VLO, [VB1, #(4*($x))]
ldr VHI, [VB1, #(4*(23 - $x))]
rsb CF2, CF2, #0
smlal SUM1LL, SUM1LH, VLO, CF1
smlal SUM1LL, SUM1LH, VHI, CF2
MEND ; MC0M
; MC1M - process 2 taps, 1 sample (sample 16)
; x = vb1 offset
MACRO
MC1M $x
ldr CF1, [COEF], #4
ldr VLO, [VB1, #(4*($x))]
smlal SUM1LL, SUM1LH, VLO, CF1
MEND ; MC1M
; MC2M - process 2 taps, 2 samples
; x = vb1 offset
MACRO
MC2M $x
; load data as far as possible in advance of using it
ldr CF1, [COEF], #4
ldr CF2, [COEF], #4
ldr VLO, [VB1, #(4*($x))]
ldr VHI, [VB1, #(4*(23 - $x))]
smlal SUM1LL, SUM1LH, VLO, CF1
smlal SUM2LL, SUM2LH, VLO, CF2
rsb CF2, CF2, #0
smlal SUM1LL, SUM1LH, VHI, CF2
smlal SUM2LL, SUM2LH, VHI, CF1
MEND ; MC2M
; void PolyphaseMono(short *pcm, int *vbuf, const int *coefBase)
xmp3_PolyphaseMono PROC
EXPORT xmp3_PolyphaseMono
stmfd sp!, {r4-r11, r14}
; clear out stack space for 4 local variables (4 bytes each)
sub sp, sp, #8
str PCM, [sp, #4] ; sp[1] = pcm pointer
; special case, output sample 0
mov SUM1LL, #RNDVAL ; load rndVal (low 32)
mov SUM1LH, #0
MC0M 0
MC0M 1
MC0M 2
MC0M 3
MC0M 4
MC0M 5
MC0M 6
MC0M 7
ldr PCM, [sp, #4] ; load pcm pointer
mov MAXPOS, #0x7f00
orr MAXPOS, MAXPOS, #0xff
C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS
strh SUM1LL, [PCM, #(2*0)]
; special case, output sample 16
add COEF, COEF, #(4*(256-16)) ; coef = coefBase + 256 (was coefBase + 16 after MC0M block)
add VB1, VB1, #(4*1024) ; vb1 = vbuf + 64*16
mov SUM1LL, #RNDVAL ; load rndVal (low 32)
mov SUM1LH, #0
MC1M 0
MC1M 1
MC1M 2
MC1M 3
MC1M 4
MC1M 5
MC1M 6
MC1M 7
ldr PCM, [sp, #4] ; load pcm pointer
mov MAXPOS, #0x7f00
orr MAXPOS, MAXPOS, #0xff
C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS
strh SUM1LL, [PCM, #(2*16)]
; main convolution loop: sum1L = samples 1, 2, 3, ... 15 sum2L = samples 31, 30, ... 17
sub COEF, COEF, #(4*(264-16)) ; coef = coefBase + 16 (was coefBase + 264 after MC1M block)
sub VB1, VB1, #(4*(1024-64)) ; vb1 = vbuf + 64 (was vbuf + 64*16 after MC1M block)
mov I, #15 ; loop counter, count down
add PCM, PCM, #(2) ; pcm++
LoopPM
str I, [sp, #0] ; sp[0] = i (loop counter)
str PCM, [sp, #4] ; sp[1] = pcm (pointer to pcm buffer)
mov SUM1LL, #RNDVAL ; load rndVal (low 32)
mov SUM2LL, #RNDVAL ; load rndVal (low 32)
mov SUM1LH, #0
mov SUM2LH, #0
MC2M 0
MC2M 1
MC2M 2
MC2M 3
MC2M 4
MC2M 5
MC2M 6
MC2M 7
add VB1, VB1, #(4*64) ; vb1 += 64
ldr PCM, [sp, #4] ; load pcm pointer
mov MAXPOS, #0x7f00
orr MAXPOS, MAXPOS, #0xff
C64TOS SUM1LL, SUM1LH, SIGN, MAXPOS
C64TOS SUM2LL, SUM2LH, SIGN, MAXPOS
ldr I, [sp, #0] ; load loop counter*/
add CF2, PCM, I, lsl #2 ; CF2 = PCM + 2*i (short offset)*/
strh SUM2LL, [CF2], #2 ; (pcm + 2*i + 0)
strh SUM1LL, [PCM], #2 ; (pcm + 0) ; pcm++
subs I, I, #1
bne LoopPM
; restore stack pointer
add sp, sp, #8
ldmfd sp!, {r4-r11, pc}
ENDP
END

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bsp/stm32_radio/mp3/real/assembly.h Normal file
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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* assembly.h - assembly language functions and prototypes for supported platforms
*
* - inline rountines with access to 64-bit multiply results
* - x86 (_WIN32) and ARM (ARM_ADS, _WIN32_WCE) versions included
* - some inline functions are mix of asm and C for speed
* - some functions are in native asm files, so only the prototype is given here
*
* MULSHIFT32(x, y) signed multiply of two 32-bit integers (x and y), returns top 32 bits of 64-bit result
* FASTABS(x) branchless absolute value of signed integer x
* CLZ(x) count leading zeros in x
* MADD64(sum, x, y) (Windows only) sum [64-bit] += x [32-bit] * y [32-bit]
* SHL64(sum, x, y) (Windows only) 64-bit left shift using __int64
* SAR64(sum, x, y) (Windows only) 64-bit right shift using __int64
*/
#ifndef _ASSEMBLY_H
#define _ASSEMBLY_H
#if (defined _WIN32 && !defined _WIN32_WCE) || (defined __WINS__ && defined _SYMBIAN) || defined(_OPENWAVE_SIMULATOR) || defined(WINCE_EMULATOR) /* Symbian emulator for Ix86 */
#pragma warning( disable : 4035 ) /* complains about inline asm not returning a value */
static __inline int MULSHIFT32(int x, int y)
{
__asm {
mov eax, x
imul y
mov eax, edx
}
}
static __inline int FASTABS(int x)
{
int sign;
sign = x >> (sizeof(int) * 8 - 1);
x ^= sign;
x -= sign;
return x;
}
static __inline int CLZ(int x)
{
int numZeros;
if (!x)
return (sizeof(int) * 8);
numZeros = 0;
while (!(x & 0x80000000)) {
numZeros++;
x <<= 1;
}
return numZeros;
}
/* MADD64, SHL64, SAR64:
* write in assembly to avoid dependency on run-time lib for 64-bit shifts, muls
* (sometimes compiler thunks to function calls instead of code generating)
* required for Symbian emulator
*/
#ifdef __CW32__
typedef long long Word64;
#else
typedef __int64 Word64;
#endif
static __inline Word64 MADD64(Word64 sum, int x, int y)
{
unsigned int sumLo = ((unsigned int *)&sum)[0];
int sumHi = ((int *)&sum)[1];
__asm {
mov eax, x
imul y
add eax, sumLo
adc edx, sumHi
}
/* equivalent to return (sum + ((__int64)x * y)); */
}
static __inline Word64 SHL64(Word64 x, int n)
{
unsigned int xLo = ((unsigned int *)&x)[0];
int xHi = ((int *)&x)[1];
unsigned char nb = (unsigned char)n;
if (n < 32) {
__asm {
mov edx, xHi
mov eax, xLo
mov cl, nb
shld edx, eax, cl
shl eax, cl
}
} else if (n < 64) {
/* shl masks cl to 0x1f */
__asm {
mov edx, xLo
mov cl, nb
xor eax, eax
shl edx, cl
}
} else {
__asm {
xor edx, edx
xor eax, eax
}
}
}
static __inline Word64 SAR64(Word64 x, int n)
{
unsigned int xLo = ((unsigned int *)&x)[0];
int xHi = ((int *)&x)[1];
unsigned char nb = (unsigned char)n;
if (n < 32) {
__asm {
mov edx, xHi
mov eax, xLo
mov cl, nb
shrd eax, edx, cl
sar edx, cl
}
} else if (n < 64) {
/* sar masks cl to 0x1f */
__asm {
mov edx, xHi
mov eax, xHi
mov cl, nb
sar edx, 31
sar eax, cl
}
} else {
__asm {
sar xHi, 31
mov eax, xHi
mov edx, xHi
}
}
}
#elif (defined _WIN32) && (defined _WIN32_WCE)
/* use asm function for now (EVC++ 3.0 does horrible job compiling __int64 version) */
#define MULSHIFT32 xmp3_MULSHIFT32
int MULSHIFT32(int x, int y);
static __inline int FASTABS(int x)
{
int sign;
sign = x >> (sizeof(int) * 8 - 1);
x ^= sign;
x -= sign;
return x;
}
static __inline int CLZ(int x)
{
int numZeros;
if (!x)
return (sizeof(int) * 8);
numZeros = 0;
while (!(x & 0x80000000)) {
numZeros++;
x <<= 1;
}
return numZeros;
}
#elif defined ARM_ADS
typedef long long Word64;
#define MULSHIFT32 xmp3_MULSHIFT32
extern int MULSHIFT32(int x, int y);
#define FASTABS xmp3_FASTABS
int FASTABS(int x);
static __inline int CLZ(int x)
{
int numZeros;
if (!x)
return (sizeof(int) * 8);
numZeros = 0;
while (!(x & 0x80000000)) {
numZeros++;
x <<= 1;
}
return numZeros;
}
#elif defined(__GNUC__) && defined(ARM)
typedef long long Word64;
#define MULSHIFT32 xmp3_MULSHIFT32
extern int MULSHIFT32(int x, int y);
#define FASTABS xmp3_FASTABS
int FASTABS(int x);
static __inline int CLZ(int x)
{
int numZeros;
if (!x)
return (sizeof(int) * 8);
numZeros = 0;
while (!(x & 0x80000000)) {
numZeros++;
x <<= 1;
}
return numZeros;
}
#else
#error Unsupported platform in assembly.h
#endif /* platforms */
#endif /* _ASSEMBLY_H */

389
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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* bitstream.c - bitstream unpacking, frame header parsing, side info parsing
**************************************************************************************/
#include "coder.h"
#include "assembly.h"
/**************************************************************************************
* Function: SetBitstreamPointer
*
* Description: initialize bitstream reader
*
* Inputs: pointer to BitStreamInfo struct
* number of bytes in bitstream
* pointer to byte-aligned buffer of data to read from
*
* Outputs: filled bitstream info struct
*
* Return: none
**************************************************************************************/
void SetBitstreamPointer(BitStreamInfo *bsi, int nBytes, unsigned char *buf)
{
/* init bitstream */
bsi->bytePtr = buf;
bsi->iCache = 0; /* 4-byte unsigned int */
bsi->cachedBits = 0; /* i.e. zero bits in cache */
bsi->nBytes = nBytes;
}
/**************************************************************************************
* Function: RefillBitstreamCache
*
* Description: read new data from bitstream buffer into bsi cache
*
* Inputs: pointer to initialized BitStreamInfo struct
*
* Outputs: updated bitstream info struct
*
* Return: none
*
* Notes: only call when iCache is completely drained (resets bitOffset to 0)
* always loads 4 new bytes except when bsi->nBytes < 4 (end of buffer)
* stores data as big-endian in cache, regardless of machine endian-ness
*
* TODO: optimize for ARM
* possibly add little/big-endian modes for doing 32-bit loads
**************************************************************************************/
static __inline void RefillBitstreamCache(BitStreamInfo *bsi)
{
int nBytes = bsi->nBytes;
/* optimize for common case, independent of machine endian-ness */
if (nBytes >= 4) {
bsi->iCache = (*bsi->bytePtr++) << 24;
bsi->iCache |= (*bsi->bytePtr++) << 16;
bsi->iCache |= (*bsi->bytePtr++) << 8;
bsi->iCache |= (*bsi->bytePtr++);
bsi->cachedBits = 32;
bsi->nBytes -= 4;
} else {
bsi->iCache = 0;
while (nBytes--) {
bsi->iCache |= (*bsi->bytePtr++);
bsi->iCache <<= 8;
}
bsi->iCache <<= ((3 - bsi->nBytes)*8);
bsi->cachedBits = 8*bsi->nBytes;
bsi->nBytes = 0;
}
}
/**************************************************************************************
* Function: GetBits
*
* Description: get bits from bitstream, advance bitstream pointer
*
* Inputs: pointer to initialized BitStreamInfo struct
* number of bits to get from bitstream
*
* Outputs: updated bitstream info struct
*
* Return: the next nBits bits of data from bitstream buffer
*
* Notes: nBits must be in range [0, 31], nBits outside this range masked by 0x1f
* for speed, does not indicate error if you overrun bit buffer
* if nBits = 0, returns 0 (useful for scalefactor unpacking)
*
* TODO: optimize for ARM
**************************************************************************************/
unsigned int GetBits(BitStreamInfo *bsi, int nBits)
{
unsigned int data, lowBits;
nBits &= 0x1f; /* nBits mod 32 to avoid unpredictable results like >> by negative amount */
data = bsi->iCache >> (31 - nBits); /* unsigned >> so zero-extend */
data >>= 1; /* do as >> 31, >> 1 so that nBits = 0 works okay (returns 0) */
bsi->iCache <<= nBits; /* left-justify cache */
bsi->cachedBits -= nBits; /* how many bits have we drawn from the cache so far */
/* if we cross an int boundary, refill the cache */
if (bsi->cachedBits < 0) {
lowBits = -bsi->cachedBits;
RefillBitstreamCache(bsi);
data |= bsi->iCache >> (32 - lowBits); /* get the low-order bits */
bsi->cachedBits -= lowBits; /* how many bits have we drawn from the cache so far */
bsi->iCache <<= lowBits; /* left-justify cache */
}
return data;
}
/**************************************************************************************
* Function: CalcBitsUsed
*
* Description: calculate how many bits have been read from bitstream
*
* Inputs: pointer to initialized BitStreamInfo struct
* pointer to start of bitstream buffer
* bit offset into first byte of startBuf (0-7)
*
* Outputs: none
*
* Return: number of bits read from bitstream, as offset from startBuf:startOffset
**************************************************************************************/
int CalcBitsUsed(BitStreamInfo *bsi, unsigned char *startBuf, int startOffset)
{
int bitsUsed;
bitsUsed = (bsi->bytePtr - startBuf) * 8;
bitsUsed -= bsi->cachedBits;
bitsUsed -= startOffset;
return bitsUsed;
}
/**************************************************************************************
* Function: CheckPadBit
*
* Description: check whether padding byte is present in an MP3 frame
*
* Inputs: MP3DecInfo struct with valid FrameHeader struct
* (filled by UnpackFrameHeader())
*
* Outputs: none
*
* Return: 1 if pad bit is set, 0 if not, -1 if null input pointer
**************************************************************************************/
int CheckPadBit(MP3DecInfo *mp3DecInfo)
{
FrameHeader *fh;
/* validate pointers */
if (!mp3DecInfo || !mp3DecInfo->FrameHeaderPS)
return -1;
fh = ((FrameHeader *)(mp3DecInfo->FrameHeaderPS));
return (fh->paddingBit ? 1 : 0);
}
/**************************************************************************************
* Function: UnpackFrameHeader
*
* Description: parse the fields of the MP3 frame header
*
* Inputs: buffer pointing to a complete MP3 frame header (4 bytes, plus 2 if CRC)
*
* Outputs: filled frame header info in the MP3DecInfo structure
* updated platform-specific FrameHeader struct
*
* Return: length (in bytes) of frame header (for caller to calculate offset to
* first byte following frame header)
* -1 if null frameHeader or invalid header
*
* TODO: check for valid modes, depending on capabilities of decoder
* test CRC on actual stream (verify no endian problems)
**************************************************************************************/
int UnpackFrameHeader(MP3DecInfo *mp3DecInfo, unsigned char *buf)
{
int verIdx;
FrameHeader *fh;
/* validate pointers and sync word */
if (!mp3DecInfo || !mp3DecInfo->FrameHeaderPS || (buf[0] & SYNCWORDH) != SYNCWORDH || (buf[1] & SYNCWORDL) != SYNCWORDL)
return -1;
fh = ((FrameHeader *)(mp3DecInfo->FrameHeaderPS));
/* read header fields - use bitmasks instead of GetBits() for speed, since format never varies */
verIdx = (buf[1] >> 3) & 0x03;
fh->ver = (MPEGVersion)( verIdx == 0 ? MPEG25 : ((verIdx & 0x01) ? MPEG1 : MPEG2) );
fh->layer = 4 - ((buf[1] >> 1) & 0x03); /* easy mapping of index to layer number, 4 = error */
fh->crc = 1 - ((buf[1] >> 0) & 0x01);
fh->brIdx = (buf[2] >> 4) & 0x0f;
fh->srIdx = (buf[2] >> 2) & 0x03;
fh->paddingBit = (buf[2] >> 1) & 0x01;
fh->privateBit = (buf[2] >> 0) & 0x01;
fh->sMode = (StereoMode)((buf[3] >> 6) & 0x03); /* maps to correct enum (see definition) */
fh->modeExt = (buf[3] >> 4) & 0x03;
fh->copyFlag = (buf[3] >> 3) & 0x01;
fh->origFlag = (buf[3] >> 2) & 0x01;
fh->emphasis = (buf[3] >> 0) & 0x03;
/* check parameters to avoid indexing tables with bad values */
if (fh->srIdx == 3 || fh->layer == 4 || fh->brIdx == 15)
return -1;
fh->sfBand = &sfBandTable[fh->ver][fh->srIdx]; /* for readability (we reference sfBandTable many times in decoder) */
if (fh->sMode != Joint) /* just to be safe (dequant, stproc check fh->modeExt) */
fh->modeExt = 0;
/* init user-accessible data */
mp3DecInfo->nChans = (fh->sMode == Mono ? 1 : 2);
mp3DecInfo->samprate = samplerateTab[fh->ver][fh->srIdx];
mp3DecInfo->nGrans = (fh->ver == MPEG1 ? NGRANS_MPEG1 : NGRANS_MPEG2);
mp3DecInfo->nGranSamps = ((int)samplesPerFrameTab[fh->ver][fh->layer - 1]) / mp3DecInfo->nGrans;
mp3DecInfo->layer = fh->layer;
mp3DecInfo->version = fh->ver;
/* get bitrate and nSlots from table, unless brIdx == 0 (free mode) in which case caller must figure it out himself
* question - do we want to overwrite mp3DecInfo->bitrate with 0 each time if it's free mode, and
* copy the pre-calculated actual free bitrate into it in mp3dec.c (according to the spec,
* this shouldn't be necessary, since it should be either all frames free or none free)
*/
if (fh->brIdx) {
mp3DecInfo->bitrate = ((int)bitrateTab[fh->ver][fh->layer - 1][fh->brIdx]) * 1000;
/* nSlots = total frame bytes (from table) - sideInfo bytes - header - CRC (if present) + pad (if present) */
mp3DecInfo->nSlots = (int)slotTab[fh->ver][fh->srIdx][fh->brIdx] -
(int)sideBytesTab[fh->ver][(fh->sMode == Mono ? 0 : 1)] -
4 - (fh->crc ? 2 : 0) + (fh->paddingBit ? 1 : 0);
}
/* load crc word, if enabled, and return length of frame header (in bytes) */
if (fh->crc) {
fh->CRCWord = ((int)buf[4] << 8 | (int)buf[5] << 0);
return 6;
} else {
fh->CRCWord = 0;
return 4;
}
}
/**************************************************************************************
* Function: UnpackSideInfo
*
* Description: parse the fields of the MP3 side info header
*
* Inputs: MP3DecInfo structure filled by UnpackFrameHeader()
* buffer pointing to the MP3 side info data
*
* Outputs: updated mainDataBegin in MP3DecInfo struct
* updated private (platform-specific) SideInfo struct
*
* Return: length (in bytes) of side info data
* -1 if null input pointers
**************************************************************************************/
int UnpackSideInfo(MP3DecInfo *mp3DecInfo, unsigned char *buf)
{
int gr, ch, bd, nBytes;
BitStreamInfo bitStreamInfo, *bsi;
FrameHeader *fh;
SideInfo *si;
SideInfoSub *sis;
/* validate pointers and sync word */
if (!mp3DecInfo || !mp3DecInfo->FrameHeaderPS || !mp3DecInfo->SideInfoPS)
return -1;
fh = ((FrameHeader *)(mp3DecInfo->FrameHeaderPS));
si = ((SideInfo *)(mp3DecInfo->SideInfoPS));
bsi = &bitStreamInfo;
if (fh->ver == MPEG1) {
/* MPEG 1 */
nBytes = (fh->sMode == Mono ? SIBYTES_MPEG1_MONO : SIBYTES_MPEG1_STEREO);
SetBitstreamPointer(bsi, nBytes, buf);
si->mainDataBegin = GetBits(bsi, 9);
si->privateBits = GetBits(bsi, (fh->sMode == Mono ? 5 : 3));
for (ch = 0; ch < mp3DecInfo->nChans; ch++)
for (bd = 0; bd < MAX_SCFBD; bd++)
si->scfsi[ch][bd] = GetBits(bsi, 1);
} else {
/* MPEG 2, MPEG 2.5 */
nBytes = (fh->sMode == Mono ? SIBYTES_MPEG2_MONO : SIBYTES_MPEG2_STEREO);
SetBitstreamPointer(bsi, nBytes, buf);
si->mainDataBegin = GetBits(bsi, 8);
si->privateBits = GetBits(bsi, (fh->sMode == Mono ? 1 : 2));
}
for(gr =0; gr < mp3DecInfo->nGrans; gr++) {
for (ch = 0; ch < mp3DecInfo->nChans; ch++) {
sis = &si->sis[gr][ch]; /* side info subblock for this granule, channel */
sis->part23Length = GetBits(bsi, 12);
sis->nBigvals = GetBits(bsi, 9);
sis->globalGain = GetBits(bsi, 8);
sis->sfCompress = GetBits(bsi, (fh->ver == MPEG1 ? 4 : 9));
sis->winSwitchFlag = GetBits(bsi, 1);
if(sis->winSwitchFlag) {
/* this is a start, stop, short, or mixed block */
sis->blockType = GetBits(bsi, 2); /* 0 = normal, 1 = start, 2 = short, 3 = stop */
sis->mixedBlock = GetBits(bsi, 1); /* 0 = not mixed, 1 = mixed */
sis->tableSelect[0] = GetBits(bsi, 5);
sis->tableSelect[1] = GetBits(bsi, 5);
sis->tableSelect[2] = 0; /* unused */
sis->subBlockGain[0] = GetBits(bsi, 3);
sis->subBlockGain[1] = GetBits(bsi, 3);
sis->subBlockGain[2] = GetBits(bsi, 3);
/* TODO - check logic */
if (sis->blockType == 0) {
/* this should not be allowed, according to spec */
sis->nBigvals = 0;
sis->part23Length = 0;
sis->sfCompress = 0;
} else if (sis->blockType == 2 && sis->mixedBlock == 0) {
/* short block, not mixed */
sis->region0Count = 8;
} else {
/* start, stop, or short-mixed */
sis->region0Count = 7;
}
sis->region1Count = 20 - sis->region0Count;
} else {
/* this is a normal block */
sis->blockType = 0;
sis->mixedBlock = 0;
sis->tableSelect[0] = GetBits(bsi, 5);
sis->tableSelect[1] = GetBits(bsi, 5);
sis->tableSelect[2] = GetBits(bsi, 5);
sis->region0Count = GetBits(bsi, 4);
sis->region1Count = GetBits(bsi, 3);
}
sis->preFlag = (fh->ver == MPEG1 ? GetBits(bsi, 1) : 0);
sis->sfactScale = GetBits(bsi, 1);
sis->count1TableSelect = GetBits(bsi, 1);
}
}
mp3DecInfo->mainDataBegin = si->mainDataBegin; /* needed by main decode loop */
ASSERT(nBytes == CalcBitsUsed(bsi, buf, 0) >> 3);
return nBytes;
}

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* buffers.c - allocation and freeing of internal MP3 decoder buffers
*
* All memory allocation for the codec is done in this file, so if you don't want
* to use other the default system malloc() and free() for heap management this is
* the only file you'll need to change.
**************************************************************************************/
// J.Sz. 21/04/2006 #include "hlxclib/stdlib.h" /* for malloc, free */
#include "coder.h"
#define static_buffers // KJ - Changes to Static buffers, Can run with dynamic buffers.
#ifdef static_buffers
MP3DecInfo mp3DecInfo; // 0x7f0 = 2032
SubbandInfo sbi; // 0x2204 = 8708
IMDCTInfo mi; // 0x1b20 = 6944
HuffmanInfo hi; // 0x1210 = 4624
DequantInfo di; // 0x348 = 840
ScaleFactorInfo sfi; // 0x124 = 292
SideInfo si; // 0x148 = 328
FrameHeader fh; // 0x38 = 56
#else
#include "stdlib.h" // J.Sz. 21/04/2006
#endif
/**************************************************************************************
* Function: ClearBuffer
*
* Description: fill buffer with 0's
*
* Inputs: pointer to buffer
* number of bytes to fill with 0
*
* Outputs: cleared buffer
*
* Return: none
*
* Notes: slow, platform-independent equivalent to memset(buf, 0, nBytes)
**************************************************************************************/
void ClearBuffer(void *buf, int nBytes)
{
int i;
unsigned char *cbuf = (unsigned char *)buf;
for (i = 0; i < nBytes; i++)
cbuf[i] = 0;
}
/**************************************************************************************
* Function: AllocateBuffers
*
* Description: allocate all the memory needed for the MP3 decoder
*
* Inputs: none
*
* Outputs: none
*
* Return: pointer to MP3DecInfo structure (initialized with pointers to all
* the internal buffers needed for decoding, all other members of
* MP3DecInfo structure set to 0)
*
* Notes: if one or more mallocs fail, function frees any buffers already
* allocated before returning
*
* Changed by Kasper Jepsen to support static buffers as well.
*
**************************************************************************************/
MP3DecInfo *AllocateBuffers(void)
{
MP3DecInfo *mp3DecInfo_pointer;
#ifdef static_buffers
mp3DecInfo_pointer = (MP3DecInfo*)&mp3DecInfo;
ClearBuffer((void*)&mp3DecInfo, sizeof(MP3DecInfo));
mp3DecInfo.FrameHeaderPS = (void*)&fh;
mp3DecInfo.SideInfoPS = (void*)&si;
mp3DecInfo.ScaleFactorInfoPS = (void*)&sfi;
mp3DecInfo.HuffmanInfoPS = (void*)&hi;
mp3DecInfo.DequantInfoPS = (void*)&di;
mp3DecInfo.IMDCTInfoPS = (void*)&mi;
mp3DecInfo.SubbandInfoPS = (void*)&sbi;
/* important to do this - DSP primitives assume a bunch of state variables are 0 on first use */
ClearBuffer((void*)&fh, sizeof(FrameHeader));
ClearBuffer((void*)&si, sizeof(SideInfo));
ClearBuffer((void*)&sfi, sizeof(ScaleFactorInfo));
ClearBuffer((void*)&hi, sizeof(HuffmanInfo));
ClearBuffer((void*)&di, sizeof(DequantInfo));
ClearBuffer((void*)&mi, sizeof(IMDCTInfo));
ClearBuffer((void*)&sbi, sizeof(SubbandInfo));
// return mp3DecInfo_pointer;
#else
FrameHeader *fh;
SideInfo *si;
ScaleFactorInfo *sfi;
HuffmanInfo *hi;
DequantInfo *di;
IMDCTInfo *mi;
SubbandInfo *sbi;
mp3DecInfo_pointer = (MP3DecInfo *)malloc(sizeof(MP3DecInfo));
if (!mp3DecInfo_pointer)
return 0;
ClearBuffer(mp3DecInfo_pointer, sizeof(MP3DecInfo));
fh = (FrameHeader *) malloc(sizeof(FrameHeader));
si = (SideInfo *) malloc(sizeof(SideInfo));
sfi = (ScaleFactorInfo *) malloc(sizeof(ScaleFactorInfo));
hi = (HuffmanInfo *) malloc(sizeof(HuffmanInfo));
di = (DequantInfo *) malloc(sizeof(DequantInfo));
mi = (IMDCTInfo *) malloc(sizeof(IMDCTInfo));
sbi = (SubbandInfo *) malloc(sizeof(SubbandInfo));
mp3DecInfo_pointer->FrameHeaderPS = (void *)fh;
mp3DecInfo_pointer->SideInfoPS = (void *)si;
mp3DecInfo_pointer->ScaleFactorInfoPS = (void *)sfi;
mp3DecInfo_pointer->HuffmanInfoPS = (void *)hi;
mp3DecInfo_pointer->DequantInfoPS = (void *)di;
mp3DecInfo_pointer->IMDCTInfoPS = (void *)mi;
mp3DecInfo_pointer->SubbandInfoPS = (void *)sbi;
if (!fh || !si || !sfi || !hi || !di || !mi || !sbi) {
FreeBuffers(mp3DecInfo_pointer); /* safe to call - only frees memory that was successfully allocated */
return 0;
}
/* important to do this - DSP primitives assume a bunch of state variables are 0 on first use */
//Optimized away.. hmm
ClearBuffer(fh, sizeof(FrameHeader));
ClearBuffer(si, sizeof(SideInfo));
ClearBuffer(sfi, sizeof(ScaleFactorInfo));
ClearBuffer(hi, sizeof(HuffmanInfo));
ClearBuffer(di, sizeof(DequantInfo));
ClearBuffer(mi, sizeof(IMDCTInfo));
ClearBuffer(sbi, sizeof(SubbandInfo));
#endif
return mp3DecInfo_pointer;
}
#ifndef static_buffers
#define SAFE_FREE(x) {if (x) free(x); (x) = 0;} /* helper macro */
#endif
/**************************************************************************************
* Function: FreeBuffers
*
* Description: frees all the memory used by the MP3 decoder
*
* Inputs: pointer to initialized MP3DecInfo structure
*
* Outputs: none
*
* Return: none
*
* Notes: safe to call even if some buffers were not allocated (uses SAFE_FREE)
**************************************************************************************/
void FreeBuffers(MP3DecInfo *mp3DecInfo)
{
#ifndef static_buffers
if (!mp3DecInfo)
return;
SAFE_FREE(mp3DecInfo->FrameHeaderPS);
SAFE_FREE(mp3DecInfo->SideInfoPS);
SAFE_FREE(mp3DecInfo->ScaleFactorInfoPS);
SAFE_FREE(mp3DecInfo->HuffmanInfoPS);
SAFE_FREE(mp3DecInfo->DequantInfoPS);
SAFE_FREE(mp3DecInfo->IMDCTInfoPS);
SAFE_FREE(mp3DecInfo->SubbandInfoPS);
SAFE_FREE(mp3DecInfo);
#endif
}

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* buffers.c - allocation and freeing of internal MP3 decoder buffers
*
* All memory allocation for the codec is done in this file, so if you don't want
* to use other the default system malloc() and free() for heap management this is
* the only file you'll need to change.
**************************************************************************************/
#include "hlxclib/stdlib.h" /* for malloc, free */
#include "coder.h"
/**************************************************************************************
* Function: ClearBuffer
*
* Description: fill buffer with 0's
*
* Inputs: pointer to buffer
* number of bytes to fill with 0
*
* Outputs: cleared buffer
*
* Return: none
*
* Notes: slow, platform-independent equivalent to memset(buf, 0, nBytes)
**************************************************************************************/
static void ClearBuffer(void *buf, int nBytes)
{
int i;
unsigned char *cbuf = (unsigned char *)buf;
for (i = 0; i < nBytes; i++)
cbuf[i] = 0;
return;
}
/**************************************************************************************
* Function: AllocateBuffers
*
* Description: allocate all the memory needed for the MP3 decoder
*
* Inputs: none
*
* Outputs: none
*
* Return: pointer to MP3DecInfo structure (initialized with pointers to all
* the internal buffers needed for decoding, all other members of
* MP3DecInfo structure set to 0)
*
* Notes: if one or more mallocs fail, function frees any buffers already
* allocated before returning
**************************************************************************************/
MP3DecInfo *AllocateBuffers(void)
{
MP3DecInfo *mp3DecInfo;
FrameHeader *fh;
SideInfo *si;
ScaleFactorInfo *sfi;
HuffmanInfo *hi;
DequantInfo *di;
IMDCTInfo *mi;
SubbandInfo *sbi;
mp3DecInfo = (MP3DecInfo *)malloc(sizeof(MP3DecInfo));
if (!mp3DecInfo)
return 0;
ClearBuffer(mp3DecInfo, sizeof(MP3DecInfo));
fh = (FrameHeader *) malloc(sizeof(FrameHeader));
si = (SideInfo *) malloc(sizeof(SideInfo));
sfi = (ScaleFactorInfo *) malloc(sizeof(ScaleFactorInfo));
hi = (HuffmanInfo *) malloc(sizeof(HuffmanInfo));
di = (DequantInfo *) malloc(sizeof(DequantInfo));
mi = (IMDCTInfo *) malloc(sizeof(IMDCTInfo));
sbi = (SubbandInfo *) malloc(sizeof(SubbandInfo));
mp3DecInfo->FrameHeaderPS = (void *)fh;
mp3DecInfo->SideInfoPS = (void *)si;
mp3DecInfo->ScaleFactorInfoPS = (void *)sfi;
mp3DecInfo->HuffmanInfoPS = (void *)hi;
mp3DecInfo->DequantInfoPS = (void *)di;
mp3DecInfo->IMDCTInfoPS = (void *)mi;
mp3DecInfo->SubbandInfoPS = (void *)sbi;
if (!fh || !si || !sfi || !hi || !di || !mi || !sbi) {
FreeBuffers(mp3DecInfo); /* safe to call - only frees memory that was successfully allocated */
return 0;
}
/* important to do this - DSP primitives assume a bunch of state variables are 0 on first use */
ClearBuffer(fh, sizeof(FrameHeader));
ClearBuffer(si, sizeof(SideInfo));
ClearBuffer(sfi, sizeof(ScaleFactorInfo));
ClearBuffer(hi, sizeof(HuffmanInfo));
ClearBuffer(di, sizeof(DequantInfo));
ClearBuffer(mi, sizeof(IMDCTInfo));
ClearBuffer(sbi, sizeof(SubbandInfo));
return mp3DecInfo;
}
#define SAFE_FREE(x) {if (x) free(x); (x) = 0;} /* helper macro */
/**************************************************************************************
* Function: FreeBuffers
*
* Description: frees all the memory used by the MP3 decoder
*
* Inputs: pointer to initialized MP3DecInfo structure
*
* Outputs: none
*
* Return: none
*
* Notes: safe to call even if some buffers were not allocated (uses SAFE_FREE)
**************************************************************************************/
void FreeBuffers(MP3DecInfo *mp3DecInfo)
{
if (!mp3DecInfo)
return;
SAFE_FREE(mp3DecInfo->FrameHeaderPS);
SAFE_FREE(mp3DecInfo->SideInfoPS);
SAFE_FREE(mp3DecInfo->ScaleFactorInfoPS);
SAFE_FREE(mp3DecInfo->HuffmanInfoPS);
SAFE_FREE(mp3DecInfo->DequantInfoPS);
SAFE_FREE(mp3DecInfo->IMDCTInfoPS);
SAFE_FREE(mp3DecInfo->SubbandInfoPS);
SAFE_FREE(mp3DecInfo);
}

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* coder.h - private, implementation-specific header file
**************************************************************************************/
#ifndef _CODER_H
#define _CODER_H
#include "mp3common.h"
#if defined(ASSERT)
#undef ASSERT
#endif
#if defined(_WIN32) && defined(_M_IX86) && (defined (_DEBUG) || defined (REL_ENABLE_ASSERTS))
#define ASSERT(x) if (!(x)) __asm int 3;
#else
#define ASSERT(x) /* do nothing */
#endif
#ifndef MAX
#define MAX(a,b) ((a) > (b) ? (a) : (b))
#endif
#ifndef MIN
#define MIN(a,b) ((a) < (b) ? (a) : (b))
#endif
/* clip to range [-2^n, 2^n - 1] */
#define CLIP_2N(y, n) { \
int sign = (y) >> 31; \
if (sign != (y) >> (n)) { \
(y) = sign ^ ((1 << (n)) - 1); \
} \
}
#define SIBYTES_MPEG1_MONO 17
#define SIBYTES_MPEG1_STEREO 32
#define SIBYTES_MPEG2_MONO 9
#define SIBYTES_MPEG2_STEREO 17
/* number of fraction bits for pow43Tab (see comments there) */
#define POW43_FRACBITS_LOW 22
#define POW43_FRACBITS_HIGH 12
#define DQ_FRACBITS_OUT 25 /* number of fraction bits in output of dequant */
#define IMDCT_SCALE 2 /* additional scaling (by sqrt(2)) for fast IMDCT36 */
#define HUFF_PAIRTABS 32
#define BLOCK_SIZE 18
#define NBANDS 32
#define MAX_REORDER_SAMPS ((192-126)*3) /* largest critical band for short blocks (see sfBandTable) */
#define VBUF_LENGTH (17 * 2 * NBANDS) /* for double-sized vbuf FIFO */
/* additional external symbols to name-mangle for static linking */
#define SetBitstreamPointer STATNAME(SetBitstreamPointer)
#define GetBits STATNAME(GetBits)
#define CalcBitsUsed STATNAME(CalcBitsUsed)
#define DequantChannel STATNAME(DequantChannel)
#define MidSideProc STATNAME(MidSideProc)
#define IntensityProcMPEG1 STATNAME(IntensityProcMPEG1)
#define IntensityProcMPEG2 STATNAME(IntensityProcMPEG2)
#define PolyphaseMono STATNAME(PolyphaseMono)
#define PolyphaseStereo STATNAME(PolyphaseStereo)
#define FDCT32 STATNAME(FDCT32)
#define ISFMpeg1 STATNAME(ISFMpeg1)
#define ISFMpeg2 STATNAME(ISFMpeg2)
#define ISFIIP STATNAME(ISFIIP)
#define uniqueIDTab STATNAME(uniqueIDTab)
#define coef32 STATNAME(coef32)
#define polyCoef STATNAME(polyCoef)
#define csa STATNAME(csa)
#define imdctWin STATNAME(imdctWin)
#define huffTable STATNAME(huffTable)
#define huffTabOffset STATNAME(huffTabOffset)
#define huffTabLookup STATNAME(huffTabLookup)
#define quadTable STATNAME(quadTable)
#define quadTabOffset STATNAME(quadTabOffset)
#define quadTabMaxBits STATNAME(quadTabMaxBits)
/* map these to the corresponding 2-bit values in the frame header */
typedef enum {
Stereo = 0x00, /* two independent channels, but L and R frames might have different # of bits */
Joint = 0x01, /* coupled channels - layer III: mix of M-S and intensity, Layers I/II: intensity and direct coding only */
Dual = 0x02, /* two independent channels, L and R always have exactly 1/2 the total bitrate */
Mono = 0x03 /* one channel */
} StereoMode;
typedef struct _BitStreamInfo {
unsigned char *bytePtr;
unsigned int iCache;
int cachedBits;
int nBytes;
} BitStreamInfo;
typedef struct _FrameHeader {
MPEGVersion ver; /* version ID */
int layer; /* layer index (1, 2, or 3) */
int crc; /* CRC flag: 0 = disabled, 1 = enabled */
int brIdx; /* bitrate index (0 - 15) */
int srIdx; /* sample rate index (0 - 2) */
int paddingBit; /* padding flag: 0 = no padding, 1 = single pad byte */
int privateBit; /* unused */
StereoMode sMode; /* mono/stereo mode */
int modeExt; /* used to decipher joint stereo mode */
int copyFlag; /* copyright flag: 0 = no, 1 = yes */
int origFlag; /* original flag: 0 = copy, 1 = original */
int emphasis; /* deemphasis mode */
int CRCWord; /* CRC word (16 bits, 0 if crc not enabled) */
const SFBandTable *sfBand;
} FrameHeader;
typedef struct _SideInfoSub {
int part23Length; /* number of bits in main data */
int nBigvals; /* 2x this = first set of Huffman cw's (maximum amplitude can be > 1) */
int globalGain; /* overall gain for dequantizer */
int sfCompress; /* unpacked to figure out number of bits in scale factors */
int winSwitchFlag; /* window switching flag */
int blockType; /* block type */
int mixedBlock; /* 0 = regular block (all short or long), 1 = mixed block */
int tableSelect[3]; /* index of Huffman tables for the big values regions */
int subBlockGain[3]; /* subblock gain offset, relative to global gain */
int region0Count; /* 1+region0Count = num scale factor bands in first region of bigvals */
int region1Count; /* 1+region1Count = num scale factor bands in second region of bigvals */
int preFlag; /* for optional high frequency boost */
int sfactScale; /* scaling of the scalefactors */
int count1TableSelect; /* index of Huffman table for quad codewords */
} SideInfoSub;
typedef struct _SideInfo {
int mainDataBegin;
int privateBits;
int scfsi[MAX_NCHAN][MAX_SCFBD]; /* 4 scalefactor bands per channel */
SideInfoSub sis[MAX_NGRAN][MAX_NCHAN];
} SideInfo;
typedef struct {
int cbType; /* pure long = 0, pure short = 1, mixed = 2 */
int cbEndS[3]; /* number nonzero short cb's, per subbblock */
int cbEndSMax; /* max of cbEndS[] */
int cbEndL; /* number nonzero long cb's */
} CriticalBandInfo;
typedef struct _DequantInfo {
int workBuf[MAX_REORDER_SAMPS]; /* workbuf for reordering short blocks */
CriticalBandInfo cbi[MAX_NCHAN]; /* filled in dequantizer, used in joint stereo reconstruction */
} DequantInfo;
typedef struct _HuffmanInfo {
int huffDecBuf[MAX_NCHAN][MAX_NSAMP]; /* used both for decoded Huffman values and dequantized coefficients */
int nonZeroBound[MAX_NCHAN]; /* number of coeffs in huffDecBuf[ch] which can be > 0 */
int gb[MAX_NCHAN]; /* minimum number of guard bits in huffDecBuf[ch] */
} HuffmanInfo;
typedef enum _HuffTabType {
noBits,
oneShot,
loopNoLinbits,
loopLinbits,
quadA,
quadB,
invalidTab
} HuffTabType;
typedef struct _HuffTabLookup {
int linBits;
HuffTabType tabType;
} HuffTabLookup;
typedef struct _IMDCTInfo {
int outBuf[MAX_NCHAN][BLOCK_SIZE][NBANDS]; /* output of IMDCT */
int overBuf[MAX_NCHAN][MAX_NSAMP / 2]; /* overlap-add buffer (by symmetry, only need 1/2 size) */
int numPrevIMDCT[MAX_NCHAN]; /* how many IMDCT's calculated in this channel on prev. granule */
int prevType[MAX_NCHAN];
int prevWinSwitch[MAX_NCHAN];
int gb[MAX_NCHAN];
} IMDCTInfo;
typedef struct _BlockCount {
int nBlocksLong;
int nBlocksTotal;
int nBlocksPrev;
int prevType;
int prevWinSwitch;
int currWinSwitch;
int gbIn;
int gbOut;
} BlockCount;
/* max bits in scalefactors = 5, so use char's to save space */
typedef struct _ScaleFactorInfoSub {
char l[23]; /* [band] */
char s[13][3]; /* [band][window] */
} ScaleFactorInfoSub;
/* used in MPEG 2, 2.5 intensity (joint) stereo only */
typedef struct _ScaleFactorJS {
int intensityScale;
int slen[4];
int nr[4];
} ScaleFactorJS;
typedef struct _ScaleFactorInfo {
ScaleFactorInfoSub sfis[MAX_NGRAN][MAX_NCHAN];
ScaleFactorJS sfjs;
} ScaleFactorInfo;
/* NOTE - could get by with smaller vbuf if memory is more important than speed
* (in Subband, instead of replicating each block in FDCT32 you would do a memmove on the
* last 15 blocks to shift them down one, a hardware style FIFO)
*/
typedef struct _SubbandInfo {
int vbuf[MAX_NCHAN * VBUF_LENGTH]; /* vbuf for fast DCT-based synthesis PQMF - double size for speed (no modulo indexing) */
int vindex; /* internal index for tracking position in vbuf */
} SubbandInfo;
/* bitstream.c */
void SetBitstreamPointer(BitStreamInfo *bsi, int nBytes, unsigned char *buf);
unsigned int GetBits(BitStreamInfo *bsi, int nBits);
int CalcBitsUsed(BitStreamInfo *bsi, unsigned char *startBuf, int startOffset);
/* dequant.c, dqchan.c, stproc.c */
int DequantChannel(int *sampleBuf, int *workBuf, int *nonZeroBound, FrameHeader *fh, SideInfoSub *sis,
ScaleFactorInfoSub *sfis, CriticalBandInfo *cbi);
void MidSideProc(int x[MAX_NCHAN][MAX_NSAMP], int nSamps, int mOut[2]);
void IntensityProcMPEG1(int x[MAX_NCHAN][MAX_NSAMP], int nSamps, FrameHeader *fh, ScaleFactorInfoSub *sfis,
CriticalBandInfo *cbi, int midSideFlag, int mixFlag, int mOut[2]);
void IntensityProcMPEG2(int x[MAX_NCHAN][MAX_NSAMP], int nSamps, FrameHeader *fh, ScaleFactorInfoSub *sfis,
CriticalBandInfo *cbi, ScaleFactorJS *sfjs, int midSideFlag, int mixFlag, int mOut[2]);
/* dct32.c */
void FDCT32(int *x, int *d, int offset, int oddBlock, int gb);
/* hufftabs.c */
extern const HuffTabLookup huffTabLookup[HUFF_PAIRTABS];
extern const int huffTabOffset[HUFF_PAIRTABS];
extern const unsigned short huffTable[];
extern const unsigned char quadTable[64+16];
extern const int quadTabOffset[2];
extern const int quadTabMaxBits[2];
/* polyphase.c (or asmpoly.s)
* some platforms require a C++ compile of all source files,
* so if we're compiling C as C++ and using native assembly
* for these functions we need to prevent C++ name mangling.
*/
#ifdef __cplusplus
extern "C" {
#endif
void PolyphaseMono(short *pcm, int *vbuf, const int *coefBase);
void PolyphaseStereo(short *pcm, int *vbuf, const int *coefBase);
#ifdef __cplusplus
}
#endif
/* trigtabs.c */
extern const int imdctWin[4][36];
extern const int ISFMpeg1[2][7];
extern const int ISFMpeg2[2][2][16];
extern const int ISFIIP[2][2];
extern const int csa[8][2];
extern const int coef32[31];
extern const int polyCoef[264];
#endif /* _CODER_H */

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* dct32.c - optimized implementations of 32-point DCT for matrixing stage of
* polyphase filter
**************************************************************************************/
#include "coder.h"
#include "assembly.h"
#define COS0_0 0x4013c251 /* Q31 */
#define COS0_1 0x40b345bd /* Q31 */
#define COS0_2 0x41fa2d6d /* Q31 */
#define COS0_3 0x43f93421 /* Q31 */
#define COS0_4 0x46cc1bc4 /* Q31 */
#define COS0_5 0x4a9d9cf0 /* Q31 */
#define COS0_6 0x4fae3711 /* Q31 */
#define COS0_7 0x56601ea7 /* Q31 */
#define COS0_8 0x5f4cf6eb /* Q31 */
#define COS0_9 0x6b6fcf26 /* Q31 */
#define COS0_10 0x7c7d1db3 /* Q31 */
#define COS0_11 0x4ad81a97 /* Q30 */
#define COS0_12 0x5efc8d96 /* Q30 */
#define COS0_13 0x41d95790 /* Q29 */
#define COS0_14 0x6d0b20cf /* Q29 */
#define COS0_15 0x518522fb /* Q27 */
#define COS1_0 0x404f4672 /* Q31 */
#define COS1_1 0x42e13c10 /* Q31 */
#define COS1_2 0x48919f44 /* Q31 */
#define COS1_3 0x52cb0e63 /* Q31 */
#define COS1_4 0x64e2402e /* Q31 */
#define COS1_5 0x43e224a9 /* Q30 */
#define COS1_6 0x6e3c92c1 /* Q30 */
#define COS1_7 0x519e4e04 /* Q28 */
#define COS2_0 0x4140fb46 /* Q31 */
#define COS2_1 0x4cf8de88 /* Q31 */
#define COS2_2 0x73326bbf /* Q31 */
#define COS2_3 0x52036742 /* Q29 */
#define COS3_0 0x4545e9ef /* Q31 */
#define COS3_1 0x539eba45 /* Q30 */
#define COS4_0 0x5a82799a /* Q31 */
static const int dcttab[48] = {
/* first pass */
COS0_0, COS0_15, COS1_0, /* 31, 27, 31 */
COS0_1, COS0_14, COS1_1, /* 31, 29, 31 */
COS0_2, COS0_13, COS1_2, /* 31, 29, 31 */
COS0_3, COS0_12, COS1_3, /* 31, 30, 31 */
COS0_4, COS0_11, COS1_4, /* 31, 30, 31 */
COS0_5, COS0_10, COS1_5, /* 31, 31, 30 */
COS0_6, COS0_9, COS1_6, /* 31, 31, 30 */
COS0_7, COS0_8, COS1_7, /* 31, 31, 28 */
/* second pass */
COS2_0, COS2_3, COS3_0, /* 31, 29, 31 */
COS2_1, COS2_2, COS3_1, /* 31, 31, 30 */
-COS2_0, -COS2_3, COS3_0, /* 31, 29, 31 */
-COS2_1, -COS2_2, COS3_1, /* 31, 31, 30 */
COS2_0, COS2_3, COS3_0, /* 31, 29, 31 */
COS2_1, COS2_2, COS3_1, /* 31, 31, 30 */
-COS2_0, -COS2_3, COS3_0, /* 31, 29, 31 */
-COS2_1, -COS2_2, COS3_1, /* 31, 31, 30 */
};
#define D32FP(i, s0, s1, s2) { \
a0 = buf[i]; a3 = buf[31-i]; \
a1 = buf[15-i]; a2 = buf[16+i]; \
b0 = a0 + a3; b3 = MULSHIFT32(*cptr++, a0 - a3) << (s0); \
b1 = a1 + a2; b2 = MULSHIFT32(*cptr++, a1 - a2) << (s1); \
buf[i] = b0 + b1; buf[15-i] = MULSHIFT32(*cptr, b0 - b1) << (s2); \
buf[16+i] = b2 + b3; buf[31-i] = MULSHIFT32(*cptr++, b3 - b2) << (s2); \
}
/**************************************************************************************
* Function: FDCT32
*
* Description: Ken's highly-optimized 32-point DCT (radix-4 + radix-8)
*
* Inputs: input buffer, length = 32 samples
* require at least 6 guard bits in input vector x to avoid possibility
* of overflow in internal calculations (see bbtest_imdct test app)
* buffer offset and oddblock flag for polyphase filter input buffer
* number of guard bits in input
*
* Outputs: output buffer, data copied and interleaved for polyphase filter
* no guarantees about number of guard bits in output
*
* Return: none
*
* Notes: number of muls = 4*8 + 12*4 = 80
* final stage of DCT is hardcoded to shuffle data into the proper order
* for the polyphase filterbank
* fully unrolled stage 1, for max precision (scale the 1/cos() factors
* differently, depending on magnitude)
* guard bit analysis verified by exhaustive testing of all 2^32
* combinations of max pos/max neg values in x[]
*
* TODO: code organization and optimization for ARM
* possibly interleave stereo (cut # of coef loads in half - may not have
* enough registers)
**************************************************************************************/
void FDCT32(int *buf, int *dest, int offset, int oddBlock, int gb)
{
int i, s, tmp, es;
const int *cptr = dcttab;
int a0, a1, a2, a3, a4, a5, a6, a7;
int b0, b1, b2, b3, b4, b5, b6, b7;
int *d;
/* scaling - ensure at least 6 guard bits for DCT
* (in practice this is already true 99% of time, so this code is
* almost never triggered)
*/
es = 0;
if (gb < 6) {
es = 6 - gb;
for (i = 0; i < 32; i++)
buf[i] >>= es;
}
/* first pass */
D32FP(0, 1, 5, 1);
D32FP(1, 1, 3, 1);
D32FP(2, 1, 3, 1);
D32FP(3, 1, 2, 1);
D32FP(4, 1, 2, 1);
D32FP(5, 1, 1, 2);
D32FP(6, 1, 1, 2);
D32FP(7, 1, 1, 4);
/* second pass */
for (i = 4; i > 0; i--) {
a0 = buf[0]; a7 = buf[7]; a3 = buf[3]; a4 = buf[4];
b0 = a0 + a7; b7 = MULSHIFT32(*cptr++, a0 - a7) << 1;
b3 = a3 + a4; b4 = MULSHIFT32(*cptr++, a3 - a4) << 3;
a0 = b0 + b3; a3 = MULSHIFT32(*cptr, b0 - b3) << 1;
a4 = b4 + b7; a7 = MULSHIFT32(*cptr++, b7 - b4) << 1;
a1 = buf[1]; a6 = buf[6]; a2 = buf[2]; a5 = buf[5];
b1 = a1 + a6; b6 = MULSHIFT32(*cptr++, a1 - a6) << 1;
b2 = a2 + a5; b5 = MULSHIFT32(*cptr++, a2 - a5) << 1;
a1 = b1 + b2; a2 = MULSHIFT32(*cptr, b1 - b2) << 2;
a5 = b5 + b6; a6 = MULSHIFT32(*cptr++, b6 - b5) << 2;
b0 = a0 + a1; b1 = MULSHIFT32(COS4_0, a0 - a1) << 1;
b2 = a2 + a3; b3 = MULSHIFT32(COS4_0, a3 - a2) << 1;
buf[0] = b0; buf[1] = b1;
buf[2] = b2 + b3; buf[3] = b3;
b4 = a4 + a5; b5 = MULSHIFT32(COS4_0, a4 - a5) << 1;
b6 = a6 + a7; b7 = MULSHIFT32(COS4_0, a7 - a6) << 1;
b6 += b7;
buf[4] = b4 + b6; buf[5] = b5 + b7;
buf[6] = b5 + b6; buf[7] = b7;
buf += 8;
}
buf -= 32; /* reset */
/* sample 0 - always delayed one block */
d = dest + 64*16 + ((offset - oddBlock) & 7) + (oddBlock ? 0 : VBUF_LENGTH);
s = buf[ 0]; d[0] = d[8] = s;
/* samples 16 to 31 */
d = dest + offset + (oddBlock ? VBUF_LENGTH : 0);
s = buf[ 1]; d[0] = d[8] = s; d += 64;
tmp = buf[25] + buf[29];
s = buf[17] + tmp; d[0] = d[8] = s; d += 64;
s = buf[ 9] + buf[13]; d[0] = d[8] = s; d += 64;
s = buf[21] + tmp; d[0] = d[8] = s; d += 64;
tmp = buf[29] + buf[27];
s = buf[ 5]; d[0] = d[8] = s; d += 64;
s = buf[21] + tmp; d[0] = d[8] = s; d += 64;
s = buf[13] + buf[11]; d[0] = d[8] = s; d += 64;
s = buf[19] + tmp; d[0] = d[8] = s; d += 64;
tmp = buf[27] + buf[31];
s = buf[ 3]; d[0] = d[8] = s; d += 64;
s = buf[19] + tmp; d[0] = d[8] = s; d += 64;
s = buf[11] + buf[15]; d[0] = d[8] = s; d += 64;
s = buf[23] + tmp; d[0] = d[8] = s; d += 64;
tmp = buf[31];
s = buf[ 7]; d[0] = d[8] = s; d += 64;
s = buf[23] + tmp; d[0] = d[8] = s; d += 64;
s = buf[15]; d[0] = d[8] = s; d += 64;
s = tmp; d[0] = d[8] = s;
/* samples 16 to 1 (sample 16 used again) */
d = dest + 16 + ((offset - oddBlock) & 7) + (oddBlock ? 0 : VBUF_LENGTH);
s = buf[ 1]; d[0] = d[8] = s; d += 64;
tmp = buf[30] + buf[25];
s = buf[17] + tmp; d[0] = d[8] = s; d += 64;
s = buf[14] + buf[ 9]; d[0] = d[8] = s; d += 64;
s = buf[22] + tmp; d[0] = d[8] = s; d += 64;
s = buf[ 6]; d[0] = d[8] = s; d += 64;
tmp = buf[26] + buf[30];
s = buf[22] + tmp; d[0] = d[8] = s; d += 64;
s = buf[10] + buf[14]; d[0] = d[8] = s; d += 64;
s = buf[18] + tmp; d[0] = d[8] = s; d += 64;
s = buf[ 2]; d[0] = d[8] = s; d += 64;
tmp = buf[28] + buf[26];
s = buf[18] + tmp; d[0] = d[8] = s; d += 64;
s = buf[12] + buf[10]; d[0] = d[8] = s; d += 64;
s = buf[20] + tmp; d[0] = d[8] = s; d += 64;
s = buf[ 4]; d[0] = d[8] = s; d += 64;
tmp = buf[24] + buf[28];
s = buf[20] + tmp; d[0] = d[8] = s; d += 64;
s = buf[ 8] + buf[12]; d[0] = d[8] = s; d += 64;
s = buf[16] + tmp; d[0] = d[8] = s;
/* this is so rarely invoked that it's not worth making two versions of the output
* shuffle code (one for no shift, one for clip + variable shift) like in IMDCT
* here we just load, clip, shift, and store on the rare instances that es != 0
*/
if (es) {
d = dest + 64*16 + ((offset - oddBlock) & 7) + (oddBlock ? 0 : VBUF_LENGTH);
s = d[0]; CLIP_2N(s, 31 - es); d[0] = d[8] = (s << es);
d = dest + offset + (oddBlock ? VBUF_LENGTH : 0);
for (i = 16; i <= 31; i++) {
s = d[0]; CLIP_2N(s, 31 - es); d[0] = d[8] = (s << es); d += 64;
}
d = dest + 16 + ((offset - oddBlock) & 7) + (oddBlock ? 0 : VBUF_LENGTH);
for (i = 15; i >= 0; i--) {
s = d[0]; CLIP_2N(s, 31 - es); d[0] = d[8] = (s << es); d += 64;
}
}
}

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* dequant.c - dequantization, stereo processing (intensity, mid-side), short-block
* coefficient reordering
**************************************************************************************/
#include "coder.h"
#include "assembly.h"
/**************************************************************************************
* Function: Dequantize
*
* Description: dequantize coefficients, decode stereo, reorder short blocks
* (one granule-worth)
*
* Inputs: MP3DecInfo structure filled by UnpackFrameHeader(), UnpackSideInfo(),
* UnpackScaleFactors(), and DecodeHuffman() (for this granule)
* index of current granule
*
* Outputs: dequantized and reordered coefficients in hi->huffDecBuf
* (one granule-worth, all channels), format = Q26
* operates in-place on huffDecBuf but also needs di->workBuf
* updated hi->nonZeroBound index for both channels
*
* Return: 0 on success, -1 if null input pointers
*
* Notes: In calling output Q(DQ_FRACBITS_OUT), we assume an implicit bias
* of 2^15. Some (floating-point) reference implementations factor this
* into the 2^(0.25 * gain) scaling explicitly. But to avoid precision
* loss, we don't do that. Instead take it into account in the final
* round to PCM (>> by 15 less than we otherwise would have).
* Equivalently, we can think of the dequantized coefficients as
* Q(DQ_FRACBITS_OUT - 15) with no implicit bias.
**************************************************************************************/
int Dequantize(MP3DecInfo *mp3DecInfo, int gr)
{
int i, ch, nSamps, mOut[2];
FrameHeader *fh;
SideInfo *si;
ScaleFactorInfo *sfi;
HuffmanInfo *hi;
DequantInfo *di;
CriticalBandInfo *cbi;
/* validate pointers */
if (!mp3DecInfo || !mp3DecInfo->FrameHeaderPS || !mp3DecInfo->SideInfoPS || !mp3DecInfo->ScaleFactorInfoPS ||
!mp3DecInfo->HuffmanInfoPS || !mp3DecInfo->DequantInfoPS)
return -1;
fh = (FrameHeader *)(mp3DecInfo->FrameHeaderPS);
/* si is an array of up to 4 structs, stored as gr0ch0, gr0ch1, gr1ch0, gr1ch1 */
si = (SideInfo *)(mp3DecInfo->SideInfoPS);
sfi = (ScaleFactorInfo *)(mp3DecInfo->ScaleFactorInfoPS);
hi = (HuffmanInfo *)mp3DecInfo->HuffmanInfoPS;
di = (DequantInfo *)mp3DecInfo->DequantInfoPS;
cbi = di->cbi;
mOut[0] = mOut[1] = 0;
/* dequantize all the samples in each channel */
for (ch = 0; ch < mp3DecInfo->nChans; ch++) {
hi->gb[ch] = DequantChannel(hi->huffDecBuf[ch], di->workBuf, &hi->nonZeroBound[ch], fh,
&si->sis[gr][ch], &sfi->sfis[gr][ch], &cbi[ch]);
}
/* joint stereo processing assumes one guard bit in input samples
* it's extremely rare not to have at least one gb, so if this is the case
* just make a pass over the data and clip to [-2^30+1, 2^30-1]
* in practice this may never happen
*/
if (fh->modeExt && (hi->gb[0] < 1 || hi->gb[1] < 1)) {
for (i = 0; i < hi->nonZeroBound[0]; i++) {
if (hi->huffDecBuf[0][i] < -0x3fffffff) hi->huffDecBuf[0][i] = -0x3fffffff;
if (hi->huffDecBuf[0][i] > 0x3fffffff) hi->huffDecBuf[0][i] = 0x3fffffff;
}
for (i = 0; i < hi->nonZeroBound[1]; i++) {
if (hi->huffDecBuf[1][i] < -0x3fffffff) hi->huffDecBuf[1][i] = -0x3fffffff;
if (hi->huffDecBuf[1][i] > 0x3fffffff) hi->huffDecBuf[1][i] = 0x3fffffff;
}
}
/* do mid-side stereo processing, if enabled */
if (fh->modeExt >> 1) {
if (fh->modeExt & 0x01) {
/* intensity stereo enabled - run mid-side up to start of right zero region */
if (cbi[1].cbType == 0)
nSamps = fh->sfBand->l[cbi[1].cbEndL + 1];
else
nSamps = 3 * fh->sfBand->s[cbi[1].cbEndSMax + 1];
} else {
/* intensity stereo disabled - run mid-side on whole spectrum */
nSamps = MAX(hi->nonZeroBound[0], hi->nonZeroBound[1]);
}
MidSideProc(hi->huffDecBuf, nSamps, mOut);
}
/* do intensity stereo processing, if enabled */
if (fh->modeExt & 0x01) {
nSamps = hi->nonZeroBound[0];
if (fh->ver == MPEG1) {
IntensityProcMPEG1(hi->huffDecBuf, nSamps, fh, &sfi->sfis[gr][1], di->cbi,
fh->modeExt >> 1, si->sis[gr][1].mixedBlock, mOut);
} else {
IntensityProcMPEG2(hi->huffDecBuf, nSamps, fh, &sfi->sfis[gr][1], di->cbi, &sfi->sfjs,
fh->modeExt >> 1, si->sis[gr][1].mixedBlock, mOut);
}
}
/* adjust guard bit count and nonZeroBound if we did any stereo processing */
if (fh->modeExt) {
hi->gb[0] = CLZ(mOut[0]) - 1;
hi->gb[1] = CLZ(mOut[1]) - 1;
nSamps = MAX(hi->nonZeroBound[0], hi->nonZeroBound[1]);
hi->nonZeroBound[0] = nSamps;
hi->nonZeroBound[1] = nSamps;
}
/* output format Q(DQ_FRACBITS_OUT) */
return 0;
}

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* August 2003
*
* dqchan.c - dequantization of transform coefficients
**************************************************************************************/
#include "coder.h"
#include "assembly.h"
typedef int ARRAY3[3]; /* for short-block reordering */
/* optional pre-emphasis for high-frequency scale factor bands */
static const char preTab[22] = { 0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,2,2,3,3,3,2,0 };
/* pow(2,-i/4) for i=0..3, Q31 format */
static const int pow14[4] = {
0x7fffffff, 0x6ba27e65, 0x5a82799a, 0x4c1bf829
};
/* pow(2,-i/4) * pow(j,4/3) for i=0..3 j=0..15, Q25 format */
static const int pow43_14[4][16] = {
{ 0x00000000, 0x10000000, 0x285145f3, 0x453a5cdb, /* Q28 */
0x0cb2ff53, 0x111989d6, 0x15ce31c8, 0x1ac7f203,
0x20000000, 0x257106b9, 0x2b16b4a3, 0x30ed74b4,
0x36f23fa5, 0x3d227bd3, 0x437be656, 0x49fc823c, },
{ 0x00000000, 0x0d744fcd, 0x21e71f26, 0x3a36abd9,
0x0aadc084, 0x0e610e6e, 0x12560c1d, 0x168523cf,
0x1ae89f99, 0x1f7c03a4, 0x243bae49, 0x29249c67,
0x2e34420f, 0x33686f85, 0x38bf3dff, 0x3e370182, },
{ 0x00000000, 0x0b504f33, 0x1c823e07, 0x30f39a55,
0x08facd62, 0x0c176319, 0x0f6b3522, 0x12efe2ad,
0x16a09e66, 0x1a79a317, 0x1e77e301, 0x2298d5b4,
0x26da56fc, 0x2b3a902a, 0x2fb7e7e7, 0x3450f650, },
{ 0x00000000, 0x09837f05, 0x17f910d7, 0x2929c7a9,
0x078d0dfa, 0x0a2ae661, 0x0cf73154, 0x0fec91cb,
0x1306fe0a, 0x16434a6c, 0x199ee595, 0x1d17ae3d,
0x20abd76a, 0x2459d551, 0x28204fbb, 0x2bfe1808, },
};
/* pow(j,4/3) for j=16..63, Q23 format */
static const int pow43[] = {
0x1428a2fa, 0x15db1bd6, 0x1796302c, 0x19598d85,
0x1b24e8bb, 0x1cf7fcfa, 0x1ed28af2, 0x20b4582a,
0x229d2e6e, 0x248cdb55, 0x26832fda, 0x28800000,
0x2a832287, 0x2c8c70a8, 0x2e9bc5d8, 0x30b0ff99,
0x32cbfd4a, 0x34eca001, 0x3712ca62, 0x393e6088,
0x3b6f47e0, 0x3da56717, 0x3fe0a5fc, 0x4220ed72,
0x44662758, 0x46b03e7c, 0x48ff1e87, 0x4b52b3f3,
0x4daaebfd, 0x5007b497, 0x5268fc62, 0x54ceb29c,
0x5738c721, 0x59a72a59, 0x5c19cd35, 0x5e90a129,
0x610b9821, 0x638aa47f, 0x660db90f, 0x6894c90b,
0x6b1fc80c, 0x6daeaa0d, 0x70416360, 0x72d7e8b0,
0x75722ef9, 0x78102b85, 0x7ab1d3ec, 0x7d571e09,
};
/* sqrt(0.5) in Q31 format */
#define SQRTHALF 0x5a82799a
/*
* Minimax polynomial approximation to pow(x, 4/3), over the range
* poly43lo: x = [0.5, 0.7071]
* poly43hi: x = [0.7071, 1.0]
*
* Relative error < 1E-7
* Coefs are scaled by 4, 2, 1, 0.5, 0.25
*/
static const int poly43lo[5] = { 0x29a0bda9, 0xb02e4828, 0x5957aa1b, 0x236c498d, 0xff581859 };
static const int poly43hi[5] = { 0x10852163, 0xd333f6a4, 0x46e9408b, 0x27c2cef0, 0xfef577b4 };
/* pow(2, i*4/3) as exp and frac */
static const int pow2exp[8] = { 14, 13, 11, 10, 9, 7, 6, 5 };
static const int pow2frac[8] = {
0x6597fa94, 0x50a28be6, 0x7fffffff, 0x6597fa94,
0x50a28be6, 0x7fffffff, 0x6597fa94, 0x50a28be6
};
/**************************************************************************************
* Function: DequantBlock
*
* Description: Ken's highly-optimized, low memory dequantizer performing the operation
* y = pow(x, 4.0/3.0) * pow(2, 25 - scale/4.0)
*
* Inputs: input buffer of decode Huffman codewords (signed-magnitude)
* output buffer of same length (in-place (outbuf = inbuf) is allowed)
* number of samples
*
* Outputs: dequantized samples in Q25 format
*
* Return: bitwise-OR of the unsigned outputs (for guard bit calculations)
**************************************************************************************/
static int DequantBlock(int *inbuf, int *outbuf, int num, int scale)
{
int tab4[4];
int scalef, scalei, shift;
int sx, x, y;
int mask = 0;
const int *tab16, *coef;
tab16 = pow43_14[scale & 0x3];
scalef = pow14[scale & 0x3];
scalei = MIN(scale >> 2, 31); /* smallest input scale = -47, so smallest scalei = -12 */
/* cache first 4 values */
shift = MIN(scalei + 3, 31);
shift = MAX(shift, 0);
tab4[0] = 0;
tab4[1] = tab16[1] >> shift;
tab4[2] = tab16[2] >> shift;
tab4[3] = tab16[3] >> shift;
do {
sx = *inbuf++;
x = sx & 0x7fffffff; /* sx = sign|mag */
if (x < 4) {
y = tab4[x];
} else if (x < 16) {
y = tab16[x];
y = (scalei < 0) ? y << -scalei : y >> scalei;
} else {
if (x < 64) {
y = pow43[x-16];
/* fractional scale */
y = MULSHIFT32(y, scalef);
shift = scalei - 3;
} else {
/* normalize to [0x40000000, 0x7fffffff] */
x <<= 17;
shift = 0;
if (x < 0x08000000)
x <<= 4, shift += 4;
if (x < 0x20000000)
x <<= 2, shift += 2;
if (x < 0x40000000)
x <<= 1, shift += 1;
coef = (x < SQRTHALF) ? poly43lo : poly43hi;
/* polynomial */
y = coef[0];
y = MULSHIFT32(y, x) + coef[1];
y = MULSHIFT32(y, x) + coef[2];
y = MULSHIFT32(y, x) + coef[3];
y = MULSHIFT32(y, x) + coef[4];
y = MULSHIFT32(y, pow2frac[shift]) << 3;
/* fractional scale */
y = MULSHIFT32(y, scalef);
shift = scalei - pow2exp[shift];
}
/* integer scale */
if (shift < 0) {
shift = -shift;
if (y > (0x7fffffff >> shift))
y = 0x7fffffff; /* clip */
else
y <<= shift;
} else {
y >>= shift;
}
}
/* sign and store */
mask |= y;
*outbuf++ = (sx < 0) ? -y : y;
} while (--num);
return mask;
}
/**************************************************************************************
* Function: DequantChannel
*
* Description: dequantize one granule, one channel worth of decoded Huffman codewords
*
* Inputs: sample buffer (decoded Huffman codewords), length = MAX_NSAMP samples
* work buffer for reordering short-block, length = MAX_REORDER_SAMPS
* samples (3 * width of largest short-block critical band)
* non-zero bound for this channel/granule
* valid FrameHeader, SideInfoSub, ScaleFactorInfoSub, and CriticalBandInfo
* structures for this channel/granule
*
* Outputs: MAX_NSAMP dequantized samples in sampleBuf
* updated non-zero bound (indicating which samples are != 0 after DQ)
* filled-in cbi structure indicating start and end critical bands
*
* Return: minimum number of guard bits in dequantized sampleBuf
*
* Notes: dequantized samples in Q(DQ_FRACBITS_OUT) format
**************************************************************************************/
int DequantChannel(int *sampleBuf, int *workBuf, int *nonZeroBound, FrameHeader *fh, SideInfoSub *sis,
ScaleFactorInfoSub *sfis, CriticalBandInfo *cbi)
{
int i, j, w, cb;
int cbStartL, cbEndL, cbStartS, cbEndS;
int nSamps, nonZero, sfactMultiplier, gbMask;
int globalGain, gainI;
int cbMax[3];
ARRAY3 *buf; /* short block reorder */
/* set default start/end points for short/long blocks - will update with non-zero cb info */
if (sis->blockType == 2) {
cbStartL = 0;
if (sis->mixedBlock) {
cbEndL = (fh->ver == MPEG1 ? 8 : 6);
cbStartS = 3;
} else {
cbEndL = 0;
cbStartS = 0;
}
cbEndS = 13;
} else {
/* long block */
cbStartL = 0;
cbEndL = 22;
cbStartS = 13;
cbEndS = 13;
}
cbMax[2] = cbMax[1] = cbMax[0] = 0;
gbMask = 0;
i = 0;
/* sfactScale = 0 --> quantizer step size = 2
* sfactScale = 1 --> quantizer step size = sqrt(2)
* so sfactMultiplier = 2 or 4 (jump through globalGain by powers of 2 or sqrt(2))
*/
sfactMultiplier = 2 * (sis->sfactScale + 1);
/* offset globalGain by -2 if midSide enabled, for 1/sqrt(2) used in MidSideProc()
* (DequantBlock() does 0.25 * gainI so knocking it down by two is the same as
* dividing every sample by sqrt(2) = multiplying by 2^-.5)
*/
globalGain = sis->globalGain;
if (fh->modeExt >> 1)
globalGain -= 2;
globalGain += IMDCT_SCALE; /* scale everything by sqrt(2), for fast IMDCT36 */
/* long blocks */
for (cb = 0; cb < cbEndL; cb++) {
nonZero = 0;
nSamps = fh->sfBand->l[cb + 1] - fh->sfBand->l[cb];
gainI = 210 - globalGain + sfactMultiplier * (sfis->l[cb] + (sis->preFlag ? (int)preTab[cb] : 0));
nonZero |= DequantBlock(sampleBuf + i, sampleBuf + i, nSamps, gainI);
i += nSamps;
/* update highest non-zero critical band */
if (nonZero)
cbMax[0] = cb;
gbMask |= nonZero;
if (i >= *nonZeroBound)
break;
}
/* set cbi (Type, EndS[], EndSMax will be overwritten if we proceed to do short blocks) */
cbi->cbType = 0; /* long only */
cbi->cbEndL = cbMax[0];
cbi->cbEndS[0] = cbi->cbEndS[1] = cbi->cbEndS[2] = 0;
cbi->cbEndSMax = 0;
/* early exit if no short blocks */
if (cbStartS >= 12)
return CLZ(gbMask) - 1;
/* short blocks */
cbMax[2] = cbMax[1] = cbMax[0] = cbStartS;
for (cb = cbStartS; cb < cbEndS; cb++) {
nSamps = fh->sfBand->s[cb + 1] - fh->sfBand->s[cb];
for (w = 0; w < 3; w++) {
nonZero = 0;
gainI = 210 - globalGain + 8*sis->subBlockGain[w] + sfactMultiplier*(sfis->s[cb][w]);
nonZero |= DequantBlock(sampleBuf + i + nSamps*w, workBuf + nSamps*w, nSamps, gainI);
/* update highest non-zero critical band */
if (nonZero)
cbMax[w] = cb;
gbMask |= nonZero;
}
/* reorder blocks */
buf = (ARRAY3 *)(sampleBuf + i);
i += 3*nSamps;
for (j = 0; j < nSamps; j++) {
buf[j][0] = workBuf[0*nSamps + j];
buf[j][1] = workBuf[1*nSamps + j];
buf[j][2] = workBuf[2*nSamps + j];
}
ASSERT(3*nSamps <= MAX_REORDER_SAMPS);
if (i >= *nonZeroBound)
break;
}
/* i = last non-zero INPUT sample processed, which corresponds to highest possible non-zero
* OUTPUT sample (after reorder)
* however, the original nzb is no longer necessarily true
* for each cb, buf[][] is updated with 3*nSamps samples (i increases 3*nSamps each time)
* (buf[j + 1][0] = 3 (input) samples ahead of buf[j][0])
* so update nonZeroBound to i
*/
*nonZeroBound = i;
ASSERT(*nonZeroBound <= MAX_NSAMP);
cbi->cbType = (sis->mixedBlock ? 2 : 1); /* 2 = mixed short/long, 1 = short only */
cbi->cbEndS[0] = cbMax[0];
cbi->cbEndS[1] = cbMax[1];
cbi->cbEndS[2] = cbMax[2];
cbi->cbEndSMax = cbMax[0];
cbi->cbEndSMax = MAX(cbi->cbEndSMax, cbMax[1]);
cbi->cbEndSMax = MAX(cbi->cbEndSMax, cbMax[2]);
return CLZ(gbMask) - 1;
}

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* July 2003
*
* huffman.c - Huffman decoding of transform coefficients
**************************************************************************************/
#include "coder.h"
/* helper macros - see comments in hufftabs.c about the format of the huffman tables */
#define GetMaxbits(x) ((int)( (((unsigned short)(x)) >> 0) & 0x000f))
#define GetHLen(x) ((int)( (((unsigned short)(x)) >> 12) & 0x000f))
#define GetCWY(x) ((int)( (((unsigned short)(x)) >> 8) & 0x000f))
#define GetCWX(x) ((int)( (((unsigned short)(x)) >> 4) & 0x000f))
#define GetSignBits(x) ((int)( (((unsigned short)(x)) >> 0) & 0x000f))
#define GetHLenQ(x) ((int)( (((unsigned char)(x)) >> 4) & 0x0f))
#define GetCWVQ(x) ((int)( (((unsigned char)(x)) >> 3) & 0x01))
#define GetCWWQ(x) ((int)( (((unsigned char)(x)) >> 2) & 0x01))
#define GetCWXQ(x) ((int)( (((unsigned char)(x)) >> 1) & 0x01))
#define GetCWYQ(x) ((int)( (((unsigned char)(x)) >> 0) & 0x01))
/* apply sign of s to the positive number x (save in MSB, will do two's complement in dequant) */
#define ApplySign(x, s) { (x) |= ((s) & 0x80000000); }
/**************************************************************************************
* Function: DecodeHuffmanPairs
*
* Description: decode 2-way vector Huffman codes in the "bigValues" region of spectrum
*
* Inputs: valid BitStreamInfo struct, pointing to start of pair-wise codes
* pointer to xy buffer to received decoded values
* number of codewords to decode
* index of Huffman table to use
* number of bits remaining in bitstream
*
* Outputs: pairs of decoded coefficients in vwxy
* updated BitStreamInfo struct
*
* Return: number of bits used, or -1 if out of bits
*
* Notes: assumes that nVals is an even number
* si_huff.bit tests every Huffman codeword in every table (though not
* necessarily all linBits outputs for x,y > 15)
**************************************************************************************/
static int DecodeHuffmanPairs(int *xy, int nVals, int tabIdx, int bitsLeft, unsigned char *buf, int bitOffset)
{
int i, x, y;
int cachedBits, padBits, len, startBits, linBits, maxBits, minBits;
HuffTabType tabType;
unsigned short cw, *tBase, *tCurr;
unsigned int cache;
if(nVals <= 0)
return 0;
if (bitsLeft < 0)
return -1;
startBits = bitsLeft;
tBase = (unsigned short *)(huffTable + huffTabOffset[tabIdx]);
linBits = huffTabLookup[tabIdx].linBits;
tabType = huffTabLookup[tabIdx].tabType;
ASSERT(!(nVals & 0x01));
ASSERT(tabIdx < HUFF_PAIRTABS);
ASSERT(tabIdx >= 0);
ASSERT(tabType != invalidTab);
/* initially fill cache with any partial byte */
cache = 0;
cachedBits = (8 - bitOffset) & 0x07;
if (cachedBits)
cache = (unsigned int)(*buf++) << (32 - cachedBits);
bitsLeft -= cachedBits;
if (tabType == noBits) {
/* table 0, no data, x = y = 0 */
for (i = 0; i < nVals; i+=2) {
xy[i+0] = 0;
xy[i+1] = 0;
}
return 0;
} else if (tabType == oneShot) {
/* single lookup, no escapes */
maxBits = GetMaxbits(tBase[0]);
tBase++;
padBits = 0;
while (nVals > 0) {
/* refill cache - assumes cachedBits <= 16 */
if (bitsLeft >= 16) {
/* load 2 new bytes into left-justified cache */
cache |= (unsigned int)(*buf++) << (24 - cachedBits);
cache |= (unsigned int)(*buf++) << (16 - cachedBits);
cachedBits += 16;
bitsLeft -= 16;
} else {
/* last time through, pad cache with zeros and drain cache */
if (cachedBits + bitsLeft <= 0) return -1;
if (bitsLeft > 0) cache |= (unsigned int)(*buf++) << (24 - cachedBits);
if (bitsLeft > 8) cache |= (unsigned int)(*buf++) << (16 - cachedBits);
cachedBits += bitsLeft;
bitsLeft = 0;
cache &= (signed int)0x80000000 >> (cachedBits - 1);
padBits = 11;
cachedBits += padBits; /* okay if this is > 32 (0's automatically shifted in from right) */
}
/* largest maxBits = 9, plus 2 for sign bits, so make sure cache has at least 11 bits */
while (nVals > 0 && cachedBits >= 11 ) {
cw = tBase[cache >> (32 - maxBits)];
len = GetHLen(cw);
cachedBits -= len;
cache <<= len;
x = GetCWX(cw); if (x) {ApplySign(x, cache); cache <<= 1; cachedBits--;}
y = GetCWY(cw); if (y) {ApplySign(y, cache); cache <<= 1; cachedBits--;}
/* ran out of bits - should never have consumed padBits */
if (cachedBits < padBits)
return -1;
*xy++ = x;
*xy++ = y;
nVals -= 2;
}
}
bitsLeft += (cachedBits - padBits);
return (startBits - bitsLeft);
} else if (tabType == loopLinbits || tabType == loopNoLinbits) {
tCurr = tBase;
padBits = 0;
while (nVals > 0) {
/* refill cache - assumes cachedBits <= 16 */
if (bitsLeft >= 16) {
/* load 2 new bytes into left-justified cache */
cache |= (unsigned int)(*buf++) << (24 - cachedBits);
cache |= (unsigned int)(*buf++) << (16 - cachedBits);
cachedBits += 16;
bitsLeft -= 16;
} else {
/* last time through, pad cache with zeros and drain cache */
if (cachedBits + bitsLeft <= 0) return -1;
if (bitsLeft > 0) cache |= (unsigned int)(*buf++) << (24 - cachedBits);
if (bitsLeft > 8) cache |= (unsigned int)(*buf++) << (16 - cachedBits);
cachedBits += bitsLeft;
bitsLeft = 0;
cache &= (signed int)0x80000000 >> (cachedBits - 1);
padBits = 11;
cachedBits += padBits; /* okay if this is > 32 (0's automatically shifted in from right) */
}
/* largest maxBits = 9, plus 2 for sign bits, so make sure cache has at least 11 bits */
while (nVals > 0 && cachedBits >= 11 ) {
maxBits = GetMaxbits(tCurr[0]);
cw = tCurr[(cache >> (32 - maxBits)) + 1];
len = GetHLen(cw);
if (!len) {
cachedBits -= maxBits;
cache <<= maxBits;
tCurr += cw;
continue;
}
cachedBits -= len;
cache <<= len;
x = GetCWX(cw);
y = GetCWY(cw);
if (x == 15 && tabType == loopLinbits) {
minBits = linBits + 1 + (y ? 1 : 0);
if (cachedBits + bitsLeft < minBits)
return -1;
while (cachedBits < minBits) {
cache |= (unsigned int)(*buf++) << (24 - cachedBits);
cachedBits += 8;
bitsLeft -= 8;
}
if (bitsLeft < 0) {
cachedBits += bitsLeft;
bitsLeft = 0;
cache &= (signed int)0x80000000 >> (cachedBits - 1);
}
x += (int)(cache >> (32 - linBits));
cachedBits -= linBits;
cache <<= linBits;
}
if (x) {ApplySign(x, cache); cache <<= 1; cachedBits--;}
if (y == 15 && tabType == loopLinbits) {
minBits = linBits + 1;
if (cachedBits + bitsLeft < minBits)
return -1;
while (cachedBits < minBits) {
cache |= (unsigned int)(*buf++) << (24 - cachedBits);
cachedBits += 8;
bitsLeft -= 8;
}
if (bitsLeft < 0) {
cachedBits += bitsLeft;
bitsLeft = 0;
cache &= (signed int)0x80000000 >> (cachedBits - 1);
}
y += (int)(cache >> (32 - linBits));
cachedBits -= linBits;
cache <<= linBits;
}
if (y) {ApplySign(y, cache); cache <<= 1; cachedBits--;}
/* ran out of bits - should never have consumed padBits */
if (cachedBits < padBits)
return -1;
*xy++ = x;
*xy++ = y;
nVals -= 2;
tCurr = tBase;
}
}
bitsLeft += (cachedBits - padBits);
return (startBits - bitsLeft);
}
/* error in bitstream - trying to access unused Huffman table */
return -1;
}
/**************************************************************************************
* Function: DecodeHuffmanQuads
*
* Description: decode 4-way vector Huffman codes in the "count1" region of spectrum
*
* Inputs: valid BitStreamInfo struct, pointing to start of quadword codes
* pointer to vwxy buffer to received decoded values
* maximum number of codewords to decode
* index of quadword table (0 = table A, 1 = table B)
* number of bits remaining in bitstream
*
* Outputs: quadruples of decoded coefficients in vwxy
* updated BitStreamInfo struct
*
* Return: index of the first "zero_part" value (index of the first sample
* of the quad word after which all samples are 0)
*
* Notes: si_huff.bit tests every vwxy output in both quad tables
**************************************************************************************/
static int DecodeHuffmanQuads(int *vwxy, int nVals, int tabIdx, int bitsLeft, unsigned char *buf, int bitOffset)
{
int i, v, w, x, y;
int len, maxBits, cachedBits, padBits;
unsigned int cache;
unsigned char cw, *tBase;
if (bitsLeft <= 0)
return 0;
tBase = (unsigned char *)quadTable + quadTabOffset[tabIdx];
maxBits = quadTabMaxBits[tabIdx];
/* initially fill cache with any partial byte */
cache = 0;
cachedBits = (8 - bitOffset) & 0x07;
if (cachedBits)
cache = (unsigned int)(*buf++) << (32 - cachedBits);
bitsLeft -= cachedBits;
i = padBits = 0;
while (i < (nVals - 3)) {
/* refill cache - assumes cachedBits <= 16 */
if (bitsLeft >= 16) {
/* load 2 new bytes into left-justified cache */
cache |= (unsigned int)(*buf++) << (24 - cachedBits);
cache |= (unsigned int)(*buf++) << (16 - cachedBits);
cachedBits += 16;
bitsLeft -= 16;
} else {
/* last time through, pad cache with zeros and drain cache */
if (cachedBits + bitsLeft <= 0) return i;
if (bitsLeft > 0) cache |= (unsigned int)(*buf++) << (24 - cachedBits);
if (bitsLeft > 8) cache |= (unsigned int)(*buf++) << (16 - cachedBits);
cachedBits += bitsLeft;
bitsLeft = 0;
cache &= (signed int)0x80000000 >> (cachedBits - 1);
padBits = 10;
cachedBits += padBits; /* okay if this is > 32 (0's automatically shifted in from right) */
}
/* largest maxBits = 6, plus 4 for sign bits, so make sure cache has at least 10 bits */
while (i < (nVals - 3) && cachedBits >= 10 ) {
cw = tBase[cache >> (32 - maxBits)];
len = GetHLenQ(cw);
cachedBits -= len;
cache <<= len;
v = GetCWVQ(cw); if(v) {ApplySign(v, cache); cache <<= 1; cachedBits--;}
w = GetCWWQ(cw); if(w) {ApplySign(w, cache); cache <<= 1; cachedBits--;}
x = GetCWXQ(cw); if(x) {ApplySign(x, cache); cache <<= 1; cachedBits--;}
y = GetCWYQ(cw); if(y) {ApplySign(y, cache); cache <<= 1; cachedBits--;}
/* ran out of bits - okay (means we're done) */
if (cachedBits < padBits)
return i;
*vwxy++ = v;
*vwxy++ = w;
*vwxy++ = x;
*vwxy++ = y;
i += 4;
}
}
/* decoded max number of quad values */
return i;
}
/**************************************************************************************
* Function: DecodeHuffman
*
* Description: decode one granule, one channel worth of Huffman codes
*
* Inputs: MP3DecInfo structure filled by UnpackFrameHeader(), UnpackSideInfo(),
* and UnpackScaleFactors() (for this granule)
* buffer pointing to start of Huffman data in MP3 frame
* pointer to bit offset (0-7) indicating starting bit in buf[0]
* number of bits in the Huffman data section of the frame
* (could include padding bits)
* index of current granule and channel
*
* Outputs: decoded coefficients in hi->huffDecBuf[ch] (hi pointer in mp3DecInfo)
* updated bitOffset
*
* Return: length (in bytes) of Huffman codes
* bitOffset also returned in parameter (0 = MSB, 7 = LSB of
* byte located at buf + offset)
* -1 if null input pointers, huffBlockBits < 0, or decoder runs
* out of bits prematurely (invalid bitstream)
**************************************************************************************/
int DecodeHuffman(MP3DecInfo *mp3DecInfo, unsigned char *buf, int *bitOffset, int huffBlockBits, int gr, int ch)
{
int r1Start, r2Start, rEnd[4]; /* region boundaries */
int i, w, bitsUsed, bitsLeft;
unsigned char *startBuf = buf;
FrameHeader *fh;
SideInfo *si;
SideInfoSub *sis;
ScaleFactorInfo *sfi;
HuffmanInfo *hi;
/* validate pointers */
if (!mp3DecInfo || !mp3DecInfo->FrameHeaderPS || !mp3DecInfo->SideInfoPS || !mp3DecInfo->ScaleFactorInfoPS || !mp3DecInfo->HuffmanInfoPS)
return -1;
fh = ((FrameHeader *)(mp3DecInfo->FrameHeaderPS));
si = ((SideInfo *)(mp3DecInfo->SideInfoPS));
sis = &si->sis[gr][ch];
sfi = ((ScaleFactorInfo *)(mp3DecInfo->ScaleFactorInfoPS));
hi = (HuffmanInfo*)(mp3DecInfo->HuffmanInfoPS);
if (huffBlockBits < 0)
return -1;
/* figure out region boundaries (the first 2*bigVals coefficients divided into 3 regions) */
if (sis->winSwitchFlag && sis->blockType == 2) {
if (sis->mixedBlock == 0) {
r1Start = fh->sfBand->s[(sis->region0Count + 1)/3] * 3;
} else {
if (fh->ver == MPEG1) {
r1Start = fh->sfBand->l[sis->region0Count + 1];
} else {
/* see MPEG2 spec for explanation */
w = fh->sfBand->s[4] - fh->sfBand->s[3];
r1Start = fh->sfBand->l[6] + 2*w;
}
}
r2Start = MAX_NSAMP; /* short blocks don't have region 2 */
} else {
r1Start = fh->sfBand->l[sis->region0Count + 1];
r2Start = fh->sfBand->l[sis->region0Count + 1 + sis->region1Count + 1];
}
/* offset rEnd index by 1 so first region = rEnd[1] - rEnd[0], etc. */
rEnd[3] = MIN(MAX_NSAMP, 2 * sis->nBigvals);
rEnd[2] = MIN(r2Start, rEnd[3]);
rEnd[1] = MIN(r1Start, rEnd[3]);
rEnd[0] = 0;
/* rounds up to first all-zero pair (we don't check last pair for (x,y) == (non-zero, zero)) */
hi->nonZeroBound[ch] = rEnd[3];
/* decode Huffman pairs (rEnd[i] are always even numbers) */
bitsLeft = huffBlockBits;
for (i = 0; i < 3; i++) {
bitsUsed = DecodeHuffmanPairs(hi->huffDecBuf[ch] + rEnd[i], rEnd[i+1] - rEnd[i], sis->tableSelect[i], bitsLeft, buf, *bitOffset);
if (bitsUsed < 0 || bitsUsed > bitsLeft) /* error - overran end of bitstream */
return -1;
/* update bitstream position */
buf += (bitsUsed + *bitOffset) >> 3;
*bitOffset = (bitsUsed + *bitOffset) & 0x07;
bitsLeft -= bitsUsed;
}
/* decode Huffman quads (if any) */
hi->nonZeroBound[ch] += DecodeHuffmanQuads(hi->huffDecBuf[ch] + rEnd[3], MAX_NSAMP - rEnd[3], sis->count1TableSelect, bitsLeft, buf, *bitOffset);
ASSERT(hi->nonZeroBound[ch] <= MAX_NSAMP);
for (i = hi->nonZeroBound[ch]; i < MAX_NSAMP; i++)
hi->huffDecBuf[ch][i] = 0;
/* If bits used for 576 samples < huffBlockBits, then the extras are considered
* to be stuffing bits (throw away, but need to return correct bitstream position)
*/
buf += (bitsLeft + *bitOffset) >> 3;
*bitOffset = (bitsLeft + *bitOffset) & 0x07;
return (buf - startBuf);
}

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* hufftabs.c - compressed Huffman code tables
**************************************************************************************/
#include "coder.h"
/* NOTE - regenerated tables to use shorts instead of ints
* (all needed data can fit in 16 bits - see below)
*
* format 0xABCD
* A = length of codeword
* B = y value
* C = x value
* D = number of sign bits (0, 1, or 2)
*
* to read a CW, the code reads maxbits from the stream (dep. on
* table index), but doesn't remove them from the bitstream reader
* then it gets the correct CW by direct lookup into the table
* of length (2^maxbits) (more complicated for non-oneShot...)
* for CW's with hlen < maxbits, there are multiple entries in the
* table (extra bits are don't cares)
* the bitstream reader then "purges" (or removes) only the correct
* number of bits for the chosen CW
*
* entries starting with F are special: D (signbits) is maxbits,
* so the decoder always checks huffTableXX[0] first, gets the
* signbits, and reads that many bits from the bitstream
* (sometimes it takes > 1 read to get the value, so maxbits is
* can get updated by jumping to another value starting with 0xF)
* entries starting with 0 are also special: A = hlen = 0, rest of
* value is an offset to jump higher in the table (for tables of
* type loopNoLinbits or loopLinbits)
*/
/* store Huffman codes as one big table plus table of offsets, since some platforms
* don't properly support table-of-tables (table of pointers to other const tables)
*/
const unsigned short huffTable[] = {
/* huffTable01[9] */
0xf003, 0x3112, 0x3101, 0x2011, 0x2011, 0x1000, 0x1000, 0x1000,
0x1000,
/* huffTable02[65] */
0xf006, 0x6222, 0x6201, 0x5212, 0x5212, 0x5122, 0x5122, 0x5021,
0x5021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000,
/* huffTable03[65] */
0xf006, 0x6222, 0x6201, 0x5212, 0x5212, 0x5122, 0x5122, 0x5021,
0x5021, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101,
0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101,
0x2101, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000,
/* huffTable05[257] */
0xf008, 0x8332, 0x8322, 0x7232, 0x7232, 0x6132, 0x6132, 0x6132,
0x6132, 0x7312, 0x7312, 0x7301, 0x7301, 0x7031, 0x7031, 0x7222,
0x7222, 0x6212, 0x6212, 0x6212, 0x6212, 0x6122, 0x6122, 0x6122,
0x6122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021,
0x6021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000,
/* huffTable06[129] */
0xf007, 0x7332, 0x7301, 0x6322, 0x6322, 0x6232, 0x6232, 0x6031,
0x6031, 0x5312, 0x5312, 0x5312, 0x5312, 0x5132, 0x5132, 0x5132,
0x5132, 0x5222, 0x5222, 0x5222, 0x5222, 0x5201, 0x5201, 0x5201,
0x5201, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212,
0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122,
0x4122, 0x4021, 0x4021, 0x4021, 0x4021, 0x4021, 0x4021, 0x4021,
0x4021, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000,
0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000,
0x3000,
/* huffTable07[110] */
0xf006, 0x0041, 0x0052, 0x005b, 0x0060, 0x0063, 0x0068, 0x006b,
0x6212, 0x5122, 0x5122, 0x6201, 0x6021, 0x4112, 0x4112, 0x4112,
0x4112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0xf004, 0x4552, 0x4542, 0x4452, 0x4352, 0x3532, 0x3532,
0x3442, 0x3442, 0x3522, 0x3522, 0x3252, 0x3252, 0x2512, 0x2512,
0x2512, 0x2512, 0xf003, 0x2152, 0x2152, 0x3501, 0x3432, 0x2051,
0x2051, 0x3342, 0x3332, 0xf002, 0x2422, 0x2242, 0x1412, 0x1412,
0xf001, 0x1142, 0x1041, 0xf002, 0x2401, 0x2322, 0x2232, 0x2301,
0xf001, 0x1312, 0x1132, 0xf001, 0x1031, 0x1222,
/* huffTable08[280] */
0xf008, 0x0101, 0x010a, 0x010f, 0x8512, 0x8152, 0x0112, 0x0115,
0x8422, 0x8242, 0x8412, 0x7142, 0x7142, 0x8401, 0x8041, 0x8322,
0x8232, 0x8312, 0x8132, 0x8301, 0x8031, 0x6222, 0x6222, 0x6222,
0x6222, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021,
0x6021, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212,
0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212,
0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122,
0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122,
0x4122, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0xf003, 0x3552, 0x3452, 0x2542, 0x2542, 0x1352, 0x1352,
0x1352, 0x1352, 0xf002, 0x2532, 0x2442, 0x1522, 0x1522, 0xf001,
0x1252, 0x1501, 0xf001, 0x1432, 0x1342, 0xf001, 0x1051, 0x1332,
/* huffTable09[93] */
0xf006, 0x0041, 0x004a, 0x004f, 0x0052, 0x0057, 0x005a, 0x6412,
0x6142, 0x6322, 0x6232, 0x5312, 0x5312, 0x5132, 0x5132, 0x6301,
0x6031, 0x5222, 0x5222, 0x5201, 0x5201, 0x4212, 0x4212, 0x4212,
0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4021, 0x4021, 0x4021,
0x4021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000,
0x3000, 0xf003, 0x3552, 0x3542, 0x2532, 0x2532, 0x2352, 0x2352,
0x3452, 0x3501, 0xf002, 0x2442, 0x2522, 0x2252, 0x2512, 0xf001,
0x1152, 0x1432, 0xf002, 0x1342, 0x1342, 0x2051, 0x2401, 0xf001,
0x1422, 0x1242, 0xf001, 0x1332, 0x1041,
/* huffTable10[320] */
0xf008, 0x0101, 0x010a, 0x010f, 0x0118, 0x011b, 0x0120, 0x0125,
0x8712, 0x8172, 0x012a, 0x012d, 0x0132, 0x8612, 0x8162, 0x8061,
0x0137, 0x013a, 0x013d, 0x8412, 0x8142, 0x8041, 0x8322, 0x8232,
0x8301, 0x7312, 0x7312, 0x7132, 0x7132, 0x7031, 0x7031, 0x7222,
0x7222, 0x6212, 0x6212, 0x6212, 0x6212, 0x6122, 0x6122, 0x6122,
0x6122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021,
0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0xf003, 0x3772, 0x3762, 0x3672, 0x3752, 0x3572, 0x3662,
0x2742, 0x2742, 0xf002, 0x2472, 0x2652, 0x2562, 0x2732, 0xf003,
0x2372, 0x2372, 0x2642, 0x2642, 0x3552, 0x3452, 0x2362, 0x2362,
0xf001, 0x1722, 0x1272, 0xf002, 0x2462, 0x2701, 0x1071, 0x1071,
0xf002, 0x1262, 0x1262, 0x2542, 0x2532, 0xf002, 0x1601, 0x1601,
0x2352, 0x2442, 0xf001, 0x1632, 0x1622, 0xf002, 0x2522, 0x2252,
0x1512, 0x1512, 0xf002, 0x1152, 0x1152, 0x2432, 0x2342, 0xf001,
0x1501, 0x1051, 0xf001, 0x1422, 0x1242, 0xf001, 0x1332, 0x1401,
/* huffTable11[296] */
0xf008, 0x0101, 0x0106, 0x010f, 0x0114, 0x0117, 0x8722, 0x8272,
0x011c, 0x7172, 0x7172, 0x8712, 0x8071, 0x8632, 0x8362, 0x8061,
0x011f, 0x0122, 0x8512, 0x7262, 0x7262, 0x8622, 0x8601, 0x7612,
0x7612, 0x7162, 0x7162, 0x8152, 0x8432, 0x8051, 0x0125, 0x8422,
0x8242, 0x8412, 0x8142, 0x8401, 0x8041, 0x7322, 0x7322, 0x7232,
0x7232, 0x6312, 0x6312, 0x6312, 0x6312, 0x6132, 0x6132, 0x6132,
0x6132, 0x7301, 0x7301, 0x7031, 0x7031, 0x6222, 0x6222, 0x6222,
0x6222, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122,
0x5122, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212,
0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212,
0x4212, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201,
0x5201, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021,
0x5021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0xf002, 0x2772, 0x2762, 0x2672, 0x2572, 0xf003, 0x2662,
0x2662, 0x2742, 0x2742, 0x2472, 0x2472, 0x3752, 0x3552, 0xf002,
0x2652, 0x2562, 0x1732, 0x1732, 0xf001, 0x1372, 0x1642, 0xf002,
0x2542, 0x2452, 0x2532, 0x2352, 0xf001, 0x1462, 0x1701, 0xf001,
0x1442, 0x1522, 0xf001, 0x1252, 0x1501, 0xf001, 0x1342, 0x1332,
/* huffTable12[185] */
0xf007, 0x0081, 0x008a, 0x008f, 0x0092, 0x0097, 0x009a, 0x009d,
0x00a2, 0x00a5, 0x00a8, 0x7622, 0x7262, 0x7162, 0x00ad, 0x00b0,
0x00b3, 0x7512, 0x7152, 0x7432, 0x7342, 0x00b6, 0x7422, 0x7242,
0x7412, 0x6332, 0x6332, 0x6142, 0x6142, 0x6322, 0x6322, 0x6232,
0x6232, 0x7041, 0x7301, 0x6031, 0x6031, 0x5312, 0x5312, 0x5312,
0x5312, 0x5132, 0x5132, 0x5132, 0x5132, 0x5222, 0x5222, 0x5222,
0x5222, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212,
0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122,
0x4122, 0x5201, 0x5201, 0x5201, 0x5201, 0x5021, 0x5021, 0x5021,
0x5021, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000,
0x4000, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0xf003, 0x3772, 0x3762, 0x2672, 0x2672, 0x2752, 0x2752,
0x2572, 0x2572, 0xf002, 0x2662, 0x2742, 0x2472, 0x2562, 0xf001,
0x1652, 0x1732, 0xf002, 0x2372, 0x2552, 0x1722, 0x1722, 0xf001,
0x1272, 0x1642, 0xf001, 0x1462, 0x1712, 0xf002, 0x1172, 0x1172,
0x2701, 0x2071, 0xf001, 0x1632, 0x1362, 0xf001, 0x1542, 0x1452,
0xf002, 0x1442, 0x1442, 0x2601, 0x2501, 0xf001, 0x1612, 0x1061,
0xf001, 0x1532, 0x1352, 0xf001, 0x1522, 0x1252, 0xf001, 0x1051,
0x1401,
/* huffTable13[497] */
0xf006, 0x0041, 0x0082, 0x00c3, 0x00e4, 0x0105, 0x0116, 0x011f,
0x0130, 0x0139, 0x013e, 0x0143, 0x0146, 0x6212, 0x6122, 0x6201,
0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4101, 0x4101, 0x4101,
0x4101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0xf006, 0x0108, 0x0111, 0x011a, 0x0123, 0x012c, 0x0131,
0x0136, 0x013f, 0x0144, 0x0147, 0x014c, 0x0151, 0x0156, 0x015b,
0x6f12, 0x61f2, 0x60f1, 0x0160, 0x0163, 0x0166, 0x62e2, 0x0169,
0x6e12, 0x61e2, 0x016c, 0x016f, 0x0172, 0x0175, 0x0178, 0x017b,
0x66c2, 0x6d32, 0x017e, 0x6d22, 0x62d2, 0x6d12, 0x67b2, 0x0181,
0x0184, 0x63c2, 0x0187, 0x6b42, 0x51d2, 0x51d2, 0x6d01, 0x60d1,
0x6a82, 0x68a2, 0x6c42, 0x64c2, 0x6b62, 0x66b2, 0x5c32, 0x5c32,
0x5c22, 0x5c22, 0x52c2, 0x52c2, 0x5b52, 0x5b52, 0x65b2, 0x6982,
0x5c12, 0x5c12, 0xf006, 0x51c2, 0x51c2, 0x6892, 0x6c01, 0x50c1,
0x50c1, 0x64b2, 0x6a62, 0x66a2, 0x6972, 0x5b32, 0x5b32, 0x53b2,
0x53b2, 0x6882, 0x6a52, 0x5b22, 0x5b22, 0x65a2, 0x6962, 0x54a2,
0x54a2, 0x6872, 0x6782, 0x5492, 0x5492, 0x6772, 0x6672, 0x42b2,
0x42b2, 0x42b2, 0x42b2, 0x4b12, 0x4b12, 0x4b12, 0x4b12, 0x41b2,
0x41b2, 0x41b2, 0x41b2, 0x5b01, 0x5b01, 0x50b1, 0x50b1, 0x5692,
0x5692, 0x5a42, 0x5a42, 0x5a32, 0x5a32, 0x53a2, 0x53a2, 0x5952,
0x5952, 0x5592, 0x5592, 0x4a22, 0x4a22, 0x4a22, 0x4a22, 0x42a2,
0x42a2, 0x42a2, 0x42a2, 0xf005, 0x4a12, 0x4a12, 0x41a2, 0x41a2,
0x5a01, 0x5862, 0x40a1, 0x40a1, 0x5682, 0x5942, 0x4392, 0x4392,
0x5932, 0x5852, 0x5582, 0x5762, 0x4922, 0x4922, 0x4292, 0x4292,
0x5752, 0x5572, 0x4832, 0x4832, 0x4382, 0x4382, 0x5662, 0x5742,
0x5472, 0x5652, 0x5562, 0x5372, 0xf005, 0x3912, 0x3912, 0x3912,
0x3912, 0x3192, 0x3192, 0x3192, 0x3192, 0x4901, 0x4901, 0x4091,
0x4091, 0x4842, 0x4842, 0x4482, 0x4482, 0x4272, 0x4272, 0x5642,
0x5462, 0x3822, 0x3822, 0x3822, 0x3822, 0x3282, 0x3282, 0x3282,
0x3282, 0x3812, 0x3812, 0x3812, 0x3812, 0xf004, 0x4732, 0x4722,
0x3712, 0x3712, 0x3172, 0x3172, 0x4552, 0x4701, 0x4071, 0x4632,
0x4362, 0x4542, 0x4452, 0x4622, 0x4262, 0x4532, 0xf003, 0x2182,
0x2182, 0x3801, 0x3081, 0x3612, 0x3162, 0x3601, 0x3061, 0xf004,
0x4352, 0x4442, 0x3522, 0x3522, 0x3252, 0x3252, 0x3501, 0x3501,
0x2512, 0x2512, 0x2512, 0x2512, 0x2152, 0x2152, 0x2152, 0x2152,
0xf003, 0x3432, 0x3342, 0x3051, 0x3422, 0x3242, 0x3332, 0x2412,
0x2412, 0xf002, 0x1142, 0x1142, 0x2401, 0x2041, 0xf002, 0x2322,
0x2232, 0x1312, 0x1312, 0xf001, 0x1132, 0x1301, 0xf001, 0x1031,
0x1222, 0xf003, 0x0082, 0x008b, 0x008e, 0x0091, 0x0094, 0x0097,
0x3ce2, 0x3dd2, 0xf003, 0x0093, 0x3eb2, 0x3be2, 0x3f92, 0x39f2,
0x3ae2, 0x3db2, 0x3bd2, 0xf003, 0x3f82, 0x38f2, 0x3cc2, 0x008d,
0x3e82, 0x0090, 0x27f2, 0x27f2, 0xf003, 0x2ad2, 0x2ad2, 0x3da2,
0x3cb2, 0x3bc2, 0x36f2, 0x2f62, 0x2f62, 0xf002, 0x28e2, 0x2f52,
0x2d92, 0x29d2, 0xf002, 0x25f2, 0x27e2, 0x2ca2, 0x2bb2, 0xf003,
0x2f42, 0x2f42, 0x24f2, 0x24f2, 0x3ac2, 0x36e2, 0x23f2, 0x23f2,
0xf002, 0x1f32, 0x1f32, 0x2d82, 0x28d2, 0xf001, 0x1f22, 0x12f2,
0xf002, 0x2e62, 0x2c92, 0x1f01, 0x1f01, 0xf002, 0x29c2, 0x2e52,
0x1ba2, 0x1ba2, 0xf002, 0x2d72, 0x27d2, 0x1e42, 0x1e42, 0xf002,
0x28c2, 0x26d2, 0x1e32, 0x1e32, 0xf002, 0x19b2, 0x19b2, 0x2b92,
0x2aa2, 0xf001, 0x1ab2, 0x15e2, 0xf001, 0x14e2, 0x1c82, 0xf001,
0x1d62, 0x13e2, 0xf001, 0x1e22, 0x1e01, 0xf001, 0x10e1, 0x1d52,
0xf001, 0x15d2, 0x1c72, 0xf001, 0x17c2, 0x1d42, 0xf001, 0x1b82,
0x18b2, 0xf001, 0x14d2, 0x1a92, 0xf001, 0x19a2, 0x1c62, 0xf001,
0x13d2, 0x1b72, 0xf001, 0x1c52, 0x15c2, 0xf001, 0x1992, 0x1a72,
0xf001, 0x17a2, 0x1792, 0xf003, 0x0023, 0x3df2, 0x2de2, 0x2de2,
0x1ff2, 0x1ff2, 0x1ff2, 0x1ff2, 0xf001, 0x1fe2, 0x1fd2, 0xf001,
0x1ee2, 0x1fc2, 0xf001, 0x1ed2, 0x1fb2, 0xf001, 0x1bf2, 0x1ec2,
0xf002, 0x1cd2, 0x1cd2, 0x2fa2, 0x29e2, 0xf001, 0x1af2, 0x1dc2,
0xf001, 0x1ea2, 0x1e92, 0xf001, 0x1f72, 0x1e72, 0xf001, 0x1ef2,
0x1cf2,
/* huffTable15[580] */
0xf008, 0x0101, 0x0122, 0x0143, 0x0154, 0x0165, 0x0176, 0x017f,
0x0188, 0x0199, 0x01a2, 0x01ab, 0x01b4, 0x01bd, 0x01c2, 0x01cb,
0x01d4, 0x01d9, 0x01de, 0x01e3, 0x01e8, 0x01ed, 0x01f2, 0x01f7,
0x01fc, 0x0201, 0x0204, 0x0207, 0x020a, 0x020f, 0x0212, 0x0215,
0x021a, 0x021d, 0x0220, 0x8192, 0x0223, 0x0226, 0x0229, 0x022c,
0x022f, 0x8822, 0x8282, 0x8812, 0x8182, 0x0232, 0x0235, 0x0238,
0x023b, 0x8722, 0x8272, 0x8462, 0x8712, 0x8552, 0x8172, 0x023e,
0x8632, 0x8362, 0x8542, 0x8452, 0x8622, 0x8262, 0x8612, 0x0241,
0x8532, 0x7162, 0x7162, 0x8352, 0x8442, 0x7522, 0x7522, 0x7252,
0x7252, 0x7512, 0x7512, 0x7152, 0x7152, 0x8501, 0x8051, 0x7432,
0x7432, 0x7342, 0x7342, 0x7422, 0x7422, 0x7242, 0x7242, 0x7332,
0x7332, 0x6142, 0x6142, 0x6142, 0x6142, 0x7412, 0x7412, 0x7401,
0x7401, 0x6322, 0x6322, 0x6322, 0x6322, 0x6232, 0x6232, 0x6232,
0x6232, 0x7041, 0x7041, 0x7301, 0x7301, 0x6312, 0x6312, 0x6312,
0x6312, 0x6132, 0x6132, 0x6132, 0x6132, 0x6031, 0x6031, 0x6031,
0x6031, 0x5222, 0x5222, 0x5222, 0x5222, 0x5222, 0x5222, 0x5222,
0x5222, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212,
0x5212, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122,
0x5122, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201,
0x5201, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021,
0x5021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011,
0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011,
0x4011, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000,
0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000,
0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000,
0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000,
0x3000, 0xf005, 0x5ff2, 0x5fe2, 0x5ef2, 0x5fd2, 0x4ee2, 0x4ee2,
0x5df2, 0x5fc2, 0x5cf2, 0x5ed2, 0x5de2, 0x5fb2, 0x4bf2, 0x4bf2,
0x5ec2, 0x5ce2, 0x4dd2, 0x4dd2, 0x4fa2, 0x4fa2, 0x4af2, 0x4af2,
0x4eb2, 0x4eb2, 0x4be2, 0x4be2, 0x4dc2, 0x4dc2, 0x4cd2, 0x4cd2,
0x4f92, 0x4f92, 0xf005, 0x49f2, 0x49f2, 0x4ae2, 0x4ae2, 0x4db2,
0x4db2, 0x4bd2, 0x4bd2, 0x4f82, 0x4f82, 0x48f2, 0x48f2, 0x4cc2,
0x4cc2, 0x4e92, 0x4e92, 0x49e2, 0x49e2, 0x4f72, 0x4f72, 0x47f2,
0x47f2, 0x4da2, 0x4da2, 0x4ad2, 0x4ad2, 0x4cb2, 0x4cb2, 0x4f62,
0x4f62, 0x5ea2, 0x5f01, 0xf004, 0x3bc2, 0x3bc2, 0x36f2, 0x36f2,
0x4e82, 0x48e2, 0x4f52, 0x4d92, 0x35f2, 0x35f2, 0x3e72, 0x3e72,
0x37e2, 0x37e2, 0x3ca2, 0x3ca2, 0xf004, 0x3ac2, 0x3ac2, 0x3bb2,
0x3bb2, 0x49d2, 0x4d82, 0x3f42, 0x3f42, 0x34f2, 0x34f2, 0x3f32,
0x3f32, 0x33f2, 0x33f2, 0x38d2, 0x38d2, 0xf004, 0x36e2, 0x36e2,
0x3f22, 0x3f22, 0x32f2, 0x32f2, 0x4e62, 0x40f1, 0x3f12, 0x3f12,
0x31f2, 0x31f2, 0x3c92, 0x3c92, 0x39c2, 0x39c2, 0xf003, 0x3e52,
0x3ba2, 0x3ab2, 0x35e2, 0x3d72, 0x37d2, 0x3e42, 0x34e2, 0xf003,
0x3c82, 0x38c2, 0x3e32, 0x3d62, 0x36d2, 0x33e2, 0x3b92, 0x39b2,
0xf004, 0x3e22, 0x3e22, 0x3aa2, 0x3aa2, 0x32e2, 0x32e2, 0x3e12,
0x3e12, 0x31e2, 0x31e2, 0x4e01, 0x40e1, 0x3d52, 0x3d52, 0x35d2,
0x35d2, 0xf003, 0x3c72, 0x37c2, 0x3d42, 0x3b82, 0x24d2, 0x24d2,
0x38b2, 0x3a92, 0xf003, 0x39a2, 0x3c62, 0x36c2, 0x3d32, 0x23d2,
0x23d2, 0x22d2, 0x22d2, 0xf003, 0x3d22, 0x3d01, 0x2d12, 0x2d12,
0x2b72, 0x2b72, 0x27b2, 0x27b2, 0xf003, 0x21d2, 0x21d2, 0x3c52,
0x30d1, 0x25c2, 0x25c2, 0x2a82, 0x2a82, 0xf002, 0x28a2, 0x2c42,
0x24c2, 0x2b62, 0xf003, 0x26b2, 0x26b2, 0x3992, 0x3c01, 0x2c32,
0x2c32, 0x23c2, 0x23c2, 0xf003, 0x2a72, 0x2a72, 0x27a2, 0x27a2,
0x26a2, 0x26a2, 0x30c1, 0x3b01, 0xf002, 0x12c2, 0x12c2, 0x2c22,
0x2b52, 0xf002, 0x25b2, 0x2c12, 0x2982, 0x2892, 0xf002, 0x21c2,
0x2b42, 0x24b2, 0x2a62, 0xf002, 0x2b32, 0x2972, 0x13b2, 0x13b2,
0xf002, 0x2792, 0x2882, 0x2b22, 0x2a52, 0xf002, 0x12b2, 0x12b2,
0x25a2, 0x2b12, 0xf002, 0x11b2, 0x11b2, 0x20b1, 0x2962, 0xf002,
0x2692, 0x2a42, 0x24a2, 0x2872, 0xf002, 0x2782, 0x2a32, 0x13a2,
0x13a2, 0xf001, 0x1952, 0x1592, 0xf001, 0x1a22, 0x12a2, 0xf001,
0x1a12, 0x11a2, 0xf002, 0x2a01, 0x20a1, 0x1862, 0x1862, 0xf001,
0x1682, 0x1942, 0xf001, 0x1492, 0x1932, 0xf002, 0x1392, 0x1392,
0x2772, 0x2901, 0xf001, 0x1852, 0x1582, 0xf001, 0x1922, 0x1762,
0xf001, 0x1672, 0x1292, 0xf001, 0x1912, 0x1091, 0xf001, 0x1842,
0x1482, 0xf001, 0x1752, 0x1572, 0xf001, 0x1832, 0x1382, 0xf001,
0x1662, 0x1742, 0xf001, 0x1472, 0x1801, 0xf001, 0x1081, 0x1652,
0xf001, 0x1562, 0x1732, 0xf001, 0x1372, 0x1642, 0xf001, 0x1701,
0x1071, 0xf001, 0x1601, 0x1061,
/* huffTable16[651] */
0xf008, 0x0101, 0x010a, 0x0113, 0x8ff2, 0x0118, 0x011d, 0x0120,
0x82f2, 0x0131, 0x8f12, 0x81f2, 0x0134, 0x0145, 0x0156, 0x0167,
0x0178, 0x0189, 0x019a, 0x01a3, 0x01ac, 0x01b5, 0x01be, 0x01c7,
0x01d0, 0x01d9, 0x01de, 0x01e3, 0x01e6, 0x01eb, 0x01f0, 0x8152,
0x01f3, 0x01f6, 0x01f9, 0x01fc, 0x8412, 0x8142, 0x01ff, 0x8322,
0x8232, 0x7312, 0x7312, 0x7132, 0x7132, 0x8301, 0x8031, 0x7222,
0x7222, 0x6212, 0x6212, 0x6212, 0x6212, 0x6122, 0x6122, 0x6122,
0x6122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021,
0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0xf003, 0x3fe2, 0x3ef2, 0x3fd2, 0x3df2, 0x3fc2, 0x3cf2,
0x3fb2, 0x3bf2, 0xf003, 0x2fa2, 0x2fa2, 0x3af2, 0x3f92, 0x39f2,
0x38f2, 0x2f82, 0x2f82, 0xf002, 0x2f72, 0x27f2, 0x2f62, 0x26f2,
0xf002, 0x2f52, 0x25f2, 0x1f42, 0x1f42, 0xf001, 0x14f2, 0x13f2,
0xf004, 0x10f1, 0x10f1, 0x10f1, 0x10f1, 0x10f1, 0x10f1, 0x10f1,
0x10f1, 0x2f32, 0x2f32, 0x2f32, 0x2f32, 0x00e2, 0x00f3, 0x00fc,
0x0105, 0xf001, 0x1f22, 0x1f01, 0xf004, 0x00fa, 0x00ff, 0x0104,
0x0109, 0x010c, 0x0111, 0x0116, 0x0119, 0x011e, 0x0123, 0x0128,
0x43e2, 0x012d, 0x0130, 0x0133, 0x0136, 0xf004, 0x0128, 0x012b,
0x012e, 0x4d01, 0x0131, 0x0134, 0x0137, 0x4c32, 0x013a, 0x4c12,
0x40c1, 0x013d, 0x32e2, 0x32e2, 0x4e22, 0x4e12, 0xf004, 0x43d2,
0x4d22, 0x42d2, 0x41d2, 0x4b32, 0x012f, 0x3d12, 0x3d12, 0x44c2,
0x4b62, 0x43c2, 0x47a2, 0x3c22, 0x3c22, 0x42c2, 0x45b2, 0xf004,
0x41c2, 0x4c01, 0x4b42, 0x44b2, 0x4a62, 0x46a2, 0x33b2, 0x33b2,
0x4a52, 0x45a2, 0x3b22, 0x3b22, 0x32b2, 0x32b2, 0x3b12, 0x3b12,
0xf004, 0x31b2, 0x31b2, 0x4b01, 0x40b1, 0x4962, 0x4692, 0x4a42,
0x44a2, 0x4872, 0x4782, 0x33a2, 0x33a2, 0x4a32, 0x4952, 0x3a22,
0x3a22, 0xf004, 0x4592, 0x4862, 0x31a2, 0x31a2, 0x4682, 0x4772,
0x3492, 0x3492, 0x4942, 0x4752, 0x3762, 0x3762, 0x22a2, 0x22a2,
0x22a2, 0x22a2, 0xf003, 0x2a12, 0x2a12, 0x3a01, 0x30a1, 0x3932,
0x3392, 0x3852, 0x3582, 0xf003, 0x2922, 0x2922, 0x2292, 0x2292,
0x3672, 0x3901, 0x2912, 0x2912, 0xf003, 0x2192, 0x2192, 0x3091,
0x3842, 0x3482, 0x3572, 0x3832, 0x3382, 0xf003, 0x3662, 0x3822,
0x2282, 0x2282, 0x3742, 0x3472, 0x2812, 0x2812, 0xf003, 0x2182,
0x2182, 0x2081, 0x2081, 0x3801, 0x3652, 0x2732, 0x2732, 0xf003,
0x2372, 0x2372, 0x3562, 0x3642, 0x2722, 0x2722, 0x2272, 0x2272,
0xf003, 0x3462, 0x3552, 0x2701, 0x2701, 0x1712, 0x1712, 0x1712,
0x1712, 0xf002, 0x1172, 0x1172, 0x2071, 0x2632, 0xf002, 0x2362,
0x2542, 0x2452, 0x2622, 0xf001, 0x1262, 0x1612, 0xf002, 0x1162,
0x1162, 0x2601, 0x2061, 0xf002, 0x1352, 0x1352, 0x2532, 0x2442,
0xf001, 0x1522, 0x1252, 0xf001, 0x1512, 0x1501, 0xf001, 0x1432,
0x1342, 0xf001, 0x1051, 0x1422, 0xf001, 0x1242, 0x1332, 0xf001,
0x1401, 0x1041, 0xf004, 0x4ec2, 0x0086, 0x3ed2, 0x3ed2, 0x39e2,
0x39e2, 0x4ae2, 0x49d2, 0x2ee2, 0x2ee2, 0x2ee2, 0x2ee2, 0x3de2,
0x3de2, 0x3be2, 0x3be2, 0xf003, 0x2eb2, 0x2eb2, 0x2dc2, 0x2dc2,
0x3cd2, 0x3bd2, 0x2ea2, 0x2ea2, 0xf003, 0x2cc2, 0x2cc2, 0x3da2,
0x3ad2, 0x3e72, 0x3ca2, 0x2ac2, 0x2ac2, 0xf003, 0x39c2, 0x3d72,
0x2e52, 0x2e52, 0x1db2, 0x1db2, 0x1db2, 0x1db2, 0xf002, 0x1e92,
0x1e92, 0x2cb2, 0x2bc2, 0xf002, 0x2e82, 0x28e2, 0x2d92, 0x27e2,
0xf002, 0x2bb2, 0x2d82, 0x28d2, 0x2e62, 0xf001, 0x16e2, 0x1c92,
0xf002, 0x2ba2, 0x2ab2, 0x25e2, 0x27d2, 0xf002, 0x1e42, 0x1e42,
0x24e2, 0x2c82, 0xf001, 0x18c2, 0x1e32, 0xf002, 0x1d62, 0x1d62,
0x26d2, 0x2b92, 0xf002, 0x29b2, 0x2aa2, 0x11e2, 0x11e2, 0xf002,
0x14d2, 0x14d2, 0x28b2, 0x29a2, 0xf002, 0x1b72, 0x1b72, 0x27b2,
0x20d1, 0xf001, 0x1e01, 0x10e1, 0xf001, 0x1d52, 0x15d2, 0xf001,
0x1c72, 0x17c2, 0xf001, 0x1d42, 0x1b82, 0xf001, 0x1a92, 0x1c62,
0xf001, 0x16c2, 0x1d32, 0xf001, 0x1c52, 0x15c2, 0xf001, 0x1a82,
0x18a2, 0xf001, 0x1992, 0x1c42, 0xf001, 0x16b2, 0x1a72, 0xf001,
0x1b52, 0x1982, 0xf001, 0x1892, 0x1972, 0xf001, 0x1792, 0x1882,
0xf001, 0x1ce2, 0x1dd2,
/* huffTable24[705] */
0xf009, 0x8fe2, 0x8fe2, 0x8ef2, 0x8ef2, 0x8fd2, 0x8fd2, 0x8df2,
0x8df2, 0x8fc2, 0x8fc2, 0x8cf2, 0x8cf2, 0x8fb2, 0x8fb2, 0x8bf2,
0x8bf2, 0x7af2, 0x7af2, 0x7af2, 0x7af2, 0x8fa2, 0x8fa2, 0x8f92,
0x8f92, 0x79f2, 0x79f2, 0x79f2, 0x79f2, 0x78f2, 0x78f2, 0x78f2,
0x78f2, 0x8f82, 0x8f82, 0x8f72, 0x8f72, 0x77f2, 0x77f2, 0x77f2,
0x77f2, 0x7f62, 0x7f62, 0x7f62, 0x7f62, 0x76f2, 0x76f2, 0x76f2,
0x76f2, 0x7f52, 0x7f52, 0x7f52, 0x7f52, 0x75f2, 0x75f2, 0x75f2,
0x75f2, 0x7f42, 0x7f42, 0x7f42, 0x7f42, 0x74f2, 0x74f2, 0x74f2,
0x74f2, 0x7f32, 0x7f32, 0x7f32, 0x7f32, 0x73f2, 0x73f2, 0x73f2,
0x73f2, 0x7f22, 0x7f22, 0x7f22, 0x7f22, 0x72f2, 0x72f2, 0x72f2,
0x72f2, 0x71f2, 0x71f2, 0x71f2, 0x71f2, 0x8f12, 0x8f12, 0x80f1,
0x80f1, 0x9f01, 0x0201, 0x0206, 0x020b, 0x0210, 0x0215, 0x021a,
0x021f, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2,
0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2,
0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2,
0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2,
0x4ff2, 0x0224, 0x0229, 0x0232, 0x0237, 0x023a, 0x023f, 0x0242,
0x0245, 0x024a, 0x024d, 0x0250, 0x0253, 0x0256, 0x0259, 0x025c,
0x025f, 0x0262, 0x0265, 0x0268, 0x026b, 0x026e, 0x0271, 0x0274,
0x0277, 0x027a, 0x027d, 0x0280, 0x0283, 0x0288, 0x028b, 0x028e,
0x0291, 0x0294, 0x0297, 0x029a, 0x029f, 0x94b2, 0x02a4, 0x02a7,
0x02aa, 0x93b2, 0x9882, 0x02af, 0x92b2, 0x02b2, 0x02b5, 0x9692,
0x94a2, 0x02b8, 0x9782, 0x9a32, 0x93a2, 0x9952, 0x9592, 0x9a22,
0x92a2, 0x91a2, 0x9862, 0x9682, 0x9772, 0x9942, 0x9492, 0x9932,
0x9392, 0x9852, 0x9582, 0x9922, 0x9762, 0x9672, 0x9292, 0x9912,
0x9192, 0x9842, 0x9482, 0x9752, 0x9572, 0x9832, 0x9382, 0x9662,
0x9822, 0x9282, 0x9812, 0x9742, 0x9472, 0x9182, 0x02bb, 0x9652,
0x9562, 0x9712, 0x02be, 0x8372, 0x8372, 0x9732, 0x9722, 0x8272,
0x8272, 0x8642, 0x8642, 0x8462, 0x8462, 0x8552, 0x8552, 0x8172,
0x8172, 0x8632, 0x8632, 0x8362, 0x8362, 0x8542, 0x8542, 0x8452,
0x8452, 0x8622, 0x8622, 0x8262, 0x8262, 0x8612, 0x8612, 0x8162,
0x8162, 0x9601, 0x9061, 0x8532, 0x8532, 0x8352, 0x8352, 0x8442,
0x8442, 0x8522, 0x8522, 0x8252, 0x8252, 0x8512, 0x8512, 0x9501,
0x9051, 0x7152, 0x7152, 0x7152, 0x7152, 0x8432, 0x8432, 0x8342,
0x8342, 0x7422, 0x7422, 0x7422, 0x7422, 0x7242, 0x7242, 0x7242,
0x7242, 0x7332, 0x7332, 0x7332, 0x7332, 0x7412, 0x7412, 0x7412,
0x7412, 0x7142, 0x7142, 0x7142, 0x7142, 0x8401, 0x8401, 0x8041,
0x8041, 0x7322, 0x7322, 0x7322, 0x7322, 0x7232, 0x7232, 0x7232,
0x7232, 0x6312, 0x6312, 0x6312, 0x6312, 0x6312, 0x6312, 0x6312,
0x6312, 0x6132, 0x6132, 0x6132, 0x6132, 0x6132, 0x6132, 0x6132,
0x6132, 0x7301, 0x7301, 0x7301, 0x7301, 0x7031, 0x7031, 0x7031,
0x7031, 0x6222, 0x6222, 0x6222, 0x6222, 0x6222, 0x6222, 0x6222,
0x6222, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212,
0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212,
0x5212, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122,
0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122,
0x5122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6201, 0x6201, 0x6201,
0x6201, 0x6021, 0x6021, 0x6021, 0x6021, 0x6021, 0x6021, 0x6021,
0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011,
0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011,
0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011,
0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011,
0x4011, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000,
0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000,
0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000,
0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000,
0x4000, 0xf002, 0x2ee2, 0x2ed2, 0x2de2, 0x2ec2, 0xf002, 0x2ce2,
0x2dd2, 0x2eb2, 0x2be2, 0xf002, 0x2dc2, 0x2cd2, 0x2ea2, 0x2ae2,
0xf002, 0x2db2, 0x2bd2, 0x2cc2, 0x2e92, 0xf002, 0x29e2, 0x2da2,
0x2ad2, 0x2cb2, 0xf002, 0x2bc2, 0x2e82, 0x28e2, 0x2d92, 0xf002,
0x29d2, 0x2e72, 0x27e2, 0x2ca2, 0xf002, 0x2ac2, 0x2bb2, 0x2d82,
0x28d2, 0xf003, 0x3e01, 0x30e1, 0x2d01, 0x2d01, 0x16e2, 0x16e2,
0x16e2, 0x16e2, 0xf002, 0x2e62, 0x2c92, 0x19c2, 0x19c2, 0xf001,
0x1e52, 0x1ab2, 0xf002, 0x15e2, 0x15e2, 0x2ba2, 0x2d72, 0xf001,
0x17d2, 0x14e2, 0xf001, 0x1c82, 0x18c2, 0xf002, 0x2e42, 0x2e22,
0x1e32, 0x1e32, 0xf001, 0x1d62, 0x16d2, 0xf001, 0x13e2, 0x1b92,
0xf001, 0x19b2, 0x1aa2, 0xf001, 0x12e2, 0x1e12, 0xf001, 0x11e2,
0x1d52, 0xf001, 0x15d2, 0x1c72, 0xf001, 0x17c2, 0x1d42, 0xf001,
0x1b82, 0x18b2, 0xf001, 0x14d2, 0x1a92, 0xf001, 0x19a2, 0x1c62,
0xf001, 0x16c2, 0x1d32, 0xf001, 0x13d2, 0x1d22, 0xf001, 0x12d2,
0x1d12, 0xf001, 0x1b72, 0x17b2, 0xf001, 0x11d2, 0x1c52, 0xf001,
0x15c2, 0x1a82, 0xf001, 0x18a2, 0x1992, 0xf001, 0x1c42, 0x14c2,
0xf001, 0x1b62, 0x16b2, 0xf002, 0x20d1, 0x2c01, 0x1c32, 0x1c32,
0xf001, 0x13c2, 0x1a72, 0xf001, 0x17a2, 0x1c22, 0xf001, 0x12c2,
0x1b52, 0xf001, 0x15b2, 0x1c12, 0xf001, 0x1982, 0x1892, 0xf001,
0x11c2, 0x1b42, 0xf002, 0x20c1, 0x2b01, 0x1b32, 0x1b32, 0xf002,
0x20b1, 0x2a01, 0x1a12, 0x1a12, 0xf001, 0x1a62, 0x16a2, 0xf001,
0x1972, 0x1792, 0xf002, 0x20a1, 0x2901, 0x1091, 0x1091, 0xf001,
0x1b22, 0x1a52, 0xf001, 0x15a2, 0x1b12, 0xf001, 0x11b2, 0x1962,
0xf001, 0x1a42, 0x1872, 0xf001, 0x1801, 0x1081, 0xf001, 0x1701,
0x1071,
};
#define HUFF_OFFSET_01 0
#define HUFF_OFFSET_02 ( 9 + HUFF_OFFSET_01)
#define HUFF_OFFSET_03 ( 65 + HUFF_OFFSET_02)
#define HUFF_OFFSET_05 ( 65 + HUFF_OFFSET_03)
#define HUFF_OFFSET_06 (257 + HUFF_OFFSET_05)
#define HUFF_OFFSET_07 (129 + HUFF_OFFSET_06)
#define HUFF_OFFSET_08 (110 + HUFF_OFFSET_07)
#define HUFF_OFFSET_09 (280 + HUFF_OFFSET_08)
#define HUFF_OFFSET_10 ( 93 + HUFF_OFFSET_09)
#define HUFF_OFFSET_11 (320 + HUFF_OFFSET_10)
#define HUFF_OFFSET_12 (296 + HUFF_OFFSET_11)
#define HUFF_OFFSET_13 (185 + HUFF_OFFSET_12)
#define HUFF_OFFSET_15 (497 + HUFF_OFFSET_13)
#define HUFF_OFFSET_16 (580 + HUFF_OFFSET_15)
#define HUFF_OFFSET_24 (651 + HUFF_OFFSET_16)
const int huffTabOffset[HUFF_PAIRTABS] = {
0,
HUFF_OFFSET_01,
HUFF_OFFSET_02,
HUFF_OFFSET_03,
0,
HUFF_OFFSET_05,
HUFF_OFFSET_06,
HUFF_OFFSET_07,
HUFF_OFFSET_08,
HUFF_OFFSET_09,
HUFF_OFFSET_10,
HUFF_OFFSET_11,
HUFF_OFFSET_12,
HUFF_OFFSET_13,
0,
HUFF_OFFSET_15,
HUFF_OFFSET_16,
HUFF_OFFSET_16,
HUFF_OFFSET_16,
HUFF_OFFSET_16,
HUFF_OFFSET_16,
HUFF_OFFSET_16,
HUFF_OFFSET_16,
HUFF_OFFSET_16,
HUFF_OFFSET_24,
HUFF_OFFSET_24,
HUFF_OFFSET_24,
HUFF_OFFSET_24,
HUFF_OFFSET_24,
HUFF_OFFSET_24,
HUFF_OFFSET_24,
HUFF_OFFSET_24,
};
const HuffTabLookup huffTabLookup[HUFF_PAIRTABS] = {
{ 0, noBits },
{ 0, oneShot },
{ 0, oneShot },
{ 0, oneShot },
{ 0, invalidTab },
{ 0, oneShot },
{ 0, oneShot },
{ 0, loopNoLinbits },
{ 0, loopNoLinbits },
{ 0, loopNoLinbits },
{ 0, loopNoLinbits },
{ 0, loopNoLinbits },
{ 0, loopNoLinbits },
{ 0, loopNoLinbits },
{ 0, invalidTab },
{ 0, loopNoLinbits },
{ 1, loopLinbits },
{ 2, loopLinbits },
{ 3, loopLinbits },
{ 4, loopLinbits },
{ 6, loopLinbits },
{ 8, loopLinbits },
{ 10, loopLinbits },
{ 13, loopLinbits },
{ 4, loopLinbits },
{ 5, loopLinbits },
{ 6, loopLinbits },
{ 7, loopLinbits },
{ 8, loopLinbits },
{ 9, loopLinbits },
{ 11, loopLinbits },
{ 13, loopLinbits },
};
/* tables for quadruples
* format 0xAB
* A = length of codeword
* B = codeword
*/
const unsigned char quadTable[64+16] = {
/* table A */
0x6b, 0x6f, 0x6d, 0x6e, 0x67, 0x65, 0x59, 0x59,
0x56, 0x56, 0x53, 0x53, 0x5a, 0x5a, 0x5c, 0x5c,
0x42, 0x42, 0x42, 0x42, 0x41, 0x41, 0x41, 0x41,
0x44, 0x44, 0x44, 0x44, 0x48, 0x48, 0x48, 0x48,
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
/* table B */
0x4f, 0x4e, 0x4d, 0x4c, 0x4b, 0x4a, 0x49, 0x48,
0x47, 0x46, 0x45, 0x44, 0x43, 0x42, 0x41, 0x40,
};
const int quadTabOffset[2] = {0, 64};
const int quadTabMaxBits[2] = {6, 4};

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* hufftabs.c - compressed Huffman code tables
**************************************************************************************/
#include "coder.h"
/* NOTE - regenerated tables to use shorts instead of ints
* (all needed data can fit in 16 bits - see below)
*
* format 0xABCD
* A = length of codeword
* B = y value
* C = x value
* D = number of sign bits (0, 1, or 2)
*
* to read a CW, the code reads maxbits from the stream (dep. on
* table index), but doesn't remove them from the bitstream reader
* then it gets the correct CW by direct lookup into the table
* of length (2^maxbits) (more complicated for non-oneShot...)
* for CW's with hlen < maxbits, there are multiple entries in the
* table (extra bits are don't cares)
* the bitstream reader then "purges" (or removes) only the correct
* number of bits for the chosen CW
*
* entries starting with F are special: D (signbits) is maxbits,
* so the decoder always checks huffTableXX[0] first, gets the
* signbits, and reads that many bits from the bitstream
* (sometimes it takes > 1 read to get the value, so maxbits is
* can get updated by jumping to another value starting with 0xF)
* entries starting with 0 are also special: A = hlen = 0, rest of
* value is an offset to jump higher in the table (for tables of
* type loopNoLinbits or loopLinbits)
*/
/* store Huffman codes as one big table plus table of offsets, since some platforms
* don't properly support table-of-tables (table of pointers to other const tables)
*/
const unsigned short huffTable[] = {
/* huffTable01[9] */
0xf003, 0x3112, 0x3101, 0x2011, 0x2011, 0x1000, 0x1000, 0x1000,
0x1000,
/* huffTable02[65] */
0xf006, 0x6222, 0x6201, 0x5212, 0x5212, 0x5122, 0x5122, 0x5021,
0x5021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000,
/* huffTable03[65] */
0xf006, 0x6222, 0x6201, 0x5212, 0x5212, 0x5122, 0x5122, 0x5021,
0x5021, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101,
0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101, 0x2101,
0x2101, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000,
/* huffTable05[257] */
0xf008, 0x8332, 0x8322, 0x7232, 0x7232, 0x6132, 0x6132, 0x6132,
0x6132, 0x7312, 0x7312, 0x7301, 0x7301, 0x7031, 0x7031, 0x7222,
0x7222, 0x6212, 0x6212, 0x6212, 0x6212, 0x6122, 0x6122, 0x6122,
0x6122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021,
0x6021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000,
/* huffTable06[129] */
0xf007, 0x7332, 0x7301, 0x6322, 0x6322, 0x6232, 0x6232, 0x6031,
0x6031, 0x5312, 0x5312, 0x5312, 0x5312, 0x5132, 0x5132, 0x5132,
0x5132, 0x5222, 0x5222, 0x5222, 0x5222, 0x5201, 0x5201, 0x5201,
0x5201, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212,
0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122,
0x4122, 0x4021, 0x4021, 0x4021, 0x4021, 0x4021, 0x4021, 0x4021,
0x4021, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000,
0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000,
0x3000,
/* huffTable07[110] */
0xf006, 0x0041, 0x0052, 0x005b, 0x0060, 0x0063, 0x0068, 0x006b,
0x6212, 0x5122, 0x5122, 0x6201, 0x6021, 0x4112, 0x4112, 0x4112,
0x4112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0xf004, 0x4552, 0x4542, 0x4452, 0x4352, 0x3532, 0x3532,
0x3442, 0x3442, 0x3522, 0x3522, 0x3252, 0x3252, 0x2512, 0x2512,
0x2512, 0x2512, 0xf003, 0x2152, 0x2152, 0x3501, 0x3432, 0x2051,
0x2051, 0x3342, 0x3332, 0xf002, 0x2422, 0x2242, 0x1412, 0x1412,
0xf001, 0x1142, 0x1041, 0xf002, 0x2401, 0x2322, 0x2232, 0x2301,
0xf001, 0x1312, 0x1132, 0xf001, 0x1031, 0x1222,
/* huffTable08[280] */
0xf008, 0x0101, 0x010a, 0x010f, 0x8512, 0x8152, 0x0112, 0x0115,
0x8422, 0x8242, 0x8412, 0x7142, 0x7142, 0x8401, 0x8041, 0x8322,
0x8232, 0x8312, 0x8132, 0x8301, 0x8031, 0x6222, 0x6222, 0x6222,
0x6222, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021,
0x6021, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212,
0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212,
0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122,
0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122,
0x4122, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112, 0x2112,
0x2112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0xf003, 0x3552, 0x3452, 0x2542, 0x2542, 0x1352, 0x1352,
0x1352, 0x1352, 0xf002, 0x2532, 0x2442, 0x1522, 0x1522, 0xf001,
0x1252, 0x1501, 0xf001, 0x1432, 0x1342, 0xf001, 0x1051, 0x1332,
/* huffTable09[93] */
0xf006, 0x0041, 0x004a, 0x004f, 0x0052, 0x0057, 0x005a, 0x6412,
0x6142, 0x6322, 0x6232, 0x5312, 0x5312, 0x5132, 0x5132, 0x6301,
0x6031, 0x5222, 0x5222, 0x5201, 0x5201, 0x4212, 0x4212, 0x4212,
0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4021, 0x4021, 0x4021,
0x4021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000,
0x3000, 0xf003, 0x3552, 0x3542, 0x2532, 0x2532, 0x2352, 0x2352,
0x3452, 0x3501, 0xf002, 0x2442, 0x2522, 0x2252, 0x2512, 0xf001,
0x1152, 0x1432, 0xf002, 0x1342, 0x1342, 0x2051, 0x2401, 0xf001,
0x1422, 0x1242, 0xf001, 0x1332, 0x1041,
/* huffTable10[320] */
0xf008, 0x0101, 0x010a, 0x010f, 0x0118, 0x011b, 0x0120, 0x0125,
0x8712, 0x8172, 0x012a, 0x012d, 0x0132, 0x8612, 0x8162, 0x8061,
0x0137, 0x013a, 0x013d, 0x8412, 0x8142, 0x8041, 0x8322, 0x8232,
0x8301, 0x7312, 0x7312, 0x7132, 0x7132, 0x7031, 0x7031, 0x7222,
0x7222, 0x6212, 0x6212, 0x6212, 0x6212, 0x6122, 0x6122, 0x6122,
0x6122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021,
0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0xf003, 0x3772, 0x3762, 0x3672, 0x3752, 0x3572, 0x3662,
0x2742, 0x2742, 0xf002, 0x2472, 0x2652, 0x2562, 0x2732, 0xf003,
0x2372, 0x2372, 0x2642, 0x2642, 0x3552, 0x3452, 0x2362, 0x2362,
0xf001, 0x1722, 0x1272, 0xf002, 0x2462, 0x2701, 0x1071, 0x1071,
0xf002, 0x1262, 0x1262, 0x2542, 0x2532, 0xf002, 0x1601, 0x1601,
0x2352, 0x2442, 0xf001, 0x1632, 0x1622, 0xf002, 0x2522, 0x2252,
0x1512, 0x1512, 0xf002, 0x1152, 0x1152, 0x2432, 0x2342, 0xf001,
0x1501, 0x1051, 0xf001, 0x1422, 0x1242, 0xf001, 0x1332, 0x1401,
/* huffTable11[296] */
0xf008, 0x0101, 0x0106, 0x010f, 0x0114, 0x0117, 0x8722, 0x8272,
0x011c, 0x7172, 0x7172, 0x8712, 0x8071, 0x8632, 0x8362, 0x8061,
0x011f, 0x0122, 0x8512, 0x7262, 0x7262, 0x8622, 0x8601, 0x7612,
0x7612, 0x7162, 0x7162, 0x8152, 0x8432, 0x8051, 0x0125, 0x8422,
0x8242, 0x8412, 0x8142, 0x8401, 0x8041, 0x7322, 0x7322, 0x7232,
0x7232, 0x6312, 0x6312, 0x6312, 0x6312, 0x6132, 0x6132, 0x6132,
0x6132, 0x7301, 0x7301, 0x7031, 0x7031, 0x6222, 0x6222, 0x6222,
0x6222, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122,
0x5122, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212,
0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212,
0x4212, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201,
0x5201, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021,
0x5021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000, 0x2000,
0x2000, 0xf002, 0x2772, 0x2762, 0x2672, 0x2572, 0xf003, 0x2662,
0x2662, 0x2742, 0x2742, 0x2472, 0x2472, 0x3752, 0x3552, 0xf002,
0x2652, 0x2562, 0x1732, 0x1732, 0xf001, 0x1372, 0x1642, 0xf002,
0x2542, 0x2452, 0x2532, 0x2352, 0xf001, 0x1462, 0x1701, 0xf001,
0x1442, 0x1522, 0xf001, 0x1252, 0x1501, 0xf001, 0x1342, 0x1332,
/* huffTable12[185] */
0xf007, 0x0081, 0x008a, 0x008f, 0x0092, 0x0097, 0x009a, 0x009d,
0x00a2, 0x00a5, 0x00a8, 0x7622, 0x7262, 0x7162, 0x00ad, 0x00b0,
0x00b3, 0x7512, 0x7152, 0x7432, 0x7342, 0x00b6, 0x7422, 0x7242,
0x7412, 0x6332, 0x6332, 0x6142, 0x6142, 0x6322, 0x6322, 0x6232,
0x6232, 0x7041, 0x7301, 0x6031, 0x6031, 0x5312, 0x5312, 0x5312,
0x5312, 0x5132, 0x5132, 0x5132, 0x5132, 0x5222, 0x5222, 0x5222,
0x5222, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212, 0x4212,
0x4212, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122, 0x4122,
0x4122, 0x5201, 0x5201, 0x5201, 0x5201, 0x5021, 0x5021, 0x5021,
0x5021, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000,
0x4000, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101, 0x3101,
0x3101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0xf003, 0x3772, 0x3762, 0x2672, 0x2672, 0x2752, 0x2752,
0x2572, 0x2572, 0xf002, 0x2662, 0x2742, 0x2472, 0x2562, 0xf001,
0x1652, 0x1732, 0xf002, 0x2372, 0x2552, 0x1722, 0x1722, 0xf001,
0x1272, 0x1642, 0xf001, 0x1462, 0x1712, 0xf002, 0x1172, 0x1172,
0x2701, 0x2071, 0xf001, 0x1632, 0x1362, 0xf001, 0x1542, 0x1452,
0xf002, 0x1442, 0x1442, 0x2601, 0x2501, 0xf001, 0x1612, 0x1061,
0xf001, 0x1532, 0x1352, 0xf001, 0x1522, 0x1252, 0xf001, 0x1051,
0x1401,
/* huffTable13[497] */
0xf006, 0x0041, 0x0082, 0x00c3, 0x00e4, 0x0105, 0x0116, 0x011f,
0x0130, 0x0139, 0x013e, 0x0143, 0x0146, 0x6212, 0x6122, 0x6201,
0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4101, 0x4101, 0x4101,
0x4101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0xf006, 0x0108, 0x0111, 0x011a, 0x0123, 0x012c, 0x0131,
0x0136, 0x013f, 0x0144, 0x0147, 0x014c, 0x0151, 0x0156, 0x015b,
0x6f12, 0x61f2, 0x60f1, 0x0160, 0x0163, 0x0166, 0x62e2, 0x0169,
0x6e12, 0x61e2, 0x016c, 0x016f, 0x0172, 0x0175, 0x0178, 0x017b,
0x66c2, 0x6d32, 0x017e, 0x6d22, 0x62d2, 0x6d12, 0x67b2, 0x0181,
0x0184, 0x63c2, 0x0187, 0x6b42, 0x51d2, 0x51d2, 0x6d01, 0x60d1,
0x6a82, 0x68a2, 0x6c42, 0x64c2, 0x6b62, 0x66b2, 0x5c32, 0x5c32,
0x5c22, 0x5c22, 0x52c2, 0x52c2, 0x5b52, 0x5b52, 0x65b2, 0x6982,
0x5c12, 0x5c12, 0xf006, 0x51c2, 0x51c2, 0x6892, 0x6c01, 0x50c1,
0x50c1, 0x64b2, 0x6a62, 0x66a2, 0x6972, 0x5b32, 0x5b32, 0x53b2,
0x53b2, 0x6882, 0x6a52, 0x5b22, 0x5b22, 0x65a2, 0x6962, 0x54a2,
0x54a2, 0x6872, 0x6782, 0x5492, 0x5492, 0x6772, 0x6672, 0x42b2,
0x42b2, 0x42b2, 0x42b2, 0x4b12, 0x4b12, 0x4b12, 0x4b12, 0x41b2,
0x41b2, 0x41b2, 0x41b2, 0x5b01, 0x5b01, 0x50b1, 0x50b1, 0x5692,
0x5692, 0x5a42, 0x5a42, 0x5a32, 0x5a32, 0x53a2, 0x53a2, 0x5952,
0x5952, 0x5592, 0x5592, 0x4a22, 0x4a22, 0x4a22, 0x4a22, 0x42a2,
0x42a2, 0x42a2, 0x42a2, 0xf005, 0x4a12, 0x4a12, 0x41a2, 0x41a2,
0x5a01, 0x5862, 0x40a1, 0x40a1, 0x5682, 0x5942, 0x4392, 0x4392,
0x5932, 0x5852, 0x5582, 0x5762, 0x4922, 0x4922, 0x4292, 0x4292,
0x5752, 0x5572, 0x4832, 0x4832, 0x4382, 0x4382, 0x5662, 0x5742,
0x5472, 0x5652, 0x5562, 0x5372, 0xf005, 0x3912, 0x3912, 0x3912,
0x3912, 0x3192, 0x3192, 0x3192, 0x3192, 0x4901, 0x4901, 0x4091,
0x4091, 0x4842, 0x4842, 0x4482, 0x4482, 0x4272, 0x4272, 0x5642,
0x5462, 0x3822, 0x3822, 0x3822, 0x3822, 0x3282, 0x3282, 0x3282,
0x3282, 0x3812, 0x3812, 0x3812, 0x3812, 0xf004, 0x4732, 0x4722,
0x3712, 0x3712, 0x3172, 0x3172, 0x4552, 0x4701, 0x4071, 0x4632,
0x4362, 0x4542, 0x4452, 0x4622, 0x4262, 0x4532, 0xf003, 0x2182,
0x2182, 0x3801, 0x3081, 0x3612, 0x3162, 0x3601, 0x3061, 0xf004,
0x4352, 0x4442, 0x3522, 0x3522, 0x3252, 0x3252, 0x3501, 0x3501,
0x2512, 0x2512, 0x2512, 0x2512, 0x2152, 0x2152, 0x2152, 0x2152,
0xf003, 0x3432, 0x3342, 0x3051, 0x3422, 0x3242, 0x3332, 0x2412,
0x2412, 0xf002, 0x1142, 0x1142, 0x2401, 0x2041, 0xf002, 0x2322,
0x2232, 0x1312, 0x1312, 0xf001, 0x1132, 0x1301, 0xf001, 0x1031,
0x1222, 0xf003, 0x0082, 0x008b, 0x008e, 0x0091, 0x0094, 0x0097,
0x3ce2, 0x3dd2, 0xf003, 0x0093, 0x3eb2, 0x3be2, 0x3f92, 0x39f2,
0x3ae2, 0x3db2, 0x3bd2, 0xf003, 0x3f82, 0x38f2, 0x3cc2, 0x008d,
0x3e82, 0x0090, 0x27f2, 0x27f2, 0xf003, 0x2ad2, 0x2ad2, 0x3da2,
0x3cb2, 0x3bc2, 0x36f2, 0x2f62, 0x2f62, 0xf002, 0x28e2, 0x2f52,
0x2d92, 0x29d2, 0xf002, 0x25f2, 0x27e2, 0x2ca2, 0x2bb2, 0xf003,
0x2f42, 0x2f42, 0x24f2, 0x24f2, 0x3ac2, 0x36e2, 0x23f2, 0x23f2,
0xf002, 0x1f32, 0x1f32, 0x2d82, 0x28d2, 0xf001, 0x1f22, 0x12f2,
0xf002, 0x2e62, 0x2c92, 0x1f01, 0x1f01, 0xf002, 0x29c2, 0x2e52,
0x1ba2, 0x1ba2, 0xf002, 0x2d72, 0x27d2, 0x1e42, 0x1e42, 0xf002,
0x28c2, 0x26d2, 0x1e32, 0x1e32, 0xf002, 0x19b2, 0x19b2, 0x2b92,
0x2aa2, 0xf001, 0x1ab2, 0x15e2, 0xf001, 0x14e2, 0x1c82, 0xf001,
0x1d62, 0x13e2, 0xf001, 0x1e22, 0x1e01, 0xf001, 0x10e1, 0x1d52,
0xf001, 0x15d2, 0x1c72, 0xf001, 0x17c2, 0x1d42, 0xf001, 0x1b82,
0x18b2, 0xf001, 0x14d2, 0x1a92, 0xf001, 0x19a2, 0x1c62, 0xf001,
0x13d2, 0x1b72, 0xf001, 0x1c52, 0x15c2, 0xf001, 0x1992, 0x1a72,
0xf001, 0x17a2, 0x1792, 0xf003, 0x0023, 0x3df2, 0x2de2, 0x2de2,
0x1ff2, 0x1ff2, 0x1ff2, 0x1ff2, 0xf001, 0x1fe2, 0x1fd2, 0xf001,
0x1ee2, 0x1fc2, 0xf001, 0x1ed2, 0x1fb2, 0xf001, 0x1bf2, 0x1ec2,
0xf002, 0x1cd2, 0x1cd2, 0x2fa2, 0x29e2, 0xf001, 0x1af2, 0x1dc2,
0xf001, 0x1ea2, 0x1e92, 0xf001, 0x1f72, 0x1e72, 0xf001, 0x1ef2,
0x1cf2,
/* huffTable15[580] */
0xf008, 0x0101, 0x0122, 0x0143, 0x0154, 0x0165, 0x0176, 0x017f,
0x0188, 0x0199, 0x01a2, 0x01ab, 0x01b4, 0x01bd, 0x01c2, 0x01cb,
0x01d4, 0x01d9, 0x01de, 0x01e3, 0x01e8, 0x01ed, 0x01f2, 0x01f7,
0x01fc, 0x0201, 0x0204, 0x0207, 0x020a, 0x020f, 0x0212, 0x0215,
0x021a, 0x021d, 0x0220, 0x8192, 0x0223, 0x0226, 0x0229, 0x022c,
0x022f, 0x8822, 0x8282, 0x8812, 0x8182, 0x0232, 0x0235, 0x0238,
0x023b, 0x8722, 0x8272, 0x8462, 0x8712, 0x8552, 0x8172, 0x023e,
0x8632, 0x8362, 0x8542, 0x8452, 0x8622, 0x8262, 0x8612, 0x0241,
0x8532, 0x7162, 0x7162, 0x8352, 0x8442, 0x7522, 0x7522, 0x7252,
0x7252, 0x7512, 0x7512, 0x7152, 0x7152, 0x8501, 0x8051, 0x7432,
0x7432, 0x7342, 0x7342, 0x7422, 0x7422, 0x7242, 0x7242, 0x7332,
0x7332, 0x6142, 0x6142, 0x6142, 0x6142, 0x7412, 0x7412, 0x7401,
0x7401, 0x6322, 0x6322, 0x6322, 0x6322, 0x6232, 0x6232, 0x6232,
0x6232, 0x7041, 0x7041, 0x7301, 0x7301, 0x6312, 0x6312, 0x6312,
0x6312, 0x6132, 0x6132, 0x6132, 0x6132, 0x6031, 0x6031, 0x6031,
0x6031, 0x5222, 0x5222, 0x5222, 0x5222, 0x5222, 0x5222, 0x5222,
0x5222, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212,
0x5212, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122,
0x5122, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201, 0x5201,
0x5201, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021, 0x5021,
0x5021, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112, 0x3112,
0x3112, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011,
0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011,
0x4011, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000,
0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000,
0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000,
0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000, 0x3000,
0x3000, 0xf005, 0x5ff2, 0x5fe2, 0x5ef2, 0x5fd2, 0x4ee2, 0x4ee2,
0x5df2, 0x5fc2, 0x5cf2, 0x5ed2, 0x5de2, 0x5fb2, 0x4bf2, 0x4bf2,
0x5ec2, 0x5ce2, 0x4dd2, 0x4dd2, 0x4fa2, 0x4fa2, 0x4af2, 0x4af2,
0x4eb2, 0x4eb2, 0x4be2, 0x4be2, 0x4dc2, 0x4dc2, 0x4cd2, 0x4cd2,
0x4f92, 0x4f92, 0xf005, 0x49f2, 0x49f2, 0x4ae2, 0x4ae2, 0x4db2,
0x4db2, 0x4bd2, 0x4bd2, 0x4f82, 0x4f82, 0x48f2, 0x48f2, 0x4cc2,
0x4cc2, 0x4e92, 0x4e92, 0x49e2, 0x49e2, 0x4f72, 0x4f72, 0x47f2,
0x47f2, 0x4da2, 0x4da2, 0x4ad2, 0x4ad2, 0x4cb2, 0x4cb2, 0x4f62,
0x4f62, 0x5ea2, 0x5f01, 0xf004, 0x3bc2, 0x3bc2, 0x36f2, 0x36f2,
0x4e82, 0x48e2, 0x4f52, 0x4d92, 0x35f2, 0x35f2, 0x3e72, 0x3e72,
0x37e2, 0x37e2, 0x3ca2, 0x3ca2, 0xf004, 0x3ac2, 0x3ac2, 0x3bb2,
0x3bb2, 0x49d2, 0x4d82, 0x3f42, 0x3f42, 0x34f2, 0x34f2, 0x3f32,
0x3f32, 0x33f2, 0x33f2, 0x38d2, 0x38d2, 0xf004, 0x36e2, 0x36e2,
0x3f22, 0x3f22, 0x32f2, 0x32f2, 0x4e62, 0x40f1, 0x3f12, 0x3f12,
0x31f2, 0x31f2, 0x3c92, 0x3c92, 0x39c2, 0x39c2, 0xf003, 0x3e52,
0x3ba2, 0x3ab2, 0x35e2, 0x3d72, 0x37d2, 0x3e42, 0x34e2, 0xf003,
0x3c82, 0x38c2, 0x3e32, 0x3d62, 0x36d2, 0x33e2, 0x3b92, 0x39b2,
0xf004, 0x3e22, 0x3e22, 0x3aa2, 0x3aa2, 0x32e2, 0x32e2, 0x3e12,
0x3e12, 0x31e2, 0x31e2, 0x4e01, 0x40e1, 0x3d52, 0x3d52, 0x35d2,
0x35d2, 0xf003, 0x3c72, 0x37c2, 0x3d42, 0x3b82, 0x24d2, 0x24d2,
0x38b2, 0x3a92, 0xf003, 0x39a2, 0x3c62, 0x36c2, 0x3d32, 0x23d2,
0x23d2, 0x22d2, 0x22d2, 0xf003, 0x3d22, 0x3d01, 0x2d12, 0x2d12,
0x2b72, 0x2b72, 0x27b2, 0x27b2, 0xf003, 0x21d2, 0x21d2, 0x3c52,
0x30d1, 0x25c2, 0x25c2, 0x2a82, 0x2a82, 0xf002, 0x28a2, 0x2c42,
0x24c2, 0x2b62, 0xf003, 0x26b2, 0x26b2, 0x3992, 0x3c01, 0x2c32,
0x2c32, 0x23c2, 0x23c2, 0xf003, 0x2a72, 0x2a72, 0x27a2, 0x27a2,
0x26a2, 0x26a2, 0x30c1, 0x3b01, 0xf002, 0x12c2, 0x12c2, 0x2c22,
0x2b52, 0xf002, 0x25b2, 0x2c12, 0x2982, 0x2892, 0xf002, 0x21c2,
0x2b42, 0x24b2, 0x2a62, 0xf002, 0x2b32, 0x2972, 0x13b2, 0x13b2,
0xf002, 0x2792, 0x2882, 0x2b22, 0x2a52, 0xf002, 0x12b2, 0x12b2,
0x25a2, 0x2b12, 0xf002, 0x11b2, 0x11b2, 0x20b1, 0x2962, 0xf002,
0x2692, 0x2a42, 0x24a2, 0x2872, 0xf002, 0x2782, 0x2a32, 0x13a2,
0x13a2, 0xf001, 0x1952, 0x1592, 0xf001, 0x1a22, 0x12a2, 0xf001,
0x1a12, 0x11a2, 0xf002, 0x2a01, 0x20a1, 0x1862, 0x1862, 0xf001,
0x1682, 0x1942, 0xf001, 0x1492, 0x1932, 0xf002, 0x1392, 0x1392,
0x2772, 0x2901, 0xf001, 0x1852, 0x1582, 0xf001, 0x1922, 0x1762,
0xf001, 0x1672, 0x1292, 0xf001, 0x1912, 0x1091, 0xf001, 0x1842,
0x1482, 0xf001, 0x1752, 0x1572, 0xf001, 0x1832, 0x1382, 0xf001,
0x1662, 0x1742, 0xf001, 0x1472, 0x1801, 0xf001, 0x1081, 0x1652,
0xf001, 0x1562, 0x1732, 0xf001, 0x1372, 0x1642, 0xf001, 0x1701,
0x1071, 0xf001, 0x1601, 0x1061,
/* huffTable16[651] */
0xf008, 0x0101, 0x010a, 0x0113, 0x8ff2, 0x0118, 0x011d, 0x0120,
0x82f2, 0x0131, 0x8f12, 0x81f2, 0x0134, 0x0145, 0x0156, 0x0167,
0x0178, 0x0189, 0x019a, 0x01a3, 0x01ac, 0x01b5, 0x01be, 0x01c7,
0x01d0, 0x01d9, 0x01de, 0x01e3, 0x01e6, 0x01eb, 0x01f0, 0x8152,
0x01f3, 0x01f6, 0x01f9, 0x01fc, 0x8412, 0x8142, 0x01ff, 0x8322,
0x8232, 0x7312, 0x7312, 0x7132, 0x7132, 0x8301, 0x8031, 0x7222,
0x7222, 0x6212, 0x6212, 0x6212, 0x6212, 0x6122, 0x6122, 0x6122,
0x6122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6021, 0x6021, 0x6021,
0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011, 0x3011,
0x3011, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0xf003, 0x3fe2, 0x3ef2, 0x3fd2, 0x3df2, 0x3fc2, 0x3cf2,
0x3fb2, 0x3bf2, 0xf003, 0x2fa2, 0x2fa2, 0x3af2, 0x3f92, 0x39f2,
0x38f2, 0x2f82, 0x2f82, 0xf002, 0x2f72, 0x27f2, 0x2f62, 0x26f2,
0xf002, 0x2f52, 0x25f2, 0x1f42, 0x1f42, 0xf001, 0x14f2, 0x13f2,
0xf004, 0x10f1, 0x10f1, 0x10f1, 0x10f1, 0x10f1, 0x10f1, 0x10f1,
0x10f1, 0x2f32, 0x2f32, 0x2f32, 0x2f32, 0x00e2, 0x00f3, 0x00fc,
0x0105, 0xf001, 0x1f22, 0x1f01, 0xf004, 0x00fa, 0x00ff, 0x0104,
0x0109, 0x010c, 0x0111, 0x0116, 0x0119, 0x011e, 0x0123, 0x0128,
0x43e2, 0x012d, 0x0130, 0x0133, 0x0136, 0xf004, 0x0128, 0x012b,
0x012e, 0x4d01, 0x0131, 0x0134, 0x0137, 0x4c32, 0x013a, 0x4c12,
0x40c1, 0x013d, 0x32e2, 0x32e2, 0x4e22, 0x4e12, 0xf004, 0x43d2,
0x4d22, 0x42d2, 0x41d2, 0x4b32, 0x012f, 0x3d12, 0x3d12, 0x44c2,
0x4b62, 0x43c2, 0x47a2, 0x3c22, 0x3c22, 0x42c2, 0x45b2, 0xf004,
0x41c2, 0x4c01, 0x4b42, 0x44b2, 0x4a62, 0x46a2, 0x33b2, 0x33b2,
0x4a52, 0x45a2, 0x3b22, 0x3b22, 0x32b2, 0x32b2, 0x3b12, 0x3b12,
0xf004, 0x31b2, 0x31b2, 0x4b01, 0x40b1, 0x4962, 0x4692, 0x4a42,
0x44a2, 0x4872, 0x4782, 0x33a2, 0x33a2, 0x4a32, 0x4952, 0x3a22,
0x3a22, 0xf004, 0x4592, 0x4862, 0x31a2, 0x31a2, 0x4682, 0x4772,
0x3492, 0x3492, 0x4942, 0x4752, 0x3762, 0x3762, 0x22a2, 0x22a2,
0x22a2, 0x22a2, 0xf003, 0x2a12, 0x2a12, 0x3a01, 0x30a1, 0x3932,
0x3392, 0x3852, 0x3582, 0xf003, 0x2922, 0x2922, 0x2292, 0x2292,
0x3672, 0x3901, 0x2912, 0x2912, 0xf003, 0x2192, 0x2192, 0x3091,
0x3842, 0x3482, 0x3572, 0x3832, 0x3382, 0xf003, 0x3662, 0x3822,
0x2282, 0x2282, 0x3742, 0x3472, 0x2812, 0x2812, 0xf003, 0x2182,
0x2182, 0x2081, 0x2081, 0x3801, 0x3652, 0x2732, 0x2732, 0xf003,
0x2372, 0x2372, 0x3562, 0x3642, 0x2722, 0x2722, 0x2272, 0x2272,
0xf003, 0x3462, 0x3552, 0x2701, 0x2701, 0x1712, 0x1712, 0x1712,
0x1712, 0xf002, 0x1172, 0x1172, 0x2071, 0x2632, 0xf002, 0x2362,
0x2542, 0x2452, 0x2622, 0xf001, 0x1262, 0x1612, 0xf002, 0x1162,
0x1162, 0x2601, 0x2061, 0xf002, 0x1352, 0x1352, 0x2532, 0x2442,
0xf001, 0x1522, 0x1252, 0xf001, 0x1512, 0x1501, 0xf001, 0x1432,
0x1342, 0xf001, 0x1051, 0x1422, 0xf001, 0x1242, 0x1332, 0xf001,
0x1401, 0x1041, 0xf004, 0x4ec2, 0x0086, 0x3ed2, 0x3ed2, 0x39e2,
0x39e2, 0x4ae2, 0x49d2, 0x2ee2, 0x2ee2, 0x2ee2, 0x2ee2, 0x3de2,
0x3de2, 0x3be2, 0x3be2, 0xf003, 0x2eb2, 0x2eb2, 0x2dc2, 0x2dc2,
0x3cd2, 0x3bd2, 0x2ea2, 0x2ea2, 0xf003, 0x2cc2, 0x2cc2, 0x3da2,
0x3ad2, 0x3e72, 0x3ca2, 0x2ac2, 0x2ac2, 0xf003, 0x39c2, 0x3d72,
0x2e52, 0x2e52, 0x1db2, 0x1db2, 0x1db2, 0x1db2, 0xf002, 0x1e92,
0x1e92, 0x2cb2, 0x2bc2, 0xf002, 0x2e82, 0x28e2, 0x2d92, 0x27e2,
0xf002, 0x2bb2, 0x2d82, 0x28d2, 0x2e62, 0xf001, 0x16e2, 0x1c92,
0xf002, 0x2ba2, 0x2ab2, 0x25e2, 0x27d2, 0xf002, 0x1e42, 0x1e42,
0x24e2, 0x2c82, 0xf001, 0x18c2, 0x1e32, 0xf002, 0x1d62, 0x1d62,
0x26d2, 0x2b92, 0xf002, 0x29b2, 0x2aa2, 0x11e2, 0x11e2, 0xf002,
0x14d2, 0x14d2, 0x28b2, 0x29a2, 0xf002, 0x1b72, 0x1b72, 0x27b2,
0x20d1, 0xf001, 0x1e01, 0x10e1, 0xf001, 0x1d52, 0x15d2, 0xf001,
0x1c72, 0x17c2, 0xf001, 0x1d42, 0x1b82, 0xf001, 0x1a92, 0x1c62,
0xf001, 0x16c2, 0x1d32, 0xf001, 0x1c52, 0x15c2, 0xf001, 0x1a82,
0x18a2, 0xf001, 0x1992, 0x1c42, 0xf001, 0x16b2, 0x1a72, 0xf001,
0x1b52, 0x1982, 0xf001, 0x1892, 0x1972, 0xf001, 0x1792, 0x1882,
0xf001, 0x1ce2, 0x1dd2,
/* huffTable24[705] */
0xf009, 0x8fe2, 0x8fe2, 0x8ef2, 0x8ef2, 0x8fd2, 0x8fd2, 0x8df2,
0x8df2, 0x8fc2, 0x8fc2, 0x8cf2, 0x8cf2, 0x8fb2, 0x8fb2, 0x8bf2,
0x8bf2, 0x7af2, 0x7af2, 0x7af2, 0x7af2, 0x8fa2, 0x8fa2, 0x8f92,
0x8f92, 0x79f2, 0x79f2, 0x79f2, 0x79f2, 0x78f2, 0x78f2, 0x78f2,
0x78f2, 0x8f82, 0x8f82, 0x8f72, 0x8f72, 0x77f2, 0x77f2, 0x77f2,
0x77f2, 0x7f62, 0x7f62, 0x7f62, 0x7f62, 0x76f2, 0x76f2, 0x76f2,
0x76f2, 0x7f52, 0x7f52, 0x7f52, 0x7f52, 0x75f2, 0x75f2, 0x75f2,
0x75f2, 0x7f42, 0x7f42, 0x7f42, 0x7f42, 0x74f2, 0x74f2, 0x74f2,
0x74f2, 0x7f32, 0x7f32, 0x7f32, 0x7f32, 0x73f2, 0x73f2, 0x73f2,
0x73f2, 0x7f22, 0x7f22, 0x7f22, 0x7f22, 0x72f2, 0x72f2, 0x72f2,
0x72f2, 0x71f2, 0x71f2, 0x71f2, 0x71f2, 0x8f12, 0x8f12, 0x80f1,
0x80f1, 0x9f01, 0x0201, 0x0206, 0x020b, 0x0210, 0x0215, 0x021a,
0x021f, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2,
0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2,
0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2,
0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2, 0x4ff2,
0x4ff2, 0x0224, 0x0229, 0x0232, 0x0237, 0x023a, 0x023f, 0x0242,
0x0245, 0x024a, 0x024d, 0x0250, 0x0253, 0x0256, 0x0259, 0x025c,
0x025f, 0x0262, 0x0265, 0x0268, 0x026b, 0x026e, 0x0271, 0x0274,
0x0277, 0x027a, 0x027d, 0x0280, 0x0283, 0x0288, 0x028b, 0x028e,
0x0291, 0x0294, 0x0297, 0x029a, 0x029f, 0x94b2, 0x02a4, 0x02a7,
0x02aa, 0x93b2, 0x9882, 0x02af, 0x92b2, 0x02b2, 0x02b5, 0x9692,
0x94a2, 0x02b8, 0x9782, 0x9a32, 0x93a2, 0x9952, 0x9592, 0x9a22,
0x92a2, 0x91a2, 0x9862, 0x9682, 0x9772, 0x9942, 0x9492, 0x9932,
0x9392, 0x9852, 0x9582, 0x9922, 0x9762, 0x9672, 0x9292, 0x9912,
0x9192, 0x9842, 0x9482, 0x9752, 0x9572, 0x9832, 0x9382, 0x9662,
0x9822, 0x9282, 0x9812, 0x9742, 0x9472, 0x9182, 0x02bb, 0x9652,
0x9562, 0x9712, 0x02be, 0x8372, 0x8372, 0x9732, 0x9722, 0x8272,
0x8272, 0x8642, 0x8642, 0x8462, 0x8462, 0x8552, 0x8552, 0x8172,
0x8172, 0x8632, 0x8632, 0x8362, 0x8362, 0x8542, 0x8542, 0x8452,
0x8452, 0x8622, 0x8622, 0x8262, 0x8262, 0x8612, 0x8612, 0x8162,
0x8162, 0x9601, 0x9061, 0x8532, 0x8532, 0x8352, 0x8352, 0x8442,
0x8442, 0x8522, 0x8522, 0x8252, 0x8252, 0x8512, 0x8512, 0x9501,
0x9051, 0x7152, 0x7152, 0x7152, 0x7152, 0x8432, 0x8432, 0x8342,
0x8342, 0x7422, 0x7422, 0x7422, 0x7422, 0x7242, 0x7242, 0x7242,
0x7242, 0x7332, 0x7332, 0x7332, 0x7332, 0x7412, 0x7412, 0x7412,
0x7412, 0x7142, 0x7142, 0x7142, 0x7142, 0x8401, 0x8401, 0x8041,
0x8041, 0x7322, 0x7322, 0x7322, 0x7322, 0x7232, 0x7232, 0x7232,
0x7232, 0x6312, 0x6312, 0x6312, 0x6312, 0x6312, 0x6312, 0x6312,
0x6312, 0x6132, 0x6132, 0x6132, 0x6132, 0x6132, 0x6132, 0x6132,
0x6132, 0x7301, 0x7301, 0x7301, 0x7301, 0x7031, 0x7031, 0x7031,
0x7031, 0x6222, 0x6222, 0x6222, 0x6222, 0x6222, 0x6222, 0x6222,
0x6222, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212,
0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212, 0x5212,
0x5212, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122,
0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122, 0x5122,
0x5122, 0x6201, 0x6201, 0x6201, 0x6201, 0x6201, 0x6201, 0x6201,
0x6201, 0x6021, 0x6021, 0x6021, 0x6021, 0x6021, 0x6021, 0x6021,
0x6021, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112, 0x4112,
0x4112, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101, 0x4101,
0x4101, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011,
0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011,
0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011,
0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011, 0x4011,
0x4011, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000,
0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000,
0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000,
0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000, 0x4000,
0x4000, 0xf002, 0x2ee2, 0x2ed2, 0x2de2, 0x2ec2, 0xf002, 0x2ce2,
0x2dd2, 0x2eb2, 0x2be2, 0xf002, 0x2dc2, 0x2cd2, 0x2ea2, 0x2ae2,
0xf002, 0x2db2, 0x2bd2, 0x2cc2, 0x2e92, 0xf002, 0x29e2, 0x2da2,
0x2ad2, 0x2cb2, 0xf002, 0x2bc2, 0x2e82, 0x28e2, 0x2d92, 0xf002,
0x29d2, 0x2e72, 0x27e2, 0x2ca2, 0xf002, 0x2ac2, 0x2bb2, 0x2d82,
0x28d2, 0xf003, 0x3e01, 0x30e1, 0x2d01, 0x2d01, 0x16e2, 0x16e2,
0x16e2, 0x16e2, 0xf002, 0x2e62, 0x2c92, 0x19c2, 0x19c2, 0xf001,
0x1e52, 0x1ab2, 0xf002, 0x15e2, 0x15e2, 0x2ba2, 0x2d72, 0xf001,
0x17d2, 0x14e2, 0xf001, 0x1c82, 0x18c2, 0xf002, 0x2e42, 0x2e22,
0x1e32, 0x1e32, 0xf001, 0x1d62, 0x16d2, 0xf001, 0x13e2, 0x1b92,
0xf001, 0x19b2, 0x1aa2, 0xf001, 0x12e2, 0x1e12, 0xf001, 0x11e2,
0x1d52, 0xf001, 0x15d2, 0x1c72, 0xf001, 0x17c2, 0x1d42, 0xf001,
0x1b82, 0x18b2, 0xf001, 0x14d2, 0x1a92, 0xf001, 0x19a2, 0x1c62,
0xf001, 0x16c2, 0x1d32, 0xf001, 0x13d2, 0x1d22, 0xf001, 0x12d2,
0x1d12, 0xf001, 0x1b72, 0x17b2, 0xf001, 0x11d2, 0x1c52, 0xf001,
0x15c2, 0x1a82, 0xf001, 0x18a2, 0x1992, 0xf001, 0x1c42, 0x14c2,
0xf001, 0x1b62, 0x16b2, 0xf002, 0x20d1, 0x2c01, 0x1c32, 0x1c32,
0xf001, 0x13c2, 0x1a72, 0xf001, 0x17a2, 0x1c22, 0xf001, 0x12c2,
0x1b52, 0xf001, 0x15b2, 0x1c12, 0xf001, 0x1982, 0x1892, 0xf001,
0x11c2, 0x1b42, 0xf002, 0x20c1, 0x2b01, 0x1b32, 0x1b32, 0xf002,
0x20b1, 0x2a01, 0x1a12, 0x1a12, 0xf001, 0x1a62, 0x16a2, 0xf001,
0x1972, 0x1792, 0xf002, 0x20a1, 0x2901, 0x1091, 0x1091, 0xf001,
0x1b22, 0x1a52, 0xf001, 0x15a2, 0x1b12, 0xf001, 0x11b2, 0x1962,
0xf001, 0x1a42, 0x1872, 0xf001, 0x1801, 0x1081, 0xf001, 0x1701,
0x1071,
};
#define HUFF_OFFSET_01 0
#define HUFF_OFFSET_02 ( 9 + HUFF_OFFSET_01)
#define HUFF_OFFSET_03 ( 65 + HUFF_OFFSET_02)
#define HUFF_OFFSET_05 ( 65 + HUFF_OFFSET_03)
#define HUFF_OFFSET_06 (257 + HUFF_OFFSET_05)
#define HUFF_OFFSET_07 (129 + HUFF_OFFSET_06)
#define HUFF_OFFSET_08 (110 + HUFF_OFFSET_07)
#define HUFF_OFFSET_09 (280 + HUFF_OFFSET_08)
#define HUFF_OFFSET_10 ( 93 + HUFF_OFFSET_09)
#define HUFF_OFFSET_11 (320 + HUFF_OFFSET_10)
#define HUFF_OFFSET_12 (296 + HUFF_OFFSET_11)
#define HUFF_OFFSET_13 (185 + HUFF_OFFSET_12)
#define HUFF_OFFSET_15 (497 + HUFF_OFFSET_13)
#define HUFF_OFFSET_16 (580 + HUFF_OFFSET_15)
#define HUFF_OFFSET_24 (651 + HUFF_OFFSET_16)
const int huffTabOffset[HUFF_PAIRTABS] = {
0,
HUFF_OFFSET_01,
HUFF_OFFSET_02,
HUFF_OFFSET_03,
0,
HUFF_OFFSET_05,
HUFF_OFFSET_06,
HUFF_OFFSET_07,
HUFF_OFFSET_08,
HUFF_OFFSET_09,
HUFF_OFFSET_10,
HUFF_OFFSET_11,
HUFF_OFFSET_12,
HUFF_OFFSET_13,
0,
HUFF_OFFSET_15,
HUFF_OFFSET_16,
HUFF_OFFSET_16,
HUFF_OFFSET_16,
HUFF_OFFSET_16,
HUFF_OFFSET_16,
HUFF_OFFSET_16,
HUFF_OFFSET_16,
HUFF_OFFSET_16,
HUFF_OFFSET_24,
HUFF_OFFSET_24,
HUFF_OFFSET_24,
HUFF_OFFSET_24,
HUFF_OFFSET_24,
HUFF_OFFSET_24,
HUFF_OFFSET_24,
HUFF_OFFSET_24,
};
const HuffTabLookup huffTabLookup[HUFF_PAIRTABS] = {
{ 0, noBits },
{ 0, oneShot },
{ 0, oneShot },
{ 0, oneShot },
{ 0, invalidTab },
{ 0, oneShot },
{ 0, oneShot },
{ 0, loopNoLinbits },
{ 0, loopNoLinbits },
{ 0, loopNoLinbits },
{ 0, loopNoLinbits },
{ 0, loopNoLinbits },
{ 0, loopNoLinbits },
{ 0, loopNoLinbits },
{ 0, invalidTab },
{ 0, loopNoLinbits },
{ 1, loopLinbits },
{ 2, loopLinbits },
{ 3, loopLinbits },
{ 4, loopLinbits },
{ 6, loopLinbits },
{ 8, loopLinbits },
{ 10, loopLinbits },
{ 13, loopLinbits },
{ 4, loopLinbits },
{ 5, loopLinbits },
{ 6, loopLinbits },
{ 7, loopLinbits },
{ 8, loopLinbits },
{ 9, loopLinbits },
{ 11, loopLinbits },
{ 13, loopLinbits },
};
/* tables for quadruples
* format 0xAB
* A = length of codeword
* B = codeword
*/
const unsigned char quadTable[64+16] = {
/* table A */
0x6b, 0x6f, 0x6d, 0x6e, 0x67, 0x65, 0x59, 0x59,
0x56, 0x56, 0x53, 0x53, 0x5a, 0x5a, 0x5c, 0x5c,
0x42, 0x42, 0x42, 0x42, 0x41, 0x41, 0x41, 0x41,
0x44, 0x44, 0x44, 0x44, 0x48, 0x48, 0x48, 0x48,
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
/* table B */
0x4f, 0x4e, 0x4d, 0x4c, 0x4b, 0x4a, 0x49, 0x48,
0x47, 0x46, 0x45, 0x44, 0x43, 0x42, 0x41, 0x40,
};
const int quadTabOffset[2] = {0, 64};
const int quadTabMaxBits[2] = {6, 4};

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bsp/stm32_radio/mp3/real/imdct.c Normal file
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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* imdct.c - antialias, inverse transform (short/long/mixed), windowing,
* overlap-add, frequency inversion
**************************************************************************************/
#include "coder.h"
#include "assembly.h"
/**************************************************************************************
* Function: AntiAlias
*
* Description: smooth transition across DCT block boundaries (every 18 coefficients)
*
* Inputs: vector of dequantized coefficients, length = (nBfly+1) * 18
* number of "butterflies" to perform (one butterfly means one
* inter-block smoothing operation)
*
* Outputs: updated coefficient vector x
*
* Return: none
*
* Notes: weighted average of opposite bands (pairwise) from the 8 samples
* before and after each block boundary
* nBlocks = (nonZeroBound + 7) / 18, since nZB is the first ZERO sample
* above which all other samples are also zero
* max gain per sample = 1.372
* MAX(i) (abs(csa[i][0]) + abs(csa[i][1]))
* bits gained = 0
* assume at least 1 guard bit in x[] to avoid overflow
* (should be guaranteed from dequant, and max gain from stproc * max
* gain from AntiAlias < 2.0)
**************************************************************************************/
static void AntiAlias(int *x, int nBfly)
{
int k, a0, b0, c0, c1;
const int *c;
/* csa = Q31 */
for (k = nBfly; k > 0; k--) {
c = csa[0];
x += 18;
a0 = x[-1]; c0 = *c; c++; b0 = x[0]; c1 = *c; c++;
x[-1] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1;
x[0] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1;
a0 = x[-2]; c0 = *c; c++; b0 = x[1]; c1 = *c; c++;
x[-2] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1;
x[1] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1;
a0 = x[-3]; c0 = *c; c++; b0 = x[2]; c1 = *c; c++;
x[-3] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1;
x[2] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1;
a0 = x[-4]; c0 = *c; c++; b0 = x[3]; c1 = *c; c++;
x[-4] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1;
x[3] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1;
a0 = x[-5]; c0 = *c; c++; b0 = x[4]; c1 = *c; c++;
x[-5] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1;
x[4] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1;
a0 = x[-6]; c0 = *c; c++; b0 = x[5]; c1 = *c; c++;
x[-6] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1;
x[5] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1;
a0 = x[-7]; c0 = *c; c++; b0 = x[6]; c1 = *c; c++;
x[-7] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1;
x[6] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1;
a0 = x[-8]; c0 = *c; c++; b0 = x[7]; c1 = *c; c++;
x[-8] = (MULSHIFT32(c0, a0) - MULSHIFT32(c1, b0)) << 1;
x[7] = (MULSHIFT32(c0, b0) + MULSHIFT32(c1, a0)) << 1;
}
}
/**************************************************************************************
* Function: WinPrevious
*
* Description: apply specified window to second half of previous IMDCT (overlap part)
*
* Inputs: vector of 9 coefficients (xPrev)
*
* Outputs: 18 windowed output coefficients (gain 1 integer bit)
* window type (0, 1, 2, 3)
*
* Return: none
*
* Notes: produces 9 output samples from 18 input samples via symmetry
* all blocks gain at least 1 guard bit via window (long blocks get extra
* sign bit, short blocks can have one addition but max gain < 1.0)
**************************************************************************************/
static void WinPrevious(int *xPrev, int *xPrevWin, int btPrev)
{
int i, x, *xp, *xpwLo, *xpwHi, wLo, wHi;
const int *wpLo, *wpHi;
xp = xPrev;
/* mapping (see IMDCT12x3): xPrev[0-2] = sum[6-8], xPrev[3-8] = sum[12-17] */
if (btPrev == 2) {
/* this could be reordered for minimum loads/stores */
wpLo = imdctWin[btPrev];
xPrevWin[ 0] = MULSHIFT32(wpLo[ 6], xPrev[2]) + MULSHIFT32(wpLo[0], xPrev[6]);
xPrevWin[ 1] = MULSHIFT32(wpLo[ 7], xPrev[1]) + MULSHIFT32(wpLo[1], xPrev[7]);
xPrevWin[ 2] = MULSHIFT32(wpLo[ 8], xPrev[0]) + MULSHIFT32(wpLo[2], xPrev[8]);
xPrevWin[ 3] = MULSHIFT32(wpLo[ 9], xPrev[0]) + MULSHIFT32(wpLo[3], xPrev[8]);
xPrevWin[ 4] = MULSHIFT32(wpLo[10], xPrev[1]) + MULSHIFT32(wpLo[4], xPrev[7]);
xPrevWin[ 5] = MULSHIFT32(wpLo[11], xPrev[2]) + MULSHIFT32(wpLo[5], xPrev[6]);
xPrevWin[ 6] = MULSHIFT32(wpLo[ 6], xPrev[5]);
xPrevWin[ 7] = MULSHIFT32(wpLo[ 7], xPrev[4]);
xPrevWin[ 8] = MULSHIFT32(wpLo[ 8], xPrev[3]);
xPrevWin[ 9] = MULSHIFT32(wpLo[ 9], xPrev[3]);
xPrevWin[10] = MULSHIFT32(wpLo[10], xPrev[4]);
xPrevWin[11] = MULSHIFT32(wpLo[11], xPrev[5]);
xPrevWin[12] = xPrevWin[13] = xPrevWin[14] = xPrevWin[15] = xPrevWin[16] = xPrevWin[17] = 0;
} else {
/* use ARM-style pointers (*ptr++) so that ADS compiles well */
wpLo = imdctWin[btPrev] + 18;
wpHi = wpLo + 17;
xpwLo = xPrevWin;
xpwHi = xPrevWin + 17;
for (i = 9; i > 0; i--) {
x = *xp++; wLo = *wpLo++; wHi = *wpHi--;
*xpwLo++ = MULSHIFT32(wLo, x);
*xpwHi-- = MULSHIFT32(wHi, x);
}
}
}
/**************************************************************************************
* Function: FreqInvertRescale
*
* Description: do frequency inversion (odd samples of odd blocks) and rescale
* if necessary (extra guard bits added before IMDCT)
*
* Inputs: output vector y (18 new samples, spaced NBANDS apart)
* previous sample vector xPrev (9 samples)
* index of current block
* number of extra shifts added before IMDCT (usually 0)
*
* Outputs: inverted and rescaled (as necessary) outputs
* rescaled (as necessary) previous samples
*
* Return: updated mOut (from new outputs y)
**************************************************************************************/
static int FreqInvertRescale(int *y, int *xPrev, int blockIdx, int es)
{
int i, d, mOut;
int y0, y1, y2, y3, y4, y5, y6, y7, y8;
if (es == 0) {
/* fast case - frequency invert only (no rescaling) - can fuse into overlap-add for speed, if desired */
if (blockIdx & 0x01) {
y += NBANDS;
y0 = *y; y += 2*NBANDS;
y1 = *y; y += 2*NBANDS;
y2 = *y; y += 2*NBANDS;
y3 = *y; y += 2*NBANDS;
y4 = *y; y += 2*NBANDS;
y5 = *y; y += 2*NBANDS;
y6 = *y; y += 2*NBANDS;
y7 = *y; y += 2*NBANDS;
y8 = *y; y += 2*NBANDS;
y -= 18*NBANDS;
*y = -y0; y += 2*NBANDS;
*y = -y1; y += 2*NBANDS;
*y = -y2; y += 2*NBANDS;
*y = -y3; y += 2*NBANDS;
*y = -y4; y += 2*NBANDS;
*y = -y5; y += 2*NBANDS;
*y = -y6; y += 2*NBANDS;
*y = -y7; y += 2*NBANDS;
*y = -y8; y += 2*NBANDS;
}
return 0;
} else {
/* undo pre-IMDCT scaling, clipping if necessary */
mOut = 0;
if (blockIdx & 0x01) {
/* frequency invert */
for (i = 0; i < 18; i+=2) {
d = *y; CLIP_2N(d, 31 - es); *y = d << es; mOut |= FASTABS(*y); y += NBANDS;
d = -*y; CLIP_2N(d, 31 - es); *y = d << es; mOut |= FASTABS(*y); y += NBANDS;
d = *xPrev; CLIP_2N(d, 31 - es); *xPrev++ = d << es;
}
} else {
for (i = 0; i < 18; i+=2) {
d = *y; CLIP_2N(d, 31 - es); *y = d << es; mOut |= FASTABS(*y); y += NBANDS;
d = *y; CLIP_2N(d, 31 - es); *y = d << es; mOut |= FASTABS(*y); y += NBANDS;
d = *xPrev; CLIP_2N(d, 31 - es); *xPrev++ = d << es;
}
}
return mOut;
}
}
/* format = Q31
* #define M_PI 3.14159265358979323846
* double u = 2.0 * M_PI / 9.0;
* float c0 = sqrt(3.0) / 2.0;
* float c1 = cos(u);
* float c2 = cos(2*u);
* float c3 = sin(u);
* float c4 = sin(2*u);
*/
static const int c9_0 = 0x6ed9eba1;
static const int c9_1 = 0x620dbe8b;
static const int c9_2 = 0x163a1a7e;
static const int c9_3 = 0x5246dd49;
static const int c9_4 = 0x7e0e2e32;
/* format = Q31
* cos(((0:8) + 0.5) * (pi/18))
*/
static const int c18[9] = {
0x7f834ed0, 0x7ba3751d, 0x7401e4c1, 0x68d9f964, 0x5a82799a, 0x496af3e2, 0x36185aee, 0x2120fb83, 0x0b27eb5c,
};
/* require at least 3 guard bits in x[] to ensure no overflow */
static __inline void idct9(int *x)
{
int a1, a2, a3, a4, a5, a6, a7, a8, a9;
int a10, a11, a12, a13, a14, a15, a16, a17, a18;
int a19, a20, a21, a22, a23, a24, a25, a26, a27;
int m1, m3, m5, m6, m7, m8, m9, m10, m11, m12;
int x0, x1, x2, x3, x4, x5, x6, x7, x8;
x0 = x[0]; x1 = x[1]; x2 = x[2]; x3 = x[3]; x4 = x[4];
x5 = x[5]; x6 = x[6]; x7 = x[7]; x8 = x[8];
a1 = x0 - x6;
a2 = x1 - x5;
a3 = x1 + x5;
a4 = x2 - x4;
a5 = x2 + x4;
a6 = x2 + x8;
a7 = x1 + x7;
a8 = a6 - a5; /* ie x[8] - x[4] */
a9 = a3 - a7; /* ie x[5] - x[7] */
a10 = a2 - x7; /* ie x[1] - x[5] - x[7] */
a11 = a4 - x8; /* ie x[2] - x[4] - x[8] */
/* do the << 1 as constant shifts where mX is actually used (free, no stall or extra inst.) */
m1 = MULSHIFT32(c9_0, x3);
m3 = MULSHIFT32(c9_0, a10);
m5 = MULSHIFT32(c9_1, a5);
m6 = MULSHIFT32(c9_2, a6);
m7 = MULSHIFT32(c9_1, a8);
m8 = MULSHIFT32(c9_2, a5);
m9 = MULSHIFT32(c9_3, a9);
m10 = MULSHIFT32(c9_4, a7);
m11 = MULSHIFT32(c9_3, a3);
m12 = MULSHIFT32(c9_4, a9);
a12 = x[0] + (x[6] >> 1);
a13 = a12 + ( m1 << 1);
a14 = a12 - ( m1 << 1);
a15 = a1 + ( a11 >> 1);
a16 = ( m5 << 1) + (m6 << 1);
a17 = ( m7 << 1) - (m8 << 1);
a18 = a16 + a17;
a19 = ( m9 << 1) + (m10 << 1);
a20 = (m11 << 1) - (m12 << 1);
a21 = a20 - a19;
a22 = a13 + a16;
a23 = a14 + a16;
a24 = a14 + a17;
a25 = a13 + a17;
a26 = a14 - a18;
a27 = a13 - a18;
x0 = a22 + a19; x[0] = x0;
x1 = a15 + (m3 << 1); x[1] = x1;
x2 = a24 + a20; x[2] = x2;
x3 = a26 - a21; x[3] = x3;
x4 = a1 - a11; x[4] = x4;
x5 = a27 + a21; x[5] = x5;
x6 = a25 - a20; x[6] = x6;
x7 = a15 - (m3 << 1); x[7] = x7;
x8 = a23 - a19; x[8] = x8;
}
/* let c(j) = cos(M_PI/36 * ((j)+0.5)), s(j) = sin(M_PI/36 * ((j)+0.5))
* then fastWin[2*j+0] = c(j)*(s(j) + c(j)), j = [0, 8]
* fastWin[2*j+1] = c(j)*(s(j) - c(j))
* format = Q30
*/
static const int fastWin36[18] = {
0x42aace8b, 0xc2e92724, 0x47311c28, 0xc95f619a, 0x4a868feb, 0xd0859d8c,
0x4c913b51, 0xd8243ea0, 0x4d413ccc, 0xe0000000, 0x4c913b51, 0xe7dbc161,
0x4a868feb, 0xef7a6275, 0x47311c28, 0xf6a09e67, 0x42aace8b, 0xfd16d8dd,
};
/**************************************************************************************
* Function: IMDCT36
*
* Description: 36-point modified DCT, with windowing and overlap-add (50% overlap)
*
* Inputs: vector of 18 coefficients (N/2 inputs produces N outputs, by symmetry)
* overlap part of last IMDCT (9 samples - see output comments)
* window type (0,1,2,3) of current and previous block
* current block index (for deciding whether to do frequency inversion)
* number of guard bits in input vector
*
* Outputs: 18 output samples, after windowing and overlap-add with last frame
* second half of (unwindowed) 36-point IMDCT - save for next time
* only save 9 xPrev samples, using symmetry (see WinPrevious())
*
* Notes: this is Ken's hyper-fast algorithm, including symmetric sin window
* optimization, if applicable
* total number of multiplies, general case:
* 2*10 (idct9) + 9 (last stage imdct) + 36 (for windowing) = 65
* total number of multiplies, btCurr == 0 && btPrev == 0:
* 2*10 (idct9) + 9 (last stage imdct) + 18 (for windowing) = 47
*
* blockType == 0 is by far the most common case, so it should be
* possible to use the fast path most of the time
* this is the fastest known algorithm for performing
* long IMDCT + windowing + overlap-add in MP3
*
* Return: mOut (OR of abs(y) for all y calculated here)
*
* TODO: optimize for ARM (reorder window coefs, ARM-style pointers in C,
* inline asm may or may not be helpful)
**************************************************************************************/
static int IMDCT36(int *xCurr, int *xPrev, int *y, int btCurr, int btPrev, int blockIdx, int gb)
{
int i, es, xBuf[18], xPrevWin[18];
int acc1, acc2, s, d, t, mOut;
int xo, xe, c, *xp, yLo, yHi;
const int *cp, *wp;
acc1 = acc2 = 0;
xCurr += 17;
/* 7 gb is always adequate for antialias + accumulator loop + idct9 */
if (gb < 7) {
/* rarely triggered - 5% to 10% of the time on normal clips (with Q25 input) */
es = 7 - gb;
for (i = 8; i >= 0; i--) {
acc1 = ((*xCurr--) >> es) - acc1;
acc2 = acc1 - acc2;
acc1 = ((*xCurr--) >> es) - acc1;
xBuf[i+9] = acc2; /* odd */
xBuf[i+0] = acc1; /* even */
xPrev[i] >>= es;
}
} else {
es = 0;
/* max gain = 18, assume adequate guard bits */
for (i = 8; i >= 0; i--) {
acc1 = (*xCurr--) - acc1;
acc2 = acc1 - acc2;
acc1 = (*xCurr--) - acc1;
xBuf[i+9] = acc2; /* odd */
xBuf[i+0] = acc1; /* even */
}
}
/* xEven[0] and xOdd[0] scaled by 0.5 */
xBuf[9] >>= 1;
xBuf[0] >>= 1;
/* do 9-point IDCT on even and odd */
idct9(xBuf+0); /* even */
idct9(xBuf+9); /* odd */
xp = xBuf + 8;
cp = c18 + 8;
mOut = 0;
if (btPrev == 0 && btCurr == 0) {
/* fast path - use symmetry of sin window to reduce windowing multiplies to 18 (N/2) */
wp = fastWin36;
for (i = 0; i < 9; i++) {
/* do ARM-style pointer arithmetic (i still needed for y[] indexing - compiler spills if 2 y pointers) */
c = *cp--; xo = *(xp + 9); xe = *xp--;
/* gain 2 int bits here */
xo = MULSHIFT32(c, xo); /* 2*c18*xOdd (mul by 2 implicit in scaling) */
xe >>= 2;
s = -(*xPrev); /* sum from last block (always at least 2 guard bits) */
d = -(xe - xo); /* gain 2 int bits, don't shift xo (effective << 1 to eat sign bit, << 1 for mul by 2) */
(*xPrev++) = xe + xo; /* symmetry - xPrev[i] = xPrev[17-i] for long blocks */
t = s - d;
yLo = (d + (MULSHIFT32(t, *wp++) << 2));
yHi = (s + (MULSHIFT32(t, *wp++) << 2));
y[(i)*NBANDS] = yLo;
y[(17-i)*NBANDS] = yHi;
mOut |= FASTABS(yLo);
mOut |= FASTABS(yHi);
}
} else {
/* slower method - either prev or curr is using window type != 0 so do full 36-point window
* output xPrevWin has at least 3 guard bits (xPrev has 2, gain 1 in WinPrevious)
*/
WinPrevious(xPrev, xPrevWin, btPrev);
wp = imdctWin[btCurr];
for (i = 0; i < 9; i++) {
c = *cp--; xo = *(xp + 9); xe = *xp--;
/* gain 2 int bits here */
xo = MULSHIFT32(c, xo); /* 2*c18*xOdd (mul by 2 implicit in scaling) */
xe >>= 2;
d = xe - xo;
(*xPrev++) = xe + xo; /* symmetry - xPrev[i] = xPrev[17-i] for long blocks */
yLo = (xPrevWin[i] + MULSHIFT32(d, wp[i])) << 2;
yHi = (xPrevWin[17-i] + MULSHIFT32(d, wp[17-i])) << 2;
y[(i)*NBANDS] = yLo;
y[(17-i)*NBANDS] = yHi;
mOut |= FASTABS(yLo);
mOut |= FASTABS(yHi);
}
}
xPrev -= 9;
mOut |= FreqInvertRescale(y, xPrev, blockIdx, es);
return mOut;
}
static const int c3_0 = 0x6ed9eba1; /* format = Q31, cos(pi/6) */
static const int c6[3] = { 0x7ba3751d, 0x5a82799a, 0x2120fb83 }; /* format = Q31, cos(((0:2) + 0.5) * (pi/6)) */
/* 12-point inverse DCT, used in IMDCT12x3()
* 4 input guard bits will ensure no overflow
*/
static __inline void imdct12 (int *x, int *out)
{
int a0, a1, a2;
int x0, x1, x2, x3, x4, x5;
x0 = *x; x+=3; x1 = *x; x+=3;
x2 = *x; x+=3; x3 = *x; x+=3;
x4 = *x; x+=3; x5 = *x; x+=3;
x4 -= x5;
x3 -= x4;
x2 -= x3;
x3 -= x5;
x1 -= x2;
x0 -= x1;
x1 -= x3;
x0 >>= 1;
x1 >>= 1;
a0 = MULSHIFT32(c3_0, x2) << 1;
a1 = x0 + (x4 >> 1);
a2 = x0 - x4;
x0 = a1 + a0;
x2 = a2;
x4 = a1 - a0;
a0 = MULSHIFT32(c3_0, x3) << 1;
a1 = x1 + (x5 >> 1);
a2 = x1 - x5;
/* cos window odd samples, mul by 2, eat sign bit */
x1 = MULSHIFT32(c6[0], a1 + a0) << 2;
x3 = MULSHIFT32(c6[1], a2) << 2;
x5 = MULSHIFT32(c6[2], a1 - a0) << 2;
*out = x0 + x1; out++;
*out = x2 + x3; out++;
*out = x4 + x5; out++;
*out = x4 - x5; out++;
*out = x2 - x3; out++;
*out = x0 - x1;
}
/**************************************************************************************
* Function: IMDCT12x3
*
* Description: three 12-point modified DCT's for short blocks, with windowing,
* short block concatenation, and overlap-add
*
* Inputs: 3 interleaved vectors of 6 samples each
* (block0[0], block1[0], block2[0], block0[1], block1[1]....)
* overlap part of last IMDCT (9 samples - see output comments)
* window type (0,1,2,3) of previous block
* current block index (for deciding whether to do frequency inversion)
* number of guard bits in input vector
*
* Outputs: updated sample vector x, net gain of 1 integer bit
* second half of (unwindowed) IMDCT's - save for next time
* only save 9 xPrev samples, using symmetry (see WinPrevious())
*
* Return: mOut (OR of abs(y) for all y calculated here)
*
* TODO: optimize for ARM
**************************************************************************************/
static int IMDCT12x3(int *xCurr, int *xPrev, int *y, int btPrev, int blockIdx, int gb)
{
int i, es, mOut, yLo, xBuf[18], xPrevWin[18]; /* need temp buffer for reordering short blocks */
const int *wp;
es = 0;
/* 7 gb is always adequate for accumulator loop + idct12 + window + overlap */
if (gb < 7) {
es = 7 - gb;
for (i = 0; i < 18; i+=2) {
xCurr[i+0] >>= es;
xCurr[i+1] >>= es;
*xPrev++ >>= es;
}
xPrev -= 9;
}
/* requires 4 input guard bits for each imdct12 */
imdct12(xCurr + 0, xBuf + 0);
imdct12(xCurr + 1, xBuf + 6);
imdct12(xCurr + 2, xBuf + 12);
/* window previous from last time */
WinPrevious(xPrev, xPrevWin, btPrev);
/* could unroll this for speed, minimum loads (short blocks usually rare, so doesn't make much overall difference)
* xPrevWin[i] << 2 still has 1 gb always, max gain of windowed xBuf stuff also < 1.0 and gain the sign bit
* so y calculations won't overflow
*/
wp = imdctWin[2];
mOut = 0;
for (i = 0; i < 3; i++) {
yLo = (xPrevWin[ 0+i] << 2);
mOut |= FASTABS(yLo); y[( 0+i)*NBANDS] = yLo;
yLo = (xPrevWin[ 3+i] << 2);
mOut |= FASTABS(yLo); y[( 3+i)*NBANDS] = yLo;
yLo = (xPrevWin[ 6+i] << 2) + (MULSHIFT32(wp[0+i], xBuf[3+i]));
mOut |= FASTABS(yLo); y[( 6+i)*NBANDS] = yLo;
yLo = (xPrevWin[ 9+i] << 2) + (MULSHIFT32(wp[3+i], xBuf[5-i]));
mOut |= FASTABS(yLo); y[( 9+i)*NBANDS] = yLo;
yLo = (xPrevWin[12+i] << 2) + (MULSHIFT32(wp[6+i], xBuf[2-i]) + MULSHIFT32(wp[0+i], xBuf[(6+3)+i]));
mOut |= FASTABS(yLo); y[(12+i)*NBANDS] = yLo;
yLo = (xPrevWin[15+i] << 2) + (MULSHIFT32(wp[9+i], xBuf[0+i]) + MULSHIFT32(wp[3+i], xBuf[(6+5)-i]));
mOut |= FASTABS(yLo); y[(15+i)*NBANDS] = yLo;
}
/* save previous (unwindowed) for overlap - only need samples 6-8, 12-17 */
for (i = 6; i < 9; i++)
*xPrev++ = xBuf[i] >> 2;
for (i = 12; i < 18; i++)
*xPrev++ = xBuf[i] >> 2;
xPrev -= 9;
mOut |= FreqInvertRescale(y, xPrev, blockIdx, es);
return mOut;
}
/**************************************************************************************
* Function: HybridTransform
*
* Description: IMDCT's, windowing, and overlap-add on long/short/mixed blocks
*
* Inputs: vector of input coefficients, length = nBlocksTotal * 18)
* vector of overlap samples from last time, length = nBlocksPrev * 9)
* buffer for output samples, length = MAXNSAMP
* SideInfoSub struct for this granule/channel
* BlockCount struct with necessary info
* number of non-zero input and overlap blocks
* number of long blocks in input vector (rest assumed to be short blocks)
* number of blocks which use long window (type) 0 in case of mixed block
* (bc->currWinSwitch, 0 for non-mixed blocks)
*
* Outputs: transformed, windowed, and overlapped sample buffer
* does frequency inversion on odd blocks
* updated buffer of samples for overlap
*
* Return: number of non-zero IMDCT blocks calculated in this call
* (including overlap-add)
*
* TODO: examine mixedBlock/winSwitch logic carefully (test he_mode.bit)
**************************************************************************************/
static int HybridTransform(int *xCurr, int *xPrev, int y[BLOCK_SIZE][NBANDS], SideInfoSub *sis, BlockCount *bc)
{
int xPrevWin[18], currWinIdx, prevWinIdx;
int i, j, nBlocksOut, nonZero, mOut;
int fiBit, xp;
ASSERT(bc->nBlocksLong <= NBANDS);
ASSERT(bc->nBlocksTotal <= NBANDS);
ASSERT(bc->nBlocksPrev <= NBANDS);
mOut = 0;
/* do long blocks, if any */
for(i = 0; i < bc->nBlocksLong; i++) {
/* currWinIdx picks the right window for long blocks (if mixed, long blocks use window type 0) */
currWinIdx = sis->blockType;
if (sis->mixedBlock && i < bc->currWinSwitch)
currWinIdx = 0;
prevWinIdx = bc->prevType;
if (i < bc->prevWinSwitch)
prevWinIdx = 0;
/* do 36-point IMDCT, including windowing and overlap-add */
mOut |= IMDCT36(xCurr, xPrev, &(y[0][i]), currWinIdx, prevWinIdx, i, bc->gbIn);
xCurr += 18;
xPrev += 9;
}
/* do short blocks (if any) */
for ( ; i < bc->nBlocksTotal; i++) {
ASSERT(sis->blockType == 2);
prevWinIdx = bc->prevType;
if (i < bc->prevWinSwitch)
prevWinIdx = 0;
mOut |= IMDCT12x3(xCurr, xPrev, &(y[0][i]), prevWinIdx, i, bc->gbIn);
xCurr += 18;
xPrev += 9;
}
nBlocksOut = i;
/* window and overlap prev if prev longer that current */
for ( ; i < bc->nBlocksPrev; i++) {
prevWinIdx = bc->prevType;
if (i < bc->prevWinSwitch)
prevWinIdx = 0;
WinPrevious(xPrev, xPrevWin, prevWinIdx);
nonZero = 0;
fiBit = i << 31;
for (j = 0; j < 9; j++) {
xp = xPrevWin[2*j+0] << 2; /* << 2 temp for scaling */
nonZero |= xp;
y[2*j+0][i] = xp;
mOut |= FASTABS(xp);
/* frequency inversion on odd blocks/odd samples (flip sign if i odd, j odd) */
xp = xPrevWin[2*j+1] << 2;
xp = (xp ^ (fiBit >> 31)) + (i & 0x01);
nonZero |= xp;
y[2*j+1][i] = xp;
mOut |= FASTABS(xp);
xPrev[j] = 0;
}
xPrev += 9;
if (nonZero)
nBlocksOut = i;
}
/* clear rest of blocks */
for ( ; i < 32; i++) {
for (j = 0; j < 18; j++)
y[j][i] = 0;
}
bc->gbOut = CLZ(mOut) - 1;
return nBlocksOut;
}
/**************************************************************************************
* Function: IMDCT
*
* Description: do alias reduction, inverse MDCT, overlap-add, and frequency inversion
*
* Inputs: MP3DecInfo structure filled by UnpackFrameHeader(), UnpackSideInfo(),
* UnpackScaleFactors(), and DecodeHuffman() (for this granule, channel)
* includes PCM samples in overBuf (from last call to IMDCT) for OLA
* index of current granule and channel
*
* Outputs: PCM samples in outBuf, for input to subband transform
* PCM samples in overBuf, for OLA next time
* updated hi->nonZeroBound index for this channel
*
* Return: 0 on success, -1 if null input pointers
**************************************************************************************/
int IMDCT(MP3DecInfo *mp3DecInfo, int gr, int ch)
{
int nBfly, blockCutoff;
FrameHeader *fh;
SideInfo *si;
HuffmanInfo *hi;
IMDCTInfo *mi;
BlockCount bc;
/* validate pointers */
if (!mp3DecInfo || !mp3DecInfo->FrameHeaderPS || !mp3DecInfo->SideInfoPS ||
!mp3DecInfo->HuffmanInfoPS || !mp3DecInfo->IMDCTInfoPS)
return -1;
/* si is an array of up to 4 structs, stored as gr0ch0, gr0ch1, gr1ch0, gr1ch1 */
fh = (FrameHeader *)(mp3DecInfo->FrameHeaderPS);
si = (SideInfo *)(mp3DecInfo->SideInfoPS);
hi = (HuffmanInfo*)(mp3DecInfo->HuffmanInfoPS);
mi = (IMDCTInfo *)(mp3DecInfo->IMDCTInfoPS);
/* anti-aliasing done on whole long blocks only
* for mixed blocks, nBfly always 1, except 3 for 8 kHz MPEG 2.5 (see sfBandTab)
* nLongBlocks = number of blocks with (possibly) non-zero power
* nBfly = number of butterflies to do (nLongBlocks - 1, unless no long blocks)
*/
blockCutoff = fh->sfBand->l[(fh->ver == MPEG1 ? 8 : 6)] / 18; /* same as 3* num short sfb's in spec */
if (si->sis[gr][ch].blockType != 2) {
/* all long transforms */
bc.nBlocksLong = MIN((hi->nonZeroBound[ch] + 7) / 18 + 1, 32);
nBfly = bc.nBlocksLong - 1;
} else if (si->sis[gr][ch].blockType == 2 && si->sis[gr][ch].mixedBlock) {
/* mixed block - long transforms until cutoff, then short transforms */
bc.nBlocksLong = blockCutoff;
nBfly = bc.nBlocksLong - 1;
} else {
/* all short transforms */
bc.nBlocksLong = 0;
nBfly = 0;
}
AntiAlias(hi->huffDecBuf[ch], nBfly);
hi->nonZeroBound[ch] = MAX(hi->nonZeroBound[ch], (nBfly * 18) + 8);
ASSERT(hi->nonZeroBound[ch] <= MAX_NSAMP);
/* for readability, use a struct instead of passing a million parameters to HybridTransform() */
bc.nBlocksTotal = (hi->nonZeroBound[ch] + 17) / 18;
bc.nBlocksPrev = mi->numPrevIMDCT[ch];
bc.prevType = mi->prevType[ch];
bc.prevWinSwitch = mi->prevWinSwitch[ch];
bc.currWinSwitch = (si->sis[gr][ch].mixedBlock ? blockCutoff : 0); /* where WINDOW switches (not nec. transform) */
bc.gbIn = hi->gb[ch];
mi->numPrevIMDCT[ch] = HybridTransform(hi->huffDecBuf[ch], mi->overBuf[ch], mi->outBuf[ch], &si->sis[gr][ch], &bc);
mi->prevType[ch] = si->sis[gr][ch].blockType;
mi->prevWinSwitch[ch] = bc.currWinSwitch; /* 0 means not a mixed block (either all short or all long) */
mi->gb[ch] = bc.gbOut;
ASSERT(mi->numPrevIMDCT[ch] <= NBANDS);
/* output has gained 2 int bits */
return 0;
}

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/* ***** BEGIN LICENSE BLOCK *****
* Version: RCSL 1.0/RPSL 1.0
*
* Portions Copyright (c) 1995-2002 RealNetworks, Inc. All Rights Reserved.
*
* The contents of this file, and the files included with this file, are
* subject to the current version of the RealNetworks Public Source License
* Version 1.0 (the "RPSL") available at
* http://www.helixcommunity.org/content/rpsl unless you have licensed
* the file under the RealNetworks Community Source License Version 1.0
* (the "RCSL") available at http://www.helixcommunity.org/content/rcsl,
* in which case the RCSL will apply. You may also obtain the license terms
* directly from RealNetworks. You may not use this file except in
* compliance with the RPSL or, if you have a valid RCSL with RealNetworks
* applicable to this file, the RCSL. Please see the applicable RPSL or
* RCSL for the rights, obligations and limitations governing use of the
* contents of the file.
*
* This file is part of the Helix DNA Technology. RealNetworks is the
* developer of the Original Code and owns the copyrights in the portions
* it created.
*
* This file, and the files included with this file, is distributed and made
* available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
*
* Technology Compatibility Kit Test Suite(s) Location:
* http://www.helixcommunity.org/content/tck
*
* Contributor(s):
*
* ***** END LICENSE BLOCK ***** */
/**************************************************************************************
* Fixed-point MP3 decoder
* Jon Recker (jrecker@real.com), Ken Cooke (kenc@real.com)
* June 2003
*
* polyphase.c - final stage of subband transform (polyphase synthesis filter)
*
* This is the C reference version using __int64
* Look in the appropriate subdirectories for optimized asm implementations
* (e.g. arm/asmpoly.s)
**************************************************************************************/
#include "coder.h"
#include "assembly.h"
/* input to Polyphase = Q(DQ_FRACBITS_OUT-2), gain 2 bits in convolution
* we also have the implicit bias of 2^15 to add back, so net fraction bits =
* DQ_FRACBITS_OUT - 2 - 2 - 15
* (see comment on Dequantize() for more info)
*/
#define DEF_NFRACBITS (DQ_FRACBITS_OUT - 2 - 2 - 15)
#define CSHIFT 12 /* coefficients have 12 leading sign bits for early-terminating mulitplies */
static __inline short ClipToShort(int x, int fracBits)
{
int sign;
/* assumes you've already rounded (x += (1 << (fracBits-1))) */
x >>= fracBits;
/* Ken's trick: clips to [-32768, 32767] */
sign = x >> 31;
if (sign != (x >> 15))
x = sign ^ ((1 << 15) - 1);
return (short)x;
}
#define MC0M(x) { \
c1 = *coef; coef++; c2 = *coef; coef++; \
vLo = *(vb1+(x)); vHi = *(vb1+(23-(x))); \
sum1L = MADD64(sum1L, vLo, c1); sum1L = MADD64(sum1L, vHi, -c2); \
}
#define MC1M(x) { \
c1 = *coef; coef++; \
vLo = *(vb1+(x)); \
sum1L = MADD64(sum1L, vLo, c1); \
}
#define MC2M(x) { \
c1 = *coef; coef++; c2 = *coef; coef++; \
vLo = *(vb1+(x)); vHi = *(vb1+(23-(x))); \
sum1L = MADD64(sum1L, vLo, c1); sum2L = MADD64(sum2L, vLo, c2); \
sum1L = MADD64(sum1L, vHi, -c2); sum2L = MADD64(sum2L, vHi, c1); \
}
/**************************************************************************************
* Function: PolyphaseMono
*
* Description: filter one subband and produce 32 output PCM samples for one channel
*
* Inputs: pointer to PCM output buffer
* number of "extra shifts" (vbuf format = Q(DQ_FRACBITS_OUT-2))
* pointer to start of vbuf (preserved from last call)
* start of filter coefficient table (in proper, shuffled order)
* no minimum number of guard bits is required for input vbuf
* (see additional scaling comments below)
*
* Outputs: 32 samples of one channel of decoded PCM data, (i.e. Q16.0)
*
* Return: none
*
* TODO: add 32-bit version for platforms where 64-bit mul-acc is not supported
* (note max filter gain - see polyCoef[] comments)
**************************************************************************************/
void PolyphaseMono(short *pcm, int *vbuf, const int *coefBase)
{
int i;
const int *coef;
int *vb1;
int vLo, vHi, c1, c2;
Word64 sum1L, sum2L, rndVal;
rndVal = (Word64)( 1 << (DEF_NFRACBITS - 1 + (32 - CSHIFT)) );
/* special case, output sample 0 */
coef = coefBase;
vb1 = vbuf;
sum1L = rndVal;
MC0M(0)
MC0M(1)
MC0M(2)
MC0M(3)
MC0M(4)
MC0M(5)
MC0M(6)
MC0M(7)
*(pcm + 0) = ClipToShort((int)SAR64(sum1L, (32-CSHIFT)), DEF_NFRACBITS);
/* special case, output sample 16 */
coef = coefBase + 256;
vb1 = vbuf + 64*16;
sum1L = rndVal;
MC1M(0)
MC1M(1)
MC1M(2)
MC1M(3)
MC1M(4)
MC1M(5)
MC1M(6)
MC1M(7)
*(pcm + 16) = ClipToShort((int)SAR64(sum1L, (32-CSHIFT)), DEF_NFRACBITS);
/* main convolution loop: sum1L = samples 1, 2, 3, ... 15 sum2L = samples 31, 30, ... 17 */
coef = coefBase + 16;
vb1 = vbuf + 64;
pcm++;
/* right now, the compiler creates bad asm from this... */
for (i = 15; i > 0; i--) {
sum1L = sum2L = rndVal;
MC2M(0)
MC2M(1)
MC2M(2)
MC2M(3)
MC2M(4)
MC2M(5)
MC2M(6)
MC2M(7)
vb1 += 64;
*(pcm) = ClipToShort((int)SAR64(sum1L, (32-CSHIFT)), DEF_NFRACBITS);
*(pcm + 2*i) = ClipToShort((int)SAR64(sum2L, (32-CSHIFT)), DEF_NFRACBITS);
pcm++;
}
}
#define MC0S(x) { \
c1 = *coef; coef++; c2 = *coef; coef++; \
vLo = *(vb1+(x)); vHi = *(vb1+(23-(x))); \
sum1L = MADD64(sum1L, vLo, c1); sum1L = MADD64(sum1L, vHi, -c2); \
vLo = *(vb1+32+(x)); vHi = *(vb1+32+(23-(x))); \
sum1R = MADD64(sum1R, vLo, c1); sum1R = MADD64(sum1R, vHi, -c2); \
}
#define MC1S(x) { \
c1 = *coef; coef++; \
vLo = *(vb1+(x)); \
sum1L = MADD64(sum1L, vLo, c1); \
vLo = *(vb1+32+(x)); \
sum1R = MADD64(sum1R, vLo, c1); \
}
#define MC2S(x) { \
c1 = *coef; coef++; c2 = *coef; coef++; \
vLo = *(vb1+(x)); vHi = *(vb1+(23-(x))); \
sum1L = MADD64(sum1L, vLo, c1); sum2L = MADD64(sum2L, vLo, c2); \
sum1L = MADD64(sum1L, vHi, -c2); sum2L = MADD64(sum2L, vHi, c1); \
vLo = *(vb1+32+(x)); vHi = *(vb1+32+(23-(x))); \
sum1R = MADD64(sum1R, vLo, c1); sum2R = MADD64(sum2R, vLo, c2); \
sum1R = MADD64(sum1R, vHi, -c2); sum2R = MADD64(sum2R, vHi, c1); \
}
/**************************************************************************************
* Function: PolyphaseStereo
*
* Description: filter one subband and produce 32 output PCM samples for each channel
*
* Inputs: pointer to PCM output buffer
* number of "extra shifts" (vbuf format = Q(DQ_FRACBITS_OUT-2))
* pointer to start of vbuf (preserved from last call)
* start of filter coefficient table (in proper, shuffled order)
* no minimum number of guard bits is required for input vbuf
* (see additional scaling comments below)
*
* Outputs: 32 samples of two channels of decoded PCM data, (i.e. Q16.0)
*
* Return: none
*
* Notes: interleaves PCM samples LRLRLR...
*
* TODO: add 32-bit version for platforms where 64-bit mul-acc is not supported
**************************************************************************************/
void PolyphaseStereo(short *pcm, int *vbuf, const int *coefBase)
{
int i;
const int *coef;
int *vb1;
int vLo, vHi, c1, c2;
Word64 sum1L, sum2L, sum1R, sum2R, rndVal;
rndVal = (Word64)( 1 << (DEF_NFRACBITS - 1 + (32 - CSHIFT)) );
/* special case, output sample 0 */
coef = coefBase;
vb1 = vbuf;
sum1L = sum1R = rndVal;
MC0S(0)
MC0S(1)
MC0S(2)
MC0S(3)
MC0S(4)
MC0S(5)
MC0S(6)
MC0S(7)
*(pcm + 0) = ClipToShort((int)SAR64(sum1L, (32-CSHIFT)), DEF_NFRACBITS);
*(pcm + 1) = ClipToShort((int)SAR64(sum1R, (32-CSHIFT)), DEF_NFRACBITS);
/* special case, output sample 16 */
coef = coefBase + 256;
vb1 = vbuf + 64*16;
sum1L = sum1R = rndVal;
MC1S(0)
MC1S(1)
MC1S(2)
MC1S(3)
MC1S(4)
MC1S(5)
MC1S(6)
MC1S(7)
*(pcm + 2*16 + 0) = ClipToShort((int)SAR64(sum1L, (32-CSHIFT)), DEF_NFRACBITS);
*(pcm + 2*16 + 1) = ClipToShort((int)SAR64(sum1R, (32-CSHIFT)), DEF_NFRACBITS);
/* main convolution loop: sum1L = samples 1, 2, 3, ... 15 sum2L = samples 31, 30, ... 17 */
coef = coefBase + 16;
vb1 = vbuf + 64;
pcm += 2;
/* right now, the compiler creates bad asm from this... */
for (i = 15; i > 0; i--) {
sum1L = sum2L = rndVal;
sum1R = sum2R = rndVal;
MC2S(0)
MC2S(1)
MC2S(2)
MC2S(3)
MC2S(4)
MC2S(5)
MC2S(6)
MC2S(7)
vb1 += 64;
*(pcm + 0) = ClipToShort((int)SAR64(sum1L, (32-CSHIFT)), DEF_NFRACBITS);
*(pcm + 1) = ClipToShort((int)SAR64(sum1R, (32-CSHIFT)), DEF_NFRACBITS);
*(pcm + 2*2*i + 0) = ClipToShort((int)SAR64(sum2L, (32-CSHIFT)), DEF_NFRACBITS);
*(pcm + 2*2*i + 1) = ClipToShort((int)SAR64(sum2R, (32-CSHIFT)), DEF_NFRACBITS);
pcm += 2;
}
}

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Copyright (c) 1995-2004 RealNetworks, Inc. All Rights Reserved.
The contents of this directory, and (except where otherwise
indicated) the directories included within this directory, are
subject to the current version of the RealNetworks Public Source
License (the "RPSL") available at RPSL.txt in this directory, unless
you have licensed the directory under the current version of the
RealNetworks Community Source License (the "RCSL") available at
RCSL.txt in this directory, in which case the RCSL will apply. You
may also obtain the license terms directly from RealNetworks. You
may not use the files in this directory except in compliance with the
RPSL or, if you have a valid RCSL with RealNetworks applicable to
this directory, the RCSL. Please see the applicable RPSL or RCSL for
the rights, obligations and limitations governing use of the contents
of the directory.
This directory is part of the Helix DNA Technology. RealNetworks is
the developer of the Original Code and owns the copyrights in the
portions it created.
This directory, and the directories included with this directory, are
distributed and made available on an 'AS IS' basis, WITHOUT WARRANTY
OF ANY KIND, EITHER EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY
DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
QUIET ENJOYMENT OR NON-INFRINGEMENT.
Technology Compatibility Kit Test Suite(s) Location:
http://www.helixcommunity.org/content/tck

948
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The RCSL is made up of a base agreement and a few Attachments.
For Research and Development use, you agree to the terms of the
RCSL R&D License (base RCSL and Attachments A, B, and C)
For Commercial Use (either distribution or internal commercial
deployment) of the Helix DNA with or without support for RealNetworks'
RealAudio and RealVideo Add-on Technology, you agree to the
terms of the same RCSL R&D license
and execute one or more additional Commercial Use License attachments
<see http://www.helixcommunity.org/content/rcsl-attachments>.
------------------------------------------------------------------------
REALNETWORKS COMMUNITY SOURCE LICENSE
Version 1.2 (Rev. Date: January 22, 2003).
RECITALS
Original Contributor has developed Specifications, Source Code
implementations and Executables of certain Technology; and
Original Contributor desires to license the Technology to a large
community to facilitate research, innovation and product development
while maintaining compatibility of such products with the Technology as
delivered by Original Contributor; and
Original Contributor desires to license certain Trademarks for the
purpose of branding products that are compatible with the relevant
Technology delivered by Original Contributor; and
You desire to license the Technology and possibly certain Trademarks
from Original Contributor on the terms and conditions specified in this
License.
In consideration for the mutual covenants contained herein, You and
Original Contributor agree as follows:
AGREEMENT
*1. Introduction.*
The RealNetworks Community Source License ("RCSL") and effective
attachments ("License") may include five distinct licenses:
i) Research Use license -- License plus Attachments A, B and C only.
ii) Commercial Use and Trademark License, which may be for Internal
Deployment Use or external distribution, or both -- License plus
Attachments A, B, C, and D.
iii) Technology Compatibility Kit (TCK) license -- Attachment C.
iv) Add-On Technology License (Executable) Commercial Use License
-Attachment F.
v) Add-On Technology Source Code Porting and Optimization
License-Attachment G.
The Research Use license is effective when You click and accept this
License. The TCK is effective when You click and accept this License,
unless otherwise specified in the TCK attachments. The Commercial Use
and Trademark, Add-On Technology License, and the Add-On Technology
Source Code Porting and Optimization licenses must each be signed by You
and Original Contributor to become effective. Once effective, these
licenses and the associated requirements and responsibilities are
cumulative. Capitalized terms used in this License are defined in the
Glossary.
*2. License Grants.*
2.1 Original Contributor Grant.
Subject to Your compliance with Sections 3, 8.10 and Attachment A of
this License, Original Contributor grants to You a worldwide,
royalty-free, non-exclusive license, to the extent of Original
Contributor's Intellectual Property Rights covering the Original Code,
Upgraded Code and Specifications, to do the following:
(a) Research Use License:
(i) use, reproduce and modify the Original Code, Upgraded Code and
Specifications to create Modifications and Reformatted Specifications
for Research Use by You;
(ii) publish and display Original Code, Upgraded Code and Specifications
with, or as part of Modifications, as permitted under Section 3.1(b) below;
(iii) reproduce and distribute copies of Original Code and Upgraded Code
to Licensees and students for Research Use by You;
(iv) compile, reproduce and distribute Original Code and Upgraded Code
in Executable form, and Reformatted Specifications to anyone for
Research Use by You.
(b) Other than the licenses expressly granted in this License, Original
Contributor retains all right, title, and interest in Original Code and
Upgraded Code and Specifications.
2.2 Your Grants.
(a) To Other Licensees. You hereby grant to each Licensee a license to
Your Error Corrections and Shared Modifications, of the same scope and
extent as Original Contributor's licenses under Section 2.1 a) above
relative to Research Use and Attachment D relative to Commercial Use.
(b) To Original Contributor. You hereby grant to Original Contributor a
worldwide, royalty-free, non-exclusive, perpetual and irrevocable
license, to the extent of Your Intellectual Property Rights covering
Your Error Corrections, Shared Modifications and Reformatted
Specifications, to use, reproduce, modify, display and distribute Your
Error Corrections, Shared Modifications and Reformatted Specifications,
in any form, including the right to sublicense such rights through
multiple tiers of distribution.
(c) Other than the licenses expressly granted in Sections 2.2(a) and (b)
above, and the restrictions set forth in Section 3.1(d)(iv) below, You
retain all right, title, and interest in Your Error Corrections, Shared
Modifications and Reformatted Specifications.
2.3 Contributor Modifications.
You may use, reproduce, modify, display and distribute Contributor Error
Corrections, Shared Modifications and Reformatted Specifications,
obtained by You under this License, to the same scope and extent as with
Original Code, Upgraded Code and Specifications.
2.4 Subcontracting.
You may deliver the Source Code of Covered Code to other Licensees
having at least a Research Use license, for the sole purpose of
furnishing development services to You in connection with Your rights
granted in this License. All such Licensees must execute appropriate
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License, and acknowledging their work-made-for-hire status or assigning
exclusive right to the work product and associated Intellectual Property
Rights to You.
*3. Requirements and Responsibilities*.
3.1 Research Use License.
As a condition of exercising the rights granted under Section 2.1(a)
above, You agree to comply with the following:
(a) Your Contribution to the Community. All Error Corrections and Shared
Modifications which You create or contribute to are automatically
subject to the licenses granted under Section 2.2 above. You are
encouraged to license all of Your other Modifications under Section 2.2
as Shared Modifications, but are not required to do so. You agree to
notify Original Contributor of any errors in the Specification.
(b) Source Code Availability. You agree to provide all Your Error
Corrections to Original Contributor as soon as reasonably practicable
and, in any event, prior to Internal Deployment Use or Commercial Use,
if applicable. Original Contributor may, at its discretion, post Source
Code for Your Error Corrections and Shared Modifications on the
Community Webserver. You may also post Error Corrections and Shared
Modifications on a web-server of Your choice; provided, that You must
take reasonable precautions to ensure that only Licensees have access to
such Error Corrections and Shared Modifications. Such precautions shall
include, without limitation, a password protection scheme limited to
Licensees and a click-on, download certification of Licensee status
required of those attempting to download from the server. An example of
an acceptable certification is attached as Attachment A-2.
(c) Notices. All Error Corrections and Shared Modifications You create
or contribute to must include a file documenting the additions and
changes You made and the date of such additions and changes. You must
also include the notice set forth in Attachment A-1 in the file header.
If it is not possible to put the notice in a particular Source Code file
due to its structure, then You must include the notice in a location
(such as a relevant directory file), where a recipient would be most
likely to look for such a notice.
(d) Redistribution.
(i) Source. Covered Code may be distributed in Source Code form only to
another Licensee (except for students as provided below). You may not
offer or impose any terms on any Covered Code that alter the rights,
requirements, or responsibilities of such Licensee. You may distribute
Covered Code to students for use in connection with their course work
and research projects undertaken at accredited educational institutions.
Such students need not be Licensees, but must be given a copy of the
notice set forth in Attachment A-3 and such notice must also be included
in a file header or prominent location in the Source Code made available
to such students.
(ii) Executable. You may distribute Executable version(s) of Covered
Code to Licensees and other third parties only for the purpose of
evaluation and comment in connection with Research Use by You and under
a license of Your choice, but which limits use of such Executable
version(s) of Covered Code only to that purpose.
(iii) Modified Class, Interface and Package Naming. In connection with
Research Use by You only, You may use Original Contributor's class,
Interface and package names only to accurately reference or invoke the
Source Code files You modify. Original Contributor grants to You a
limited license to the extent necessary for such purposes.
(iv) You expressly agree that any distribution, in whole or in part, of
Modifications developed by You shall only be done pursuant to the terms
and conditions of this License.
(e) Extensions.
(i) Covered Code. You may not include any Source Code of Community Code
in any Extensions. You may include the compiled Header Files of
Community Code in an Extension provided that Your use of the Covered
Code, including Heading Files, complies with the Commercial Use License,
the TCK and all other terms of this License.
(ii) Publication. No later than the date on which You first distribute
such Extension for Commercial Use, You must publish to the industry, on
a non-confidential basis and free of all copyright restrictions with
respect to reproduction and use, an accurate and current specification
for any Extension. In addition, You must make available an appropriate
test suite, pursuant to the same rights as the specification,
sufficiently detailed to allow any third party reasonably skilled in the
technology to produce implementations of the Extension compatible with
the specification. Such test suites must be made available as soon as
reasonably practicable but, in no event, later than ninety (90) days
after Your first Commercial Use of the Extension. You must use
reasonable efforts to promptly clarify and correct the specification and
the test suite upon written request by Original Contributor.
(iii) Open. You agree to refrain from enforcing any Intellectual
Property Rights You may have covering any interface(s) of Your
Extension, which would prevent the implementation of such interface(s)
by Original Contributor or any Licensee. This obligation does not
prevent You from enforcing any Intellectual Property Right You have that
would otherwise be infringed by an implementation of Your Extension.
(iv) Interface Modifications and Naming. You may not modify or add to
the GUID space * * "xxxxxxxx-0901-11d1-8B06-00A024406D59" or any other
GUID space designated by Original Contributor. You may not modify any
Interface prefix provided with the Covered Code or any other prefix
designated by Original Contributor.* *
* *
(f) You agree that any Specifications provided to You by Original
Contributor are confidential and proprietary information of Original
Contributor. You must maintain the confidentiality of the Specifications
and may not disclose them to any third party without Original
Contributor's prior written consent. You may only use the Specifications
under the terms of this License and only for the purpose of implementing
the terms of this License with respect to Covered Code. You agree not
use, copy or distribute any such Specifications except as provided in
writing by Original Contributor.
3.2 Commercial Use License.
You may not make Commercial Use of any Covered Code unless You and
Original Contributor have executed a copy of the Commercial Use and
Trademark License attached as Attachment D.
*4. Versions of the License.*
4.1 License Versions.
Original Contributor may publish revised versions of the License from
time to time. Each version will be given a distinguishing version number.
4.2 Effect.
Once a particular version of Covered Code has been provided under a
version of the License, You may always continue to use such Covered Code
under the terms of that version of the License. You may also choose to
use such Covered Code under the terms of any subsequent version of the
License. No one other than Original Contributor has the right to
promulgate License versions.
4.3 Multiple-Licensed Code.
Original Contributor may designate portions of the Covered Code as
"Multiple-Licensed." "Multiple-Licensed" means that the Original
Contributor permits You to utilize those designated portions of the
Covered Code under Your choice of this License or the alternative
license(s), if any, specified by the Original Contributor in an
Attachment to this License.
*5. Disclaimer of Warranty.*
5.1 COVERED CODE PROVIDED AS IS.
COVERED CODE IS PROVIDED UNDER THIS LICENSE "AS IS," WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION,
WARRANTIES THAT THE COVERED CODE IS FREE OF DEFECTS, MERCHANTABLE, FIT
FOR A PARTICULAR PURPOSE OR NON-INFRINGING. YOU AGREE TO BEAR THE ENTIRE
RISK IN CONNECTION WITH YOUR USE AND DISTRIBUTION OF COVERED CODE UNDER
THIS LICENSE. THIS DISCLAIMER OF WARRANTY CONSTITUTES AN ESSENTIAL PART
OF THIS LICENSE. NO USE OF ANY COVERED CODE IS AUTHORIZED HEREUNDER
EXCEPT SUBJECT TO THIS DISCLAIMER.
5.2 Not Designed for High Risk Activities.
You acknowledge that Original Code, Upgraded Code and Specifications are
not designed or intended for use in high risk activities including, but
not limited to: (i) on-line control of aircraft, air traffic, aircraft
navigation or aircraft communications; or (ii) in the design,
construction, operation or maintenance of any nuclear facility. Original
Contributor disclaims any express or implied warranty of fitness for
such uses.
*6. Termination.*
6.1 By You.
You may terminate this Research Use license at anytime by providing
written notice to Original Contributor.
6.2 By Original Contributor.
This License and the rights granted hereunder will terminate:
(i) automatically if You fail to comply with the terms of this License
and fail to cure such breach within 30 days of receipt of written notice
of the breach;
(ii) immediately in the event of circumstances specified in Sections 7.1
and 8.4; or
(iii) at Original Contributor's discretion upon any action initiated by
You (including by cross-claim or counter claim) alleging that use or
distribution by Original Contributor or any Licensee, of Original Code,
Upgraded Code, Error Corrections, Shared Modifications or Specifications
infringe a patent owned or controlled by You.
6.3 Effective of Termination.
Upon termination, You agree to discontinue use of and destroy all copies
of Covered Code in Your possession. All sublicenses to the Covered Code
which You have properly granted shall survive any termination of this
License. Provisions that, by their nature, should remain in effect
beyond the termination of this License shall survive including, without
limitation, Sections 2.2, 3, 5, 7 and 8.
6.4 No Compensation.
Each party waives and releases the other from any claim to compensation
or indemnity for permitted or lawful termination of the business
relationship established by this License.
*7. Liability.*
7.1 Infringement. Should any of the Original Code, Upgraded Code, TCK or
Specifications ("Materials") become the subject of a claim of
infringement, Original Contributor may, at its sole option, (i) attempt
to procure the rights necessary for You to continue using the Materials,
(ii) modify the Materials so that they are no longer infringing, or
(iii) terminate Your right to use the Materials, immediately upon
written notice, and refund to You the amount, if any, having then
actually been paid by You to Original Contributor for the Original Code,
Upgraded Code and TCK, depreciated on a straight line, five year basis.
7.2 LIMITATION OF LIABILITY. TO THE FULL EXTENT ALLOWED BY APPLICABLE
LAW, ORIGINAL CONTRIBUTOR'S LIABILITY TO YOU FOR CLAIMS RELATING TO THIS
LICENSE, WHETHER FOR BREACH OR IN TORT, SHALL BE LIMITED TO ONE HUNDRED
PERCENT (100%) OF THE AMOUNT HAVING THEN ACTUALLY BEEN PAID BY YOU TO
ORIGINAL CONTRIBUTOR FOR ALL COPIES LICENSED HEREUNDER OF THE PARTICULAR
ITEMS GIVING RISE TO SUCH CLAIM, IF ANY, DURING THE TWELVE MONTHS
PRECEDING THE CLAIMED BREACH. IN NO EVENT WILL YOU (RELATIVE TO YOUR
SHARED MODIFICATIONS OR ERROR CORRECTIONS) OR ORIGINAL CONTRIBUTOR BE
LIABLE FOR ANY INDIRECT, PUNITIVE, SPECIAL, INCIDENTAL OR CONSEQUENTIAL
DAMAGES IN CONNECTION WITH OR RISING OUT OF THIS LICENSE (INCLUDING,
WITHOUT LIMITATION, LOSS OF PROFITS, USE, DATA, OR OTHER ECONOMIC
ADVANTAGE), HOWEVER IT ARISES AND ON ANY THEORY OF LIABILITY, WHETHER IN
AN ACTION FOR CONTRACT, STRICT LIABILITY OR TORT (INCLUDING NEGLIGENCE)
OR OTHERWISE, WHETHER OR NOT YOU OR ORIGINAL CONTRIBUTOR HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE AND NOTWITHSTANDING THE
FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY.
*8. Miscellaneous.*
8.1 Trademark.
You shall not use any Trademark unless You and Original Contributor
execute a copy of the Commercial Use and Trademark License Agreement
attached hereto as Attachment D. Except as expressly provided in the
License, You are granted no right, title or license to, or interest in,
any Trademarks. Whether or not You and Original Contributor enter into
the Trademark License, You agree not to (i) challenge Original
Contributor's ownership or use of Trademarks; (ii) attempt to register
any Trademarks, or any mark or logo substantially similar thereto; or
(iii) incorporate any Trademarks into Your own trademarks, product
names, service marks, company names, or domain names.
8.2 Integration.
This License represents the complete agreement concerning the subject
matter hereof.
8.3 Assignment.
Original Contributor may assign this License, and its rights and
obligations hereunder, in its sole discretion. You may assign the
Research Use portions of this License and the TCK license to a third
party upon prior written notice to Original Contributor (which may be
provided electronically via the Community Web-Server). You may not
assign the Commercial Use and Trademark license, the Add-On Technology
License, or the Add-On Technology Source Code Porting License, including
by way of merger (regardless of whether You are the surviving entity) or
acquisition, without Original Contributor's prior written consent.
8.4 Severability.
If any provision of this License is held to be unenforceable, such
provision shall be reformed only to the extent necessary to make it
enforceable. Notwithstanding the foregoing, if You are prohibited by law
from fully and specifically complying with Sections 2.2 or 3, this
License will immediately terminate and You must immediately discontinue
any use of Covered Code.
8.5 Governing Law.
This License shall be governed by the laws of the United States and the
State of Washington, as applied to contracts entered into and to be
performed in Washington between Washington residents. The application of
the United Nations Convention on Contracts for the International Sale of
Goods is expressly excluded. You agree that the state and federal courts
located in Seattle, Washington have exclusive jurisdiction over any
claim relating to the License, including contract and tort claims.
8.6 Dispute Resolution.
a) Arbitration. Any dispute arising out of or relating to this License
shall be finally settled by arbitration as set out herein, except that
either party may bring any action, in a court of competent jurisdiction
(which jurisdiction shall be exclusive), with respect to any dispute
relating to such party's Intellectual Property Rights or with respect to
Your compliance with the TCK license. Arbitration shall be administered:
(i) by the American Arbitration Association (AAA), (ii) in accordance
with the rules of the United Nations Commission on International Trade
Law (UNCITRAL) (the "Rules") in effect at the time of arbitration as
modified herein; and (iii) the arbitrator will apply the substantive
laws of Washington and the United States. Judgment upon the award
rendered by the arbitrator may be entered in any court having
jurisdiction to enforce such award.
b) Arbitration language, venue and damages. All arbitration proceedings
shall be conducted in English by a single arbitrator selected in
accordance with the Rules, who must be fluent in English and be either a
retired judge or practicing attorney having at least ten (10) years
litigation experience and be reasonably familiar with the technology
matters relative to the dispute. Unless otherwise agreed, arbitration
venue shall be in Seattle, Washington. The arbitrator may award monetary
damages only and nothing shall preclude either party from seeking
provisional or emergency relief from a court of competent jurisdiction.
The arbitrator shall have no authority to award damages in excess of
those permitted in this License and any such award in excess is void.
All awards will be payable in U.S. dollars and may include, for the
prevailing party (i) pre-judgment award interest, (ii) reasonable
attorneys' fees incurred in connection with the arbitration, and (iii)
reasonable costs and expenses incurred in enforcing the award. The
arbitrator will order each party to produce identified documents and
respond to no more than twenty-five single question interrogatories.
8.7 Construction.
Any law or regulation, which provides that the language of a contract
shall be construed against the drafter, shall not apply to this License.
8.8 U.S. Government End Users.
The Covered Code is a "commercial item," as that term is defined in 48
C.F.R. 2.101 (Oct. 1995), consisting of "commercial computer software"
and "commercial computer software documentation," as such terms are used
in 48 C.F.R. 12.212 (Sept. 1995). Consistent with 48 C.F.R. 12.212 and
48 C.F.R. 227.7202-1 through 227.7202-4 (June 1995), all U.S. Government
End Users acquire Covered Code with only those rights set forth herein.
You agree to pass this notice to our licensees.
8.9 Marketing Activities.
Licensee hereby grants Original Contributor a non-exclusive,
non-transferable, limited license to use the Licensee's company name and
logo ("Licensee Marks") in any presentations, press releases, or
marketing materials solely for the purpose of identifying Licensee as a
member of the Helix Community. Licensee shall provide samples of
Licensee Marks to Original Contributor upon request by Original
Contributor. Original Contributor acknowledges that the Licensee Marks
are the trademarks of Licensee. Original Contributor shall not use the
Licensee Marks in a way that may imply that Original Contributor is an
agency or branch of Licensee. Original Contributor understands and
agrees that the use of any Licensee Marks in connection with this
Agreement shall not create any right, title or interest, in, or to the
Licensee Marks or any Licensee trademarks and that all such use and
goodwill associated with any such trademarks will inure to the benefit
of Licensee. Further the Original Contributor will stop usage of the
Licensee Marks upon Licensee's request.
8.10 Press Announcements.
You may make press announcements or other public statements regarding
this License without the prior written consent of the Original
Contributor, if Your statement is limited to announcing the licensing of
the Covered Code or the availability of Your Product and its
compatibility with the Covered Code. All other public announcements
regarding this license require the prior written consent of the Original
Contributor. Consent requests are welcome at press@helixcommunity.org.
8.11 International Use.
a) Export/Import laws. Covered Code is subject to U.S. export control
laws and may be subject to export or import regulations in other
countries. Each party agrees to comply strictly with all such laws and
regulations and acknowledges their responsibility to obtain such
licenses to export, re-export, or import as may be required. You agree
to pass these obligations to Your licensees.
b) Intellectual Property Protection. Due to limited intellectual
property protection and enforcement in certain countries, You agree not
to redistribute the Original Code, Upgraded Code, TCK and Specifications
to any country on the list of restricted countries on the Community Web
Server.
8.12 Language.
This License is in the English language only, which language shall be
controlling in all respects, and all versions of this License in any
other language shall be for accommodation only and shall not be binding
on the parties to this License. All communications and notices made or
given pursuant to this License, and all documentation and support to be
provided, unless otherwise noted, shall be in the English language.
PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE
"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND
CONDITIONS OF THIS LICENSE WITH REALNETWORKS, INC. IF YOU ARE AGREEING
TO THIS LICENSE ON BEHALF OF A COMPANY, YOU REPRESENT THAT YOU ARE
AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. WHETHER YOU ARE ACTING
ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, YOU MUST BE OF MAJORITY
AGE AND BE OTHERWISE COMPETENT TO ENTER INTO CONTRACTS. IF YOU DO NOT
MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY OF THE TERMS AND
CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON TO EXIT.
GLOSSARY
1. *"Added Value"* means code which:
(i) has a principal purpose which is substantially different from that
of the stand-alone Technology;
(ii) represents a significant functional and value enhancement to the
Technology;
(iii) operates in conjunction with the Technology; and
(iv) is not marketed as a technology which replaces or substitutes for
the Technology
2. "*Applicable Patent Rights*" mean: (a) in the case where Original
Contributor is the grantor of rights, claims of patents that (i) are now
or hereafter acquired, owned by or assigned to Original Contributor and
(ii) are necessarily infringed by using or making the Original Code or
Upgraded Code, including Modifications provided by Original Contributor,
alone and not in combination with other software or hardware; and (b) in
the case where Licensee is the grantor of rights, claims of patents that
(i) are now or hereafter acquired, owned by or assigned to Licensee and
(ii) are infringed (directly or indirectly) by using or making
Licensee's Modifications or Error Corrections, taken alone or in
combination with Covered Code.
3. "*Application Programming Interfaces (APIs)"* means the interfaces,
associated header files, service provider interfaces, and protocols that
enable a device, application, Operating System, or other program to
obtain services from or make requests of (or provide services in
response to requests from) other programs, and to use, benefit from, or
rely on the resources, facilities, and capabilities of the relevant
programs using the APIs. APIs includes the technical documentation
describing the APIs, the Source Code constituting the API, and any
Header Files used with the APIs.
4. "*Commercial Use*" means any use (internal or external), copying,
sublicensing or distribution (internal or external), directly or
indirectly of Covered Code by You other than Your Research Use of
Covered Code within Your business or organization or in conjunction with
other Licensees with equivalent Research Use rights. Commercial Use
includes any use of the Covered Code for direct or indirect commercial
or strategic gain, advantage or other business purpose. Any Commercial
Use requires execution of Attachment D by You and Original Contributor.
5. "*Community Code*" means the Original Code, Upgraded Code, Error
Corrections, Shared Modifications, or any combination thereof.
6. "*Community Webserver(s)"* means the webservers designated by
Original Contributor for access to the Original Code, Upgraded Code, TCK
and Specifications and for posting Error Corrections and Shared
Modifications.
7. "*Compliant Covered Code*" means Covered Code that complies with the
requirements of the TCK.
8. "*Contributor*" means each Licensee that creates or contributes to
the creation of any Error Correction or Shared Modification.
9. "*Covered Code*" means the Original Code, Upgraded Code,
Modifications, or any combination thereof.
10. "*Error Correction*" means any change made to Community Code which
conforms to the Specification and corrects the adverse effect of a
failure of Community Code to perform any function set forth in or
required by the Specifications.
11. "*Executable*" means Covered Code that has been converted from
Source Code to the preferred form for execution by a computer or digital
processor (e.g. binary form).
12. "*Extension(s)"* means any additional Interfaces developed by or for
You which: (i) are designed for use with the Technology; (ii) constitute
an API for a library of computing functions or services; and (iii) are
disclosed or otherwise made available to third party software developers
for the purpose of developing software which invokes such additional
Interfaces. The foregoing shall not apply to software developed by Your
subcontractors to be exclusively used by You.
13. "*Header File(s)"* means that portion of the Source Code that
provides the names and types of member functions, data members, class
definitions, and interface definitions necessary to implement the APIs
for the Covered Code. Header Files include, files specifically
designated by Original Contributor as Header Files. Header Files do not
include the code necessary to implement the functionality underlying the
Interface.
14. *"Helix DNA Server Technology"* means the program(s) that implement
the Helix Universal Server streaming engine for the Technology as
defined in the Specification.
15. *"Helix DNA Client Technology"* means the Covered Code that
implements the RealOne Player engine as defined in the Specification.
16. *"Helix DNA Producer Technology"* means the Covered Code that
implements the Helix Producer engine as defined in the Specification.
17. *"Helix DNA Technology"* means the Helix DNA Server Technology, the
Helix DNA Client Technology, the Helix DNA Producer Technology and other
Helix technologies designated by Original Contributor.
18. "*Intellectual Property Rights*" means worldwide statutory and
common law rights associated solely with (i) Applicable Patent Rights;
(ii) works of authorship including copyrights, copyright applications,
copyright registrations and "moral rights"; (iii) the protection of
trade and industrial secrets and confidential information; and (iv)
divisions, continuations, renewals, and re-issuances of the foregoing
now existing or acquired in the future.
19. *"Interface*" means interfaces, functions, properties, class
definitions, APIs, Header Files, GUIDs, V-Tables, and/or protocols
allowing one piece of software, firmware or hardware to communicate or
interoperate with another piece of software, firmware or hardware.
20. "*Internal Deployment Use*" means use of Compliant Covered Code
(excluding Research Use) within Your business or organization only by
Your employees and/or agents on behalf of Your business or organization,
but not to provide services, including content distribution, to third
parties, subject to execution of Attachment D by You and Original
Contributor, if required.
21. "*Licensee*" means any party that has entered into and has in effect
a version of this License with Original Contributor.
22. "*MIME type*" means a description of what type of media or other
content is in a file, including by way of example but not limited to
'audio/x-pn-realaudio-plugin.'
23. "*Modification(s)"* means (i) any addition to, deletion from and/or
change to the substance and/or structure of the Covered Code, including
Interfaces; (ii) the combination of any Covered Code and any previous
Modifications; (iii) any new file or other representation of computer
program statements that contains any portion of Covered Code; and/or
(iv) any new Source Code implementing any portion of the Specifications.
24. "*MP3 Patents*" means any patents necessary to make, use or sell
technology implementing any portion of the specification developed by
the Moving Picture Experts Group known as MPEG-1 Audio Layer-3 or MP3,
including but not limited to all past and future versions, profiles,
extensions, parts and amendments relating to the MP3 specification.
25. "*MPEG-4 Patents*" means any patents necessary to make, use or sell
technology implementing any portion of the specification developed by
the Moving Pictures Experts Group known as MPEG-4, including but not
limited to all past and future versions, profiles, extensions, parts and
amendments relating to the MPEG-4 specification.
26. "*Original Code*" means the initial Source Code for the Technology
as described on the Community Web Server.
27. "*Original Contributor*" means RealNetworks, Inc., its affiliates
and its successors and assigns.
28. "*Original Contributor MIME Type*" means the MIME registry, browser
preferences, or local file/protocol associations invoking any Helix DNA
Client-based application, including the RealOne Player, for playback of
RealAudio, RealVideo, other RealMedia MIME types or datatypes (e.g.,
.ram, .rnx, .rpm, .ra, .rm, .rp, .rt, .rf, .prx, .mpe, .rmp, .rmj, .rav,
.rjs, .rmx, .rjt, .rms), and any other Original Contributor-specific or
proprietary MIME types that Original Contributor may introduce in the
future.
29. "*Personal Use*" means use of Covered Code by an individual solely
for his or her personal, private and non-commercial purposes. An
individual's use of Covered Code in his or her capacity as an officer,
employee, member, independent contractor or agent of a corporation,
business or organization (commercial or non-commercial) does not qualify
as Personal Use.
30. "*RealMedia File Format*" means the file format designed and
developed by RealNetworks for storing multimedia data and used to store
RealAudio and RealVideo encoded streams. Valid RealMedia File Format
extensions include: .rm, .rmj, .rmc, .rmvb, .rms.
31. "*RCSL Webpage*" means the RealNetworks Community Source License
webpage located at https://www.helixcommunity.org/content/rcsl or such
other URL that Original Contributor may designate from time to time.
32. "*Reformatted Specifications*" means any revision to the
Specifications which translates or reformats the Specifications (as for
example in connection with Your documentation) but which does not alter,
subset or superset * *the functional or operational aspects of the
Specifications.
33. "*Research Use*" means use and distribution of Covered Code only for
Your Personal Use, research or development use and expressly excludes
Internal Deployment Use and Commercial Use. Research Use also includes
use of Covered Code to teach individuals how to use Covered Code.
34. "*Shared Modifications*" means Modifications that You distribute or
use for a Commercial Use, in addition to any Modifications provided by
You, at Your option, pursuant to Section 2.2, or received by You from a
Contributor pursuant to Section 2.3.
35. "*Source Code*" means the preferred form of the Covered Code for
making modifications to it, including all modules it contains, plus any
associated interface definition files, scripts used to control
compilation and installation of an Executable, or source code
differential comparisons against either the Original Code or another
well known, available Covered Code of the Contributor's choice. The
Source Code can be in a compressed or archival form, provided the
appropriate decompression or de-archiving software is widely available
for no charge.
36. "*Specifications*" means the specifications for the Technology and
other documentation, as designated on the Community Web Server, as may
be revised by Original Contributor from time to time.
37. "*Trademarks*" means Original Contributor's trademarks and logos,
including, but not limited to, RealNetworks, RealAudio, RealVideo,
RealOne, RealSystem, SureStream, Helix, Helix DNA and other trademarks
whether now used or adopted in the future.
38. "*Technology*" means the technology described in Attachment B, and
Upgrades.
39. "*Technology Compatibility Kit"* or *"TCK*" means the test programs,
procedures, acceptance criteria and/or other requirements, designated by
Original Contributor for use in verifying compliance of Covered Code
with the Specifications, in conjunction with the Original Code and
Upgraded Code. Original Contributor may, in its sole discretion and from
time to time, revise a TCK to correct errors and/or omissions and in
connection with Upgrades.
40. "*Upgrade(s)"* means new versions of Technology designated
exclusively by Original Contributor as an "Upgrade" and released by
Original Contributor from time to time under the terms of the License.
41. "*Upgraded Code*" means the Source Code and/or Executables for
Upgrades, possibly including Modifications made by Contributors.
42. *"User's Guide"* means the users guide for the TCK which Original
Contributor makes available to You to provide direction in how to run
the TCK and properly interpret the results, as may be revised by
Original Contributor from time to time.
43. "*You(r)*" means an individual, or a legal entity acting by and
through an individual or individuals, exercising rights either under
this License or under a future version of this License issued pursuant
to Section 4.1. For legal entities, "You(r)" includes any entity that by
majority voting interest controls, is controlled by, or is under common
control with You.
44. "*Your Products*" means any (i) hardware products You distribute
integrating the Covered Code; (ii) any software products You distribute
with the Covered Code that utilize the APIs of the Covered Code; or
(iii) any services You provide using the Covered Code.
ATTACHMENT A
REQUIRED NOTICES
ATTACHMENT A-1
REQUIRED IN ALL CASES
Notice to be included in header file of all Error Corrections and Shared
Modifications:
Portions Copyright 1994-2003 © RealNetworks, Inc. All rights reserved.
The contents of this file, and the files included with this file, are
subject to the current version of RealNetworks Community Source License
Version 1.1 (the "License"). You may not use this file except in
compliance with the License executed by both You and RealNetworks. You
may obtain a copy of the License at *
https://www.helixcommunity.org/content/rcsl.* You may also obtain a copy
of the License by contacting RealNetworks directly. Please see the
License for the rights, obligations and limitations governing use of the
contents of the file.
This file is part of the Helix DNA technology. RealNetworks, Inc., is
the developer of the Original code and owns the copyrights in the
portions it created.
This file, and the files included with this file, are distributed on an
'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT
LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
Contributor(s):
_______________________________________________
Technology Compatibility Kit Test Suite(s) Location:
________________________________
ATTACHMENT A-2
SAMPLE LICENSEE CERTIFICATION
"By clicking the `Agree' button below, You certify that You are a
Licensee in good standing under the RealNetworks Community Source
License, ("License") and that Your access, use and distribution of code
and information You may obtain at this site is subject to the License.
If You are not a Licensee under the RealNetworks Community Source
License You agree not to download, copy or use the Helix DNA technology.
ATTACHMENT A-3
REQUIRED STUDENT NOTIFICATION
"This software and related documentation has been obtained by Your
educational institution subject to the RealNetworks Community Source
License. You have been provided access to the software and related
documentation for use only in connection with your course work and
research activities as a matriculated student of Your educational
institution. Any other use is expressly prohibited.
THIS SOFTWARE AND RELATED DOCUMENTATION CONTAINS PROPRIETARY MATERIAL OF
REALNETWORKS, INC, WHICH ARE PROTECTED BY VARIOUS INTELLECTUAL PROPERTY
RIGHTS.
You may not use this file except in compliance with the License. You may
obtain a copy of the License on the web at
https://www.helixcommunity.org/content/rcsl.
*
*
ATTACHMENT B
Description of Technology
Helix DNA, which consists of Helix DNA Client, Helix DNA Server and
Helix DNA Producer.
Description of "Technology"
Helix DNA Technology v1.0 as described on the Community Web Server.
ATTACHMENT C
TECHNOLOGY COMPATIBILITY KIT LICENSE
The following license is effective for the *Helix DNA* Technology
Compatibility Kit - as described on the Community Web Server. The
Technology Compatibility Kit(s) for the Technology specified in
Attachment B may be accessed at the Community Web Server.
1. TCK License.
1.1 Grants to use TCK
Subject to the terms and restrictions set forth below and the
RealNetworks Community Source License, and the Research Use license,
Original Contributor grants to You a worldwide, non-exclusive,
non-transferable license, to the extent of Original Contributor's
Intellectual Property Rights in the TCK (without the right to
sublicense), to use the TCK to develop and test Covered Code.
1.2 TCK Use Restrictions.
You are not authorized to create derivative works of the TCK or use the
TCK to test any implementation of the Specification that is not Covered
Code. You may not publish Your test results or make claims of
comparative compatibility with respect to other implementations of the
Specification. In consideration for the license grant in Section 1.1
above You agree not to develop Your own tests that are intended to
validate conformation with the Specification.
2. Test Results.
You agree to provide to Original Contributor or the third party test
facility if applicable, Your test results that demonstrate that Covered
Code is Compliant Covered Code and that Original Contributor may publish
or otherwise distribute such test results.
PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE
"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND
CONDITIONS OF THIS LICENSE WITH THE ORIGINAL CONTRIBUTOR, REALNETWORKS,
INC. IF YOU ARE AGREEING TO THIS LICENSE ON BEHALF OF A COMPANY, YOU
REPRESENT THAT YOU ARE AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE.
WHETHER YOU ARE ACTING ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY,
YOU MUST BE OF MAJORITY AGE AND BE OTHERWISE COMPETENT TO ENTER INTO
CONTRACTS. IF YOU DO NOT MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY
OF THE TERMS AND CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON
TO EXIT.
*ACCEPT / REJECT
*
*
*
*To agree to the R&D/academic terms of this license, please register
<https://www.helixcommunity.org/2002/intro/why-register> on the site --
you will then be given a chance to agree to the clickwrap RCSL
<https://reguseronly.helixcommunity.org/2002/clickwrap/rcsl-clickwrap>
R&D License
<https://reguseronly.helixcommunity.org/2002/clickwrap/rcsl-clickwrap>
and gain access to the RCSL-licensed source code. To build or deploy
commercial applications based on the RCSL, you will need to agree to the
Commercial Use license attachments
<https://www.helixcommunity.org/content/rcsl-attachments>*

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RealNetworks Public Source License Version 1.0
(Rev. Date October 28, 2002)
1. General Definitions. This License applies to any program or other work which
RealNetworks, Inc., or any other entity that elects to use this license,
("Licensor") makes publicly available and which contains a notice placed by
Licensor identifying such program or work as "Original Code" and stating that it
is subject to the terms of this RealNetworks Public Source License version 1.0
(or subsequent version thereof) ("License"). You are not required to accept this
License. However, nothing else grants You permission to use, copy, modify or
distribute the software or its derivative works. These actions are prohibited by
law if You do not accept this License. Therefore, by modifying, copying or
distributing the software (or any work based on the software), You indicate your
acceptance of this License to do so, and all its terms and conditions. In
addition, you agree to the terms of this License by clicking the Accept button
or downloading the software. As used in this License:
1.1 "Applicable Patent Rights" mean: (a) in the case where Licensor is the
grantor of rights, claims of patents that (i) are now or hereafter acquired,
owned by or assigned to Licensor and (ii) are necessarily infringed by using or
making the Original Code alone and not in combination with other software or
hardware; and (b) in the case where You are the grantor of rights, claims of
patents that (i) are now or hereafter acquired, owned by or assigned to You and
(ii) are infringed (directly or indirectly) by using or making Your
Modifications, taken alone or in combination with Original Code.
1.2 "Compatible Source License" means any one of the licenses listed on Exhibit
B or at https://www.helixcommunity.org/content/complicense or other licenses
specifically identified by Licensor in writing. Notwithstanding any term to the
contrary in any Compatible Source License, any code covered by any Compatible
Source License that is used with Covered Code must be made readily available in
Source Code format for royalty-free use under the terms of the Compatible Source
License or this License.
1.3 "Contributor" means any person or entity that creates or contributes to the
creation of Modifications.
1.4 "Covered Code" means the Original Code, Modifications, the combination of
Original Code and any Modifications, and/or any respective portions thereof.
1.5 "Deploy" means to use, sublicense or distribute Covered Code other than for
Your internal research and development (R&D) and/or Personal Use, and includes
without limitation, any and all internal use or distribution of Covered Code
within Your business or organization except for R&D use and/or Personal Use, as
well as direct or indirect sublicensing or distribution of Covered Code by You
to any third party in any form or manner.
1.6 "Derivative Work" means either the Covered Code or any derivative work under
United States copyright law, and including any work containing or including any
portion of the Covered Code or Modifications, either verbatim or with
modifications and/or translated into another language. Derivative Work also
includes any work which combines any portion of Covered Code or Modifications
with code not otherwise governed by the terms of this License.
1.7 "Externally Deploy" means to Deploy the Covered Code in any way that may be
accessed or used by anyone other than You, used to provide any services to
anyone other than You, or used in any way to deliver any content to anyone other
than You, whether the Covered Code is distributed to those parties, made
available as an application intended for use over a computer network, or used to
provide services or otherwise deliver content to anyone other than You.
1.8. "Interface" means interfaces, functions, properties, class definitions,
APIs, header files, GUIDs, V-Tables, and/or protocols allowing one piece of
software, firmware or hardware to communicate or interoperate with another piece
of software, firmware or hardware.
1.9 "Modifications" mean any addition to, deletion from, and/or change to, the
substance and/or structure of the Original Code, any previous Modifications, the
combination of Original Code and any previous Modifications, and/or any
respective portions thereof. When code is released as a series of files, a
Modification is: (a) any addition to or deletion from the contents of a file
containing Covered Code; and/or (b) any new file or other representation of
computer program statements that contains any part of Covered Code.
1.10 "Original Code" means (a) the Source Code of a program or other work as
originally made available by Licensor under this License, including the Source
Code of any updates or upgrades to such programs or works made available by
Licensor under this License, and that has been expressly identified by Licensor
as such in the header file(s) of such work; and (b) the object code compiled
from such Source Code and originally made available by Licensor under this
License.
1.11 "Personal Use" means use of Covered Code by an individual solely for his or
her personal, private and non-commercial purposes. An individual's use of
Covered Code in his or her capacity as an officer, employee, member, independent
contractor or agent of a corporation, business or organization (commercial or
non-commercial) does not qualify as Personal Use.
1.12 "Source Code" means the human readable form of a program or other work that
is suitable for making modifications to it, including all modules it contains,
plus any associated interface definition files, scripts used to control
compilation and installation of an executable (object code).
1.13 "You" or "Your" means an individual or a legal entity exercising rights
under this License. For legal entities, "You" or "Your" includes any entity
which controls, is controlled by, or is under common control with, You, where
"control" means (a) the power, direct or indirect, to cause the direction or
management of such entity, whether by contract or otherwise, or (b) ownership of
fifty percent (50%) or more of the outstanding shares or beneficial ownership of
such entity.
2. Permitted Uses; Conditions & Restrictions. Subject to the terms and
conditions of this License, Licensor hereby grants You, effective on the date
You accept this License (via downloading or using Covered Code or otherwise
indicating your acceptance of this License), a worldwide, royalty-free,
non-exclusive copyright license, to the extent of Licensor's copyrights cover
the Original Code, to do the following:
2.1 You may reproduce, display, perform, modify and Deploy Covered Code,
provided that in each instance:
(a) You must retain and reproduce in all copies of Original Code the copyright
and other proprietary notices and disclaimers of Licensor as they appear in the
Original Code, and keep intact all notices in the Original Code that refer to
this License;
(b) You must include a copy of this License with every copy of Source Code of
Covered Code and documentation You distribute, and You may not offer or impose
any terms on such Source Code that alter or restrict this License or the
recipients' rights hereunder, except as permitted under Section 6;
(c) You must duplicate, to the extent it does not already exist, the notice in
Exhibit A in each file of the Source Code of all Your Modifications, and cause
the modified files to carry prominent notices stating that You changed the files
and the date of any change;
(d) You must make Source Code of all Your Externally Deployed Modifications
publicly available under the terms of this License, including the license grants
set forth in Section 3 below, for as long as you Deploy the Covered Code or
twelve (12) months from the date of initial Deployment, whichever is longer. You
should preferably distribute the Source Code of Your Deployed Modifications
electronically (e.g. download from a web site); and
(e) if You Deploy Covered Code in object code, executable form only, You must
include a prominent notice, in the code itself as well as in related
documentation, stating that Source Code of the Covered Code is available under
the terms of this License with information on how and where to obtain such
Source Code. You must also include the Object Code Notice set forth in Exhibit A
in the "about" box or other appropriate place where other copyright notices are
placed, including any packaging materials.
2.2 You expressly acknowledge and agree that although Licensor and each
Contributor grants the licenses to their respective portions of the Covered Code
set forth herein, no assurances are provided by Licensor or any Contributor that
the Covered Code does not infringe the patent or other intellectual property
rights of any other entity. Licensor and each Contributor disclaim any liability
to You for claims brought by any other entity based on infringement of
intellectual property rights or otherwise. As a condition to exercising the
rights and licenses granted hereunder, You hereby assume sole responsibility to
secure any other intellectual property rights needed, if any. For example, if a
third party patent license is required to allow You to make, use, sell, import
or offer for sale the Covered Code, it is Your responsibility to acquire such
license(s).
2.3 Subject to the terms and conditions of this License, Licensor hereby grants
You, effective on the date You accept this License (via downloading or using
Covered Code or otherwise indicating your acceptance of this License), a
worldwide, royalty-free, perpetual, non-exclusive patent license under
Licensor's Applicable Patent Rights to make, use, sell, offer for sale and
import the Covered Code, provided that in each instance you comply with the
terms of this License.
3. Your Grants. In consideration of, and as a condition to, the licenses granted
to You under this License:
(a) You grant to Licensor and all third parties a non-exclusive, perpetual,
irrevocable, royalty free license under Your Applicable Patent Rights and other
intellectual property rights owned or controlled by You, to make, sell, offer
for sale, use, import, reproduce, display, perform, modify, distribute and
Deploy Your Modifications of the same scope and extent as Licensor's licenses
under Sections 2.1 and 2.2; and
(b) You grant to Licensor and its subsidiaries a non-exclusive, worldwide,
royalty-free, perpetual and irrevocable license, under Your Applicable Patent
Rights and other intellectual property rights owned or controlled by You, to
make, use, sell, offer for sale, import, reproduce, display, perform,
distribute, modify or have modified (for Licensor and/or its subsidiaries),
sublicense and distribute Your Modifications, in any form and for any purpose,
through multiple tiers of distribution.
(c) You agree not use any information derived from Your use and review of the
Covered Code, including but not limited to any algorithms or inventions that may
be contained in the Covered Code, for the purpose of asserting any of Your
patent rights, or assisting a third party to assert any of its patent rights,
against Licensor or any Contributor.
4. Derivative Works. You may create a Derivative Work by combining Covered Code
with other code not otherwise governed by the terms of this License and
distribute the Derivative Work as an integrated product. In each such instance,
You must make sure the requirements of this License are fulfilled for the
Covered Code or any portion thereof, including all Modifications.
4.1 You must cause any Derivative Work that you distribute, publish or
Externally Deploy, that in whole or in part contains or is derived from the
Covered Code or any part thereof, to be licensed as a whole at no charge to all
third parties under the terms of this License and no other license except as
provided in Section 4.2. You also must make Source Code available for the
Derivative Work under the same terms as Modifications, described in Sections 2
and 3, above.
4.2 Compatible Source Licenses. Software modules that have been independently
developed without any use of Covered Code and which contain no portion of the
Covered Code, Modifications or other Derivative Works, but are used or combined
in any way wtih the Covered Code or any Derivative Work to form a larger
Derivative Work, are exempt from the conditions described in Section 4.1 but
only to the extent that: the software module, including any software that is
linked to, integrated with, or part of the same applications as, the software
module by any method must be wholly subject to one of the Compatible Source
Licenses. Notwithstanding the foregoing, all Covered Code must be subject to the
terms of this License. Thus, the entire Derivative Work must be licensed under a
combination of the RPSL (for Covered Code) and a Compatible Source License for
any independently developed software modules within the Derivative Work. The
foregoing requirement applies even if the Compatible Source License would
ordinarily allow the software module to link with, or form larger works with,
other software that is not subject to the Compatible Source License. For
example, although the Mozilla Public License v1.1 allows Mozilla code to be
combined with proprietary software that is not subject to the MPL, if
MPL-licensed code is used with Covered Code the MPL-licensed code could not be
combined or linked with any code not governed by the MPL. The general intent of
this section 4.2 is to enable use of Covered Code with applications that are
wholly subject to an acceptable open source license. You are responsible for
determining whether your use of software with Covered Code is allowed under Your
license to such software.
4.3 Mere aggregation of another work not based on the Covered Code with the
Covered Code (or with a work based on the Covered Code) on a volume of a storage
or distribution medium does not bring the other work under the scope of this
License. If You deliver the Covered Code for combination and/or integration with
an application previously provided by You (for example, via automatic updating
technology), such combination and/or integration constitutes a Derivative Work
subject to the terms of this License.
5. Exclusions From License Grant. Nothing in this License shall be deemed to
grant any rights to trademarks, copyrights, patents, trade secrets or any other
intellectual property of Licensor or any Contributor except as expressly stated
herein. No right is granted to the trademarks of Licensor or any Contributor
even if such marks are included in the Covered Code. Nothing in this License
shall be interpreted to prohibit Licensor from licensing under different terms
from this License any code that Licensor otherwise would have a right to
license. Modifications, Derivative Works and/or any use or combination of
Covered Code with other technology provided by Licensor or third parties may
require additional patent licenses from Licensor which Licensor may grant in its
sole discretion. No patent license is granted separate from the Original Code or
combinations of the Original Code with other software or hardware.
5.1. Trademarks. This License does not grant any rights to use the trademarks or
trade names owned by Licensor ("Licensor Marks" defined in Exhibit C) or to any
trademark or trade name belonging to any Contributor. No Licensor Marks may be
used to endorse or promote products derived from the Original Code other than as
permitted by the Licensor Trademark Policy defined in Exhibit C.
6. Additional Terms. You may choose to offer, and to charge a fee for, warranty,
support, indemnity or liability obligations and/or other rights consistent with
the scope of the license granted herein ("Additional Terms") to one or more
recipients of Covered Code. However, You may do so only on Your own behalf and
as Your sole responsibility, and not on behalf of Licensor or any Contributor.
You must obtain the recipient's agreement that any such Additional Terms are
offered by You alone, and You hereby agree to indemnify, defend and hold
Licensor and every Contributor harmless for any liability incurred by or claims
asserted against Licensor or such Contributor by reason of any such Additional
Terms.
7. Versions of the License. Licensor may publish revised and/or new versions of
this License from time to time. Each version will be given a distinguishing
version number. Once Original Code has been published under a particular version
of this License, You may continue to use it under the terms of that version. You
may also choose to use such Original Code under the terms of any subsequent
version of this License published by Licensor. No one other than Licensor has
the right to modify the terms applicable to Covered Code created under this
License.
8. NO WARRANTY OR SUPPORT. The Covered Code may contain in whole or in part
pre-release, untested, or not fully tested works. The Covered Code may contain
errors that could cause failures or loss of data, and may be incomplete or
contain inaccuracies. You expressly acknowledge and agree that use of the
Covered Code, or any portion thereof, is at Your sole and entire risk. THE
COVERED CODE IS PROVIDED "AS IS" AND WITHOUT WARRANTY, UPGRADES OR SUPPORT OF
ANY KIND AND LICENSOR AND LICENSOR'S LICENSOR(S) (COLLECTIVELY REFERRED TO AS
"LICENSOR" FOR THE PURPOSES OF SECTIONS 8 AND 9) AND ALL CONTRIBUTORS EXPRESSLY
DISCLAIM ALL WARRANTIES AND/OR CONDITIONS, EXPRESS OR IMPLIED, INCLUDING, BUT
NOT LIMITED TO, THE IMPLIED WARRANTIES AND/OR CONDITIONS OF MERCHANTABILITY, OF
SATISFACTORY QUALITY, OF FITNESS FOR A PARTICULAR PURPOSE, OF ACCURACY, OF QUIET
ENJOYMENT, AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. LICENSOR AND EACH
CONTRIBUTOR DOES NOT WARRANT AGAINST INTERFERENCE WITH YOUR ENJOYMENT OF THE
COVERED CODE, THAT THE FUNCTIONS CONTAINED IN THE COVERED CODE WILL MEET YOUR
REQUIREMENTS, THAT THE OPERATION OF THE COVERED CODE WILL BE UNINTERRUPTED OR
ERROR-FREE, OR THAT DEFECTS IN THE COVERED CODE WILL BE CORRECTED. NO ORAL OR
WRITTEN DOCUMENTATION, INFORMATION OR ADVICE GIVEN BY LICENSOR, A LICENSOR
AUTHORIZED REPRESENTATIVE OR ANY CONTRIBUTOR SHALL CREATE A WARRANTY. You
acknowledge that the Covered Code is not intended for use in high risk
activities, including, but not limited to, the design, construction, operation
or maintenance of nuclear facilities, aircraft navigation, aircraft
communication systems, or air traffic control machines in which case the failure
of the Covered Code could lead to death, personal injury, or severe physical or
environmental damage. Licensor disclaims any express or implied warranty of
fitness for such uses.
9. LIMITATION OF LIABILITY. TO THE EXTENT NOT PROHIBITED BY LAW, IN NO EVENT
SHALL LICENSOR OR ANY CONTRIBUTOR BE LIABLE FOR ANY INCIDENTAL, SPECIAL,
INDIRECT OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR RELATING TO THIS LICENSE OR
YOUR USE OR INABILITY TO USE THE COVERED CODE, OR ANY PORTION THEREOF, WHETHER
UNDER A THEORY OF CONTRACT, WARRANTY, TORT (INCLUDING NEGLIGENCE OR STRICT
LIABILITY), PRODUCTS LIABILITY OR OTHERWISE, EVEN IF LICENSOR OR SUCH
CONTRIBUTOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES AND
NOTWITHSTANDING THE FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. SOME
JURISDICTIONS DO NOT ALLOW THE LIMITATION OF LIABILITY OF INCIDENTAL OR
CONSEQUENTIAL DAMAGES, SO THIS LIMITATION MAY NOT APPLY TO YOU. In no event
shall Licensor's total liability to You for all damages (other than as may be
required by applicable law) under this License exceed the amount of ten dollars
($10.00).
10. Ownership. Subject to the licenses granted under this License, each
Contributor retains all rights, title and interest in and to any Modifications
made by such Contributor. Licensor retains all rights, title and interest in and
to the Original Code and any Modifications made by or on behalf of Licensor
("Licensor Modifications"), and such Licensor Modifications will not be
automatically subject to this License. Licensor may, at its sole discretion,
choose to license such Licensor Modifications under this License, or on
different terms from those contained in this License or may choose not to
license them at all.
11. Termination.
11.1 Term and Termination. The term of this License is perpetual unless
terminated as provided below. This License and the rights granted hereunder will
terminate:
(a) automatically without notice from Licensor if You fail to comply with any
term(s) of this License and fail to cure such breach within 30 days of becoming
aware of such breach;
(b) immediately in the event of the circumstances described in Section 12.5(b);
or
(c) automatically without notice from Licensor if You, at any time during the
term of this License, commence an action for patent infringement against
Licensor (including by cross-claim or counter claim in a lawsuit);
(d) upon written notice from Licensor if You, at any time during the term of
this License, commence an action for patent infringement against any third party
alleging that the Covered Code itself (excluding combinations with other
software or hardware) infringes any patent (including by cross-claim or counter
claim in a lawsuit).
11.2 Effect of Termination. Upon termination, You agree to immediately stop any
further use, reproduction, modification, sublicensing and distribution of the
Covered Code and to destroy all copies of the Covered Code that are in your
possession or control. All sublicenses to the Covered Code which have been
properly granted prior to termination shall survive any termination of this
License. Provisions which, by their nature, should remain in effect beyond the
termination of this License shall survive, including but not limited to Sections
3, 5, 8, 9, 10, 11, 12.2 and 13. No party will be liable to any other for
compensation, indemnity or damages of any sort solely as a result of terminating
this License in accordance with its terms, and termination of this License will
be without prejudice to any other right or remedy of any party.
12. Miscellaneous.
12.1 Government End Users. The Covered Code is a "commercial item" as defined in
FAR 2.101. Government software and technical data rights in the Covered Code
include only those rights customarily provided to the public as defined in this
License. This customary commercial license in technical data and software is
provided in accordance with FAR 12.211 (Technical Data) and 12.212 (Computer
Software) and, for Department of Defense purchases, DFAR 252.227-7015 (Technical
Data -- Commercial Items) and 227.7202-3 (Rights in Commercial Computer Software
or Computer Software Documentation). Accordingly, all U.S. Government End Users
acquire Covered Code with only those rights set forth herein.
12.2 Relationship of Parties. This License will not be construed as creating an
agency, partnership, joint venture or any other form of legal association
between or among You, Licensor or any Contributor, and You will not represent to
the contrary, whether expressly, by implication, appearance or otherwise.
12.3 Independent Development. Nothing in this License will impair Licensor's
right to acquire, license, develop, have others develop for it, market and/or
distribute technology or products that perform the same or similar functions as,
or otherwise compete with, Modifications, Derivative Works, technology or
products that You may develop, produce, market or distribute.
12.4 Waiver; Construction. Failure by Licensor or any Contributor to enforce any
provision of this License will not be deemed a waiver of future enforcement of
that or any other provision. Any law or regulation which provides that the
language of a contract shall be construed against the drafter will not apply to
this License.
12.5 Severability. (a) If for any reason a court of competent jurisdiction finds
any provision of this License, or portion thereof, to be unenforceable, that
provision of the License will be enforced to the maximum extent permissible so
as to effect the economic benefits and intent of the parties, and the remainder
of this License will continue in full force and effect. (b) Notwithstanding the
foregoing, if applicable law prohibits or restricts You from fully and/or
specifically complying with Sections 2 and/or 3 or prevents the enforceability
of either of those Sections, this License will immediately terminate and You
must immediately discontinue any use of the Covered Code and destroy all copies
of it that are in your possession or control.
12.6 Dispute Resolution. Any litigation or other dispute resolution between You
and Licensor relating to this License shall take place in the Seattle,
Washington, and You and Licensor hereby consent to the personal jurisdiction of,
and venue in, the state and federal courts within that District with respect to
this License. The application of the United Nations Convention on Contracts for
the International Sale of Goods is expressly excluded.
12.7 Export/Import Laws. This software is subject to all export and import laws
and restrictions and regulations of the country in which you receive the Covered
Code and You are solely responsible for ensuring that You do not export,
re-export or import the Covered Code or any direct product thereof in violation
of any such restrictions, laws or regulations, or without all necessary
authorizations.
12.8 Entire Agreement; Governing Law. This License constitutes the entire
agreement between the parties with respect to the subject matter hereof. This
License shall be governed by the laws of the United States and the State of
Washington.
Where You are located in the province of Quebec, Canada, the following clause
applies: The parties hereby confirm that they have requested that this License
and all related documents be drafted in English. Les parties ont exig&eacute;
que le pr&eacute;sent contrat et tous les documents connexes soient
r&eacute;dig&eacute;s en anglais.
EXHIBIT A.
"Copyright &copy; 1995-2002
RealNetworks, Inc. and/or its licensors. All Rights Reserved.
The contents of this file, and the files included with this file, are subject to
the current version of the RealNetworks Public Source License Version 1.0 (the
"RPSL") available at https://www.helixcommunity.org/content/rpsl unless you have
licensed the file under the RealNetworks Community Source License Version 1.0
(the "RCSL") available at https://www.helixcommunity.org/content/rcsl, in which
case the RCSL will apply. You may also obtain the license terms directly from
RealNetworks. You may not use this file except in compliance with the RPSL or,
if you have a valid RCSL with RealNetworks applicable to this file, the RCSL.
Please see the applicable RPSL or RCSL for the rights, obligations and
limitations governing use of the contents of the file.
This file is part of the Helix DNA Technology. RealNetworks is the developer of
the Original code and owns the copyrights in the portions it created.
This file, and the files included with this file, is distributed and made
available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR
IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING
WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
Contributor(s): ____________________________________
Technology Compatibility Kit Test
Suite(s) Location (if licensed under the RCSL): ______________________________
Object Code Notice: Helix DNA Client technology included. Copyright (c)
RealNetworks, Inc., 1995-2002. All rights reserved.
EXHIBIT B
Compatible Source Licenses for the RealNetworks Public Source License. The
following list applies to the most recent version of the license as of October
25, 2002, unless otherwise indicated.
* Academic Free License
* Apache Software License
* Apple Public Source License
* Artistic license
* Attribution Assurance Licenses
* BSD license
* Common Public License (1)
* Eiffel Forum License
* GNU General Public License (GPL) (1)
* GNU Library or "Lesser" General Public License (LGPL) (1)
* IBM Public License
* Intel Open Source License
* Jabber Open Source License
* MIT license
* MITRE Collaborative Virtual Workspace License (CVW License)
* Motosoto License
* Mozilla Public License 1.0 (MPL)
* Mozilla Public License 1.1 (MPL)
* Nokia Open Source License
* Open Group Test Suite License
* Python Software Foundation License
* Ricoh Source Code Public License
* Sun Industry Standards Source License (SISSL)
* Sun Public License
* University of Illinois/NCSA Open Source License
* Vovida Software License v. 1.0
* W3C License
* X.Net License
* Zope Public License
* zlib/libpng license
(1) Note: because this license contains certain reciprocal licensing terms that
purport to extend to independently developed code, You may be prohibited under
the terms of this otherwise compatible license from using code licensed under
its terms with Covered Code because Covered Code may only be licensed under the
RealNetworks Public Source License. Any attempt to apply non RPSL license terms,
including without limitation the GPL, to Covered Code is expressly forbidden.
You are responsible for ensuring that Your use of Compatible Source Licensed
code does not violate either the RPSL or the Compatible Source License.
The latest version of this list can be found at:
https://www.helixcommunity.org/content/complicense
EXHIBIT C
RealNetworks' Trademark policy.
RealNetworks defines the following trademarks collectively as "Licensor
Trademarks": "RealNetworks", "RealPlayer", "RealJukebox", "RealSystem",
"RealAudio", "RealVideo", "RealOne Player", "RealMedia", "Helix" or any other
trademarks or trade names belonging to RealNetworks.
RealNetworks "Licensor Trademark Policy" forbids any use of Licensor Trademarks
except as permitted by and in strict compliance at all times with RealNetworks'
third party trademark usage guidelines which are posted at
http://www.realnetworks.com/info/helixlogo.html.

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Copyright (c) 1995-2004 RealNetworks, Inc. All Rights Reserved.
The contents of this directory, and (except where otherwise
indicated) the directories included within this directory, are
subject to the current version of the RealNetworks Public Source
License (the "RPSL") available at RPSL.txt in this directory, unless
you have licensed the directory under the current version of the
RealNetworks Community Source License (the "RCSL") available at
RCSL.txt in this directory, in which case the RCSL will apply. You
may also obtain the license terms directly from RealNetworks. You
may not use the files in this directory except in compliance with the
RPSL or, if you have a valid RCSL with RealNetworks applicable to
this directory, the RCSL. Please see the applicable RPSL or RCSL for
the rights, obligations and limitations governing use of the contents
of the directory.
This directory is part of the Helix DNA Technology. RealNetworks is
the developer of the Original Code and owns the copyrights in the
portions it created.
This directory, and the directories included with this directory, are
distributed and made available on an 'AS IS' basis, WITHOUT WARRANTY
OF ANY KIND, EITHER EXPRESS OR IMPLIED, AND REALNETWORKS HEREBY
DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
QUIET ENJOYMENT OR NON-INFRINGEMENT.
Technology Compatibility Kit Test Suite(s) Location:
http://www.helixcommunity.org/content/tck

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The RCSL is made up of a base agreement and a few Attachments.
For Research and Development use, you agree to the terms of the
RCSL R&D License (base RCSL and Attachments A, B, and C)
For Commercial Use (either distribution or internal commercial
deployment) of the Helix DNA with or without support for RealNetworks'
RealAudio and RealVideo Add-on Technology, you agree to the
terms of the same RCSL R&D license
and execute one or more additional Commercial Use License attachments
<see http://www.helixcommunity.org/content/rcsl-attachments>.
------------------------------------------------------------------------
REALNETWORKS COMMUNITY SOURCE LICENSE
Version 1.2 (Rev. Date: January 22, 2003).
RECITALS
Original Contributor has developed Specifications, Source Code
implementations and Executables of certain Technology; and
Original Contributor desires to license the Technology to a large
community to facilitate research, innovation and product development
while maintaining compatibility of such products with the Technology as
delivered by Original Contributor; and
Original Contributor desires to license certain Trademarks for the
purpose of branding products that are compatible with the relevant
Technology delivered by Original Contributor; and
You desire to license the Technology and possibly certain Trademarks
from Original Contributor on the terms and conditions specified in this
License.
In consideration for the mutual covenants contained herein, You and
Original Contributor agree as follows:
AGREEMENT
*1. Introduction.*
The RealNetworks Community Source License ("RCSL") and effective
attachments ("License") may include five distinct licenses:
i) Research Use license -- License plus Attachments A, B and C only.
ii) Commercial Use and Trademark License, which may be for Internal
Deployment Use or external distribution, or both -- License plus
Attachments A, B, C, and D.
iii) Technology Compatibility Kit (TCK) license -- Attachment C.
iv) Add-On Technology License (Executable) Commercial Use License
-Attachment F.
v) Add-On Technology Source Code Porting and Optimization
License-Attachment G.
The Research Use license is effective when You click and accept this
License. The TCK is effective when You click and accept this License,
unless otherwise specified in the TCK attachments. The Commercial Use
and Trademark, Add-On Technology License, and the Add-On Technology
Source Code Porting and Optimization licenses must each be signed by You
and Original Contributor to become effective. Once effective, these
licenses and the associated requirements and responsibilities are
cumulative. Capitalized terms used in this License are defined in the
Glossary.
*2. License Grants.*
2.1 Original Contributor Grant.
Subject to Your compliance with Sections 3, 8.10 and Attachment A of
this License, Original Contributor grants to You a worldwide,
royalty-free, non-exclusive license, to the extent of Original
Contributor's Intellectual Property Rights covering the Original Code,
Upgraded Code and Specifications, to do the following:
(a) Research Use License:
(i) use, reproduce and modify the Original Code, Upgraded Code and
Specifications to create Modifications and Reformatted Specifications
for Research Use by You;
(ii) publish and display Original Code, Upgraded Code and Specifications
with, or as part of Modifications, as permitted under Section 3.1(b) below;
(iii) reproduce and distribute copies of Original Code and Upgraded Code
to Licensees and students for Research Use by You;
(iv) compile, reproduce and distribute Original Code and Upgraded Code
in Executable form, and Reformatted Specifications to anyone for
Research Use by You.
(b) Other than the licenses expressly granted in this License, Original
Contributor retains all right, title, and interest in Original Code and
Upgraded Code and Specifications.
2.2 Your Grants.
(a) To Other Licensees. You hereby grant to each Licensee a license to
Your Error Corrections and Shared Modifications, of the same scope and
extent as Original Contributor's licenses under Section 2.1 a) above
relative to Research Use and Attachment D relative to Commercial Use.
(b) To Original Contributor. You hereby grant to Original Contributor a
worldwide, royalty-free, non-exclusive, perpetual and irrevocable
license, to the extent of Your Intellectual Property Rights covering
Your Error Corrections, Shared Modifications and Reformatted
Specifications, to use, reproduce, modify, display and distribute Your
Error Corrections, Shared Modifications and Reformatted Specifications,
in any form, including the right to sublicense such rights through
multiple tiers of distribution.
(c) Other than the licenses expressly granted in Sections 2.2(a) and (b)
above, and the restrictions set forth in Section 3.1(d)(iv) below, You
retain all right, title, and interest in Your Error Corrections, Shared
Modifications and Reformatted Specifications.
2.3 Contributor Modifications.
You may use, reproduce, modify, display and distribute Contributor Error
Corrections, Shared Modifications and Reformatted Specifications,
obtained by You under this License, to the same scope and extent as with
Original Code, Upgraded Code and Specifications.
2.4 Subcontracting.
You may deliver the Source Code of Covered Code to other Licensees
having at least a Research Use license, for the sole purpose of
furnishing development services to You in connection with Your rights
granted in this License. All such Licensees must execute appropriate
documents with respect to such work consistent with the terms of this
License, and acknowledging their work-made-for-hire status or assigning
exclusive right to the work product and associated Intellectual Property
Rights to You.
*3. Requirements and Responsibilities*.
3.1 Research Use License.
As a condition of exercising the rights granted under Section 2.1(a)
above, You agree to comply with the following:
(a) Your Contribution to the Community. All Error Corrections and Shared
Modifications which You create or contribute to are automatically
subject to the licenses granted under Section 2.2 above. You are
encouraged to license all of Your other Modifications under Section 2.2
as Shared Modifications, but are not required to do so. You agree to
notify Original Contributor of any errors in the Specification.
(b) Source Code Availability. You agree to provide all Your Error
Corrections to Original Contributor as soon as reasonably practicable
and, in any event, prior to Internal Deployment Use or Commercial Use,
if applicable. Original Contributor may, at its discretion, post Source
Code for Your Error Corrections and Shared Modifications on the
Community Webserver. You may also post Error Corrections and Shared
Modifications on a web-server of Your choice; provided, that You must
take reasonable precautions to ensure that only Licensees have access to
such Error Corrections and Shared Modifications. Such precautions shall
include, without limitation, a password protection scheme limited to
Licensees and a click-on, download certification of Licensee status
required of those attempting to download from the server. An example of
an acceptable certification is attached as Attachment A-2.
(c) Notices. All Error Corrections and Shared Modifications You create
or contribute to must include a file documenting the additions and
changes You made and the date of such additions and changes. You must
also include the notice set forth in Attachment A-1 in the file header.
If it is not possible to put the notice in a particular Source Code file
due to its structure, then You must include the notice in a location
(such as a relevant directory file), where a recipient would be most
likely to look for such a notice.
(d) Redistribution.
(i) Source. Covered Code may be distributed in Source Code form only to
another Licensee (except for students as provided below). You may not
offer or impose any terms on any Covered Code that alter the rights,
requirements, or responsibilities of such Licensee. You may distribute
Covered Code to students for use in connection with their course work
and research projects undertaken at accredited educational institutions.
Such students need not be Licensees, but must be given a copy of the
notice set forth in Attachment A-3 and such notice must also be included
in a file header or prominent location in the Source Code made available
to such students.
(ii) Executable. You may distribute Executable version(s) of Covered
Code to Licensees and other third parties only for the purpose of
evaluation and comment in connection with Research Use by You and under
a license of Your choice, but which limits use of such Executable
version(s) of Covered Code only to that purpose.
(iii) Modified Class, Interface and Package Naming. In connection with
Research Use by You only, You may use Original Contributor's class,
Interface and package names only to accurately reference or invoke the
Source Code files You modify. Original Contributor grants to You a
limited license to the extent necessary for such purposes.
(iv) You expressly agree that any distribution, in whole or in part, of
Modifications developed by You shall only be done pursuant to the terms
and conditions of this License.
(e) Extensions.
(i) Covered Code. You may not include any Source Code of Community Code
in any Extensions. You may include the compiled Header Files of
Community Code in an Extension provided that Your use of the Covered
Code, including Heading Files, complies with the Commercial Use License,
the TCK and all other terms of this License.
(ii) Publication. No later than the date on which You first distribute
such Extension for Commercial Use, You must publish to the industry, on
a non-confidential basis and free of all copyright restrictions with
respect to reproduction and use, an accurate and current specification
for any Extension. In addition, You must make available an appropriate
test suite, pursuant to the same rights as the specification,
sufficiently detailed to allow any third party reasonably skilled in the
technology to produce implementations of the Extension compatible with
the specification. Such test suites must be made available as soon as
reasonably practicable but, in no event, later than ninety (90) days
after Your first Commercial Use of the Extension. You must use
reasonable efforts to promptly clarify and correct the specification and
the test suite upon written request by Original Contributor.
(iii) Open. You agree to refrain from enforcing any Intellectual
Property Rights You may have covering any interface(s) of Your
Extension, which would prevent the implementation of such interface(s)
by Original Contributor or any Licensee. This obligation does not
prevent You from enforcing any Intellectual Property Right You have that
would otherwise be infringed by an implementation of Your Extension.
(iv) Interface Modifications and Naming. You may not modify or add to
the GUID space * * "xxxxxxxx-0901-11d1-8B06-00A024406D59" or any other
GUID space designated by Original Contributor. You may not modify any
Interface prefix provided with the Covered Code or any other prefix
designated by Original Contributor.* *
* *
(f) You agree that any Specifications provided to You by Original
Contributor are confidential and proprietary information of Original
Contributor. You must maintain the confidentiality of the Specifications
and may not disclose them to any third party without Original
Contributor's prior written consent. You may only use the Specifications
under the terms of this License and only for the purpose of implementing
the terms of this License with respect to Covered Code. You agree not
use, copy or distribute any such Specifications except as provided in
writing by Original Contributor.
3.2 Commercial Use License.
You may not make Commercial Use of any Covered Code unless You and
Original Contributor have executed a copy of the Commercial Use and
Trademark License attached as Attachment D.
*4. Versions of the License.*
4.1 License Versions.
Original Contributor may publish revised versions of the License from
time to time. Each version will be given a distinguishing version number.
4.2 Effect.
Once a particular version of Covered Code has been provided under a
version of the License, You may always continue to use such Covered Code
under the terms of that version of the License. You may also choose to
use such Covered Code under the terms of any subsequent version of the
License. No one other than Original Contributor has the right to
promulgate License versions.
4.3 Multiple-Licensed Code.
Original Contributor may designate portions of the Covered Code as
"Multiple-Licensed." "Multiple-Licensed" means that the Original
Contributor permits You to utilize those designated portions of the
Covered Code under Your choice of this License or the alternative
license(s), if any, specified by the Original Contributor in an
Attachment to this License.
*5. Disclaimer of Warranty.*
5.1 COVERED CODE PROVIDED AS IS.
COVERED CODE IS PROVIDED UNDER THIS LICENSE "AS IS," WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION,
WARRANTIES THAT THE COVERED CODE IS FREE OF DEFECTS, MERCHANTABLE, FIT
FOR A PARTICULAR PURPOSE OR NON-INFRINGING. YOU AGREE TO BEAR THE ENTIRE
RISK IN CONNECTION WITH YOUR USE AND DISTRIBUTION OF COVERED CODE UNDER
THIS LICENSE. THIS DISCLAIMER OF WARRANTY CONSTITUTES AN ESSENTIAL PART
OF THIS LICENSE. NO USE OF ANY COVERED CODE IS AUTHORIZED HEREUNDER
EXCEPT SUBJECT TO THIS DISCLAIMER.
5.2 Not Designed for High Risk Activities.
You acknowledge that Original Code, Upgraded Code and Specifications are
not designed or intended for use in high risk activities including, but
not limited to: (i) on-line control of aircraft, air traffic, aircraft
navigation or aircraft communications; or (ii) in the design,
construction, operation or maintenance of any nuclear facility. Original
Contributor disclaims any express or implied warranty of fitness for
such uses.
*6. Termination.*
6.1 By You.
You may terminate this Research Use license at anytime by providing
written notice to Original Contributor.
6.2 By Original Contributor.
This License and the rights granted hereunder will terminate:
(i) automatically if You fail to comply with the terms of this License
and fail to cure such breach within 30 days of receipt of written notice
of the breach;
(ii) immediately in the event of circumstances specified in Sections 7.1
and 8.4; or
(iii) at Original Contributor's discretion upon any action initiated by
You (including by cross-claim or counter claim) alleging that use or
distribution by Original Contributor or any Licensee, of Original Code,
Upgraded Code, Error Corrections, Shared Modifications or Specifications
infringe a patent owned or controlled by You.
6.3 Effective of Termination.
Upon termination, You agree to discontinue use of and destroy all copies
of Covered Code in Your possession. All sublicenses to the Covered Code
which You have properly granted shall survive any termination of this
License. Provisions that, by their nature, should remain in effect
beyond the termination of this License shall survive including, without
limitation, Sections 2.2, 3, 5, 7 and 8.
6.4 No Compensation.
Each party waives and releases the other from any claim to compensation
or indemnity for permitted or lawful termination of the business
relationship established by this License.
*7. Liability.*
7.1 Infringement. Should any of the Original Code, Upgraded Code, TCK or
Specifications ("Materials") become the subject of a claim of
infringement, Original Contributor may, at its sole option, (i) attempt
to procure the rights necessary for You to continue using the Materials,
(ii) modify the Materials so that they are no longer infringing, or
(iii) terminate Your right to use the Materials, immediately upon
written notice, and refund to You the amount, if any, having then
actually been paid by You to Original Contributor for the Original Code,
Upgraded Code and TCK, depreciated on a straight line, five year basis.
7.2 LIMITATION OF LIABILITY. TO THE FULL EXTENT ALLOWED BY APPLICABLE
LAW, ORIGINAL CONTRIBUTOR'S LIABILITY TO YOU FOR CLAIMS RELATING TO THIS
LICENSE, WHETHER FOR BREACH OR IN TORT, SHALL BE LIMITED TO ONE HUNDRED
PERCENT (100%) OF THE AMOUNT HAVING THEN ACTUALLY BEEN PAID BY YOU TO
ORIGINAL CONTRIBUTOR FOR ALL COPIES LICENSED HEREUNDER OF THE PARTICULAR
ITEMS GIVING RISE TO SUCH CLAIM, IF ANY, DURING THE TWELVE MONTHS
PRECEDING THE CLAIMED BREACH. IN NO EVENT WILL YOU (RELATIVE TO YOUR
SHARED MODIFICATIONS OR ERROR CORRECTIONS) OR ORIGINAL CONTRIBUTOR BE
LIABLE FOR ANY INDIRECT, PUNITIVE, SPECIAL, INCIDENTAL OR CONSEQUENTIAL
DAMAGES IN CONNECTION WITH OR RISING OUT OF THIS LICENSE (INCLUDING,
WITHOUT LIMITATION, LOSS OF PROFITS, USE, DATA, OR OTHER ECONOMIC
ADVANTAGE), HOWEVER IT ARISES AND ON ANY THEORY OF LIABILITY, WHETHER IN
AN ACTION FOR CONTRACT, STRICT LIABILITY OR TORT (INCLUDING NEGLIGENCE)
OR OTHERWISE, WHETHER OR NOT YOU OR ORIGINAL CONTRIBUTOR HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE AND NOTWITHSTANDING THE
FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY.
*8. Miscellaneous.*
8.1 Trademark.
You shall not use any Trademark unless You and Original Contributor
execute a copy of the Commercial Use and Trademark License Agreement
attached hereto as Attachment D. Except as expressly provided in the
License, You are granted no right, title or license to, or interest in,
any Trademarks. Whether or not You and Original Contributor enter into
the Trademark License, You agree not to (i) challenge Original
Contributor's ownership or use of Trademarks; (ii) attempt to register
any Trademarks, or any mark or logo substantially similar thereto; or
(iii) incorporate any Trademarks into Your own trademarks, product
names, service marks, company names, or domain names.
8.2 Integration.
This License represents the complete agreement concerning the subject
matter hereof.
8.3 Assignment.
Original Contributor may assign this License, and its rights and
obligations hereunder, in its sole discretion. You may assign the
Research Use portions of this License and the TCK license to a third
party upon prior written notice to Original Contributor (which may be
provided electronically via the Community Web-Server). You may not
assign the Commercial Use and Trademark license, the Add-On Technology
License, or the Add-On Technology Source Code Porting License, including
by way of merger (regardless of whether You are the surviving entity) or
acquisition, without Original Contributor's prior written consent.
8.4 Severability.
If any provision of this License is held to be unenforceable, such
provision shall be reformed only to the extent necessary to make it
enforceable. Notwithstanding the foregoing, if You are prohibited by law
from fully and specifically complying with Sections 2.2 or 3, this
License will immediately terminate and You must immediately discontinue
any use of Covered Code.
8.5 Governing Law.
This License shall be governed by the laws of the United States and the
State of Washington, as applied to contracts entered into and to be
performed in Washington between Washington residents. The application of
the United Nations Convention on Contracts for the International Sale of
Goods is expressly excluded. You agree that the state and federal courts
located in Seattle, Washington have exclusive jurisdiction over any
claim relating to the License, including contract and tort claims.
8.6 Dispute Resolution.
a) Arbitration. Any dispute arising out of or relating to this License
shall be finally settled by arbitration as set out herein, except that
either party may bring any action, in a court of competent jurisdiction
(which jurisdiction shall be exclusive), with respect to any dispute
relating to such party's Intellectual Property Rights or with respect to
Your compliance with the TCK license. Arbitration shall be administered:
(i) by the American Arbitration Association (AAA), (ii) in accordance
with the rules of the United Nations Commission on International Trade
Law (UNCITRAL) (the "Rules") in effect at the time of arbitration as
modified herein; and (iii) the arbitrator will apply the substantive
laws of Washington and the United States. Judgment upon the award
rendered by the arbitrator may be entered in any court having
jurisdiction to enforce such award.
b) Arbitration language, venue and damages. All arbitration proceedings
shall be conducted in English by a single arbitrator selected in
accordance with the Rules, who must be fluent in English and be either a
retired judge or practicing attorney having at least ten (10) years
litigation experience and be reasonably familiar with the technology
matters relative to the dispute. Unless otherwise agreed, arbitration
venue shall be in Seattle, Washington. The arbitrator may award monetary
damages only and nothing shall preclude either party from seeking
provisional or emergency relief from a court of competent jurisdiction.
The arbitrator shall have no authority to award damages in excess of
those permitted in this License and any such award in excess is void.
All awards will be payable in U.S. dollars and may include, for the
prevailing party (i) pre-judgment award interest, (ii) reasonable
attorneys' fees incurred in connection with the arbitration, and (iii)
reasonable costs and expenses incurred in enforcing the award. The
arbitrator will order each party to produce identified documents and
respond to no more than twenty-five single question interrogatories.
8.7 Construction.
Any law or regulation, which provides that the language of a contract
shall be construed against the drafter, shall not apply to this License.
8.8 U.S. Government End Users.
The Covered Code is a "commercial item," as that term is defined in 48
C.F.R. 2.101 (Oct. 1995), consisting of "commercial computer software"
and "commercial computer software documentation," as such terms are used
in 48 C.F.R. 12.212 (Sept. 1995). Consistent with 48 C.F.R. 12.212 and
48 C.F.R. 227.7202-1 through 227.7202-4 (June 1995), all U.S. Government
End Users acquire Covered Code with only those rights set forth herein.
You agree to pass this notice to our licensees.
8.9 Marketing Activities.
Licensee hereby grants Original Contributor a non-exclusive,
non-transferable, limited license to use the Licensee's company name and
logo ("Licensee Marks") in any presentations, press releases, or
marketing materials solely for the purpose of identifying Licensee as a
member of the Helix Community. Licensee shall provide samples of
Licensee Marks to Original Contributor upon request by Original
Contributor. Original Contributor acknowledges that the Licensee Marks
are the trademarks of Licensee. Original Contributor shall not use the
Licensee Marks in a way that may imply that Original Contributor is an
agency or branch of Licensee. Original Contributor understands and
agrees that the use of any Licensee Marks in connection with this
Agreement shall not create any right, title or interest, in, or to the
Licensee Marks or any Licensee trademarks and that all such use and
goodwill associated with any such trademarks will inure to the benefit
of Licensee. Further the Original Contributor will stop usage of the
Licensee Marks upon Licensee's request.
8.10 Press Announcements.
You may make press announcements or other public statements regarding
this License without the prior written consent of the Original
Contributor, if Your statement is limited to announcing the licensing of
the Covered Code or the availability of Your Product and its
compatibility with the Covered Code. All other public announcements
regarding this license require the prior written consent of the Original
Contributor. Consent requests are welcome at press@helixcommunity.org.
8.11 International Use.
a) Export/Import laws. Covered Code is subject to U.S. export control
laws and may be subject to export or import regulations in other
countries. Each party agrees to comply strictly with all such laws and
regulations and acknowledges their responsibility to obtain such
licenses to export, re-export, or import as may be required. You agree
to pass these obligations to Your licensees.
b) Intellectual Property Protection. Due to limited intellectual
property protection and enforcement in certain countries, You agree not
to redistribute the Original Code, Upgraded Code, TCK and Specifications
to any country on the list of restricted countries on the Community Web
Server.
8.12 Language.
This License is in the English language only, which language shall be
controlling in all respects, and all versions of this License in any
other language shall be for accommodation only and shall not be binding
on the parties to this License. All communications and notices made or
given pursuant to this License, and all documentation and support to be
provided, unless otherwise noted, shall be in the English language.
PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE
"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND
CONDITIONS OF THIS LICENSE WITH REALNETWORKS, INC. IF YOU ARE AGREEING
TO THIS LICENSE ON BEHALF OF A COMPANY, YOU REPRESENT THAT YOU ARE
AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE. WHETHER YOU ARE ACTING
ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY, YOU MUST BE OF MAJORITY
AGE AND BE OTHERWISE COMPETENT TO ENTER INTO CONTRACTS. IF YOU DO NOT
MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY OF THE TERMS AND
CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON TO EXIT.
GLOSSARY
1. *"Added Value"* means code which:
(i) has a principal purpose which is substantially different from that
of the stand-alone Technology;
(ii) represents a significant functional and value enhancement to the
Technology;
(iii) operates in conjunction with the Technology; and
(iv) is not marketed as a technology which replaces or substitutes for
the Technology
2. "*Applicable Patent Rights*" mean: (a) in the case where Original
Contributor is the grantor of rights, claims of patents that (i) are now
or hereafter acquired, owned by or assigned to Original Contributor and
(ii) are necessarily infringed by using or making the Original Code or
Upgraded Code, including Modifications provided by Original Contributor,
alone and not in combination with other software or hardware; and (b) in
the case where Licensee is the grantor of rights, claims of patents that
(i) are now or hereafter acquired, owned by or assigned to Licensee and
(ii) are infringed (directly or indirectly) by using or making
Licensee's Modifications or Error Corrections, taken alone or in
combination with Covered Code.
3. "*Application Programming Interfaces (APIs)"* means the interfaces,
associated header files, service provider interfaces, and protocols that
enable a device, application, Operating System, or other program to
obtain services from or make requests of (or provide services in
response to requests from) other programs, and to use, benefit from, or
rely on the resources, facilities, and capabilities of the relevant
programs using the APIs. APIs includes the technical documentation
describing the APIs, the Source Code constituting the API, and any
Header Files used with the APIs.
4. "*Commercial Use*" means any use (internal or external), copying,
sublicensing or distribution (internal or external), directly or
indirectly of Covered Code by You other than Your Research Use of
Covered Code within Your business or organization or in conjunction with
other Licensees with equivalent Research Use rights. Commercial Use
includes any use of the Covered Code for direct or indirect commercial
or strategic gain, advantage or other business purpose. Any Commercial
Use requires execution of Attachment D by You and Original Contributor.
5. "*Community Code*" means the Original Code, Upgraded Code, Error
Corrections, Shared Modifications, or any combination thereof.
6. "*Community Webserver(s)"* means the webservers designated by
Original Contributor for access to the Original Code, Upgraded Code, TCK
and Specifications and for posting Error Corrections and Shared
Modifications.
7. "*Compliant Covered Code*" means Covered Code that complies with the
requirements of the TCK.
8. "*Contributor*" means each Licensee that creates or contributes to
the creation of any Error Correction or Shared Modification.
9. "*Covered Code*" means the Original Code, Upgraded Code,
Modifications, or any combination thereof.
10. "*Error Correction*" means any change made to Community Code which
conforms to the Specification and corrects the adverse effect of a
failure of Community Code to perform any function set forth in or
required by the Specifications.
11. "*Executable*" means Covered Code that has been converted from
Source Code to the preferred form for execution by a computer or digital
processor (e.g. binary form).
12. "*Extension(s)"* means any additional Interfaces developed by or for
You which: (i) are designed for use with the Technology; (ii) constitute
an API for a library of computing functions or services; and (iii) are
disclosed or otherwise made available to third party software developers
for the purpose of developing software which invokes such additional
Interfaces. The foregoing shall not apply to software developed by Your
subcontractors to be exclusively used by You.
13. "*Header File(s)"* means that portion of the Source Code that
provides the names and types of member functions, data members, class
definitions, and interface definitions necessary to implement the APIs
for the Covered Code. Header Files include, files specifically
designated by Original Contributor as Header Files. Header Files do not
include the code necessary to implement the functionality underlying the
Interface.
14. *"Helix DNA Server Technology"* means the program(s) that implement
the Helix Universal Server streaming engine for the Technology as
defined in the Specification.
15. *"Helix DNA Client Technology"* means the Covered Code that
implements the RealOne Player engine as defined in the Specification.
16. *"Helix DNA Producer Technology"* means the Covered Code that
implements the Helix Producer engine as defined in the Specification.
17. *"Helix DNA Technology"* means the Helix DNA Server Technology, the
Helix DNA Client Technology, the Helix DNA Producer Technology and other
Helix technologies designated by Original Contributor.
18. "*Intellectual Property Rights*" means worldwide statutory and
common law rights associated solely with (i) Applicable Patent Rights;
(ii) works of authorship including copyrights, copyright applications,
copyright registrations and "moral rights"; (iii) the protection of
trade and industrial secrets and confidential information; and (iv)
divisions, continuations, renewals, and re-issuances of the foregoing
now existing or acquired in the future.
19. *"Interface*" means interfaces, functions, properties, class
definitions, APIs, Header Files, GUIDs, V-Tables, and/or protocols
allowing one piece of software, firmware or hardware to communicate or
interoperate with another piece of software, firmware or hardware.
20. "*Internal Deployment Use*" means use of Compliant Covered Code
(excluding Research Use) within Your business or organization only by
Your employees and/or agents on behalf of Your business or organization,
but not to provide services, including content distribution, to third
parties, subject to execution of Attachment D by You and Original
Contributor, if required.
21. "*Licensee*" means any party that has entered into and has in effect
a version of this License with Original Contributor.
22. "*MIME type*" means a description of what type of media or other
content is in a file, including by way of example but not limited to
'audio/x-pn-realaudio-plugin.'
23. "*Modification(s)"* means (i) any addition to, deletion from and/or
change to the substance and/or structure of the Covered Code, including
Interfaces; (ii) the combination of any Covered Code and any previous
Modifications; (iii) any new file or other representation of computer
program statements that contains any portion of Covered Code; and/or
(iv) any new Source Code implementing any portion of the Specifications.
24. "*MP3 Patents*" means any patents necessary to make, use or sell
technology implementing any portion of the specification developed by
the Moving Picture Experts Group known as MPEG-1 Audio Layer-3 or MP3,
including but not limited to all past and future versions, profiles,
extensions, parts and amendments relating to the MP3 specification.
25. "*MPEG-4 Patents*" means any patents necessary to make, use or sell
technology implementing any portion of the specification developed by
the Moving Pictures Experts Group known as MPEG-4, including but not
limited to all past and future versions, profiles, extensions, parts and
amendments relating to the MPEG-4 specification.
26. "*Original Code*" means the initial Source Code for the Technology
as described on the Community Web Server.
27. "*Original Contributor*" means RealNetworks, Inc., its affiliates
and its successors and assigns.
28. "*Original Contributor MIME Type*" means the MIME registry, browser
preferences, or local file/protocol associations invoking any Helix DNA
Client-based application, including the RealOne Player, for playback of
RealAudio, RealVideo, other RealMedia MIME types or datatypes (e.g.,
.ram, .rnx, .rpm, .ra, .rm, .rp, .rt, .rf, .prx, .mpe, .rmp, .rmj, .rav,
.rjs, .rmx, .rjt, .rms), and any other Original Contributor-specific or
proprietary MIME types that Original Contributor may introduce in the
future.
29. "*Personal Use*" means use of Covered Code by an individual solely
for his or her personal, private and non-commercial purposes. An
individual's use of Covered Code in his or her capacity as an officer,
employee, member, independent contractor or agent of a corporation,
business or organization (commercial or non-commercial) does not qualify
as Personal Use.
30. "*RealMedia File Format*" means the file format designed and
developed by RealNetworks for storing multimedia data and used to store
RealAudio and RealVideo encoded streams. Valid RealMedia File Format
extensions include: .rm, .rmj, .rmc, .rmvb, .rms.
31. "*RCSL Webpage*" means the RealNetworks Community Source License
webpage located at https://www.helixcommunity.org/content/rcsl or such
other URL that Original Contributor may designate from time to time.
32. "*Reformatted Specifications*" means any revision to the
Specifications which translates or reformats the Specifications (as for
example in connection with Your documentation) but which does not alter,
subset or superset * *the functional or operational aspects of the
Specifications.
33. "*Research Use*" means use and distribution of Covered Code only for
Your Personal Use, research or development use and expressly excludes
Internal Deployment Use and Commercial Use. Research Use also includes
use of Covered Code to teach individuals how to use Covered Code.
34. "*Shared Modifications*" means Modifications that You distribute or
use for a Commercial Use, in addition to any Modifications provided by
You, at Your option, pursuant to Section 2.2, or received by You from a
Contributor pursuant to Section 2.3.
35. "*Source Code*" means the preferred form of the Covered Code for
making modifications to it, including all modules it contains, plus any
associated interface definition files, scripts used to control
compilation and installation of an Executable, or source code
differential comparisons against either the Original Code or another
well known, available Covered Code of the Contributor's choice. The
Source Code can be in a compressed or archival form, provided the
appropriate decompression or de-archiving software is widely available
for no charge.
36. "*Specifications*" means the specifications for the Technology and
other documentation, as designated on the Community Web Server, as may
be revised by Original Contributor from time to time.
37. "*Trademarks*" means Original Contributor's trademarks and logos,
including, but not limited to, RealNetworks, RealAudio, RealVideo,
RealOne, RealSystem, SureStream, Helix, Helix DNA and other trademarks
whether now used or adopted in the future.
38. "*Technology*" means the technology described in Attachment B, and
Upgrades.
39. "*Technology Compatibility Kit"* or *"TCK*" means the test programs,
procedures, acceptance criteria and/or other requirements, designated by
Original Contributor for use in verifying compliance of Covered Code
with the Specifications, in conjunction with the Original Code and
Upgraded Code. Original Contributor may, in its sole discretion and from
time to time, revise a TCK to correct errors and/or omissions and in
connection with Upgrades.
40. "*Upgrade(s)"* means new versions of Technology designated
exclusively by Original Contributor as an "Upgrade" and released by
Original Contributor from time to time under the terms of the License.
41. "*Upgraded Code*" means the Source Code and/or Executables for
Upgrades, possibly including Modifications made by Contributors.
42. *"User's Guide"* means the users guide for the TCK which Original
Contributor makes available to You to provide direction in how to run
the TCK and properly interpret the results, as may be revised by
Original Contributor from time to time.
43. "*You(r)*" means an individual, or a legal entity acting by and
through an individual or individuals, exercising rights either under
this License or under a future version of this License issued pursuant
to Section 4.1. For legal entities, "You(r)" includes any entity that by
majority voting interest controls, is controlled by, or is under common
control with You.
44. "*Your Products*" means any (i) hardware products You distribute
integrating the Covered Code; (ii) any software products You distribute
with the Covered Code that utilize the APIs of the Covered Code; or
(iii) any services You provide using the Covered Code.
ATTACHMENT A
REQUIRED NOTICES
ATTACHMENT A-1
REQUIRED IN ALL CASES
Notice to be included in header file of all Error Corrections and Shared
Modifications:
Portions Copyright 1994-2003 © RealNetworks, Inc. All rights reserved.
The contents of this file, and the files included with this file, are
subject to the current version of RealNetworks Community Source License
Version 1.1 (the "License"). You may not use this file except in
compliance with the License executed by both You and RealNetworks. You
may obtain a copy of the License at *
https://www.helixcommunity.org/content/rcsl.* You may also obtain a copy
of the License by contacting RealNetworks directly. Please see the
License for the rights, obligations and limitations governing use of the
contents of the file.
This file is part of the Helix DNA technology. RealNetworks, Inc., is
the developer of the Original code and owns the copyrights in the
portions it created.
This file, and the files included with this file, are distributed on an
'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING WITHOUT
LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
Contributor(s):
_______________________________________________
Technology Compatibility Kit Test Suite(s) Location:
________________________________
ATTACHMENT A-2
SAMPLE LICENSEE CERTIFICATION
"By clicking the `Agree' button below, You certify that You are a
Licensee in good standing under the RealNetworks Community Source
License, ("License") and that Your access, use and distribution of code
and information You may obtain at this site is subject to the License.
If You are not a Licensee under the RealNetworks Community Source
License You agree not to download, copy or use the Helix DNA technology.
ATTACHMENT A-3
REQUIRED STUDENT NOTIFICATION
"This software and related documentation has been obtained by Your
educational institution subject to the RealNetworks Community Source
License. You have been provided access to the software and related
documentation for use only in connection with your course work and
research activities as a matriculated student of Your educational
institution. Any other use is expressly prohibited.
THIS SOFTWARE AND RELATED DOCUMENTATION CONTAINS PROPRIETARY MATERIAL OF
REALNETWORKS, INC, WHICH ARE PROTECTED BY VARIOUS INTELLECTUAL PROPERTY
RIGHTS.
You may not use this file except in compliance with the License. You may
obtain a copy of the License on the web at
https://www.helixcommunity.org/content/rcsl.
*
*
ATTACHMENT B
Description of Technology
Helix DNA, which consists of Helix DNA Client, Helix DNA Server and
Helix DNA Producer.
Description of "Technology"
Helix DNA Technology v1.0 as described on the Community Web Server.
ATTACHMENT C
TECHNOLOGY COMPATIBILITY KIT LICENSE
The following license is effective for the *Helix DNA* Technology
Compatibility Kit - as described on the Community Web Server. The
Technology Compatibility Kit(s) for the Technology specified in
Attachment B may be accessed at the Community Web Server.
1. TCK License.
1.1 Grants to use TCK
Subject to the terms and restrictions set forth below and the
RealNetworks Community Source License, and the Research Use license,
Original Contributor grants to You a worldwide, non-exclusive,
non-transferable license, to the extent of Original Contributor's
Intellectual Property Rights in the TCK (without the right to
sublicense), to use the TCK to develop and test Covered Code.
1.2 TCK Use Restrictions.
You are not authorized to create derivative works of the TCK or use the
TCK to test any implementation of the Specification that is not Covered
Code. You may not publish Your test results or make claims of
comparative compatibility with respect to other implementations of the
Specification. In consideration for the license grant in Section 1.1
above You agree not to develop Your own tests that are intended to
validate conformation with the Specification.
2. Test Results.
You agree to provide to Original Contributor or the third party test
facility if applicable, Your test results that demonstrate that Covered
Code is Compliant Covered Code and that Original Contributor may publish
or otherwise distribute such test results.
PLEASE READ THE TERMS OF THIS LICENSE CAREFULLY. BY CLICKING ON THE
"ACCEPT" BUTTON BELOW YOU ARE ACCEPTING AND AGREEING TO THE TERMS AND
CONDITIONS OF THIS LICENSE WITH THE ORIGINAL CONTRIBUTOR, REALNETWORKS,
INC. IF YOU ARE AGREEING TO THIS LICENSE ON BEHALF OF A COMPANY, YOU
REPRESENT THAT YOU ARE AUTHORIZED TO BIND THE COMPANY TO SUCH A LICENSE.
WHETHER YOU ARE ACTING ON YOUR OWN BEHALF, OR REPRESENTING A COMPANY,
YOU MUST BE OF MAJORITY AGE AND BE OTHERWISE COMPETENT TO ENTER INTO
CONTRACTS. IF YOU DO NOT MEET THIS CRITERIA OR YOU DO NOT AGREE TO ANY
OF THE TERMS AND CONDITIONS OF THIS LICENSE, CLICK ON THE REJECT BUTTON
TO EXIT.
*ACCEPT / REJECT
*
*
*
*To agree to the R&D/academic terms of this license, please register
<https://www.helixcommunity.org/2002/intro/why-register> on the site --
you will then be given a chance to agree to the clickwrap RCSL
<https://reguseronly.helixcommunity.org/2002/clickwrap/rcsl-clickwrap>
R&D License
<https://reguseronly.helixcommunity.org/2002/clickwrap/rcsl-clickwrap>
and gain access to the RCSL-licensed source code. To build or deploy
commercial applications based on the RCSL, you will need to agree to the
Commercial Use license attachments
<https://www.helixcommunity.org/content/rcsl-attachments>*

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RealNetworks Public Source License Version 1.0
(Rev. Date October 28, 2002)
1. General Definitions. This License applies to any program or other work which
RealNetworks, Inc., or any other entity that elects to use this license,
("Licensor") makes publicly available and which contains a notice placed by
Licensor identifying such program or work as "Original Code" and stating that it
is subject to the terms of this RealNetworks Public Source License version 1.0
(or subsequent version thereof) ("License"). You are not required to accept this
License. However, nothing else grants You permission to use, copy, modify or
distribute the software or its derivative works. These actions are prohibited by
law if You do not accept this License. Therefore, by modifying, copying or
distributing the software (or any work based on the software), You indicate your
acceptance of this License to do so, and all its terms and conditions. In
addition, you agree to the terms of this License by clicking the Accept button
or downloading the software. As used in this License:
1.1 "Applicable Patent Rights" mean: (a) in the case where Licensor is the
grantor of rights, claims of patents that (i) are now or hereafter acquired,
owned by or assigned to Licensor and (ii) are necessarily infringed by using or
making the Original Code alone and not in combination with other software or
hardware; and (b) in the case where You are the grantor of rights, claims of
patents that (i) are now or hereafter acquired, owned by or assigned to You and
(ii) are infringed (directly or indirectly) by using or making Your
Modifications, taken alone or in combination with Original Code.
1.2 "Compatible Source License" means any one of the licenses listed on Exhibit
B or at https://www.helixcommunity.org/content/complicense or other licenses
specifically identified by Licensor in writing. Notwithstanding any term to the
contrary in any Compatible Source License, any code covered by any Compatible
Source License that is used with Covered Code must be made readily available in
Source Code format for royalty-free use under the terms of the Compatible Source
License or this License.
1.3 "Contributor" means any person or entity that creates or contributes to the
creation of Modifications.
1.4 "Covered Code" means the Original Code, Modifications, the combination of
Original Code and any Modifications, and/or any respective portions thereof.
1.5 "Deploy" means to use, sublicense or distribute Covered Code other than for
Your internal research and development (R&D) and/or Personal Use, and includes
without limitation, any and all internal use or distribution of Covered Code
within Your business or organization except for R&D use and/or Personal Use, as
well as direct or indirect sublicensing or distribution of Covered Code by You
to any third party in any form or manner.
1.6 "Derivative Work" means either the Covered Code or any derivative work under
United States copyright law, and including any work containing or including any
portion of the Covered Code or Modifications, either verbatim or with
modifications and/or translated into another language. Derivative Work also
includes any work which combines any portion of Covered Code or Modifications
with code not otherwise governed by the terms of this License.
1.7 "Externally Deploy" means to Deploy the Covered Code in any way that may be
accessed or used by anyone other than You, used to provide any services to
anyone other than You, or used in any way to deliver any content to anyone other
than You, whether the Covered Code is distributed to those parties, made
available as an application intended for use over a computer network, or used to
provide services or otherwise deliver content to anyone other than You.
1.8. "Interface" means interfaces, functions, properties, class definitions,
APIs, header files, GUIDs, V-Tables, and/or protocols allowing one piece of
software, firmware or hardware to communicate or interoperate with another piece
of software, firmware or hardware.
1.9 "Modifications" mean any addition to, deletion from, and/or change to, the
substance and/or structure of the Original Code, any previous Modifications, the
combination of Original Code and any previous Modifications, and/or any
respective portions thereof. When code is released as a series of files, a
Modification is: (a) any addition to or deletion from the contents of a file
containing Covered Code; and/or (b) any new file or other representation of
computer program statements that contains any part of Covered Code.
1.10 "Original Code" means (a) the Source Code of a program or other work as
originally made available by Licensor under this License, including the Source
Code of any updates or upgrades to such programs or works made available by
Licensor under this License, and that has been expressly identified by Licensor
as such in the header file(s) of such work; and (b) the object code compiled
from such Source Code and originally made available by Licensor under this
License.
1.11 "Personal Use" means use of Covered Code by an individual solely for his or
her personal, private and non-commercial purposes. An individual's use of
Covered Code in his or her capacity as an officer, employee, member, independent
contractor or agent of a corporation, business or organization (commercial or
non-commercial) does not qualify as Personal Use.
1.12 "Source Code" means the human readable form of a program or other work that
is suitable for making modifications to it, including all modules it contains,
plus any associated interface definition files, scripts used to control
compilation and installation of an executable (object code).
1.13 "You" or "Your" means an individual or a legal entity exercising rights
under this License. For legal entities, "You" or "Your" includes any entity
which controls, is controlled by, or is under common control with, You, where
"control" means (a) the power, direct or indirect, to cause the direction or
management of such entity, whether by contract or otherwise, or (b) ownership of
fifty percent (50%) or more of the outstanding shares or beneficial ownership of
such entity.
2. Permitted Uses; Conditions & Restrictions. Subject to the terms and
conditions of this License, Licensor hereby grants You, effective on the date
You accept this License (via downloading or using Covered Code or otherwise
indicating your acceptance of this License), a worldwide, royalty-free,
non-exclusive copyright license, to the extent of Licensor's copyrights cover
the Original Code, to do the following:
2.1 You may reproduce, display, perform, modify and Deploy Covered Code,
provided that in each instance:
(a) You must retain and reproduce in all copies of Original Code the copyright
and other proprietary notices and disclaimers of Licensor as they appear in the
Original Code, and keep intact all notices in the Original Code that refer to
this License;
(b) You must include a copy of this License with every copy of Source Code of
Covered Code and documentation You distribute, and You may not offer or impose
any terms on such Source Code that alter or restrict this License or the
recipients' rights hereunder, except as permitted under Section 6;
(c) You must duplicate, to the extent it does not already exist, the notice in
Exhibit A in each file of the Source Code of all Your Modifications, and cause
the modified files to carry prominent notices stating that You changed the files
and the date of any change;
(d) You must make Source Code of all Your Externally Deployed Modifications
publicly available under the terms of this License, including the license grants
set forth in Section 3 below, for as long as you Deploy the Covered Code or
twelve (12) months from the date of initial Deployment, whichever is longer. You
should preferably distribute the Source Code of Your Deployed Modifications
electronically (e.g. download from a web site); and
(e) if You Deploy Covered Code in object code, executable form only, You must
include a prominent notice, in the code itself as well as in related
documentation, stating that Source Code of the Covered Code is available under
the terms of this License with information on how and where to obtain such
Source Code. You must also include the Object Code Notice set forth in Exhibit A
in the "about" box or other appropriate place where other copyright notices are
placed, including any packaging materials.
2.2 You expressly acknowledge and agree that although Licensor and each
Contributor grants the licenses to their respective portions of the Covered Code
set forth herein, no assurances are provided by Licensor or any Contributor that
the Covered Code does not infringe the patent or other intellectual property
rights of any other entity. Licensor and each Contributor disclaim any liability
to You for claims brought by any other entity based on infringement of
intellectual property rights or otherwise. As a condition to exercising the
rights and licenses granted hereunder, You hereby assume sole responsibility to
secure any other intellectual property rights needed, if any. For example, if a
third party patent license is required to allow You to make, use, sell, import
or offer for sale the Covered Code, it is Your responsibility to acquire such
license(s).
2.3 Subject to the terms and conditions of this License, Licensor hereby grants
You, effective on the date You accept this License (via downloading or using
Covered Code or otherwise indicating your acceptance of this License), a
worldwide, royalty-free, perpetual, non-exclusive patent license under
Licensor's Applicable Patent Rights to make, use, sell, offer for sale and
import the Covered Code, provided that in each instance you comply with the
terms of this License.
3. Your Grants. In consideration of, and as a condition to, the licenses granted
to You under this License:
(a) You grant to Licensor and all third parties a non-exclusive, perpetual,
irrevocable, royalty free license under Your Applicable Patent Rights and other
intellectual property rights owned or controlled by You, to make, sell, offer
for sale, use, import, reproduce, display, perform, modify, distribute and
Deploy Your Modifications of the same scope and extent as Licensor's licenses
under Sections 2.1 and 2.2; and
(b) You grant to Licensor and its subsidiaries a non-exclusive, worldwide,
royalty-free, perpetual and irrevocable license, under Your Applicable Patent
Rights and other intellectual property rights owned or controlled by You, to
make, use, sell, offer for sale, import, reproduce, display, perform,
distribute, modify or have modified (for Licensor and/or its subsidiaries),
sublicense and distribute Your Modifications, in any form and for any purpose,
through multiple tiers of distribution.
(c) You agree not use any information derived from Your use and review of the
Covered Code, including but not limited to any algorithms or inventions that may
be contained in the Covered Code, for the purpose of asserting any of Your
patent rights, or assisting a third party to assert any of its patent rights,
against Licensor or any Contributor.
4. Derivative Works. You may create a Derivative Work by combining Covered Code
with other code not otherwise governed by the terms of this License and
distribute the Derivative Work as an integrated product. In each such instance,
You must make sure the requirements of this License are fulfilled for the
Covered Code or any portion thereof, including all Modifications.
4.1 You must cause any Derivative Work that you distribute, publish or
Externally Deploy, that in whole or in part contains or is derived from the
Covered Code or any part thereof, to be licensed as a whole at no charge to all
third parties under the terms of this License and no other license except as
provided in Section 4.2. You also must make Source Code available for the
Derivative Work under the same terms as Modifications, described in Sections 2
and 3, above.
4.2 Compatible Source Licenses. Software modules that have been independently
developed without any use of Covered Code and which contain no portion of the
Covered Code, Modifications or other Derivative Works, but are used or combined
in any way wtih the Covered Code or any Derivative Work to form a larger
Derivative Work, are exempt from the conditions described in Section 4.1 but
only to the extent that: the software module, including any software that is
linked to, integrated with, or part of the same applications as, the software
module by any method must be wholly subject to one of the Compatible Source
Licenses. Notwithstanding the foregoing, all Covered Code must be subject to the
terms of this License. Thus, the entire Derivative Work must be licensed under a
combination of the RPSL (for Covered Code) and a Compatible Source License for
any independently developed software modules within the Derivative Work. The
foregoing requirement applies even if the Compatible Source License would
ordinarily allow the software module to link with, or form larger works with,
other software that is not subject to the Compatible Source License. For
example, although the Mozilla Public License v1.1 allows Mozilla code to be
combined with proprietary software that is not subject to the MPL, if
MPL-licensed code is used with Covered Code the MPL-licensed code could not be
combined or linked with any code not governed by the MPL. The general intent of
this section 4.2 is to enable use of Covered Code with applications that are
wholly subject to an acceptable open source license. You are responsible for
determining whether your use of software with Covered Code is allowed under Your
license to such software.
4.3 Mere aggregation of another work not based on the Covered Code with the
Covered Code (or with a work based on the Covered Code) on a volume of a storage
or distribution medium does not bring the other work under the scope of this
License. If You deliver the Covered Code for combination and/or integration with
an application previously provided by You (for example, via automatic updating
technology), such combination and/or integration constitutes a Derivative Work
subject to the terms of this License.
5. Exclusions From License Grant. Nothing in this License shall be deemed to
grant any rights to trademarks, copyrights, patents, trade secrets or any other
intellectual property of Licensor or any Contributor except as expressly stated
herein. No right is granted to the trademarks of Licensor or any Contributor
even if such marks are included in the Covered Code. Nothing in this License
shall be interpreted to prohibit Licensor from licensing under different terms
from this License any code that Licensor otherwise would have a right to
license. Modifications, Derivative Works and/or any use or combination of
Covered Code with other technology provided by Licensor or third parties may
require additional patent licenses from Licensor which Licensor may grant in its
sole discretion. No patent license is granted separate from the Original Code or
combinations of the Original Code with other software or hardware.
5.1. Trademarks. This License does not grant any rights to use the trademarks or
trade names owned by Licensor ("Licensor Marks" defined in Exhibit C) or to any
trademark or trade name belonging to any Contributor. No Licensor Marks may be
used to endorse or promote products derived from the Original Code other than as
permitted by the Licensor Trademark Policy defined in Exhibit C.
6. Additional Terms. You may choose to offer, and to charge a fee for, warranty,
support, indemnity or liability obligations and/or other rights consistent with
the scope of the license granted herein ("Additional Terms") to one or more
recipients of Covered Code. However, You may do so only on Your own behalf and
as Your sole responsibility, and not on behalf of Licensor or any Contributor.
You must obtain the recipient's agreement that any such Additional Terms are
offered by You alone, and You hereby agree to indemnify, defend and hold
Licensor and every Contributor harmless for any liability incurred by or claims
asserted against Licensor or such Contributor by reason of any such Additional
Terms.
7. Versions of the License. Licensor may publish revised and/or new versions of
this License from time to time. Each version will be given a distinguishing
version number. Once Original Code has been published under a particular version
of this License, You may continue to use it under the terms of that version. You
may also choose to use such Original Code under the terms of any subsequent
version of this License published by Licensor. No one other than Licensor has
the right to modify the terms applicable to Covered Code created under this
License.
8. NO WARRANTY OR SUPPORT. The Covered Code may contain in whole or in part
pre-release, untested, or not fully tested works. The Covered Code may contain
errors that could cause failures or loss of data, and may be incomplete or
contain inaccuracies. You expressly acknowledge and agree that use of the
Covered Code, or any portion thereof, is at Your sole and entire risk. THE
COVERED CODE IS PROVIDED "AS IS" AND WITHOUT WARRANTY, UPGRADES OR SUPPORT OF
ANY KIND AND LICENSOR AND LICENSOR'S LICENSOR(S) (COLLECTIVELY REFERRED TO AS
"LICENSOR" FOR THE PURPOSES OF SECTIONS 8 AND 9) AND ALL CONTRIBUTORS EXPRESSLY
DISCLAIM ALL WARRANTIES AND/OR CONDITIONS, EXPRESS OR IMPLIED, INCLUDING, BUT
NOT LIMITED TO, THE IMPLIED WARRANTIES AND/OR CONDITIONS OF MERCHANTABILITY, OF
SATISFACTORY QUALITY, OF FITNESS FOR A PARTICULAR PURPOSE, OF ACCURACY, OF QUIET
ENJOYMENT, AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. LICENSOR AND EACH
CONTRIBUTOR DOES NOT WARRANT AGAINST INTERFERENCE WITH YOUR ENJOYMENT OF THE
COVERED CODE, THAT THE FUNCTIONS CONTAINED IN THE COVERED CODE WILL MEET YOUR
REQUIREMENTS, THAT THE OPERATION OF THE COVERED CODE WILL BE UNINTERRUPTED OR
ERROR-FREE, OR THAT DEFECTS IN THE COVERED CODE WILL BE CORRECTED. NO ORAL OR
WRITTEN DOCUMENTATION, INFORMATION OR ADVICE GIVEN BY LICENSOR, A LICENSOR
AUTHORIZED REPRESENTATIVE OR ANY CONTRIBUTOR SHALL CREATE A WARRANTY. You
acknowledge that the Covered Code is not intended for use in high risk
activities, including, but not limited to, the design, construction, operation
or maintenance of nuclear facilities, aircraft navigation, aircraft
communication systems, or air traffic control machines in which case the failure
of the Covered Code could lead to death, personal injury, or severe physical or
environmental damage. Licensor disclaims any express or implied warranty of
fitness for such uses.
9. LIMITATION OF LIABILITY. TO THE EXTENT NOT PROHIBITED BY LAW, IN NO EVENT
SHALL LICENSOR OR ANY CONTRIBUTOR BE LIABLE FOR ANY INCIDENTAL, SPECIAL,
INDIRECT OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR RELATING TO THIS LICENSE OR
YOUR USE OR INABILITY TO USE THE COVERED CODE, OR ANY PORTION THEREOF, WHETHER
UNDER A THEORY OF CONTRACT, WARRANTY, TORT (INCLUDING NEGLIGENCE OR STRICT
LIABILITY), PRODUCTS LIABILITY OR OTHERWISE, EVEN IF LICENSOR OR SUCH
CONTRIBUTOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES AND
NOTWITHSTANDING THE FAILURE OF ESSENTIAL PURPOSE OF ANY REMEDY. SOME
JURISDICTIONS DO NOT ALLOW THE LIMITATION OF LIABILITY OF INCIDENTAL OR
CONSEQUENTIAL DAMAGES, SO THIS LIMITATION MAY NOT APPLY TO YOU. In no event
shall Licensor's total liability to You for all damages (other than as may be
required by applicable law) under this License exceed the amount of ten dollars
($10.00).
10. Ownership. Subject to the licenses granted under this License, each
Contributor retains all rights, title and interest in and to any Modifications
made by such Contributor. Licensor retains all rights, title and interest in and
to the Original Code and any Modifications made by or on behalf of Licensor
("Licensor Modifications"), and such Licensor Modifications will not be
automatically subject to this License. Licensor may, at its sole discretion,
choose to license such Licensor Modifications under this License, or on
different terms from those contained in this License or may choose not to
license them at all.
11. Termination.
11.1 Term and Termination. The term of this License is perpetual unless
terminated as provided below. This License and the rights granted hereunder will
terminate:
(a) automatically without notice from Licensor if You fail to comply with any
term(s) of this License and fail to cure such breach within 30 days of becoming
aware of such breach;
(b) immediately in the event of the circumstances described in Section 12.5(b);
or
(c) automatically without notice from Licensor if You, at any time during the
term of this License, commence an action for patent infringement against
Licensor (including by cross-claim or counter claim in a lawsuit);
(d) upon written notice from Licensor if You, at any time during the term of
this License, commence an action for patent infringement against any third party
alleging that the Covered Code itself (excluding combinations with other
software or hardware) infringes any patent (including by cross-claim or counter
claim in a lawsuit).
11.2 Effect of Termination. Upon termination, You agree to immediately stop any
further use, reproduction, modification, sublicensing and distribution of the
Covered Code and to destroy all copies of the Covered Code that are in your
possession or control. All sublicenses to the Covered Code which have been
properly granted prior to termination shall survive any termination of this
License. Provisions which, by their nature, should remain in effect beyond the
termination of this License shall survive, including but not limited to Sections
3, 5, 8, 9, 10, 11, 12.2 and 13. No party will be liable to any other for
compensation, indemnity or damages of any sort solely as a result of terminating
this License in accordance with its terms, and termination of this License will
be without prejudice to any other right or remedy of any party.
12. Miscellaneous.
12.1 Government End Users. The Covered Code is a "commercial item" as defined in
FAR 2.101. Government software and technical data rights in the Covered Code
include only those rights customarily provided to the public as defined in this
License. This customary commercial license in technical data and software is
provided in accordance with FAR 12.211 (Technical Data) and 12.212 (Computer
Software) and, for Department of Defense purchases, DFAR 252.227-7015 (Technical
Data -- Commercial Items) and 227.7202-3 (Rights in Commercial Computer Software
or Computer Software Documentation). Accordingly, all U.S. Government End Users
acquire Covered Code with only those rights set forth herein.
12.2 Relationship of Parties. This License will not be construed as creating an
agency, partnership, joint venture or any other form of legal association
between or among You, Licensor or any Contributor, and You will not represent to
the contrary, whether expressly, by implication, appearance or otherwise.
12.3 Independent Development. Nothing in this License will impair Licensor's
right to acquire, license, develop, have others develop for it, market and/or
distribute technology or products that perform the same or similar functions as,
or otherwise compete with, Modifications, Derivative Works, technology or
products that You may develop, produce, market or distribute.
12.4 Waiver; Construction. Failure by Licensor or any Contributor to enforce any
provision of this License will not be deemed a waiver of future enforcement of
that or any other provision. Any law or regulation which provides that the
language of a contract shall be construed against the drafter will not apply to
this License.
12.5 Severability. (a) If for any reason a court of competent jurisdiction finds
any provision of this License, or portion thereof, to be unenforceable, that
provision of the License will be enforced to the maximum extent permissible so
as to effect the economic benefits and intent of the parties, and the remainder
of this License will continue in full force and effect. (b) Notwithstanding the
foregoing, if applicable law prohibits or restricts You from fully and/or
specifically complying with Sections 2 and/or 3 or prevents the enforceability
of either of those Sections, this License will immediately terminate and You
must immediately discontinue any use of the Covered Code and destroy all copies
of it that are in your possession or control.
12.6 Dispute Resolution. Any litigation or other dispute resolution between You
and Licensor relating to this License shall take place in the Seattle,
Washington, and You and Licensor hereby consent to the personal jurisdiction of,
and venue in, the state and federal courts within that District with respect to
this License. The application of the United Nations Convention on Contracts for
the International Sale of Goods is expressly excluded.
12.7 Export/Import Laws. This software is subject to all export and import laws
and restrictions and regulations of the country in which you receive the Covered
Code and You are solely responsible for ensuring that You do not export,
re-export or import the Covered Code or any direct product thereof in violation
of any such restrictions, laws or regulations, or without all necessary
authorizations.
12.8 Entire Agreement; Governing Law. This License constitutes the entire
agreement between the parties with respect to the subject matter hereof. This
License shall be governed by the laws of the United States and the State of
Washington.
Where You are located in the province of Quebec, Canada, the following clause
applies: The parties hereby confirm that they have requested that this License
and all related documents be drafted in English. Les parties ont exig&eacute;
que le pr&eacute;sent contrat et tous les documents connexes soient
r&eacute;dig&eacute;s en anglais.
EXHIBIT A.
"Copyright &copy; 1995-2002
RealNetworks, Inc. and/or its licensors. All Rights Reserved.
The contents of this file, and the files included with this file, are subject to
the current version of the RealNetworks Public Source License Version 1.0 (the
"RPSL") available at https://www.helixcommunity.org/content/rpsl unless you have
licensed the file under the RealNetworks Community Source License Version 1.0
(the "RCSL") available at https://www.helixcommunity.org/content/rcsl, in which
case the RCSL will apply. You may also obtain the license terms directly from
RealNetworks. You may not use this file except in compliance with the RPSL or,
if you have a valid RCSL with RealNetworks applicable to this file, the RCSL.
Please see the applicable RPSL or RCSL for the rights, obligations and
limitations governing use of the contents of the file.
This file is part of the Helix DNA Technology. RealNetworks is the developer of
the Original code and owns the copyrights in the portions it created.
This file, and the files included with this file, is distributed and made
available on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR
IMPLIED, AND REALNETWORKS HEREBY DISCLAIMS ALL SUCH WARRANTIES, INCLUDING
WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
Contributor(s): ____________________________________
Technology Compatibility Kit Test
Suite(s) Location (if licensed under the RCSL): ______________________________
Object Code Notice: Helix DNA Client technology included. Copyright (c)
RealNetworks, Inc., 1995-2002. All rights reserved.
EXHIBIT B
Compatible Source Licenses for the RealNetworks Public Source License. The
following list applies to the most recent version of the license as of October
25, 2002, unless otherwise indicated.
* Academic Free License
* Apache Software License
* Apple Public Source License
* Artistic license
* Attribution Assurance Licenses
* BSD license
* Common Public License (1)
* Eiffel Forum License
* GNU General Public License (GPL) (1)
* GNU Library or "Lesser" General Public License (LGPL) (1)
* IBM Public License
* Intel Open Source License
* Jabber Open Source License
* MIT license
* MITRE Collaborative Virtual Workspace License (CVW License)
* Motosoto License
* Mozilla Public License 1.0 (MPL)
* Mozilla Public License 1.1 (MPL)
* Nokia Open Source License
* Open Group Test Suite License
* Python Software Foundation License
* Ricoh Source Code Public License
* Sun Industry Standards Source License (SISSL)
* Sun Public License
* University of Illinois/NCSA Open Source License
* Vovida Software License v. 1.0
* W3C License
* X.Net License
* Zope Public License
* zlib/libpng license
(1) Note: because this license contains certain reciprocal licensing terms that
purport to extend to independently developed code, You may be prohibited under
the terms of this otherwise compatible license from using code licensed under
its terms with Covered Code because Covered Code may only be licensed under the
RealNetworks Public Source License. Any attempt to apply non RPSL license terms,
including without limitation the GPL, to Covered Code is expressly forbidden.
You are responsible for ensuring that Your use of Compatible Source Licensed
code does not violate either the RPSL or the Compatible Source License.
The latest version of this list can be found at:
https://www.helixcommunity.org/content/complicense
EXHIBIT C
RealNetworks' Trademark policy.
RealNetworks defines the following trademarks collectively as "Licensor
Trademarks": "RealNetworks", "RealPlayer", "RealJukebox", "RealSystem",
"RealAudio", "RealVideo", "RealOne Player", "RealMedia", "Helix" or any other
trademarks or trade names belonging to RealNetworks.
RealNetworks "Licensor Trademark Policy" forbids any use of Licensor Trademarks
except as permitted by and in strict compliance at all times with RealNetworks'
third party trademark usage guidelines which are posted at
http://www.realnetworks.com/info/helixlogo.html.

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