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[bsp][redv] formatting

This commit is contained in:
luhuadong 2021-12-20 16:07:35 +08:00
parent df71ffd87a
commit f7447a8dc5
18 changed files with 139 additions and 139 deletions
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2
bsp/sparkfun-redv/applications/led/led.c
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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/sparkfun-redv/applications/led/led.h
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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

2
bsp/sparkfun-redv/applications/main.c
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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *

36
bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/fe300prci/fe300prci_driver.c
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@ -6,15 +6,15 @@
#include "fe300prci/fe300prci_driver.h" #include "fe300prci/fe300prci_driver.h"
#include <unistd.h> #include <unistd.h>
#define rdmcycle(x) { \ #define rdmcycle(x) { \
uint32_t lo, hi, hi2; \ uint32_t lo, hi, hi2; \
__asm__ __volatile__ ("1:\n\t" \ __asm__ __volatile__ ("1:\n\t" \
"csrr %0, mcycleh\n\t" \ "csrr %0, mcycleh\n\t" \
"csrr %1, mcycle\n\t" \ "csrr %1, mcycle\n\t" \
"csrr %2, mcycleh\n\t" \ "csrr %2, mcycleh\n\t" \
"bne %0, %2, 1b\n\t" \ "bne %0, %2, 1b\n\t" \
: "=r" (hi), "=r" (lo), "=r" (hi2)) ; \ : "=r" (hi), "=r" (lo), "=r" (hi2)) ; \
*(x) = lo | ((uint64_t) hi << 32); \ *(x) = lo | ((uint64_t) hi << 32); \
} }
uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq) uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq)
@ -63,8 +63,8 @@ void PRCI_use_hfrosc(int div, int trim)
} }
void PRCI_use_pll(int refsel, int bypass, void PRCI_use_pll(int refsel, int bypass,
int r, int f, int q, int finaldiv, int r, int f, int q, int finaldiv,
int hfroscdiv, int hfrosctrim) int hfroscdiv, int hfrosctrim)
{ {
// Ensure that we aren't running off the PLL before we mess with it. // Ensure that we aren't running off the PLL before we mess with it.
if (PRCI_REG(PRCI_PLLCFG) & PLL_SEL(1)) { if (PRCI_REG(PRCI_PLLCFG) & PLL_SEL(1)) {
@ -162,13 +162,13 @@ void PRCI_use_hfxosc(uint32_t finaldiv)
{ {
PRCI_use_pll(1, // Use HFXTAL PRCI_use_pll(1, // Use HFXTAL
1, // Bypass = 1 1, // Bypass = 1
0, // PLL settings don't matter 0, // PLL settings don't matter
0, // PLL settings don't matter 0, // PLL settings don't matter
0, // PLL settings don't matter 0, // PLL settings don't matter
finaldiv, finaldiv,
-1, -1,
-1); -1);
} }
// This is a generic function, which // This is a generic function, which

4
bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/fe300prci/fe300prci_driver.h
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@ -43,8 +43,8 @@ void PRCI_use_hfxosc(uint32_t finaldiv);
*/ */
void PRCI_use_pll(int refsel, int bypass, void PRCI_use_pll(int refsel, int bypass,
int r, int f, int q, int finaldiv, int r, int f, int q, int finaldiv,
int hfroscdiv, int hfrosctrim); int hfroscdiv, int hfrosctrim);
/* Use the default clocks configured at reset. /* Use the default clocks configured at reset.
* This is ~16Mhz HFROSC and turns off the LFROSC * This is ~16Mhz HFROSC and turns off the LFROSC

2
bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/plic/plic_driver.c
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@ -53,7 +53,7 @@ void PLIC_init (
} }
void PLIC_set_threshold (plic_instance_t * this_plic, void PLIC_set_threshold (plic_instance_t * this_plic,
plic_threshold threshold){ plic_threshold threshold){
unsigned long hart_id = read_csr(mhartid); unsigned long hart_id = read_csr(mhartid);
volatile plic_threshold* threshold_ptr = (plic_threshold*) (this_plic->base_addr + volatile plic_threshold* threshold_ptr = (plic_threshold*) (this_plic->base_addr +

12
bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/plic/plic_driver.h
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@ -29,22 +29,22 @@ void PLIC_init (
); );
void PLIC_set_threshold (plic_instance_t * this_plic, void PLIC_set_threshold (plic_instance_t * this_plic,
plic_threshold threshold); plic_threshold threshold);
void PLIC_enable_interrupt (plic_instance_t * this_plic, void PLIC_enable_interrupt (plic_instance_t * this_plic,
plic_source source); plic_source source);
void PLIC_disable_interrupt (plic_instance_t * this_plic, void PLIC_disable_interrupt (plic_instance_t * this_plic,
plic_source source); plic_source source);
void PLIC_set_priority (plic_instance_t * this_plic, void PLIC_set_priority (plic_instance_t * this_plic,
plic_source source, plic_source source,
plic_priority priority); plic_priority priority);
plic_source PLIC_claim_interrupt(plic_instance_t * this_plic); plic_source PLIC_claim_interrupt(plic_instance_t * this_plic);
void PLIC_complete_interrupt(plic_instance_t * this_plic, void PLIC_complete_interrupt(plic_instance_t * this_plic,
plic_source source); plic_source source);
//__END_DECLS //__END_DECLS

8
bsp/sparkfun-redv/freedom-e-sdk/bsp/env/hifive1.h vendored
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@ -52,10 +52,10 @@
#define PIN_SPI1_SS3 (16u) #define PIN_SPI1_SS3 (16u)
#define SS_PIN_TO_CS_ID(x) \ #define SS_PIN_TO_CS_ID(x) \
((x==PIN_SPI1_SS0 ? 0 : \ ((x==PIN_SPI1_SS0 ? 0 : \
(x==PIN_SPI1_SS1 ? 1 : \ (x==PIN_SPI1_SS1 ? 1 : \
(x==PIN_SPI1_SS2 ? 2 : \ (x==PIN_SPI1_SS2 ? 2 : \
(x==PIN_SPI1_SS3 ? 3 : \ (x==PIN_SPI1_SS3 ? 3 : \
-1))))) -1)))))

68
bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/smp.h
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@ -15,13 +15,13 @@
/* If your test cannot handle multiple-threads, use this: /* If your test cannot handle multiple-threads, use this:
* smp_disable(reg1) * smp_disable(reg1)
*/ */
#define smp_disable(reg1, reg2) \ #define smp_disable(reg1, reg2) \
csrr reg1, mhartid ;\ csrr reg1, mhartid ;\
li reg2, NONSMP_HART ;\ li reg2, NONSMP_HART ;\
beq reg1, reg2, hart0_entry ;\ beq reg1, reg2, hart0_entry ;\
42: ;\ 42: ;\
wfi ;\ wfi ;\
j 42b ;\ j 42b ;\
hart0_entry: hart0_entry:
/* If your test needs to temporarily block multiple-threads, do this: /* If your test needs to temporarily block multiple-threads, do this:
@ -31,35 +31,35 @@ hart0_entry:
* ... multi-threaded work ... * ... multi-threaded work ...
*/ */
#define smp_pause(reg1, reg2) \ #define smp_pause(reg1, reg2) \
li reg2, 0x8 ;\ li reg2, 0x8 ;\
csrw mie, reg2 ;\ csrw mie, reg2 ;\
csrr reg2, mhartid ;\ csrr reg2, mhartid ;\
bnez reg2, 42f bnez reg2, 42f
#define smp_resume(reg1, reg2) \ #define smp_resume(reg1, reg2) \
li reg1, CLINT_CTRL_ADDR ;\ li reg1, CLINT_CTRL_ADDR ;\
41: ;\ 41: ;\
li reg2, 1 ;\ li reg2, 1 ;\
sw reg2, 0(reg1) ;\ sw reg2, 0(reg1) ;\
addi reg1, reg1, 4 ;\ addi reg1, reg1, 4 ;\
li reg2, CLINT_END_HART_IPI ;\ li reg2, CLINT_END_HART_IPI ;\
blt reg1, reg2, 41b ;\ blt reg1, reg2, 41b ;\
42: ;\ 42: ;\
wfi ;\ wfi ;\
csrr reg2, mip ;\ csrr reg2, mip ;\
andi reg2, reg2, 0x8 ;\ andi reg2, reg2, 0x8 ;\
beqz reg2, 42b ;\ beqz reg2, 42b ;\
li reg1, CLINT_CTRL_ADDR ;\ li reg1, CLINT_CTRL_ADDR ;\
csrr reg2, mhartid ;\ csrr reg2, mhartid ;\
slli reg2, reg2, 2 ;\ slli reg2, reg2, 2 ;\
add reg2, reg2, reg1 ;\ add reg2, reg2, reg1 ;\
sw zero, 0(reg2) ;\ sw zero, 0(reg2) ;\
41: ;\ 41: ;\
lw reg2, 0(reg1) ;\ lw reg2, 0(reg1) ;\
bnez reg2, 41b ;\ bnez reg2, 41b ;\
addi reg1, reg1, 4 ;\ addi reg1, reg1, 4 ;\
li reg2, CLINT_END_HART_IPI ;\ li reg2, CLINT_END_HART_IPI ;\
blt reg1, reg2, 41b blt reg1, reg2, 41b
#endif #endif