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fixed a spelling error 

rt_thread_switch_interrput_flag -> rt_thread_switch_interrupt_flag

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1704 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
dzzxzz 2011-09-09 07:30:39 +00:00
parent 9fce2db27e
commit f7d1ca323b
11 changed files with 46 additions and 46 deletions
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8
bsp/m16c62p/interrupts.asm
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@ -18,7 +18,7 @@
PUBLIC rt_hw_timer_handler PUBLIC rt_hw_timer_handler
PUBLIC rt_hw_uart0_receive_handler PUBLIC rt_hw_uart0_receive_handler
EXTERN rt_thread_switch_interrput_flag EXTERN rt_thread_switch_interrupt_flag
EXTERN rt_interrupt_from_thread EXTERN rt_interrupt_from_thread
EXTERN rt_interrupt_to_thread EXTERN rt_interrupt_to_thread
EXTERN rt_interrupt_enter EXTERN rt_interrupt_enter
@ -31,7 +31,7 @@
RSEG CODE:CODE:NOROOT(2) RSEG CODE:CODE:NOROOT(2)
rt_hw_context_switch_interrupt_do rt_hw_context_switch_interrupt_do
MOV.W #0, rt_thread_switch_interrput_flag MOV.W #0, rt_thread_switch_interrupt_flag
MOV.W rt_interrupt_from_thread, A0 MOV.W rt_interrupt_from_thread, A0
STC ISP, [A0] STC ISP, [A0]
@ -47,7 +47,7 @@ rt_hw_timer_handler:
JSR rt_tick_increase JSR rt_tick_increase
JSR rt_interrupt_leave JSR rt_interrupt_leave
CMP.W #1, rt_thread_switch_interrput_flag CMP.W #1, rt_thread_switch_interrupt_flag
JEQ rt_hw_context_switch_interrupt_do JEQ rt_hw_context_switch_interrupt_do
POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore current task's registers POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore current task's registers
@ -60,7 +60,7 @@ rt_hw_uart0_receive_handler:
JSR u0rec_handler JSR u0rec_handler
JSR rt_interrupt_leave JSR rt_interrupt_leave
CMP.W #1, rt_thread_switch_interrput_flag CMP.W #1, rt_thread_switch_interrupt_flag
JEQ rt_hw_context_switch_interrupt_do JEQ rt_hw_context_switch_interrupt_do
POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore current task's registers POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore current task's registers

10
libcpu/arm/fm3/context_gcc.S
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@ -59,8 +59,8 @@ rt_hw_interrupt_enable:
rt_hw_context_switch_interrupt: rt_hw_context_switch_interrupt:
rt_hw_context_switch: rt_hw_context_switch:
/* set rt_thread_switch_interrput_flag to 1 */ /* set rt_thread_switch_interrupt_flag to 1 */
LDR r2, =rt_thread_switch_interrput_flag LDR r2, =rt_thread_switch_interrupt_flag
LDR r3, [r2] LDR r3, [r2]
CMP r3, #1 CMP r3, #1
BEQ _reswitch BEQ _reswitch
@ -91,11 +91,11 @@ rt_hw_pend_sv:
CPSID I CPSID I
/* get rt_thread_switch_interrupt_flag */ /* get rt_thread_switch_interrupt_flag */
LDR r0, =rt_thread_switch_interrput_flag LDR r0, =rt_thread_switch_interrupt_flag
LDR r1, [r0] LDR r1, [r0]
CBZ r1, pendsv_exit /* pendsv already handled */ CBZ r1, pendsv_exit /* pendsv already handled */
/* clear rt_thread_switch_interrput_flag to 0 */ /* clear rt_thread_switch_interrupt_flag to 0 */
MOV r1, #0x00 MOV r1, #0x00
STR r1, [r0] STR r1, [r0]
@ -139,7 +139,7 @@ rt_hw_context_switch_to:
STR r0, [r1] STR r0, [r1]
/* set interrupt flag to 1 */ /* set interrupt flag to 1 */
LDR r1, =rt_thread_switch_interrput_flag LDR r1, =rt_thread_switch_interrupt_flag
MOV r0, #1 MOV r0, #1
STR r0, [r1] STR r0, [r1]

12
libcpu/arm/fm3/context_iar.S
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@ -28,7 +28,7 @@ NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV excep
REQUIRE8 REQUIRE8
PRESERVE8 PRESERVE8
IMPORT rt_thread_switch_interrput_flag IMPORT rt_thread_switch_interrupt_flag
IMPORT rt_interrupt_from_thread IMPORT rt_interrupt_from_thread
IMPORT rt_interrupt_to_thread IMPORT rt_interrupt_to_thread
@ -58,8 +58,8 @@ rt_hw_interrupt_enable:
EXPORT rt_hw_context_switch EXPORT rt_hw_context_switch
rt_hw_context_switch_interrupt: rt_hw_context_switch_interrupt:
rt_hw_context_switch: rt_hw_context_switch:
; set rt_thread_switch_interrput_flag to 1 ; set rt_thread_switch_interrupt_flag to 1
LDR r2, =rt_thread_switch_interrput_flag LDR r2, =rt_thread_switch_interrupt_flag
LDR r3, [r2] LDR r3, [r2]
CMP r3, #1 CMP r3, #1
BEQ _reswitch BEQ _reswitch
@ -89,11 +89,11 @@ rt_hw_pend_sv:
CPSID I CPSID I
; get rt_thread_switch_interrupt_flag ; get rt_thread_switch_interrupt_flag
LDR r0, =rt_thread_switch_interrput_flag LDR r0, =rt_thread_switch_interrupt_flag
LDR r1, [r0] LDR r1, [r0]
CBZ r1, pendsv_exit ; pendsv already handled CBZ r1, pendsv_exit ; pendsv already handled
; clear rt_thread_switch_interrput_flag to 0 ; clear rt_thread_switch_interrupt_flag to 0
MOV r1, #0x00 MOV r1, #0x00
STR r1, [r0] STR r1, [r0]
@ -136,7 +136,7 @@ rt_hw_context_switch_to:
STR r0, [r1] STR r0, [r1]
; set interrupt flag to 1 ; set interrupt flag to 1
LDR r1, =rt_thread_switch_interrput_flag LDR r1, =rt_thread_switch_interrupt_flag
MOV r0, #1 MOV r0, #1
STR r0, [r1] STR r0, [r1]

12
libcpu/arm/fm3/context_rvds.S
View File

@ -22,7 +22,7 @@ NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV excep
REQUIRE8 REQUIRE8
PRESERVE8 PRESERVE8
IMPORT rt_thread_switch_interrput_flag IMPORT rt_thread_switch_interrupt_flag
IMPORT rt_interrupt_from_thread IMPORT rt_interrupt_from_thread
IMPORT rt_interrupt_to_thread IMPORT rt_interrupt_to_thread
@ -55,8 +55,8 @@ rt_hw_context_switch_interrupt
rt_hw_context_switch PROC rt_hw_context_switch PROC
EXPORT rt_hw_context_switch EXPORT rt_hw_context_switch
; set rt_thread_switch_interrput_flag to 1 ; set rt_thread_switch_interrupt_flag to 1
LDR r2, =rt_thread_switch_interrput_flag LDR r2, =rt_thread_switch_interrupt_flag
LDR r3, [r2] LDR r3, [r2]
CMP r3, #1 CMP r3, #1
BEQ _reswitch BEQ _reswitch
@ -87,11 +87,11 @@ rt_hw_pend_sv PROC
CPSID I CPSID I
; get rt_thread_switch_interrupt_flag ; get rt_thread_switch_interrupt_flag
LDR r0, =rt_thread_switch_interrput_flag LDR r0, =rt_thread_switch_interrupt_flag
LDR r1, [r0] LDR r1, [r0]
CBZ r1, pendsv_exit ; pendsv already handled CBZ r1, pendsv_exit ; pendsv already handled
; clear rt_thread_switch_interrput_flag to 0 ; clear rt_thread_switch_interrupt_flag to 0
MOV r1, #0x00 MOV r1, #0x00
STR r1, [r0] STR r1, [r0]
@ -137,7 +137,7 @@ rt_hw_context_switch_to PROC
STR r0, [r1] STR r0, [r1]
; set interrupt flag to 1 ; set interrupt flag to 1
LDR r1, =rt_thread_switch_interrput_flag LDR r1, =rt_thread_switch_interrupt_flag
MOV r0, #1 MOV r0, #1
STR r0, [r1] STR r0, [r1]

2
libcpu/arm/fm3/cpuport.c
View File

@ -20,7 +20,7 @@
/* switch flag on interrupt and thread pointer to save switch record */ /* switch flag on interrupt and thread pointer to save switch record */
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread; rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrput_flag; rt_uint32_t rt_thread_switch_interrupt_flag;
/* stack context in ARM Cortex-M3 */ /* stack context in ARM Cortex-M3 */
struct stack_context struct stack_context

6
libcpu/m16c/m16c62p/context_iar.S
View File

@ -23,7 +23,7 @@
RSEG CODE(1) RSEG CODE(1)
EXTERN rt_thread_switch_interrput_flag EXTERN rt_thread_switch_interrupt_flag
EXTERN rt_interrupt_from_thread EXTERN rt_interrupt_from_thread
EXTERN rt_interrupt_to_thread EXTERN rt_interrupt_to_thread
@ -73,9 +73,9 @@ rt_hw_context_switch:
RTS RTS
rt_hw_context_switch_interrupt: rt_hw_context_switch_interrupt:
CMP.W #1, rt_thread_switch_interrput_flag CMP.W #1, rt_thread_switch_interrupt_flag
JEQ jump JEQ jump
MOV.W #1, rt_thread_switch_interrput_flag MOV.W #1, rt_thread_switch_interrupt_flag
MOV.W R0, rt_interrupt_from_thread MOV.W R0, rt_interrupt_from_thread
jump jump
MOV.W R1, rt_interrupt_to_thread MOV.W R1, rt_interrupt_to_thread

8
libcpu/m16c/m16c62p/cpuport.c
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@ -19,7 +19,7 @@ extern volatile rt_uint8_t rt_interrupt_nest;
/* switch flag on interrupt and thread pointer to save switch record */ /* switch flag on interrupt and thread pointer to save switch record */
rt_uint32_t rt_interrupt_from_thread; rt_uint32_t rt_interrupt_from_thread;
rt_uint32_t rt_interrupt_to_thread; rt_uint32_t rt_interrupt_to_thread;
rt_uint8_t rt_thread_switch_interrput_flag; rt_uint8_t rt_thread_switch_interrupt_flag;
/** /**
* This function will initialize hardware interrupt * This function will initialize hardware interrupt
@ -30,7 +30,7 @@ void rt_hw_interrupt_init(void)
rt_interrupt_nest = 0; rt_interrupt_nest = 0;
rt_interrupt_from_thread = 0; rt_interrupt_from_thread = 0;
rt_interrupt_to_thread = 0; rt_interrupt_to_thread = 0;
rt_thread_switch_interrput_flag = 0; rt_thread_switch_interrupt_flag = 0;
} }
/** /**
@ -81,9 +81,9 @@ void rt_hw_context_switch(rt_uint32_t from, rt_uint32_t to)
void rt_hw_context_switch_interrupt(rt_uint32_t from, rt_uint32_t to) void rt_hw_context_switch_interrupt(rt_uint32_t from, rt_uint32_t to)
{ {
if (rt_thread_switch_interrput_flag != 1) if (rt_thread_switch_interrupt_flag != 1)
{ {
rt_thread_switch_interrput_flag = 1; rt_thread_switch_interrupt_flag = 1;
rt_interrupt_from_thread = from; rt_interrupt_from_thread = from;
} }
rt_interrupt_to_thread = to; rt_interrupt_to_thread = to;

10
libcpu/mips/loongson_1b/context_gcc.S
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@ -67,17 +67,17 @@ rt_hw_context_switch_to:
/* /*
* void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to)/* * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to)/*
*/ */
.globl rt_thread_switch_interrput_flag .globl rt_thread_switch_interrupt_flag
.globl rt_interrupt_from_thread .globl rt_interrupt_from_thread
.globl rt_interrupt_to_thread .globl rt_interrupt_to_thread
.globl rt_hw_context_switch_interrupt .globl rt_hw_context_switch_interrupt
rt_hw_context_switch_interrupt: rt_hw_context_switch_interrupt:
la t0, rt_thread_switch_interrput_flag la t0, rt_thread_switch_interrupt_flag
lw t1, 0(t0) lw t1, 0(t0)
nop nop
bnez t1, _reswitch bnez t1, _reswitch
nop nop
li t1, 0x01 /* set rt_thread_switch_interrput_flag to 1 */ li t1, 0x01 /* set rt_thread_switch_interrupt_flag to 1 */
sw t1, 0(t0) sw t1, 0(t0)
la t0, rt_interrupt_from_thread /* set rt_interrupt_from_thread */ la t0, rt_interrupt_from_thread /* set rt_interrupt_from_thread */
sw a0, 0(t0) sw a0, 0(t0)
@ -117,10 +117,10 @@ mips_irq_handle:
move sp, k0 move sp, k0
/* /*
* if rt_thread_switch_interrput_flag set, jump to * if rt_thread_switch_interrupt_flag set, jump to
* rt_hw_context_switch_interrupt_do and don't return * rt_hw_context_switch_interrupt_do and don't return
*/ */
la k0, rt_thread_switch_interrput_flag la k0, rt_thread_switch_interrupt_flag
lw k1, 0(k0) lw k1, 0(k0)
beqz k1, spurious_interrupt beqz k1, spurious_interrupt
nop nop

4
libcpu/mips/loongson_1b/interrupt.c
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@ -19,7 +19,7 @@
extern rt_uint32_t rt_interrupt_nest; extern rt_uint32_t rt_interrupt_nest;
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread; rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrput_flag; rt_uint32_t rt_thread_switch_interrupt_flag;
static rt_isr_handler_t irq_handle_table[MAX_INTR]; static rt_isr_handler_t irq_handle_table[MAX_INTR];
void rt_interrupt_dispatch(void *ptreg); void rt_interrupt_dispatch(void *ptreg);
@ -61,7 +61,7 @@ void rt_hw_interrupt_init()
rt_interrupt_nest = 0; rt_interrupt_nest = 0;
rt_interrupt_from_thread = 0; rt_interrupt_from_thread = 0;
rt_interrupt_to_thread = 0; rt_interrupt_to_thread = 0;
rt_thread_switch_interrput_flag = 0; rt_thread_switch_interrupt_flag = 0;
} }
/** /**

18
libcpu/v850/context.asm
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@ -28,7 +28,7 @@
RSEG CODE(1) RSEG CODE(1)
EXTERN rt_thread_switch_interrput_flag EXTERN rt_thread_switch_interrupt_flag
EXTERN rt_interrupt_from_thread EXTERN rt_interrupt_from_thread
EXTERN rt_interrupt_to_thread EXTERN rt_interrupt_to_thread
@ -122,7 +122,7 @@ rt_hw_context_switch_to:
OSCtxSW: OSCtxSW:
SAVE_CPU_CTX ;Save all CPU registers SAVE_CPU_CTX ;Save all CPU registers
mov rt_thread_switch_interrput_flag, r1 mov rt_thread_switch_interrupt_flag, r1
ld.w 0[r1],r5 ld.w 0[r1],r5
cmp 0, r5 cmp 0, r5
be exit be exit
@ -145,11 +145,11 @@ exit:
;R1 -> rt_interrupt_from_thread ;R1 -> rt_interrupt_from_thread
;R5 -> rt_interrupt_to_thread ;R5 -> rt_interrupt_to_thread
rt_hw_context_switch: rt_hw_context_switch:
mov rt_thread_switch_interrput_flag, r8 mov rt_thread_switch_interrupt_flag, r8
ld.w 0[r8],r9 ld.w 0[r8],r9
cmp 1, r9 cmp 1, r9
be jump1 be jump1
;mov rt_thread_switch_interrput_flag, r1 ;mov rt_thread_switch_interrupt_flag, r1
mov 1, r9 mov 1, r9
st.b r9, 0[r8] st.b r9, 0[r8]
mov rt_interrupt_from_thread, r10 mov rt_interrupt_from_thread, r10
@ -161,11 +161,11 @@ jump1
jmp [lp] jmp [lp]
rt_hw_context_switch_interrupt: rt_hw_context_switch_interrupt:
mov rt_thread_switch_interrput_flag, r8 mov rt_thread_switch_interrupt_flag, r8
ld.w 0[r8],r9 ld.w 0[r8],r9
cmp 1, r9 cmp 1, r9
be jump2 be jump2
;mov rt_thread_switch_interrput_flag, r1 ;mov rt_thread_switch_interrupt_flag, r1
mov 1, r9 mov 1, r9
st.b r9, 0[r8] st.b r9, 0[r8]
mov rt_interrupt_from_thread, r10 mov rt_interrupt_from_thread, r10
@ -176,7 +176,7 @@ jump2
jmp [lp] jmp [lp]
rt_hw_context_switch_interrupt_do rt_hw_context_switch_interrupt_do
mov rt_thread_switch_interrput_flag, r8 mov rt_thread_switch_interrupt_flag, r8
mov 0, r9 mov 0, r9
st.b r9, 0[r8] st.b r9, 0[r8]
@ -195,7 +195,7 @@ OSTickIntr:
jarl rt_tick_increase,lp jarl rt_tick_increase,lp
jarl rt_interrupt_leave,lp jarl rt_interrupt_leave,lp
mov rt_thread_switch_interrput_flag, r8 mov rt_thread_switch_interrupt_flag, r8
ld.w 0[r8],r9 ld.w 0[r8],r9
cmp 1, r9 cmp 1, r9
be rt_hw_context_switch_interrupt_do be rt_hw_context_switch_interrupt_do
@ -208,7 +208,7 @@ uarta1_int_r:
jarl uarta1_receive_handler,lp jarl uarta1_receive_handler,lp
jarl rt_interrupt_leave,lp jarl rt_interrupt_leave,lp
mov rt_thread_switch_interrput_flag, r8 mov rt_thread_switch_interrupt_flag, r8
ld.w 0[r8],r9 ld.w 0[r8],r9
cmp 1, r9 cmp 1, r9
be rt_hw_context_switch_interrupt_do be rt_hw_context_switch_interrupt_do

2
libcpu/v850/interrupt.c
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@ -19,4 +19,4 @@
rt_uint32_t rt_interrupt_from_thread; rt_uint32_t rt_interrupt_from_thread;
rt_uint32_t rt_interrupt_to_thread; rt_uint32_t rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrput_flag; rt_uint32_t rt_thread_switch_interrupt_flag;