6 Commits

Author	SHA1	Message	Date
liang yongxiang	32c5b2515f	[libcpu] add risc-v e310 porting	2018-05-31 14:53:26 +08:00
liang yongxiang	5faae3350c	[libcpu] remove libcpu/risc-v	2018-05-29 12:59:13 +08:00
zhangjun	72cfe9dd68	modify： drivers/cpuusage.c ... modify： ../../libcpu/risc-v/e310/stack.c rmove unused macro definition modify： ../../src/idle.c Return to the original version	2017-07-31 12:05:45 +08:00
zhangjun	a5305c05df	fix bug in context_gcc.s and start_gcc.s: ... save mie into stack msh running normaly	2017-07-31 10:59:59 +08:00
zhangjun	b334347a24	deleted: rtthread.s /*just for debug*/ ... modified: ../../libcpu/risc-v/e310/context_gcc.S change ret to mret and switch to new task with mepc	2017-07-17 16:55:33 +08:00
zhangjun	e01455155a	add context_gcc.s	2017-07-17 15:44:00 +08:00