mirror of https://github.com/RT-Thread/rt-thread
457 lines
14 KiB
C
457 lines
14 KiB
C
/*
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* Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-12-30 CDT first version
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*/
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/*
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* 功能
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* 程序清单：这是一个 PM 设备使用例程
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* 例程导出了 pm_sample_init 命令到控制终端
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* 命令调用格式：pm_sample_init
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*
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* 展示RTT休眠模式的进入和退出
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* hc32 drv_pm 支持的RTT休眠模式包括： idle、deep、standby、shutdown
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* 每种休眠模式与芯片低功耗模式的对应关系是：
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* RTT | HC32
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* -----------------------|----------
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* PM_SLEEP_MODE_IDLE | 睡眠模式
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* PM_SLEEP_MODE_DEEP | 停止模式
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* PM_SLEEP_MODE_STANDBY | 掉电模式1或2（可配，默认配置是模式1）
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* PM_SLEEP_MODE_SHUTDOWN | 掉电模式3或4（可配，默认配置是模式3）
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*
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* 操作步骤1：
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* 1）按下按键K10： MCU进入休眠模式
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* 2）再按下按键K10：MCU退出休眠模式
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* 3）重复上述按键操作，MCU循环进入休眠模式(deep、standby、shutdown、idle)和退出对应的休眠模式。
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* 每次进入休眠模式前，MCU打印 "sleep:" + 休眠模式名称
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* 每次退出休眠模式后，MCU打印 "wake from sleep:" + 休眠模式名称
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* 操作步骤2：
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* 1）支持运行模式切换的芯片循环切换 低速->高速->低速 运行模式,对应时钟输出口输出对应模式下的时钟信号
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <board.h>
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#include <drivers/lptimer.h>
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#if defined(BSP_USING_PM)
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#if defined (HC32F4A0)
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#define PLL_SRC ((CM_CMU->PLLHCFGR & CMU_PLLHCFGR_PLLSRC) >> CMU_PLLHCFGR_PLLSRC_POS)
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#define BSP_KEY_PORT (GPIO_PORT_A) /* Key10 */
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#define BSP_KEY_PIN (GPIO_PIN_00)
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#define BSP_KEY_EXTINT (EXTINT_CH00)
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#define BSP_KEY_INT_SRC (INT_SRC_PORT_EIRQ0)
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#define BSP_KEY_IRQn (INT001_IRQn)
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#define BSP_KEY_INTC_STOP_WKUP_EXTINT (INTC_STOP_WKUP_EXTINT_CH0)
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#define BSP_KEY_EVT (EVT_SRC_PORT_EIRQ0)
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#define BSP_KEY_PWC_PD_WKUP_TRIG_WKUP (PWC_PD_WKUP_TRIG_WKUP0)
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#define BSP_KEY_PWC_PD_WKUP_WKUP (PWC_PD_WKUP_WKUP00)
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#define MCO_PORT (GPIO_PORT_A)
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#define MCO_PIN (GPIO_PIN_08)
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#define MCO_GPIO_FUNC (GPIO_FUNC_1)
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#elif defined (HC32F460)
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#define PLL_SRC ((CM_CMU->PLLCFGR & CMU_PLLCFGR_PLLSRC) >> CMU_PLLCFGR_PLLSRC_POS)
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#define BSP_KEY_PORT (GPIO_PORT_B) /* Key10 */
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#define BSP_KEY_PIN (GPIO_PIN_01)
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#define BSP_KEY_EXTINT (EXTINT_CH01)
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#define BSP_KEY_INT_SRC (INT_SRC_PORT_EIRQ1)
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#define BSP_KEY_IRQn (INT001_IRQn)
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#define BSP_KEY_INTC_STOP_WKUP_EXTINT (INTC_STOP_WKUP_EXTINT_CH1)
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#define BSP_KEY_EVT (EVT_SRC_PORT_EIRQ1)
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#define BSP_KEY_PWC_PD_WKUP_TRIG_WKUP (PWC_PD_WKUP_TRIG_WKUP1)
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#define BSP_KEY_PWC_PD_WKUP_WKUP (PWC_PD_WKUP_WKUP01)
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#define MCO_PORT (GPIO_PORT_A)
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#define MCO_PIN (GPIO_PIN_08)
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#define MCO_GPIO_FUNC (GPIO_FUNC_1)
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#elif defined (HC32F448)
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#define PLL_SRC ((CM_CMU->PLLHCFGR & CMU_PLLHCFGR_PLLSRC) >> CMU_PLLHCFGR_PLLSRC_POS)
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#define BSP_KEY_PORT (GPIO_PORT_B) /* Key5 */
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#define BSP_KEY_PIN (GPIO_PIN_06)
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#define BSP_KEY_EXTINT (EXTINT_CH06)
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#define BSP_KEY_INT_SRC (INT_SRC_PORT_EIRQ6)
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#define BSP_KEY_IRQn (INT001_IRQn)
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#define BSP_KEY_INTC_STOP_WKUP_EXTINT (INTC_STOP_WKUP_EXTINT_CH6)
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#define BSP_KEY_EVT (EVT_SRC_PORT_EIRQ6)
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#define BSP_KEY_PWC_PD_WKUP_TRIG_WKUP (PWC_PD_WKUP_TRIG_WKUP1)
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#define BSP_KEY_PWC_PD_WKUP_WKUP (PWC_PD_WKUP_WKUP12)
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#define MCO_PORT (GPIO_PORT_A)
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#define MCO_PIN (GPIO_PIN_08)
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#define MCO_GPIO_FUNC (GPIO_FUNC_1)
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#elif defined (HC32F472)
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#define PLL_SRC ((CM_CMU->PLLHCFGR & CMU_PLLHCFGR_PLLSRC) >> CMU_PLLHCFGR_PLLSRC_POS)
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#define BSP_KEY_PORT (GPIO_PORT_B) /* Key5 */
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#define BSP_KEY_PIN (GPIO_PIN_05)
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#define BSP_KEY_EXTINT (EXTINT_CH05)
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#define BSP_KEY_INT_SRC (INT_SRC_PORT_EIRQ5)
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#define BSP_KEY_IRQn (INT001_IRQn)
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#define BSP_KEY_INTC_STOP_WKUP_EXTINT (INTC_STOP_WKUP_EXTINT_CH5)
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#define BSP_KEY_EVT (EVT_SRC_PORT_EIRQ5)
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#define BSP_KEY_PWC_PD_WKUP_TRIG_WKUP (PWC_PD_WKUP_TRIG_WKUP1)
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#define BSP_KEY_PWC_PD_WKUP_WKUP (PWC_PD_WKUP_WKUP11)
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#endif
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#define KEYCNT_BACKUP_ADDR (uint32_t *)(0x200F0010)
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#define KEYCNT_CMD_SLEEP_NONE (0)
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#define KEYCNT_CMD_SLEEP_IDLE (1)
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#define KEYCNT_CMD_SLEEP_DEEP (3)
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#define KEYCNT_CMD_SLEEP_STANDBY (5)
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#define KEYCNT_CMD_SLEEP_SHUTDOWN (7)
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#define PM_DBG
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#if defined PM_DBG
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#define pm_dbg rt_kprintf
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#else
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#define pm_dbg
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#endif
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static volatile uint32_t g_keycnt_cmd;
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static volatile rt_bool_t g_wkup_flag = RT_FALSE;
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static void KEY_IrqHandler(void)
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{
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if (SET == EXTINT_GetExtIntStatus(BSP_KEY_EXTINT))
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{
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EXTINT_ClearExtIntStatus(BSP_KEY_EXTINT);
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__DSB();
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__ISB();
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}
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if (g_wkup_flag)
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{
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g_wkup_flag = RT_FALSE;
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return;
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}
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g_keycnt_cmd++;
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pm_dbg("g_keycnt_cmd =%d, ", g_keycnt_cmd);
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pm_dbg("recv sleep request\n");
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NVIC_DisableIRQ(BSP_KEY_IRQn);
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NVIC_ClearPendingIRQ(BSP_KEY_IRQn);
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}
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static void _key_int_init(void)
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{
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stc_extint_init_t stcExtIntInit;
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stc_irq_signin_config_t stcIrqSignConfig;
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stc_gpio_init_t stcGpioInit;
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/* configuration structure initialization */
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(void)GPIO_StructInit(&stcGpioInit);
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stcGpioInit.u16ExtInt = PIN_EXTINT_ON;
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stcGpioInit.u16PullUp = PIN_PU_ON;
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/* GPIO config */
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(void)GPIO_Init(BSP_KEY_PORT, BSP_KEY_PIN, &stcGpioInit);
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/* Extint config */
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(void)EXTINT_StructInit(&stcExtIntInit);
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stcExtIntInit.u32Edge = EXTINT_TRIG_FALLING;
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(void)EXTINT_Init(BSP_KEY_EXTINT, &stcExtIntInit);
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/* IRQ sign-in */
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stcIrqSignConfig.enIntSrc = BSP_KEY_INT_SRC;
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stcIrqSignConfig.enIRQn = BSP_KEY_IRQn;
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stcIrqSignConfig.pfnCallback = KEY_IrqHandler;
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(void)INTC_IrqSignIn(&stcIrqSignConfig);
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/* NVIC config */
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NVIC_ClearPendingIRQ(stcIrqSignConfig.enIRQn);
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NVIC_SetPriority(stcIrqSignConfig.enIRQn, DDL_IRQ_PRIO_DEFAULT);
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NVIC_EnableIRQ(stcIrqSignConfig.enIRQn);
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}
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static void _wkup_cfg_sleep_deep()
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{
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INTC_WakeupSrcCmd(BSP_KEY_INTC_STOP_WKUP_EXTINT, ENABLE);
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}
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static void _wkup_cfg_sleep_standby(void)
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{
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PWC_PD_SetWakeupTriggerEdge(BSP_KEY_PWC_PD_WKUP_TRIG_WKUP, PWC_PD_WKUP_TRIG_FALLING);
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PWC_PD_WakeupCmd(BSP_KEY_PWC_PD_WKUP_WKUP, ENABLE);
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PWC_PD_ClearWakeupStatus(PWC_PD_WKUP_FLAG_ALL);
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}
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static void _wkup_cfg_sleep_shutdown(void)
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{
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PWC_PD_SetWakeupTriggerEdge(BSP_KEY_PWC_PD_WKUP_TRIG_WKUP, PWC_PD_WKUP_TRIG_FALLING);
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PWC_PD_WakeupCmd(BSP_KEY_PWC_PD_WKUP_WKUP, ENABLE);
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}
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static void _sleep_enter_event_idle(void)
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{
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rt_kprintf("sleep: idle\n");
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}
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static void _sleep_enter_event_deep(void)
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{
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_wkup_cfg_sleep_deep();
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rt_kprintf("sleep: deep\n");
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DDL_DelayMS(50);
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}
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static void _sleep_enter_event_standby(void)
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{
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_wkup_cfg_sleep_standby();
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#if defined (HC32F4A0)
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PWC_BKR_Write(0, g_keycnt_cmd & 0xFF);
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#endif
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*KEYCNT_BACKUP_ADDR = g_keycnt_cmd;
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rt_kprintf("sleep: standby\n");
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DDL_DelayMS(50);
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}
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static void _sleep_enter_event_shutdown(void)
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{
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_wkup_cfg_sleep_shutdown();
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*KEYCNT_BACKUP_ADDR = g_keycnt_cmd;
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rt_kprintf("sleep: shutdown\n");
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DDL_DelayMS(50);
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}
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static void _sleep_exit_event_idle(void)
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{
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rt_pm_release(PM_SLEEP_MODE_IDLE);
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rt_pm_request(PM_SLEEP_MODE_NONE);
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rt_kprintf("wakeup from sleep: idle\n");
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}
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static void _sleep_exit_event_deep(void)
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{
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#if defined (HC32F460)
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PWC_STOP_ClockRecover();
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#endif
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rt_pm_release(PM_SLEEP_MODE_DEEP);
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rt_pm_request(PM_SLEEP_MODE_NONE);
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rt_kprintf("wakeup from sleep: deep\n");
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}
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typedef void (*notify)(void);
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static notify sleep_enter_func[PM_SLEEP_MODE_MAX] =
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{
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RT_NULL,
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_sleep_enter_event_idle,
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RT_NULL,
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_sleep_enter_event_deep,
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_sleep_enter_event_standby,
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_sleep_enter_event_shutdown,
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};
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static notify sleep_exit_func[PM_SLEEP_MODE_MAX] =
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{
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RT_NULL,
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_sleep_exit_event_idle,
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RT_NULL,
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_sleep_exit_event_deep,
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RT_NULL,
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RT_NULL,
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};
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static void _notify_func(uint8_t event, uint8_t mode, void *data)
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{
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if (event == RT_PM_ENTER_SLEEP)
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{
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SysTick_Suspend();
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if (sleep_enter_func[mode] == RT_NULL)
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{
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return;
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}
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sleep_enter_func[mode]();
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}
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else
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{
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SysTick_Resume();
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if (sleep_exit_func[mode] != RT_NULL)
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{
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sleep_exit_func[mode]();
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}
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g_keycnt_cmd++;
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g_wkup_flag = RT_TRUE;
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pm_dbg("g_keycnt_cmd =%d, ", g_keycnt_cmd);
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NVIC_EnableIRQ(BSP_KEY_IRQn);
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}
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}
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static void pm_cmd_handler(void *parameter)
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{
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rt_uint8_t sleep_mode = PM_SLEEP_MODE_NONE;
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while (1)
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{
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if ((KEYCNT_CMD_SLEEP_IDLE == g_keycnt_cmd) || (KEYCNT_CMD_SLEEP_DEEP == g_keycnt_cmd) || \
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(KEYCNT_CMD_SLEEP_STANDBY == g_keycnt_cmd) || (KEYCNT_CMD_SLEEP_SHUTDOWN == g_keycnt_cmd))
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{
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switch (g_keycnt_cmd)
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{
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case KEYCNT_CMD_SLEEP_IDLE:
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sleep_mode = PM_SLEEP_MODE_IDLE;
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break;
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case KEYCNT_CMD_SLEEP_DEEP:
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sleep_mode = PM_SLEEP_MODE_DEEP;
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break;
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case KEYCNT_CMD_SLEEP_STANDBY:
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sleep_mode = PM_SLEEP_MODE_STANDBY;
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break;
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case KEYCNT_CMD_SLEEP_SHUTDOWN:
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sleep_mode = PM_SLEEP_MODE_SHUTDOWN;
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break;
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default:
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break;
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}
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rt_pm_request(sleep_mode);
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rt_pm_release(PM_SLEEP_MODE_NONE);
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rt_thread_mdelay(500);
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}
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else
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{
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rt_thread_mdelay(50);
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}
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}
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}
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#if defined(HC32F4A0) || defined(HC32F460) || defined(HC32F448)
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static void pm_run_main(void *parameter)
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{
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static rt_uint8_t run_index = 0;
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char *speed[] = {"low", "high"};
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const rt_uint8_t run_mode[] = {PM_RUN_MODE_LOW_SPEED, PM_RUN_MODE_HIGH_SPEED};
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GPIO_SetFunc(MCO_PORT, MCO_PIN, MCO_GPIO_FUNC);
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/* Configure clock output system clock */
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CLK_MCOConfig(CLK_MCO1, CLK_MCO_SRC_HCLK, CLK_MCO_DIV8);
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/* MCO1 output enable */
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CLK_MCOCmd(CLK_MCO1, ENABLE);
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while (1)
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{
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rt_pm_run_enter(run_mode[run_index]);
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rt_thread_mdelay(100);
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rt_kprintf("system clock switch to %s speed\n\n", speed[run_index]);
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if (++run_index >= ARRAY_SZ(run_mode))
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{
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run_index = 0;
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}
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rt_thread_mdelay(3000);
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}
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}
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#endif
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static void _keycnt_cmd_init_after_power_on(void)
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{
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en_flag_status_t wkup_from_ptwk = PWC_PD_GetWakeupStatus(PWC_PD_WKUP_FLAG_WKUP0);
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#if defined (HC32F4A0)
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en_flag_status_t bakram_pd = PWC_BKR_GetStatus(PWC_BACKUP_RAM_FLAG_RAMPDF);
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uint8_t bkr0 = PWC_BKR_Read(0);
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if (bakram_pd == RT_TRUE)
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{
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g_keycnt_cmd = KEYCNT_CMD_SLEEP_NONE;
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}
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else
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#endif
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{
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g_keycnt_cmd = *KEYCNT_BACKUP_ADDR;
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if (g_keycnt_cmd == KEYCNT_CMD_SLEEP_STANDBY)
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{
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if (wkup_from_ptwk)
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{
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g_keycnt_cmd++;
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pm_dbg("g_keycnt_cmd =%d, ", g_keycnt_cmd);
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rt_kprintf("wakeup from sleep: standby\n\n");
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}
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else
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{
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g_keycnt_cmd = KEYCNT_CMD_SLEEP_NONE;
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}
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}
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else if (g_keycnt_cmd >= KEYCNT_CMD_SLEEP_SHUTDOWN)
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{
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if ((g_keycnt_cmd == KEYCNT_CMD_SLEEP_SHUTDOWN) && wkup_from_ptwk)
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{
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pm_dbg("g_keycnt_cmd =%d \n", KEYCNT_CMD_SLEEP_NONE);
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rt_kprintf("wakeup from sleep: shutdown\n\n");
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}
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g_keycnt_cmd = KEYCNT_CMD_SLEEP_NONE;
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}
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}
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pm_dbg("KEYCNT_BACKUP_ADDR addr =0x%p,value = %d\n", KEYCNT_BACKUP_ADDR, *KEYCNT_BACKUP_ADDR);
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pm_dbg("wkup_from_ptwk = %d\n", wkup_from_ptwk);
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#if defined (HC32F4A0)
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pm_dbg("bakram_pd = %d\n", bakram_pd);
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pm_dbg("bkr0 = %d\n", bkr0);
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#endif
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}
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static void _vbat_init(void)
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{
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#if defined (HC32F4A0)
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while (PWC_BKR_GetStatus(PWC_BACKUP_RAM_FLAG_RAMVALID) == RESET)
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{
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rt_thread_delay(10);
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}
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FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_SRAMB, ENABLE);
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#elif defined (HC32F448)
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FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_SRAMB, ENABLE);
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#elif defined (HC32F460)
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FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_SRAMRET, ENABLE);
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#elif defined (HC32F472)
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FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_SRAMRET, ENABLE);
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#endif
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pm_dbg("vbat init success\n");
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}
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int pm_sample_init(void)
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{
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pm_dbg("pm_sample_init\n\n");
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_keycnt_cmd_init_after_power_on();
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_vbat_init();
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_key_int_init();
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rt_pm_notify_set(_notify_func, NULL);
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rt_thread_t thread = rt_thread_create("pm_cmd_handler", pm_cmd_handler, RT_NULL, 1024, 25, 10);
|
||
if (thread != RT_NULL)
|
||
{
|
||
rt_thread_startup(thread);
|
||
}
|
||
else
|
||
{
|
||
rt_kprintf("create pm sample thread failed!\n");
|
||
}
|
||
|
||
#if defined(HC32F4A0) || defined(HC32F460) || defined(HC32F448)
|
||
thread = rt_thread_create("pm_run_main", pm_run_main, RT_NULL, 1024, 25, 10);
|
||
if (thread != RT_NULL)
|
||
{
|
||
rt_thread_startup(thread);
|
||
}
|
||
else
|
||
{
|
||
rt_kprintf("create pm run thread failed!\n");
|
||
}
|
||
#endif
|
||
|
||
return RT_EOK;
|
||
}
|
||
MSH_CMD_EXPORT(pm_sample_init, pm sample init);
|
||
|
||
#endif /* end of BSP_USING_PM */
|