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Fix `BLKSEQ` on suspendable processes (#5722) 

Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
This commit is contained in:
Krzysztof Bieganski 2025-01-09 14:40:32 +01:00 committed by GitHub
parent 0380a36c76
commit 052812bb87
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GPG Key ID: B5690EEEBB952194
3 changed files with 15 additions and 19 deletions
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18
src/V3Active.cpp
View File

@ -349,7 +349,7 @@ public:
class ActiveDlyVisitor final : public VNVisitor {
public:
enum CheckType : uint8_t { CT_SEQ, CT_COMB, CT_INITIAL };
enum CheckType : uint8_t { CT_SEQ, CT_COMB, CT_INITIAL, CT_SUSPENDABLE };
private:
// MEMBERS
@ -358,7 +358,7 @@ private:
// VISITORS
void visit(AstAssignDly* nodep) override {
// Non-blocking assignments are OK in sequential processes
if (m_check == CT_SEQ) return;
if (m_check == CT_SEQ || m_check == CT_SUSPENDABLE) return;
// Issue appropriate warning
if (m_check == CT_INITIAL) {
@ -477,10 +477,8 @@ class ActiveVisitor final : public VNVisitor {
AstActive* const wantactivep
= !m_clockedProcess ? m_namer.getSpecialActive<AstSenItem::Combo>(nodep->fileline())
: oldsensesp ? m_namer.getActive(nodep->fileline(), oldsensesp)
: m_namer.getSpecialActive<AstSenItem::Initial>(nodep->fileline());
// Delete sensitivity list
if (oldsensesp) VL_DO_DANGLING(oldsensesp->deleteTree(), oldsensesp);
// Clocked, no sensitivity lists, it's a suspendable, put it in initial
: m_namer.getSpecialActive<AstSenItem::Initial>(nodep->fileline());
// Move node to new active
nodep->unlinkFrBack();
@ -488,10 +486,14 @@ class ActiveVisitor final : public VNVisitor {
// Warn and convert any delayed assignments
{
ActiveDlyVisitor{nodep, m_clockedProcess ? ActiveDlyVisitor::CT_SEQ
: ActiveDlyVisitor::CT_COMB};
ActiveDlyVisitor{nodep, !m_clockedProcess ? ActiveDlyVisitor::CT_COMB
: oldsensesp ? ActiveDlyVisitor::CT_SEQ
: ActiveDlyVisitor::CT_SUSPENDABLE};
}
// Delete sensitivity list
if (oldsensesp) VL_DO_DANGLING(oldsensesp->deleteTree(), oldsensesp);
// check combinational processes for latches
if (!m_clockedProcess || kwd == VAlwaysKwd::ALWAYS_LATCH) {
const ActiveLatchCheckVisitor latchvisitor{nodep, kwd == VAlwaysKwd::ALWAYS_LATCH};

2
test_regress/t/t_timing_clkgen2.py
View File

@ -11,7 +11,7 @@ import vltest_bootstrap
test.scenarios('simulator')
test.compile(verilator_flags2=["--exe --main --timing"])
test.compile(verilator_flags2=["--exe --main --timing -Wwarn-BLKSEQ"])
test.execute()

14
test_regress/t/t_timing_clkgen2.v
View File

@ -17,24 +17,18 @@ module t;
int cnt2 = 0;
always #4 clk = ~clk;
always @(negedge clk) begin
cnt1++;
`WRITE_VERBOSE(("[%0t] NEG clk (%b)\n", $time, clk));
end
always @(posedge clk) begin
cnt1++;
`WRITE_VERBOSE(("[%0t] POS clk (%b)\n", $time, clk));
cnt1 <= cnt1 + 1;
`WRITE_VERBOSE(("[%0t] clk (%b)\n", $time, clk));
end
assign #2 clk_inv = ~clk;
initial forever begin
@(posedge clk_inv) cnt2++;
`WRITE_VERBOSE(("[%0t] POS clk_inv (%b)\n", $time, clk_inv));
@(negedge clk_inv) cnt2++;
`WRITE_VERBOSE(("[%0t] NEG clk_inv (%b)\n", $time, clk_inv));
`WRITE_VERBOSE(("[%0t] clk_inv (%b)\n", $time, clk_inv));
end
initial #41 begin
initial #81 begin
if (cnt1 != 10 && cnt2 != 10) $stop;
$write("*-* All Finished *-*\n");
$finish;