Allow multiple .v files on command line. [Stefan Thiede]

git-svn-id: file://localhost/svn/verilator/trunk/verilator@1000 77ca24e4-aefa-0310-84f0-b9a241c72d87
This commit is contained in:
Wilson Snyder 2008-03-19 14:22:05 +00:00
parent 73594e5aa5
commit 16d1f2b835
5 changed files with 34 additions and 14 deletions

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@ -8,6 +8,8 @@ indicates the contributor was also the author of the fix; Thanks!
*** Add support for hard-coding VERILATOR_ROOT etc in the executables,
to enable easier use of Verilator RPMs. [Gunter Dannoritzer]
*** Allow multiple .v files on command line. [Stefan Thiede]
**** Fix genvar to be signed, so "< 0" works properly. [Niranjan Prabhu]
**** Fix assignments to inputs inside functions/tasks. [Patricio Kaplan]

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@ -445,8 +445,8 @@ the backward-compatible default of sc_bv's.
=item --prefix I<topname>
Specifies the name of the top level class. Defaults to the name of the top
level Verilog module.
Specifies the name of the top level class. Defaults to the name of the first
Verilog file passed on the command line.
=item --profile-cfuncs
@ -1995,15 +1995,24 @@ the "verilator" define for you, so just wrap the code in a ifndef region:
=item Why do I get "unexpected `do'" or "unexpected `bit'" errors?
Do, bit, ref, and other words are now SystemVerilog keywords. You should
change your code to not use them to insure it works with newer tools.
Alternatively, surround them by the Verilog 2005/SystemVerilog
Do, bit, ref, return, and other words are now SystemVerilog keywords. You
should change your code to not use them to insure it works with newer
tools. Alternatively, surround them by the Verilog 2005/SystemVerilog
begin_keywords pragma to indicate Verilog 2001 code.
`begin_keywords "1364-2001"
integer bit; initial bit = 1;
`end_keywords
If you want the whole file to be parsed as Verilog 2001, just create a
file with
`begin_keywords "1364-2001"
and add it before other Verilog files on the command line. (Note this will
also change the default for --prefix, so if you're not using --prefix, you
will now need to.)
=item How do I prevent my assertions from firing during reset?
Call Verilated::assertOn(false) before you first call the model, then turn

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@ -100,6 +100,11 @@ void V3Options::addLibraryFile(const string& filename) {
m_libraryFiles.insert(filename);
}
}
void V3Options::addVFile(const string& filename) {
if (m_vFiles.find(filename) == m_vFiles.end()) {
m_vFiles.insert(filename);
}
}
void V3Options::addArg(const string& arg) {
m_impp->m_allArgs.push_back(arg);
}
@ -419,12 +424,12 @@ void V3Options::parseOpts (FileLine* fl, int argc, char** argv) {
// Default certain options and error check
// Detailed error, since this is what we often get when run with minimal arguments
if (top()=="") {
if (vFiles().empty()) {
v3fatal("verilator: No Input Verilog file specified on command line, see verilator --help for more information\n");
}
// Default prefix to the filename
if (prefix()=="") m_prefix = string("V")+filenameNonExt(top());
if (prefix()=="") m_prefix = string("V")+filenameNonExt(*(vFiles().begin()));
if (modPrefix()=="") m_modPrefix = prefix();
// Find files in makedir
@ -671,8 +676,7 @@ void V3Options::parseOptsList(FileLine* fl, int argc, char** argv) {
|| filename.find(".sp") != string::npos) {
V3Options::addCppFile(argv[i]);
} else {
if (m_top!="") fl->v3fatal ("Top filename specified twice: "<<m_top<<" and "<<filename);
m_top = filename;
V3Options::addVFile(argv[i]);
}
shift;
}

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@ -41,8 +41,9 @@ class V3Options {
// MEMBERS (general options)
V3OptionsImp* m_impp; // Slow hidden options
V3StringSet m_cppFiles; // C++ files to link against
V3StringSet m_libraryFiles; // Verilog -v files
V3StringSet m_cppFiles; // argument: C++ files to link against
V3StringSet m_libraryFiles; // argument: Verilog -v files
V3StringSet m_vFiles; // argument: Verilog files to read
bool m_preprocOnly; // main switch: -E
bool m_makeDepend; // main switch: -MMD
@ -82,7 +83,6 @@ class V3Options {
string m_bin; // main switch: --bin {binary}
string m_flags; // main switch: -f {name}
string m_top; // main switch: Top .v file name
string m_makeDir; // main switch: -Mdir
string m_prefix; // main switch: --prefix
string m_modPrefix; // main switch: --mod-prefix
@ -127,9 +127,9 @@ class V3Options {
// METHODS
void addCppFile(const string& filename);
void addLibraryFile(const string& filename);
void addVFile(const string& filename);
// ACCESSORS (options)
const string& top() const { return m_top; }
bool preprocOnly() const { return m_preprocOnly; }
bool makeDepend() const { return m_makeDepend; }
bool makePhony() const { return m_makePhony; }
@ -176,6 +176,7 @@ class V3Options {
string xAssign() const { return m_xAssign; }
const V3StringSet& cppFiles() const { return m_cppFiles; }
const V3StringSet& libraryFiles() const { return m_libraryFiles; }
const V3StringSet& vFiles() const { return m_vFiles; }
// ACCESSORS (optimization options)

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@ -91,7 +91,11 @@ V3Global v3Global;
void V3Global::readFiles() {
V3Read reader (m_rootp);
// Read top module
reader.readFile(new FileLine("CommandLine",0), opt.top(), false);
for (V3StringSet::iterator it = v3Global.opt.vFiles().begin();
it != v3Global.opt.vFiles().end(); ++it) {
string filename = *it;
reader.readFile(new FileLine("CommandLine",0), filename, false);
}
// Read libraries
// To be compatible with other simulators,