diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index a55d9e45e..2514a53bd 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -1583,7 +1583,7 @@ static VCastable computeCastableImp(const AstNodeDType* toDtp, const AstNodeDTyp
         return VCastable::COMPATIBLE;
     } else if (toNumericable) {
         if (fromNumericable) return VCastable::COMPATIBLE;
-    } else if (VN_IS(toDtp, EnumDType)) {
+    } else if (VN_IS(toBaseDtp, EnumDType)) {
         if (VN_IS(fromBaseDtp, EnumDType) && toDtp->sameTree(fromDtp))
             return VCastable::ENUM_IMPLICIT;
         if (fromNumericable) return VCastable::ENUM_EXPLICIT;
diff --git a/test_regress/t/t_cast.v b/test_regress/t/t_cast.v
index 7d19dc870..98fba7f4e 100644
--- a/test_regress/t/t_cast.v
+++ b/test_regress/t/t_cast.v
@@ -28,6 +28,8 @@ module t;
       ONE = 1
    } enum_t;
 
+   typedef enum_t [3:0] enums_t;
+
    packed_t pdata;
    packed_t pdata_reg;
    packed2_t pdata2_reg;
@@ -37,6 +39,7 @@ module t;
 
    mc_t o;
    enum_t e;
+   enums_t es;
 
    intf the_intf();
 
@@ -69,6 +72,7 @@ module t;
    logic [31:0] thirty_two_bits;
    two_dee_t two_dee_sig;
 
+   int i;
    initial begin
       if (logic8bit != 8'h12) $stop;
       if (4'shf > 4'sh0) $stop;
@@ -95,6 +99,11 @@ module t;
       e = enum_t'(pdata_reg);
       if (e != ONE) $stop;
 
+      es = {ONE, ONE, ONE, ONE};
+      for (i = 0; i < 4; i++) if (es[i] != ONE) $stop;
+      es = enums_t'(64'h0001_0001_0001_0001);
+      for (i = 0; i < 4; i++) if (es[i] != ONE) $stop;
+
       o = tocast_t'(4'b1);
       if (o != 4'b1) $stop;