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Fix Replicate with unsigned count but MSB set (#6231) (#6233) 

Correctly compute witdh of AstReplicate in its constructor when the
count is unsigned but its MSB is set.
This commit is contained in:
Geza Lore 2025-07-27 11:30:19 +01:00 committed by GitHub
parent 1725ee9c52
commit 895b85a16e
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2 changed files with 7 additions and 2 deletions
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5
src/V3AstNodeExpr.h
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@ -3367,8 +3367,9 @@ public:
: ASTGEN_SUPER_Replicate(fl, lhsp, rhsp) {
if (lhsp) {
if (const AstConst* const constp = VN_CAST(rhsp, Const)) {
if (constp->num().isFourState() || constp->num().isNegative()) { // V3Width warns
dtypeSetLogicSized(lhsp->width(), VSigning::UNSIGNED);
if (constp->num().isFourState()
|| (constp->dtypep()->isSigned() && constp->num().isNegative())) {
dtypeSetLogicSized(lhsp->width(), VSigning::UNSIGNED); // V3Width warns
} else {
dtypeSetLogicSized(lhsp->width() * constp->toSInt(), VSigning::UNSIGNED);
}

4
test_regress/t/t_dfg_peephole.v
View File

@ -243,6 +243,10 @@ module t (
assign ascending_assign[4:7] = arand_b[0:3];
`signal(ASCENDING_ASSIGN, ascending_assign);
// Special cases to be covered
`signal(REPLICATE_WIDTH, {4'd8{rand_a[0]}}); // Replicate count unsigned, but MSB set
if ($bits(REPLICATE_WIDTH) != 8) $fatal("%0d != 8", $bits(REPLICATE_WIDTH));
// Sel from not requires the operand to have a sinle sink, so can't use
// the chekc due to the raw expression referencing the operand
wire [63:0] sel_from_not_tmp = ~(rand_a >> rand_b[2:0] << rand_a[3:0]);