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Add GTKWave LXT2 native tracing, bug1333. 

Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
This commit is contained in:
johnjohnlin 2018-08-28 06:41:17 -04:00 committed by Wilson Snyder
parent 3ed8d968ff
commit acf4a3fa99
33 changed files with 5154 additions and 34 deletions
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2
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@ -11,6 +11,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
** Add runtime arguments.
** Add GTKWave LXT2 native tracing, bug1333. [Yu Sheng Lin]
** Note $random has new algorithm; results may vary vs. previous versions.
*** Better optimize large always block splitting, bug1244. [John Coiner]

6
Makefile.in
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@ -128,6 +128,7 @@ DISTFILES_INC = $(INFOS) .gitignore Artistic COPYING COPYING.LESSER \
include/*.[chv]* \
include/*.in \
include/.*ignore \
include/lxt2/*.[chv]* \
include/vltstd/*.[chv]* \
.*attributes */.*attributes */*/.*attributes \
src/.*ignore src/*.in src/*.cpp src/*.[chly] \
@ -160,6 +161,7 @@ INST_PROJ_FILES = \
bin/verilator_profcfunc \
include/verilated.mk \
include/*.[chv]* \
include/lxt2/*.[chv]* \
include/vltstd/*.[chv]* \
INST_PROJ_BIN_FILES = \
@ -288,6 +290,7 @@ VL_INST_INC_BLDDIR_FILES = \
# Files under srcdir, instead of build time
VL_INST_INC_SRCDIR_FILES = \
include/*.[chv]* \
include/lxt2/*.[chv]* \
include/vltstd/*.[chv]* \
VL_INST_DATA_SRCDIR_FILES = \
@ -315,6 +318,7 @@ installman: $(VL_INST_MAN_FILES)
done
installdata:
$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/include/lxt2
$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/include/vltstd
for p in $(VL_INST_INC_BLDDIR_FILES) ; do \
$(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/$$p; \
@ -344,6 +348,7 @@ uninstall:
-cd $(DESTDIR)$(pkgdatadir) && rm -f $(VL_INST_DATA_SRCDIR_FILES)
-rm $(DESTDIR)$(pkgconfigdir)/verilator.pc
-rmdir $(DESTDIR)$(pkgdatadir)/bin
-rmdir $(DESTDIR)$(pkgdatadir)/include/lxt2
-rmdir $(DESTDIR)$(pkgdatadir)/include/vltstd
-rmdir $(DESTDIR)$(pkgdatadir)/include
-rmdir $(DESTDIR)$(pkgdatadir)/examples/hello_world_c
@ -408,6 +413,7 @@ ifeq ($(CFG_WITH_DEFENV),yes)
false
endif
@echo "Install-cadtools-quick (no strip) to $(VERILATOR_CAD_DIR)"
$(SHELL) ${srcdir}/mkinstalldirs $(VERILATOR_CAD_DIR)/include/lxt2
$(SHELL) ${srcdir}/mkinstalldirs $(VERILATOR_CAD_DIR)/include/vltstd
$(SHELL) ${srcdir}/mkinstalldirs $(VERILATOR_CAD_DIR)/bin
for p in $(INST_PROJ_FILES) ; do \

45
bin/verilator
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@ -356,6 +356,7 @@ detailed descriptions in L</"VERILATION ARGUMENTS"> for more information.
--threads-max-mtasks <mtasks> Tune maximum mtask partitioning
--top-module <topname> Name of top level input module
--trace Enable waveform creation
--trace-lxt2 Enable LXT2 waveform creation
--trace-depth <levels> Depth of tracing
--trace-max-array <depth> Maximum bit width for tracing
--trace-max-width <width> Maximum array depth for tracing
@ -1240,17 +1241,23 @@ designs with only one top.
=item --trace
Adds waveform tracing code to the model. Verilator will generate
additional {prefix}__Trace*.cpp files that will need to be compiled. In
addition verilated_vcd_sc.cpp (for SystemC traces) or verilated_vcd_c.cpp
(for both) must be compiled and linked in. If using the Verilator
generated Makefiles, these files will be added as source targets for you.
If you're not using the Verilator makefiles, you will need to add these to
your Makefile manually.
Adds waveform tracing code to the model using VCD format. This overrides
C<--trace-lxt2>.
Verilator will generate additional {prefix}__Trace*.cpp files that will
need to be compiled. In addition verilated_vcd_sc.cpp (for SystemC traces)
or verilated_vcd_c.cpp (for both) must be compiled and linked in. If using
the Verilator generated Makefiles, these files will be added as source
targets for you. If you're not using the Verilator makefiles, you will
need to add these to your Makefile manually.
Having tracing compiled in may result in some small performance losses,
even when waveforms are not turned on during model execution.
=item --trace-lxt2
Enable LXT2 waveform tracing in the model. This overrides C<--trace>.
=item --trace-depth I<levels>
Specify the number of levels deep to enable tracing, for example
@ -4098,11 +4105,29 @@ trace file if you want all data to land in the same output file.
tfp->close();
}
=item How do I generate LXT2 waveforms (traces) in C++?
LXT2 a format by GTKWave, which is usually 10x smaller than VCD format.
This version provides a basic LXT2 support.
To dump LXT2 format, add the --trace switch to Verilator and change the include path in the testbench to:
#include "verilated_lxt2_c.h"
VerilatedLxt2C* tfp = new VerilatedLxt2C;
Note that currently supporting both LXT2 and VCD in a single simulation is impossible,
but such requirement could be rare.
=item How do I generate LXT2 waveforms (traces) in SystemC?
The LXT2 library from GTKWave does not currently support SystemC; use VCD
format instead.
=item How do I view waveforms (traces)?
Verilator makes standard VCD (Value Change Dump) files. They are viewable
with the public domain GtkWave (recommended) or Dinotrace (legacy)
programs, or any of the many commercial offerings.
Verilator makes standard VCD (Value Change Dump) and LXT2 files. VCD files are viewable
with the public domain GTKWave (recommended) or Dinotrace (legacy)
programs, or any of the many commercial offerings;
LXT2 is supported by GTKWave only.
=item How do I reduce the size of large waveform (trace) files?

12
include/lxt2/lxt2_config.h Normal file
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@ -0,0 +1,12 @@
/* This file specifically for LXT2 usage */
/* config.h. Generated from config.h.in by configure. */
/* config.h.in. Generated from configure.ac by autoheader. */
/* Define to 1 if you have `alloca', as a function or macro. */
#define HAVE_ALLOCA 1
/* Define to 1 if you have <alloca.h> and it should be used (not on Ultrix). */
#define HAVE_ALLOCA_H 1
/* Define to 1 if fseeko (and presumably ftello) exists and is declared. */
#define HAVE_FSEEKO 1

2206
include/lxt2/lxt2_write.cpp Normal file
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314
include/lxt2/lxt2_write.h Normal file
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@ -0,0 +1,314 @@
/*
* Copyright (c) 2003-2012 Tony Bybell.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef DEFS_LXTW_H
#define DEFS_LXTW_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>
#include <errno.h>
#include <unistd.h>
#include <stdint.h>
#include <zlib.h>
#ifndef HAVE_FSEEKO
#define fseeko fseek
#define ftello ftell
#endif
#include "wavealloca.h"
#define LXT2_WR_HDRID (0x1380)
#define LXT2_WR_VERSION (0x0001)
#define LXT2_WR_GRANULE_SIZE (64)
#define LXT2_WR_GRANULE_NUM (256)
#define LXT2_WR_PARTIAL_SIZE (2048)
#define LXT2_WR_GRAN_SECT_TIME 0
#define LXT2_WR_GRAN_SECT_DICT 1
#define LXT2_WR_GRAN_SECT_TIME_PARTIAL 2
#define LXT2_WR_GZWRITE_BUFFER 4096
#define LXT2_WR_SYMPRIME 500009
typedef uint64_t lxttime_t;
typedef int64_t lxtstime_t;
#ifndef _MSC_VER
#ifdef __MINGW32__
#define LXT2_WR_LLD "%I64d"
#else
#define LXT2_WR_LLD "%lld"
#endif
#define LXT2_WR_LLDESC(x) x##LL
#define LXT2_WR_ULLDESC(x) x##ULL
#else
#define LXT2_WR_LLD "%I64d"
#define LXT2_WR_LLDESC(x) x##i64
#define LXT2_WR_ULLDESC(x) x##i64
#endif
#if LXT2_WR_GRANULE_SIZE > 32
typedef unsigned long long granmsk_t;
#define LXT2_WR_GRAN_0VAL (LXT2_WR_ULLDESC(0))
#define LXT2_WR_GRAN_1VAL (LXT2_WR_ULLDESC(1))
#else
typedef unsigned int granmsk_t;
#define LXT2_WR_GRAN_0VAL (0)
#define LXT2_WR_GRAN_1VAL (1)
#endif
enum LXT2_WR_Encodings {
LXT2_WR_ENC_0,
LXT2_WR_ENC_1,
LXT2_WR_ENC_INV,
LXT2_WR_ENC_LSH0,
LXT2_WR_ENC_LSH1,
LXT2_WR_ENC_RSH0,
LXT2_WR_ENC_RSH1,
LXT2_WR_ENC_ADD1,
LXT2_WR_ENC_ADD2,
LXT2_WR_ENC_ADD3,
LXT2_WR_ENC_ADD4,
LXT2_WR_ENC_SUB1,
LXT2_WR_ENC_SUB2,
LXT2_WR_ENC_SUB3,
LXT2_WR_ENC_SUB4,
LXT2_WR_ENC_X,
LXT2_WR_ENC_Z,
LXT2_WR_ENC_BLACKOUT,
LXT2_WR_DICT_START
};
/*
* integer splay
*/
typedef struct lxt2_wr_ds_tree_node lxt2_wr_ds_Tree;
struct lxt2_wr_ds_tree_node {
lxt2_wr_ds_Tree * left, * right;
granmsk_t item;
int val;
lxt2_wr_ds_Tree * next;
};
/*
* string splay
*/
typedef struct lxt2_wr_dslxt_tree_node lxt2_wr_dslxt_Tree;
struct lxt2_wr_dslxt_tree_node {
lxt2_wr_dslxt_Tree * left, * right;
char *item;
unsigned int val;
lxt2_wr_dslxt_Tree * next;
};
struct lxt2_wr_trace
{
FILE *handle;
gzFile zhandle;
lxt2_wr_dslxt_Tree *dict; /* dictionary manipulation */
unsigned int num_dict_entries;
unsigned int dict_string_mem_required;
lxt2_wr_dslxt_Tree *dict_head;
lxt2_wr_dslxt_Tree *dict_curr;
lxt2_wr_ds_Tree *mapdict; /* bitmap compression */
unsigned int num_map_entries;
lxt2_wr_ds_Tree *mapdict_head;
lxt2_wr_ds_Tree *mapdict_curr;
off_t position;
off_t zfacname_predec_size, zfacname_size, zfacgeometry_size;
off_t zpackcount, zpackcount_cumulative;
off_t current_chunk, current_chunkz;
struct lxt2_wr_symbol *sym[LXT2_WR_SYMPRIME];
struct lxt2_wr_symbol **sorted_facs;
struct lxt2_wr_symbol *symchain;
unsigned int numfacs, numalias;
int numfacbytes;
int longestname;
int numsections, numblock;
off_t facname_offset, facgeometry_offset;
lxttime_t mintime, maxtime;
lxtstime_t timezero;
unsigned int timegranule;
int timescale;
unsigned int timepos;
unsigned int maxgranule;
lxttime_t firsttime, lasttime;
lxttime_t timetable[LXT2_WR_GRANULE_SIZE];
unsigned int partial_iter;
char *compress_fac_str;
int compress_fac_len;
lxttime_t flushtime;
unsigned flush_valid : 1;
unsigned do_strip_brackets : 1;
unsigned emitted : 1; /* gate off change field zmode changes when set */
unsigned timeset : 1; /* time has been modified from 0..0 */
unsigned bumptime : 1; /* says that must go to next time position in granule as value change exists for current time */
unsigned granule_dirty : 1; /* for flushing out final block */
unsigned blackout : 1; /* blackout on/off */
unsigned partial : 1; /* partial (vertical) trace support */
unsigned partial_zip : 1; /* partial (vertical) trace support for zip subregions */
unsigned no_checkpoint : 1; /* turns off interblock checkpointing */
unsigned partial_preference : 1; /* partial preference encountered on some facs */
char initial_value;
char zmode[4]; /* fills in with "wb0".."wb9" */
unsigned int gzbufpnt;
unsigned char gzdest[LXT2_WR_GZWRITE_BUFFER + 4]; /* enough for zlib buffering */
char *lxtname;
off_t break_size;
off_t break_header_size;
unsigned int break_number;
};
struct lxt2_wr_symbol
{
struct lxt2_wr_symbol *next;
struct lxt2_wr_symbol *symchain;
char *name;
int namlen;
int facnum;
struct lxt2_wr_symbol *aliased_to;
char *value; /* fac's actual value */
unsigned int rows;
int msb, lsb;
int len;
int flags;
unsigned partial_preference : 1; /* in order to shove nets to the first partial group */
unsigned int chgpos;
granmsk_t msk; /* must contain LXT2_WR_GRANULE_SIZE bits! */
unsigned int chg[LXT2_WR_GRANULE_SIZE];
};
#define LXT2_WR_SYM_F_BITS (0)
#define LXT2_WR_SYM_F_INTEGER (1<<0)
#define LXT2_WR_SYM_F_DOUBLE (1<<1)
#define LXT2_WR_SYM_F_STRING (1<<2)
#define LXT2_WR_SYM_F_TIME (LXT2_WR_SYM_F_STRING) /* user must correctly format this as a string */
#define LXT2_WR_SYM_F_ALIAS (1<<3)
#define LXT2_WR_SYM_F_SIGNED (1<<4)
#define LXT2_WR_SYM_F_BOOLEAN (1<<5)
#define LXT2_WR_SYM_F_NATURAL ((1<<6)|(LXT2_WR_SYM_F_INTEGER))
#define LXT2_WR_SYM_F_POSITIVE ((1<<7)|(LXT2_WR_SYM_F_INTEGER))
#define LXT2_WR_SYM_F_CHARACTER (1<<8)
#define LXT2_WR_SYM_F_CONSTANT (1<<9)
#define LXT2_WR_SYM_F_VARIABLE (1<<10)
#define LXT2_WR_SYM_F_SIGNAL (1<<11)
#define LXT2_WR_SYM_F_IN (1<<12)
#define LXT2_WR_SYM_F_OUT (1<<13)
#define LXT2_WR_SYM_F_INOUT (1<<14)
#define LXT2_WR_SYM_F_WIRE (1<<15)
#define LXT2_WR_SYM_F_REG (1<<16)
/* file I/O */
struct lxt2_wr_trace * lxt2_wr_init(const char *name);
void lxt2_wr_flush(struct lxt2_wr_trace *lt);
void lxt2_wr_close(struct lxt2_wr_trace *lt);
/* for dealing with very large traces, split into multiple files approximately "siz" in length */
void lxt2_wr_set_break_size(struct lxt2_wr_trace *lt, off_t siz);
/* 0 = no compression, 9 = best compression, 4 = default */
void lxt2_wr_set_compression_depth(struct lxt2_wr_trace *lt, unsigned int depth);
/* default is partial off, turning on makes for faster trace reads, nonzero zipmode causes vertical compression */
void lxt2_wr_set_partial_off(struct lxt2_wr_trace *lt);
void lxt2_wr_set_partial_on(struct lxt2_wr_trace *lt, int zipmode);
void lxt2_wr_set_partial_preference(struct lxt2_wr_trace *lt, const char *name);
/* turning off checkpointing makes for smaller files */
void lxt2_wr_set_checkpoint_off(struct lxt2_wr_trace *lt);
void lxt2_wr_set_checkpoint_on(struct lxt2_wr_trace *lt);
/* facility creation */
void lxt2_wr_set_initial_value(struct lxt2_wr_trace *lt, char value);
struct lxt2_wr_symbol * lxt2_wr_symbol_find(struct lxt2_wr_trace *lt, const char *name);
struct lxt2_wr_symbol * lxt2_wr_symbol_add(struct lxt2_wr_trace *lt, const char *name, unsigned int rows, int msb, int lsb, int flags);
struct lxt2_wr_symbol * lxt2_wr_symbol_alias(struct lxt2_wr_trace *lt, const char *existing_name, const char *alias, int msb, int lsb);
void lxt2_wr_symbol_bracket_stripping(struct lxt2_wr_trace *lt, int doit);
/* each granule is LXT2_WR_GRANULE_SIZE (32 or 64) timesteps, default is 256 per section */
void lxt2_wr_set_maxgranule(struct lxt2_wr_trace *lt, unsigned int maxgranule);
/* time ops */
void lxt2_wr_set_timescale(struct lxt2_wr_trace *lt, int timescale);
void lxt2_wr_set_timezero(struct lxt2_wr_trace *lt, lxtstime_t timeval);
int lxt2_wr_set_time(struct lxt2_wr_trace *lt, unsigned int timeval);
int lxt2_wr_inc_time_by_delta(struct lxt2_wr_trace *lt, unsigned int timeval);
int lxt2_wr_set_time64(struct lxt2_wr_trace *lt, lxttime_t timeval);
int lxt2_wr_inc_time_by_delta64(struct lxt2_wr_trace *lt, lxttime_t timeval);
/* allows blackout regions in LXT files */
void lxt2_wr_set_dumpoff(struct lxt2_wr_trace *lt);
void lxt2_wr_set_dumpon(struct lxt2_wr_trace *lt);
/* left fill on bit_string uses vcd semantics (left fill with value[0] unless value[0]=='1', then use '0') */
int lxt2_wr_emit_value_int(struct lxt2_wr_trace *lt, struct lxt2_wr_symbol *s, unsigned int row, int value);
int lxt2_wr_emit_value_double(struct lxt2_wr_trace *lt, struct lxt2_wr_symbol *s, unsigned int row, double value);
int lxt2_wr_emit_value_string(struct lxt2_wr_trace *lt, struct lxt2_wr_symbol *s, unsigned int row, char *value);
int lxt2_wr_emit_value_bit_string(struct lxt2_wr_trace *lt, struct lxt2_wr_symbol *s, unsigned int row, char *value);
#ifdef __cplusplus
}
#endif
#endif

29
include/lxt2/wavealloca.h Normal file
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@ -0,0 +1,29 @@
/*
* Copyright (c) Tony Bybell 1999.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*/
#ifndef WAVE_ALLOCA_H
#define WAVE_ALLOCA_H
#include <stdlib.h>
#ifdef HAVE_ALLOCA_H
#include <alloca.h>
#elif defined(__GNUC__)
#ifndef __MINGW32__
#ifndef alloca
#define alloca __builtin_alloca
#endif
#else
#include <malloc.h>
#endif
#elif defined(_MSC_VER)
#include <malloc.h>
#define alloca _alloca
#endif
#define wave_alloca alloca
#endif

2
include/verilated.h
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@ -79,6 +79,8 @@ class VerilatedVar;
class VerilatedVarNameMap;
class VerilatedVcd;
class VerilatedVcdC;
class VerilatedLxt2;
class VerilatedLxt2C;
enum VerilatedVarType {
VLVT_UNKNOWN=0,

180
include/verilated_lxt2_c.cpp Normal file
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@ -0,0 +1,180 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//=============================================================================
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2001-2018 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//
// This is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
//=============================================================================
///
/// \file
/// \brief C++ Tracing in LXT2 Format
///
//=============================================================================
// SPDIFF_OFF
#include "verilatedos.h"
#include "verilated.h"
#include "verilated_lxt2_c.h"
// Include the GTKWave implementation directly
#include "lxt2/lxt2_write.cpp"
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <cerrno>
#include <ctime>
#include <algorithm>
#include <sstream>
#if defined(_WIN32) && !defined(__MINGW32__) && !defined(__CYGWIN__)
# include <io.h>
#else
# include <unistd.h>
#endif
//=============================================================================
class VerilatedLxt2CallInfo {
protected:
friend class VerilatedLxt2;
VerilatedLxt2Callback_t m_initcb; ///< Initialization Callback function
VerilatedLxt2Callback_t m_fullcb; ///< Full Dumping Callback function
VerilatedLxt2Callback_t m_changecb; ///< Incremental Dumping Callback function
void* m_userthis; ///< Fake "this" for caller
vluint32_t m_code; ///< Starting code number
// CONSTRUCTORS
VerilatedLxt2CallInfo (VerilatedLxt2Callback_t icb, VerilatedLxt2Callback_t fcb,
VerilatedLxt2Callback_t changecb,
void* ut, vluint32_t code)
: m_initcb(icb), m_fullcb(fcb), m_changecb(changecb), m_userthis(ut), m_code(code) {};
~VerilatedLxt2CallInfo() {}
};
//=============================================================================
// VerilatedLxt2
VerilatedLxt2::VerilatedLxt2(lxt2_wr_trace* lxt2)
: m_lxt2(lxt2),
m_fullDump(true),
m_scopeEscape('.') {}
void VerilatedLxt2::open(const char* filename) VL_MT_UNSAFE {
m_assertOne.check();
m_lxt2 = lxt2_wr_init(filename);
for (vluint32_t ent = 0; ent< m_callbacks.size(); ent++) {
VerilatedLxt2CallInfo* cip = m_callbacks[ent];
cip->m_code = 1;
(cip->m_initcb)(this, cip->m_userthis, cip->m_code);
}
}
void VerilatedLxt2::module(const std::string& name) {
m_module = name;
}
//=============================================================================
// Decl
void VerilatedLxt2::declSymbol(vluint32_t code, const char* name, int arraynum, int msb, int lsb, int flags) {
if (msb == 0 && lsb == 0) {
msb = lsb = -1;
}
std::pair<Code2SymbolType::iterator, bool> p
= m_code2symbol.insert(std::make_pair(code, (lxt2_wr_symbol*)(NULL)));
std::stringstream name_ss;
name_ss <<m_module<<"."<<name;
if (arraynum >= 0) {
name_ss <<"("<<arraynum<<")";
}
std::string name_s = name_ss.str();
for (std::string::iterator it = name_s.begin(); it != name_s.end(); ++it) {
if (isScopeEscape(*it)) {
*it = '.';
}
}
if (p.second) { // New
p.first->second = lxt2_wr_symbol_add(m_lxt2, name_s.c_str(), 0, msb, lsb, flags);
assert(p.first->second);
} else { // Alias
lxt2_wr_symbol_alias(m_lxt2, p.first->second->name, name_s.c_str(), msb, lsb);
}
}
//=============================================================================
// Callbacks
void VerilatedLxt2::addCallback(
VerilatedLxt2Callback_t initcb, VerilatedLxt2Callback_t fullcb,
VerilatedLxt2Callback_t changecb, void* userthis) VL_MT_UNSAFE_ONE {
m_assertOne.check();
if (VL_UNLIKELY(isOpen())) {
std::string msg = std::string("Internal: ")+__FILE__+"::"+__FUNCTION__+" called with already open file";
VL_FATAL_MT(__FILE__,__LINE__,"",msg.c_str());
}
VerilatedLxt2CallInfo* vci = new VerilatedLxt2CallInfo(initcb, fullcb, changecb, userthis, 1);
m_callbacks.push_back(vci);
}
//=============================================================================
// Dumping
void VerilatedLxt2::dump(vluint64_t timeui) {
if (!isOpen()) return;
if (VL_UNLIKELY(m_fullDump)) {
m_fullDump = false; // No need for more full dumps
for (vluint32_t ent = 0; ent< m_callbacks.size(); ent++) {
VerilatedLxt2CallInfo* cip = m_callbacks[ent];
(cip->m_fullcb)(this, cip->m_userthis, cip->m_code);
}
return;
}
lxt2_wr_set_time64(m_lxt2, timeui);
for (vluint32_t ent = 0; ent< m_callbacks.size(); ++ent) {
VerilatedLxt2CallInfo* cip = m_callbacks[ent];
(cip->m_changecb)(this, cip->m_userthis, cip->m_code);
}
}
//=============================================================================
// Helpers
char* VerilatedLxt2::quad2Str(vluint64_t newval, int bits) {
m_valueStrBuffer.resize(bits+1);
char* s = m_valueStrBuffer.data();
for (int i = 0; i < bits; ++i) {
*s = '0' + ((newval>>(bits-i-1))&1);
++s;
}
*s = '\0';
return m_valueStrBuffer.data();
}
char* VerilatedLxt2::array2Str(const vluint32_t* newval, int bits) {
int bq = bits/32, br = bits%32;
m_valueStrBuffer.resize(bits+1);
char* s = m_valueStrBuffer.data();
for (int w = bq-1; w >= 0; --w) {
for (int i = 0; i < 32; ++i) {
*s = '0' + ((newval[w]>>(32-i-1))&1);
++s;
}
}
for (int i = 0; i < br; ++i) {
*s = '0' + ((newval[bq]>>(br-i-1))&1);
++s;
}
*s = '\0';
return m_valueStrBuffer.data();
}
//********************************************************************
// Local Variables:
// End:

204
include/verilated_lxt2_c.h Normal file
View File

@ -0,0 +1,204 @@
// -*- mode: C++; c-file-style: "cc-mode" -*-
//=============================================================================
//
// THIS MODULE IS PUBLICLY LICENSED
//
// Copyright 2001-2018 by Wilson Snyder. This program is free software;
// you can redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
//
// This is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
//=============================================================================
///
/// \file
/// \brief C++ Tracing in LXT2 Format
///
//=============================================================================
// SPDIFF_OFF
#ifndef _VERILATED_LXT2_C_H_
#define _VERILATED_LXT2_C_H_ 1
#include "verilatedos.h"
#include "verilated.h"
#include "lxt2/lxt2_write.h"
#include <string>
#include <vector>
#include <map>
class VerilatedLxt2;
class VerilatedLxt2CallInfo;
typedef void (*VerilatedLxt2Callback_t)(VerilatedLxt2* vcdp, void* userthis, vluint32_t code);
//=============================================================================
// VerilatedLxt2
/// Base class to create a Verilator LXT2 dump
/// This is an internally used class - see VerilatedLxt2C for what to call from applications
class VerilatedLxt2 {
typedef std::map<vluint32_t, lxt2_wr_symbol*> Code2SymbolType;
typedef std::vector<VerilatedLxt2CallInfo*> CallbackVec;
private:
lxt2_wr_trace* m_lxt2;
VerilatedAssertOneThread m_assertOne; ///< Assert only called from single thread
bool m_fullDump;
char m_scopeEscape;
std::string m_module;
CallbackVec m_callbacks; ///< Routines to perform dumping
Code2SymbolType m_code2symbol;
// CONSTRUCTORS
VL_UNCOPYABLE(VerilatedLxt2);
void declSymbol(vluint32_t code, const char* name, int arraynum, int msb, int lsb, int flags);
// helpers
std::vector<char> m_valueStrBuffer;
char* quad2Str(vluint64_t newval, int bits);
char* array2Str(const vluint32_t *newval, int bits);
public:
explicit VerilatedLxt2(lxt2_wr_trace* lxt2=NULL);
~VerilatedLxt2() { if (m_lxt2 == NULL) { lxt2_wr_close(m_lxt2); } }
bool isOpen() const { return m_lxt2 != NULL; }
void open(const char* filename) VL_MT_UNSAFE;
void flush() VL_MT_UNSAFE { lxt2_wr_flush(m_lxt2); }
void close() VL_MT_UNSAFE {
m_assertOne.check();
lxt2_wr_close(m_lxt2);
m_lxt2 = NULL;
}
// void set_time_unit(const char* unit); ///< Set time units (s/ms, defaults to ns)
// void set_time_unit(const std::string& unit) { set_time_unit(unit.c_str()); }
// void set_time_resolution(const char* unit); ///< Set time resolution (s/ms, defaults to ns)
// void set_time_resolution(const std::string& unit) { set_time_resolution(unit.c_str()); }
// double timescaleToDouble(const char* unitp);
// std::string doubleToTimescale(double value);
/// Change character that splits scopes. Note whitespace are ALWAYS escapes.
void scopeEscape(char flag) { m_scopeEscape = flag; }
/// Is this an escape?
bool isScopeEscape(char c) { return isspace(c) || c==m_scopeEscape; }
/// Inside dumping routines, called each cycle to make the dump
void dump(vluint64_t timeui);
/// Inside dumping routines, declare callbacks for tracings
void addCallback(VerilatedLxt2Callback_t init, VerilatedLxt2Callback_t full,
VerilatedLxt2Callback_t change,
void* userthis) VL_MT_UNSAFE_ONE;
/// Inside dumping routines, declare a module
void module(const std::string& name);
/// Inside dumping routines, declare a signal
void declBit(vluint32_t code, const char* name, int arraynum) {
this->declSymbol(code, name, arraynum, 0, 0, LXT2_WR_SYM_F_BITS);
}
void declBus(vluint32_t code, const char* name, int arraynum, int msb, int lsb) {
this->declSymbol(code, name, arraynum, msb, lsb, LXT2_WR_SYM_F_BITS);
}
void declDouble(vluint32_t code, const char* name, int arraynum) {
this->declSymbol(code, name, arraynum, 63, 0, LXT2_WR_SYM_F_DOUBLE);
}
void declFloat(vluint32_t code, const char* name, int arraynum) {
this->declSymbol(code, name, arraynum, 63, 0, LXT2_WR_SYM_F_DOUBLE);
}
void declQuad(vluint32_t code, const char* name, int arraynum, int msb, int lsb) {
this->declSymbol(code, name, arraynum, msb, lsb, LXT2_WR_SYM_F_BITS);
}
void declArray(vluint32_t code, const char* name, int arraynum, int msb, int lsb) {
this->declSymbol(code, name, arraynum, msb, lsb, LXT2_WR_SYM_F_BITS);
}
/// Inside dumping routines, dump one signal if it has changed
void chgBit(vluint32_t code, const vluint32_t newval) {
lxt2_wr_emit_value_int(m_lxt2, m_code2symbol[code], 0, newval);
}
void chgBus(vluint32_t code, const vluint32_t newval, int bits) {
lxt2_wr_emit_value_int(m_lxt2, m_code2symbol[code], 0, newval);
}
void chgDouble(vluint32_t code, const double newval) {
lxt2_wr_emit_value_double(m_lxt2, m_code2symbol[code], 0, newval);
}
void chgFloat(vluint32_t code, const float newval) {
lxt2_wr_emit_value_double(m_lxt2, m_code2symbol[code], 0, newval);
}
void chgQuad(vluint32_t code, const vluint64_t newval, int bits) {
lxt2_wr_emit_value_bit_string(m_lxt2, m_code2symbol[code], 0, quad2Str(newval, bits));
}
void chgArray(vluint32_t code, const vluint32_t* newval, int bits) {
lxt2_wr_emit_value_bit_string(m_lxt2, m_code2symbol[code], 0, array2Str(newval, bits));
}
void fullBit(vluint32_t code, const vluint32_t newval) { chgBit(code, newval); }
void fullBus(vluint32_t code, const vluint32_t newval, int bits) { chgBus(code, newval, bits); }
void fullDouble(vluint32_t code, const double newval) { chgDouble(code, newval); }
void fullFloat(vluint32_t code, const float newval) { chgFloat(code, newval); }
void fullQuad(vluint32_t code, const vluint64_t newval, int bits) { chgQuad(code, newval, bits); }
void fullArray(vluint32_t code, const vluint32_t* newval, int bits) { chgArray(code, newval, bits); }
void declTriBit (vluint32_t code, const char* name, int arraynum);
void declTriBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
void declTriQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
void declTriArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb);
void fullTriBit(vluint32_t code, const vluint32_t newval, const vluint32_t newtri);
void fullTriBus(vluint32_t code, const vluint32_t newval, const vluint32_t newtri, int bits);
void fullTriQuad(vluint32_t code, const vluint64_t newval, const vluint32_t newtri, int bits);
void fullTriArray(vluint32_t code, const vluint32_t* newvalp, const vluint32_t* newtrip, int bits);
void fullBitX(vluint32_t code);
void fullBusX(vluint32_t code, int bits);
void fullQuadX(vluint32_t code, int bits);
void fullArrayX(vluint32_t code, int bits);
void chgTriBit(vluint32_t code, const vluint32_t newval, const vluint32_t newtri);
void chgTriBus(vluint32_t code, const vluint32_t newval, const vluint32_t newtri, int bits);
void chgTriQuad(vluint32_t code, const vluint64_t newval, const vluint32_t newtri, int bits);
void chgTriArray(vluint32_t code, const vluint32_t* newvalp, const vluint32_t* newtrip, int bits);
};
//=============================================================================
// VerilatedLxt2C
/// Create a LXT2 dump file in C standalone (no SystemC) simulations.
/// Also derived for use in SystemC simulations.
/// Thread safety: Unless otherwise indicated, every function is VL_MT_UNSAFE_ONE
class VerilatedLxt2C {
VerilatedLxt2 m_sptrace; ///< Trace file being created
// CONSTRUCTORS
VL_UNCOPYABLE(VerilatedLxt2C);
public:
explicit VerilatedLxt2C(lxt2_wr_trace* filep=NULL) : m_sptrace(filep) {}
~VerilatedLxt2C() {}
public:
// ACCESSORS
/// Is file open?
bool isOpen() const { return m_sptrace.isOpen(); }
// METHODS
/// Open a new LXT2 file
void open(const char* filename) VL_MT_UNSAFE_ONE { m_sptrace.open(filename); }
/// Close dump
void close() VL_MT_UNSAFE_ONE { m_sptrace.close(); }
/// Flush dump
void flush() VL_MT_UNSAFE_ONE { m_sptrace.flush(); }
/// Write one cycle of dump data
void dump(vluint64_t timeui) { m_sptrace.dump(timeui); }
/// Write one cycle of dump data - backward compatible and to reduce
/// conversion warnings. It's better to use a vluint64_t time instead.
void dump(double timestamp) { dump(static_cast<vluint64_t>(timestamp)); }
void dump(vluint32_t timestamp) { dump(static_cast<vluint64_t>(timestamp)); }
void dump(int timestamp) { dump(static_cast<vluint64_t>(timestamp)); }
/// Set time units (s/ms, defaults to ns)
/// See also VL_TIME_PRECISION, and VL_TIME_MULTIPLIER in verilated.h
void set_time_unit(const char* unit) { /* TODO */ }
void set_time_unit(const std::string& unit) { set_time_unit(unit.c_str()); }
/// Set time resolution (s/ms, defaults to ns)
/// See also VL_TIME_PRECISION, and VL_TIME_MULTIPLIER in verilated.h
void set_time_resolution(const char* unit) { /* TODO */ }
void set_time_resolution(const std::string& unit) { set_time_resolution(unit.c_str()); }
/// Internal class access
inline VerilatedLxt2* spTrace() { return &m_sptrace; };
};
#endif // guard

6
src/V3EmitC.cpp
View File

@ -2539,7 +2539,7 @@ void EmitCImp::emitInt(AstNodeModule* modp) {
}
if (v3Global.opt.trace()) {
if (modp->isTop()) puts("/// Trace signals in the model; called by application code\n");
puts("void trace(VerilatedVcdC* tfp, int levels, int options=0);\n");
puts("void trace("+v3Global.opt.traceClassBase()+"C* tfp, int levels, int options=0);\n");
if (modp->isTop() && optSystemC()) {
puts("/// SC tracing; avoid overloaded virtual function lint warning\n");
puts("virtual void trace(sc_trace_file* tfp) const { ::sc_core::sc_module::trace(tfp); }\n");
@ -2739,7 +2739,7 @@ class EmitCTrace : EmitCStmts {
void emitTraceHeader() {
// Includes
puts("#include \"verilated_vcd_c.h\"\n");
puts("#include \""+v3Global.opt.traceSourceName()+"_c.h\"\n");
puts("#include \""+ symClassName() +".h\"\n");
puts("\n");
}
@ -2748,7 +2748,7 @@ class EmitCTrace : EmitCStmts {
puts("\n//======================\n\n");
puts("void "+topClassName()+"::trace(");
puts("VerilatedVcdC* tfp, int, int) {\n");
puts(v3Global.opt.traceClassBase()+"C* tfp, int, int) {\n");
puts( "tfp->spTrace()->addCallback("
"&"+topClassName()+"::traceInit"
+", &"+topClassName()+"::traceFull"

8
src/V3EmitMk.cpp
View File

@ -89,9 +89,13 @@ public:
putMakeClassEntry(of, "verilated_cov.cpp");
}
if (v3Global.opt.trace()) {
putMakeClassEntry(of, "verilated_vcd_c.cpp");
putMakeClassEntry(of, v3Global.opt.traceSourceName()+"_c.cpp");
if (v3Global.opt.systemC()) {
putMakeClassEntry(of, "verilated_vcd_sc.cpp");
if (v3Global.opt.traceFormat() != TraceFormat::VCD) {
v3error("Unsupported: This trace format is not supported in SystemC, use VCD format.");
} else {
putMakeClassEntry(of, v3Global.opt.traceSourceName()+"_sc.cpp");
}
}
}
if (v3Global.opt.mtasks()) {

2
src/V3Options.cpp
View File

@ -695,6 +695,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char
else if ( !strcmp (sw, "-sv") ) { m_defaultLanguage = V3LangCode::L1800_2005; }
else if ( onoff (sw, "-threads-coarsen", flag/*ref*/)) { m_threadsCoarsen = flag; } // Undocumented, debug
else if ( onoff (sw, "-trace", flag/*ref*/) ) { m_trace = flag; }
else if ( onoff (sw, "-trace-lxt2", flag/*ref*/) ) { m_trace = flag; m_traceFormat = TraceFormat::LXT2; addLdLibs("-lz"); }
else if ( onoff (sw, "-trace-dups", flag/*ref*/) ) { m_traceDups = flag; }
else if ( onoff (sw, "-trace-params", flag/*ref*/) ) { m_traceParams = flag; }
else if ( onoff (sw, "-trace-structs", flag/*ref*/) ) { m_traceStructs = flag; }
@ -1277,6 +1278,7 @@ V3Options::V3Options() {
m_threadsCoarsen = true;
m_threadsMaxMTasks = 0;
m_trace = false;
m_traceFormat = TraceFormat::VCD;
m_traceDups = false;
m_traceParams = true;
m_traceStructs = false;

47
src/V3Options.h
View File

@ -31,16 +31,49 @@
#include "V3Global.h"
#include "V3LangCode.h"
//######################################################################
// V3Options - Command line options
class V3OptionsImp;
class FileLine;
//######################################################################
class TraceFormat {
public:
enum en {
VCD = 0,
LXT2
} m_e;
inline TraceFormat(en _e = VCD) : m_e(_e) {}
explicit inline TraceFormat(int _e) : m_e(static_cast<en>(_e)) {}
operator en() const { return m_e; }
string classBase() const {
static const char* const names[] = {
"VerilatedVcd",
"VerilatedLxt2"
};
return names[m_e];
}
string sourceName() const {
static const char* const names[] = {
"verilated_vcd",
"verilated_lxt2"
};
return names[m_e];
}
};
inline bool operator==(TraceFormat lhs, TraceFormat rhs) { return (lhs.m_e == rhs.m_e); }
inline bool operator==(TraceFormat lhs, TraceFormat::en rhs) { return (lhs.m_e == rhs); }
inline bool operator==(TraceFormat::en lhs, TraceFormat rhs) { return (lhs == rhs.m_e); }
typedef std::vector<string> V3StringList;
typedef std::set<string> V3StringSet;
//######################################################################
// V3Options - Command line options
class V3Options {
public:
private:
// TYPES
typedef std::map<string,int> DebugSrcMap;
@ -126,6 +159,7 @@ class V3Options {
int m_threads; // main switch: --threads (0 == --no-threads)
int m_threadsMaxMTasks; // main switch: --threads-max-mtasks
int m_traceDepth; // main switch: --trace-depth
TraceFormat m_traceFormat; // main switch: --trace or --trace-lxt2
int m_traceMaxArray;// main switch: --trace-max-array
int m_traceMaxWidth;// main switch: --trace-max-width
int m_unrollCount; // main switch: --unroll-count
@ -284,7 +318,8 @@ class V3Options {
int threads() const { return m_threads; }
int threadsMaxMTasks() const { return m_threadsMaxMTasks; }
bool mtasks() const { return (m_threads > 1); }
int traceDepth() const { return m_traceDepth; }
int traceDepth() const { return m_traceDepth; }
TraceFormat traceFormat() const { return m_traceFormat; }
int traceMaxArray() const { return m_traceMaxArray; }
int traceMaxWidth() const { return m_traceMaxWidth; }
int unrollCount() const { return m_unrollCount; }
@ -344,8 +379,8 @@ class V3Options {
bool oSubstConst() const { return m_oSubstConst; }
bool oTable() const { return m_oTable; }
// METHODS (uses above)
string traceClassBase() const { return "VerilatedVcd"; }
string traceClassBase() const { return m_traceFormat.classBase(); }
string traceSourceName() const { return m_traceFormat.sourceName(); }
// METHODS (from main)
static string version();

45
test_regress/driver.pl
View File

@ -431,7 +431,6 @@ sub new {
$self->{status_filename} ||= "$self->{obj_dir}/V".$self->{name}.".status";
$self->{run_log_filename} ||= "$self->{obj_dir}/vlt_sim.log";
$self->{coverage_filename} ||= "$self->{obj_dir}/coverage.dat";
$self->{vcd_filename} ||= "$self->{obj_dir}/sim.vcd";
$self->{main_filename} ||= "$self->{obj_dir}/$self->{VM_PREFIX}__main.cpp";
($self->{top_filename} = $self->{pl_filename}) =~ s/\.pl$//;
if (-e ($self->{top_filename}.".vhd")) { # If VHDL file exists
@ -588,7 +587,10 @@ sub compile_vlt_flags {
@{$param{verilator_flags2}},
@{$param{verilator_flags3}});
$self->{sc} = 1 if ($checkflags =~ /-sc\b/);
$self->{trace} = 1 if ($opt_trace || $checkflags =~ /-trace\b/);
$self->{trace} = ($opt_trace || $checkflags =~ /-trace\b/ || $checkflags =~ /-trace-lxt2\b/);
$self->{trace_format} = (($checkflags =~ /-trace-lxt2\b/ && 'lxt2-c')
|| ($self->{sc} && 'vcd-sc')
|| (!$self->{sc} && 'vcd-c'));
$self->{savable} = 1 if ($checkflags =~ /-savable\b/);
$self->{coverage} = 1 if ($checkflags =~ /-coverage\b/);
@ -1012,6 +1014,12 @@ sub have_sc {
return 0;
}
sub trace_filename {
my $self = shift;
return "$self->{obj_dir}/simx.lxt2" if $self->{trace_format} =~ /^lxt2/;
return "$self->{obj_dir}/simx.vcd";
}
#----------------------------------------------------------------------
sub run {
@ -1177,8 +1185,9 @@ sub _make_main {
print $fh "// General headers\n";
print $fh "#include \"verilated.h\"\n";
print $fh "#include \"systemc.h\"\n" if $self->sc;
print $fh "#include \"verilated_vcd_c.h\"\n" if $self->{trace} && !$self->sc;
print $fh "#include \"verilated_vcd_sc.h\"\n" if $self->{trace} && $self->sc;
print $fh "#include \"verilated_lxt2_c.h\"\n" if $self->{trace} && $self->{trace_format} eq 'lxt2-c';
print $fh "#include \"verilated_vcd_c.h\"\n" if $self->{trace} && $self->{trace_format} eq 'vcd-c';
print $fh "#include \"verilated_vcd_sc.h\"\n" if $self->{trace} && $self->{trace_format} eq 'vcd-sc';
print $fh "#include \"verilated_save.h\"\n" if $self->{savable};
print $fh "$VM_PREFIX * topp;\n";
@ -1240,10 +1249,11 @@ sub _make_main {
$fh->print("\n");
$fh->print("#if VM_TRACE\n");
$fh->print(" Verilated::traceEverOn(true);\n");
$fh->print(" VerilatedVcdC* tfp = new VerilatedVcdC;\n") if !$self->sc;
$fh->print(" VerilatedVcdSc* tfp = new VerilatedVcdSc;\n") if $self->sc;
$fh->print(" VerilatedVcdC* tfp = new VerilatedVcdC;\n") if $self->{trace_format} eq 'vcd-c';
$fh->print(" VerilatedVcdSc* tfp = new VerilatedVcdSc;\n") if $self->{trace_format} eq 'vcd-sc';
$fh->print(" VerilatedLxt2C* tfp = new VerilatedLxt2C;\n") if $self->{trace_format} eq 'lxt2-c';
$fh->print(" topp->trace(tfp, 99);\n");
$fh->print(" tfp->open(\"$self->{obj_dir}/simx.vcd\");\n");
$fh->print(" tfp->open(\"".$self->trace_filename."\");\n");
if ($self->{trace} && !$self->sc) {
$fh->print(" if (tfp) tfp->dump (main_time);\n");
}
@ -1376,8 +1386,8 @@ sub _make_top_v {
print $fh "\n";
print $fh "`ifdef WAVES\n";
print $fh " initial begin\n";
print $fh " \$display(\"-Tracing Waves to Dumpfile: $self->{vcd_filename}\");\n";
print $fh " \$dumpfile(\"$self->{vcd_filename}\");\n";
print $fh " \$display(\"-Tracing Waves to Dumpfile: ".$self->trace_filename."\");\n";
print $fh " \$dumpfile(\"".$self->trace_filename."\");\n";
print $fh " \$dumpvars(0, top);\n";
print $fh " end\n";
print $fh "`endif\n";
@ -1594,6 +1604,23 @@ sub vcd_identical {
return 1;
}
sub lxt2vcd {
my $self = (ref $_[0]? shift : $Self);
my $fn1 = shift;
my $fn2 = shift;
if (!-r $fn1) { $self->error("File does not exist $fn1\n"); return 0; }
my $cmd = qq{lxt2vcd --help};
print "\t$cmd\n" if $::Debug;
my $out = `$cmd`;
if ($out !~ /Usage:/) { $self->skip("No lxt2vcd installed\n"); return 0; }
$cmd = qq{lxt2vcd "$fn1" -o "$fn2"};
print "\t$cmd\n" if $::Debug;
$out = `$cmd`;
return 1;
}
sub _vcd_read {
my $self = (ref $_[0]? shift : $Self);
my $filename = shift;

3
test_regress/t/t_dist_cinclude.pl
View File

@ -24,7 +24,8 @@ if (!-r "$root/.git") {
my $cmd = "cd $root && fgrep -n include $files | sort";
my $grep = `$cmd`;
foreach my $line (split /\n/, $grep) {
next if $line =~ /vpi_user.h/; # IEEE Standard file - can't change it
next if $line =~ m!include/vltstd/vpi_user.h!; # IEEE Standard file - can't change it
next if $line =~ m!include/lxt2/!; # Standard file - can't change it
my $hit;
$hit = 1 if $line =~ /\bassert\.h/;
$hit = 1 if $line =~ /\bctype\.h/;

57
test_regress/t/t_trace_array_lxt2.out Normal file
View File

@ -0,0 +1,57 @@
$date
Tue Aug 28 17:08:13 2018
$end
$version
lxt2vcd
$end
$timescale 1ns $end
$scope module top $end
$var wire 1 ! clk $end
$scope module t $end
$scope module biggie $end
$var wire 1048577 " d [1048576:0] $end
$upscope $end
$var wire 32 # cyc [31:0] $end
$var wire 1 ! clk $end
$upscope $end
$upscope $end
$enddefinitions $end
$dumpvars
#0
0!
b0 "
b0 #
#10
b1 #
b111111101110110111111010110011100 "
1!
#15
0!
#20
1!
b1111111011101101111110101100111000 "
b10 #
#25
0!
#30
1!
b11 #
b11111110111011011111101011001110000 "
#35
0!
#40
1!
b111111101110110111111010110011100000 "
b100 #
#45
0!
#50
1!
b101 #
b1111111011101101111110101100111000000 "
#55
0!
#60
1!
b11111110111011011111101011001110000000 "
b110 #

26
test_regress/t/t_trace_array_lxt2.pl Executable file
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@ -0,0 +1,26 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
scenarios(vlt => 1);
top_filename("t/t_trace_array.v");
compile(
verilator_flags2 => ['--cc --trace-lxt2 --trace-structs'],
);
execute(
check_finished => 1,
);
lxt2vcd($Self->trace_filename, "$Self->{obj_dir}/simx-lxt2vcd.vcd");
vcd_identical("$Self->{obj_dir}/simx-lxt2vcd.vcd", "t/$Self->{name}.out");
ok(1);
1;

193
test_regress/t/t_trace_complex_lxt2.out Normal file
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@ -0,0 +1,193 @@
$date
Tue Aug 28 15:03:55 2018
$end
$version
lxt2vcd
$end
$timescale 1ns $end
$scope module top $end
$scope module $unit $end
$var wire 1 ! global_bit $end
$upscope $end
$var wire 1 " clk $end
$scope module t $end
$var wire 32 # cyc [31:0] $end
$scope module p2 $end
$var wire 32 $ PARAM [31:0] $end
$upscope $end
$scope module p3 $end
$var wire 32 % PARAM [31:0] $end
$upscope $end
$scope module unnamedblk1 $end
$var wire 32 & b [31:0] $end
$scope module unnamedblk2 $end
$var wire 32 ' a [31:0] $end
$upscope $end
$upscope $end
$var real 1 ( v_arr_real(0) $end
$var real 1 ) v_arr_real(1) $end
$var wire 2 * v_arrp [2:1] $end
$var wire 4 + v_arrp_arrp [3:0] $end
$var wire 4 , v_arrp_strp [3:0] $end
$var wire 1 - v_arru(1) $end
$var wire 1 . v_arru(2) $end
$var wire 2 / v_arru_arrp(3) [2:1] $end
$var wire 2 0 v_arru_arrp(4) [2:1] $end
$var wire 1 1 v_arru_arru(3)(1) $end
$var wire 1 2 v_arru_arru(3)(2) $end
$var wire 1 3 v_arru_arru(4)(1) $end
$var wire 1 4 v_arru_arru(4)(2) $end
$var wire 2 5 v_arru_strp(3) [1:0] $end
$var wire 2 6 v_arru_strp(4) [1:0] $end
$var real 1 7 v_real $end
$var wire 64 8 v_str32x2 [63:0] $end
$var wire 2 9 v_strp [1:0] $end
$var wire 4 : v_strp_strp [3:0] $end
$var wire 2 ; v_unip_strp [1:0] $end
$var wire 1 " clk $end
$upscope $end
$upscope $end
$enddefinitions $end
$dumpvars
#0
1!
0"
b0 #
b10 $
b11 %
b0 &
b0 '
r0 (
r0 )
b0 *
b0 +
b0 ,
0-
0.
b0 /
b0 0
01
02
03
04
b0 5
b0 6
r0 7
b11111111 8
b0 9
b0 :
b0 ;
#10
b11 ;
b1111 :
b11 9
b100000000000000000000000011111110 8
r0.1 7
b11 6
b11 5
b11 0
b11 /
b1111 ,
b1111 +
b11 *
r0.3 )
r0.2 (
b101 '
b101 &
b1 #
1"
#15
0"
#20
1"
b10 #
r0.4 (
r0.6 )
b0 *
b0 +
b0 ,
b0 /
b0 0
b0 5
b0 6
r0.2 7
b1000000000000000000000000011111101 8
b0 9
b0 :
b0 ;
#25
0"
#30
1"
b11 ;
b1111 :
b11 9
b1100000000000000000000000011111100 8
r0.3 7
b11 6
b11 5
b11 0
b11 /
b1111 ,
b1111 +
b11 *
r0.8999999999999999 )
r0.6000000000000001 (
b11 #
#35
0"
#40
1"
b100 #
r0.8 (
r1.2 )
b0 *
b0 +
b0 ,
b0 /
b0 0
b0 5
b0 6
r0.4 7
b10000000000000000000000000011111011 8
b0 9
b0 :
b0 ;
#45
0"
#50
1"
b11 ;
b1111 :
b11 9
b10100000000000000000000000011111010 8
r0.5 7
b11 6
b11 5
b11 0
b11 /
b1111 ,
b1111 +
b11 *
r1.5 )
r1 (
b101 #
#55
0"
#60
1"
b110 #
r1.2 (
r1.8 )
b0 *
b0 +
b0 ,
b0 /
b0 0
b0 5
b0 6
r0.6 7
b11000000000000000000000000011111001 8
b0 9
b0 :
b0 ;

26
test_regress/t/t_trace_complex_lxt2.pl Executable file
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@ -0,0 +1,26 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
scenarios(simulator => 1);
top_filename("t/t_trace_complex.v");
compile(
verilator_flags2 => ['--cc --trace-lxt2'],
);
execute(
check_finished => 1,
);
lxt2vcd($Self->trace_filename, "$Self->{obj_dir}/simx-lxt2vcd.vcd");
vcd_identical("$Self->{obj_dir}/simx-lxt2vcd.vcd", "t/$Self->{name}.out");
ok(1);
1;

193
test_regress/t/t_trace_complex_params_lxt2.out Normal file
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@ -0,0 +1,193 @@
$date
Tue Aug 28 15:09:58 2018
$end
$version
lxt2vcd
$end
$timescale 1ns $end
$scope module top $end
$scope module $unit $end
$var wire 1 ! global_bit $end
$upscope $end
$var wire 1 " clk $end
$scope module t $end
$var wire 32 # cyc [31:0] $end
$scope module p2 $end
$var wire 32 $ PARAM [31:0] $end
$upscope $end
$scope module p3 $end
$var wire 32 % PARAM [31:0] $end
$upscope $end
$scope module unnamedblk1 $end
$var wire 32 & b [31:0] $end
$scope module unnamedblk2 $end
$var wire 32 ' a [31:0] $end
$upscope $end
$upscope $end
$var real 1 ( v_arr_real(0) $end
$var real 1 ) v_arr_real(1) $end
$var wire 2 * v_arrp [2:1] $end
$var wire 4 + v_arrp_arrp [3:0] $end
$var wire 4 , v_arrp_strp [3:0] $end
$var wire 1 - v_arru(1) $end
$var wire 1 . v_arru(2) $end
$var wire 2 / v_arru_arrp(3) [2:1] $end
$var wire 2 0 v_arru_arrp(4) [2:1] $end
$var wire 1 1 v_arru_arru(3)(1) $end
$var wire 1 2 v_arru_arru(3)(2) $end
$var wire 1 3 v_arru_arru(4)(1) $end
$var wire 1 4 v_arru_arru(4)(2) $end
$var wire 2 5 v_arru_strp(3) [1:0] $end
$var wire 2 6 v_arru_strp(4) [1:0] $end
$var real 1 7 v_real $end
$var wire 64 8 v_str32x2 [63:0] $end
$var wire 2 9 v_strp [1:0] $end
$var wire 4 : v_strp_strp [3:0] $end
$var wire 2 ; v_unip_strp [1:0] $end
$var wire 1 " clk $end
$upscope $end
$upscope $end
$enddefinitions $end
$dumpvars
#0
1!
0"
b0 #
b10 $
b11 %
b0 &
b0 '
r0 (
r0 )
b0 *
b0 +
b0 ,
0-
0.
b0 /
b0 0
01
02
03
04
b0 5
b0 6
r0 7
b11111111 8
b0 9
b0 :
b0 ;
#10
b11 ;
b1111 :
b11 9
b100000000000000000000000011111110 8
r0.1 7
b11 6
b11 5
b11 0
b11 /
b1111 ,
b1111 +
b11 *
r0.3 )
r0.2 (
b101 '
b101 &
b1 #
1"
#15
0"
#20
1"
b10 #
r0.4 (
r0.6 )
b0 *
b0 +
b0 ,
b0 /
b0 0
b0 5
b0 6
r0.2 7
b1000000000000000000000000011111101 8
b0 9
b0 :
b0 ;
#25
0"
#30
1"
b11 ;
b1111 :
b11 9
b1100000000000000000000000011111100 8
r0.3 7
b11 6
b11 5
b11 0
b11 /
b1111 ,
b1111 +
b11 *
r0.8999999999999999 )
r0.6000000000000001 (
b11 #
#35
0"
#40
1"
b100 #
r0.8 (
r1.2 )
b0 *
b0 +
b0 ,
b0 /
b0 0
b0 5
b0 6
r0.4 7
b10000000000000000000000000011111011 8
b0 9
b0 :
b0 ;
#45
0"
#50
1"
b11 ;
b1111 :
b11 9
b10100000000000000000000000011111010 8
r0.5 7
b11 6
b11 5
b11 0
b11 /
b1111 ,
b1111 +
b11 *
r1.5 )
r1 (
b101 #
#55
0"
#60
1"
b110 #
r1.2 (
r1.8 )
b0 *
b0 +
b0 ,
b0 /
b0 0
b0 5
b0 6
r0.6 7
b11000000000000000000000000011111001 8
b0 9
b0 :
b0 ;

26
test_regress/t/t_trace_complex_params_lxt2.pl Executable file
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@ -0,0 +1,26 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
scenarios(simulator => 1);
top_filename("t_trace_complex.v");
compile(
verilator_flags2 => ['--cc --trace-lxt2 --no-trace-structs --trace-params'],
);
execute(
check_finished => 1,
);
lxt2vcd($Self->trace_filename, "$Self->{obj_dir}/simx-lxt2vcd.vcd");
vcd_identical("$Self->{obj_dir}/simx-lxt2vcd.vcd", "t/$Self->{name}.out");
ok(1);
1;

311
test_regress/t/t_trace_complex_structs_lxt2.out Normal file
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@ -0,0 +1,311 @@
$date
Tue Aug 28 15:07:10 2018
$end
$version
lxt2vcd
$end
$timescale 1ns $end
$scope module top $end
$scope module $unit $end
$var wire 1 ! global_bit $end
$upscope $end
$var wire 1 " clk $end
$scope module t $end
$var wire 32 # cyc [31:0] $end
$scope module unnamedblk1 $end
$var wire 32 $ b [31:0] $end
$scope module unnamedblk2 $end
$var wire 32 % a [31:0] $end
$upscope $end
$upscope $end
$var real 1 & v_arr_real(0) $end
$var real 1 ' v_arr_real(1) $end
$var wire 2 ( v_arrp [2:1] $end
$var wire 2 ) v_arrp_arrp(3) [1:0] $end
$var wire 2 * v_arrp_arrp(4) [1:0] $end
$scope module v_arrp_strp(3) $end
$var wire 1 + b0 $end
$var wire 1 , b1 $end
$upscope $end
$scope module v_arrp_strp(4) $end
$var wire 1 - b0 $end
$var wire 1 . b1 $end
$upscope $end
$var wire 1 / v_arru(1) $end
$var wire 1 0 v_arru(2) $end
$var wire 2 1 v_arru_arrp(3) [2:1] $end
$var wire 2 2 v_arru_arrp(4) [2:1] $end
$var wire 1 3 v_arru_arru(3)(1) $end
$var wire 1 4 v_arru_arru(3)(2) $end
$var wire 1 5 v_arru_arru(4)(1) $end
$var wire 1 6 v_arru_arru(4)(2) $end
$scope module v_arru_strp(3) $end
$var wire 1 7 b0 $end
$var wire 1 8 b1 $end
$upscope $end
$scope module v_arru_strp(4) $end
$var wire 1 9 b0 $end
$var wire 1 : b1 $end
$upscope $end
$var real 1 ; v_real $end
$scope module v_str32x2(0) $end
$var wire 32 < data [31:0] $end
$upscope $end
$scope module v_str32x2(1) $end
$var wire 32 = data [31:0] $end
$upscope $end
$scope module v_strp $end
$var wire 1 > b0 $end
$var wire 1 ? b1 $end
$upscope $end
$scope module v_strp_strp $end
$scope module x0 $end
$var wire 1 @ b0 $end
$var wire 1 A b1 $end
$upscope $end
$scope module x1 $end
$var wire 1 B b0 $end
$var wire 1 C b1 $end
$upscope $end
$upscope $end
$scope module v_unip_strp $end
$scope module x1 $end
$var wire 1 D b0 $end
$var wire 1 E b1 $end
$upscope $end
$upscope $end
$var wire 1 " clk $end
$scope module v_unip_strp $end
$scope module x0 $end
$var wire 1 D b0 $end
$var wire 1 E b1 $end
$upscope $end
$upscope $end
$upscope $end
$upscope $end
$enddefinitions $end
$dumpvars
#0
1!
0"
b0 #
b0 $
b0 %
r0 &
r0 '
b0 (
b0 )
b0 *
0+
0,
0-
0.
0/
00
b0 1
b0 2
03
04
05
06
07
08
09
0:
r0 ;
b11111111 <
b0 =
0>
0?
0@
0A
0B
0C
0D
0E
#10
1E
1D
1C
1B
1A
1@
1?
1>
b1 =
b11111110 <
r0.1 ;
1:
19
18
17
b11 2
b11 1
1.
1-
1,
1+
b11 *
b11 )
b11 (
r0.3 '
r0.2 &
b101 %
b101 $
b1 #
1"
#15
0"
#20
1"
b10 #
r0.4 &
r0.6 '
b0 (
b0 )
b0 *
0+
0,
0-
0.
b0 1
b0 2
07
08
09
0:
r0.2 ;
b11111101 <
b10 =
0>
0?
0@
0A
0B
0C
0D
0E
#25
0"
#30
1"
1E
1D
1C
1B
1A
1@
1?
1>
b11 =
b11111100 <
r0.3 ;
1:
19
18
17
b11 2
b11 1
1.
1-
1,
1+
b11 *
b11 )
b11 (
r0.8999999999999999 '
r0.6000000000000001 &
b11 #
#35
0"
#40
1"
b100 #
r0.8 &
r1.2 '
b0 (
b0 )
b0 *
0+
0,
0-
0.
b0 1
b0 2
07
08
09
0:
r0.4 ;
b11111011 <
b100 =
0>
0?
0@
0A
0B
0C
0D
0E
#45
0"
#50
1"
1E
1D
1C
1B
1A
1@
1?
1>
b101 =
b11111010 <
r0.5 ;
1:
19
18
17
b11 2
b11 1
1.
1-
1,
1+
b11 *
b11 )
b11 (
r1.5 '
r1 &
b101 #
#55
0"
#60
1"
b110 #
r1.2 &
r1.8 '
b0 (
b0 )
b0 *
0+
0,
0-
0.
b0 1
b0 2
07
08
09
0:
r0.6 ;
b11111001 <
b110 =
0>
0?
0@
0A
0B
0C
0D
0E

26
test_regress/t/t_trace_complex_structs_lxt2.pl Executable file
View File

@ -0,0 +1,26 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
scenarios(simulator => 1);
top_filename("t_trace_complex.v");
compile(
verilator_flags2 => ['--cc --trace-lxt2 --trace-structs --no-trace-params'],
);
execute(
check_finished => 1,
);
lxt2vcd($Self->trace_filename, "$Self->{obj_dir}/simx-lxt2vcd.vcd");
vcd_identical("$Self->{obj_dir}/simx-lxt2vcd.vcd", "t/$Self->{name}.out");
ok(1);
1;

993
test_regress/t/t_trace_lxt2.out Normal file
View File

@ -0,0 +1,993 @@
$date
Tue Aug 28 05:58:13 2018
$end
$version
lxt2vcd
$end
$timescale 1ns $end
$scope module top $end
$var wire 1 ! clk $end
$var wire 5 " state [4:0] $end
$scope module t $end
$var wire 32 # cyc [31:0] $end
$var wire 1 $ rstn $end
$scope module test $end
$var wire 5 % state_array(0) [4:0] $end
$var wire 5 & state_array(1) [4:0] $end
$var wire 5 ' state_array(2) [4:0] $end
$var wire 5 ( state_w [4:0] $end
$scope module unnamedblk1 $end
$var wire 32 ) i [31:0] $end
$upscope $end
$scope module unnamedblk2 $end
$var wire 32 * i [31:0] $end
$upscope $end
$upscope $end
$var wire 1 ! clk $end
$var wire 5 " state [4:0] $end
$scope module test $end
$var wire 1 ! clk $end
$var wire 1 $ rstn $end
$var wire 5 " state [4:0] $end
$upscope $end
$upscope $end
$upscope $end
$enddefinitions $end
$dumpvars
#0
0!
b0 "
b0 #
0$
b0 %
b0 &
b0 '
b0 (
b0 )
b0 *
#10
b11 )
b10100 (
b1 '
b1 &
b1 %
b1 #
b1 "
1!
#15
0!
#20
1!
b10 #
#25
0!
#30
1!
b11 #
#35
0!
#40
1!
b100 #
#45
0!
#50
1!
b101 #
#55
0!
#60
1!
b110 #
#65
0!
#70
1!
b111 #
#75
0!
#80
1!
b1000 #
#85
0!
#90
1!
b1001 #
#95
0!
#100
1!
b1010 #
#105
0!
#110
1!
b1011 #
1$
#115
0!
#120
1!
b1100 #
b10100 '
b1010 (
b10 *
#125
0!
#130
1!
b101 (
b1010 '
b1101 #
b10100 &
#135
0!
#140
1!
b1010 &
b1110 #
b101 '
b10110 (
b10100 "
b10100 %
#145
0!
#150
1!
b1010 %
b1010 "
b1011 (
b10110 '
b1111 #
b101 &
#155
0!
#160
1!
b10110 &
b10000 #
b1011 '
b10001 (
b101 "
b101 %
#165
0!
#170
1!
b10110 %
b10110 "
b11100 (
b10001 '
b10001 #
b1011 &
#175
0!
#180
1!
b10001 &
b10010 #
b11100 '
b1110 (
b1011 "
b1011 %
#185
0!
#190
1!
b10001 %
b10001 "
b111 (
b1110 '
b10011 #
b11100 &
#195
0!
#200
1!
b1110 &
b10100 #
b111 '
b10111 (
b11100 "
b11100 %
#205
0!
#210
1!
b1110 %
b1110 "
b11111 (
b10111 '
b10101 #
b111 &
#215
0!
#220
1!
b10111 &
b10110 #
b11111 '
b11011 (
b111 "
b111 %
#225
0!
#230
1!
b10111 %
b10111 "
b11001 (
b11011 '
b10111 #
b11111 &
#235
0!
#240
1!
b11011 &
b11000 #
b11001 '
b11000 (
b11111 "
b11111 %
#245
0!
#250
1!
b11011 %
b11011 "
b1100 (
b11000 '
b11001 #
b11001 &
#255
0!
#260
1!
b11000 &
b11010 #
b1100 '
b110 (
b11001 "
b11001 %
#265
0!
#270
1!
b11000 %
b11000 "
b11 (
b110 '
b11011 #
b1100 &
#275
0!
#280
1!
b110 &
b11100 #
b11 '
b10101 (
b1100 "
b1100 %
#285
0!
#290
1!
b110 %
b110 "
b11110 (
b10101 '
b11101 #
b11 &
#295
0!
#300
1!
b10101 &
b11110 #
b11110 '
b1111 (
b11 "
b11 %
#305
0!
#310
1!
b10101 %
b10101 "
b10011 (
b1111 '
b11111 #
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0!
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1!
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b1 %
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1!
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b101 '
b1010 &
b10100 %
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0!
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b1010 "
b101110 #
b1010 %
b101 &
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b10110 &
b101 %
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b10110 %
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b10001 &
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b10001 %
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b10111 %
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b1000010 #
b11101 %
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0!
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b101 %
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b11010 %
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0!
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1!
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b10010 &
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b1100100 #
b10010 %
b1001 &
b10000 '
b1000 (

22
test_regress/t/t_trace_lxt2.pl Executable file
View File

@ -0,0 +1,22 @@
#!/usr/bin/perl
# This file ONLY is placed into the Public Domain, for any use,
# Author: Yu-Sheng Lin johnjohnlys@media.ee.ntu.edu.tw
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
scenarios(vlt_all => 1);
compile(
v_flags2 => ["--trace-lxt2"],
);
execute(
check_finished => 1,
);
lxt2vcd($Self->trace_filename, "$Self->{obj_dir}/simx-lxt2vcd.vcd");
vcd_identical("$Self->{obj_dir}/simx-lxt2vcd.vcd", "t/$Self->{name}.out");
ok(1);
1;

76
test_regress/t/t_trace_lxt2.v Normal file
View File

@ -0,0 +1,76 @@
// This file ONLY is placed into the Public Domain, for any use,
// Author: Yu-Sheng Lin johnjohnlys@media.ee.ntu.edu.tw
module t (/*AUTOARG*/
// Outputs
state,
// Inputs
clk
);
input clk;
int cyc;
reg rstn;
output [4:0] state;
Test test (/*AUTOINST*/
// Outputs
.state (state[4:0]),
// Inputs
.clk (clk),
.rstn (rstn));
// Test loop
always @ (posedge clk) begin
cyc <= cyc + 1;
if (cyc==0) begin
// Setup
rstn <= ~'1;
end
else if (cyc<10) begin
rstn <= ~'1;
end
else if (cyc<90) begin
rstn <= ~'0;
end
else if (cyc==99) begin
$write("*-* All Finished *-*\n");
$finish;
end
end
endmodule
module Test (
input clk,
input rstn,
output logic [4:0] state
);
logic [4:0] state_w;
logic [4:0] state_array [3];
assign state = state_array[0];
always_comb begin
state_w[4] = state_array[2][0];
state_w[3] = state_array[2][4];
state_w[2] = state_array[2][3] ^ state_array[2][0];
state_w[1] = state_array[2][2];
state_w[0] = state_array[2][1];
end
always_ff @(posedge clk or negedge rstn) begin
if (!rstn) begin
for (int i = 0; i < 3; i++)
state_array[i] <= 'b1;
end
else begin
for (int i = 0; i < 2; i++)
state_array[i] <= state_array[i+1];
state_array[2] <= state_w;
end
end
endmodule

13
test_regress/t/t_trace_packed_struct.v
View File

@ -9,6 +9,7 @@ module t (/*AUTOARG*/
);
input clk;
int cnt;
// This won't compile with tracing as an incorrect declaration is made for
// the temp variables used to represent the elements of localparam v
@ -22,8 +23,14 @@ module t (/*AUTOARG*/
'{'{32'h30000002, 32'h30000001, 32'h30000000}}
};
initial begin
$write("*-* All Finished *-*\n");
$finish;
initial cnt = 0;
always@(posedge clk) begin
if (cnt < 3) begin
cnt = cnt + 1;
end
else begin
$write("*-* All Finished *-*\n");
$finish;
end
end
endmodule

42
test_regress/t/t_trace_packed_struct_lxt2.out Normal file
View File

@ -0,0 +1,42 @@
$date
Tue Aug 28 16:59:34 2018
$end
$version
lxt2vcd
$end
$timescale 1ns $end
$scope module top $end
$var wire 1 ! clk $end
$scope module t $end
$var wire 32 " cnt [31:0] $end
$var wire 96 # v(0) [95:0] $end
$var wire 96 $ v(1) [95:0] $end
$var wire 96 % v(2) [95:0] $end
$var wire 1 ! clk $end
$upscope $end
$upscope $end
$enddefinitions $end
$dumpvars
#0
0!
b0 "
b1100000000000000000000000000100011000000000000000000000000000100110000000000000000000000000000 #
b1000000000000000000000000000100010000000000000000000000000000100100000000000000000000000000000 $
b100000000000000000000000000100001000000000000000000000000000100010000000000000000000000000000 %
#10
b1 "
1!
#15
0!
#20
1!
b10 "
#25
0!
#30
1!
b11 "
#35
0!
#40
1!

26
test_regress/t/t_trace_packed_struct_lxt2.pl Executable file
View File

@ -0,0 +1,26 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
scenarios(simulator => 1);
top_filename("t/t_trace_packed_struct.v");
compile(
v_flags2 => ["--trace-lxt2"]
);
execute(
check_finished => 1,
);
lxt2vcd($Self->trace_filename, "$Self->{obj_dir}/simx-lxt2vcd.vcd");
vcd_identical("$Self->{obj_dir}/simx-lxt2vcd.vcd", "t/$Self->{name}.out");
ok(1);
1;

23
test_regress/t/t_trace_param_lxt2.pl Executable file
View File

@ -0,0 +1,23 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003-2013 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
scenarios(vlt_all => 1);
top_filename("t/t_trace_param.v");
compile(
v_flags2 => ["--trace-lxt2"],
);
execute(
check_finished => 1,
);
ok(1);
1;

23
test_regress/t/t_trace_primitive_lxt2.pl Executable file
View File

@ -0,0 +1,23 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003-2013 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
scenarios(simulator => 1);
top_filename("t/t_trace_primitive.v");
compile(
v_flags2 => ["--trace-lxt2"],
);
execute(
check_finished => 1,
);
ok(1);
1;

1
test_regress/t/t_verilated_all.pl
View File

@ -49,6 +49,7 @@ foreach my $dfile (glob("$Self->{obj_dir}/*.d")) {
foreach my $file (sort keys %hit) {
if (!$hit{$file}
&& $file !~ /_sc/
&& $file !~ /_lxt2/
&& ($file !~ /_thread/ || $Self->cfg_with_threaded)) {
error("Include file not covered by t_verilated_all test: ",$file);
}